./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 06:02:52,730 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 06:02:52,781 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 06:02:52,786 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 06:02:52,786 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 06:02:52,807 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 06:02:52,807 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 06:02:52,807 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 06:02:52,808 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 06:02:52,808 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 06:02:52,808 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 06:02:52,808 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 06:02:52,808 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 06:02:52,808 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 06:02:52,808 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 06:02:52,809 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 06:02:52,809 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 06:02:52,809 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:02:52,810 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 06:02:52,810 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:02:52,811 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 06:02:52,811 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 [2024-12-02 06:02:53,012 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 06:02:53,019 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 06:02:53,021 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 06:02:53,022 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 06:02:53,022 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 06:02:53,023 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:02:55,634 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/77c0bed2d/1c42cfc330ff4d12ad2ed4f84a67a21a/FLAGefb792198 [2024-12-02 06:02:55,897 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 06:02:55,898 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:02:55,910 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/77c0bed2d/1c42cfc330ff4d12ad2ed4f84a67a21a/FLAGefb792198 [2024-12-02 06:02:56,200 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/77c0bed2d/1c42cfc330ff4d12ad2ed4f84a67a21a [2024-12-02 06:02:56,201 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 06:02:56,202 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 06:02:56,204 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 06:02:56,204 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 06:02:56,207 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 06:02:56,207 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:56,208 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25a41869 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56, skipping insertion in model container [2024-12-02 06:02:56,208 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:56,241 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 06:02:56,363 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-12-02 06:02:56,583 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 06:02:56,593 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 06:02:56,602 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-12-02 06:02:56,712 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 06:02:56,725 INFO L204 MainTranslator]: Completed translation [2024-12-02 06:02:56,725 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56 WrapperNode [2024-12-02 06:02:56,726 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 06:02:56,726 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 06:02:56,726 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 06:02:56,726 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 06:02:56,731 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:56,764 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,010 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-12-02 06:02:57,011 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 06:02:57,012 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 06:02:57,012 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 06:02:57,012 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 06:02:57,019 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,019 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,047 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,128 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 06:02:57,129 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,129 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,180 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,185 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,200 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,223 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,234 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,291 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 06:02:57,292 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 06:02:57,292 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 06:02:57,292 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 06:02:57,293 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (1/1) ... [2024-12-02 06:02:57,297 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:02:57,306 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:02:57,316 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 06:02:57,318 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 06:02:57,336 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 06:02:57,336 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 06:02:57,336 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 06:02:57,336 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 06:02:57,336 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 06:02:57,336 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 06:02:57,620 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 06:02:57,622 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 06:03:01,041 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-12-02 06:03:01,041 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 06:03:01,065 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 06:03:01,065 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 06:03:01,066 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 06:03:01 BoogieIcfgContainer [2024-12-02 06:03:01,066 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 06:03:01,068 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 06:03:01,068 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 06:03:01,072 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 06:03:01,072 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 06:02:56" (1/3) ... [2024-12-02 06:03:01,073 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6019b727 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 06:03:01, skipping insertion in model container [2024-12-02 06:03:01,073 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:02:56" (2/3) ... [2024-12-02 06:03:01,073 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6019b727 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 06:03:01, skipping insertion in model container [2024-12-02 06:03:01,073 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 06:03:01" (3/3) ... [2024-12-02 06:03:01,074 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:03:01,089 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 06:03:01,090 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c that has 2 procedures, 872 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 06:03:01,156 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 06:03:01,167 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@d27bbf3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 06:03:01,167 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 06:03:01,173 INFO L276 IsEmpty]: Start isEmpty. Operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:01,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 06:03:01,187 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:01,188 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:01,188 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:01,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:01,193 INFO L85 PathProgramCache]: Analyzing trace with hash -684669181, now seen corresponding path program 1 times [2024-12-02 06:03:01,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:01,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004795605] [2024-12-02 06:03:01,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:01,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:01,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:01,677 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 06:03:01,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:01,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1004795605] [2024-12-02 06:03:01,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1004795605] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:03:01,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [145149746] [2024-12-02 06:03:01,678 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:01,679 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:03:01,679 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:03:01,681 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:03:01,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 06:03:02,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:02,315 INFO L256 TraceCheckSpWp]: Trace formula consists of 1413 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 06:03:02,326 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:03:02,348 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 06:03:02,348 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:03:02,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [145149746] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:02,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:03:02,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 06:03:02,350 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399180061] [2024-12-02 06:03:02,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:02,354 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 06:03:02,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:02,370 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 06:03:02,370 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 06:03:02,373 INFO L87 Difference]: Start difference. First operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:02,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:02,439 INFO L93 Difference]: Finished difference Result 1575 states and 2357 transitions. [2024-12-02 06:03:02,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 06:03:02,441 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 213 [2024-12-02 06:03:02,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:02,452 INFO L225 Difference]: With dead ends: 1575 [2024-12-02 06:03:02,452 INFO L226 Difference]: Without dead ends: 869 [2024-12-02 06:03:02,457 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 06:03:02,459 INFO L435 NwaCegarLoop]: 1297 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:02,460 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:02,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-02 06:03:02,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 869. [2024-12-02 06:03:02,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 869 states, 864 states have (on average 1.494212962962963) internal successors, (1291), 864 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:02,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 869 states to 869 states and 1297 transitions. [2024-12-02 06:03:02,524 INFO L78 Accepts]: Start accepts. Automaton has 869 states and 1297 transitions. Word has length 213 [2024-12-02 06:03:02,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:02,524 INFO L471 AbstractCegarLoop]: Abstraction has 869 states and 1297 transitions. [2024-12-02 06:03:02,525 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:02,525 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 1297 transitions. [2024-12-02 06:03:02,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 06:03:02,528 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:02,529 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:02,540 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 06:03:02,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-12-02 06:03:02,730 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:02,730 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:02,730 INFO L85 PathProgramCache]: Analyzing trace with hash 275406397, now seen corresponding path program 1 times [2024-12-02 06:03:02,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:02,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494308988] [2024-12-02 06:03:02,731 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:02,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:02,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:04,120 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:04,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:04,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494308988] [2024-12-02 06:03:04,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [494308988] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:04,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:04,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:04,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563314988] [2024-12-02 06:03:04,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:04,122 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:04,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:04,123 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:04,123 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:04,123 INFO L87 Difference]: Start difference. First operand 869 states and 1297 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:04,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:04,176 INFO L93 Difference]: Finished difference Result 873 states and 1301 transitions. [2024-12-02 06:03:04,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:04,177 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 213 [2024-12-02 06:03:04,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:04,181 INFO L225 Difference]: With dead ends: 873 [2024-12-02 06:03:04,181 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 06:03:04,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:04,183 INFO L435 NwaCegarLoop]: 1295 mSDtfsCounter, 0 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3879 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:04,183 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3879 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:04,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 06:03:04,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 06:03:04,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.4930715935334873) internal successors, (1293), 866 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:04,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1299 transitions. [2024-12-02 06:03:04,206 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1299 transitions. Word has length 213 [2024-12-02 06:03:04,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:04,208 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1299 transitions. [2024-12-02 06:03:04,208 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:04,208 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1299 transitions. [2024-12-02 06:03:04,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-12-02 06:03:04,211 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:04,211 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:04,212 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 06:03:04,212 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:04,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:04,212 INFO L85 PathProgramCache]: Analyzing trace with hash -50639891, now seen corresponding path program 1 times [2024-12-02 06:03:04,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:04,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831019214] [2024-12-02 06:03:04,213 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:04,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:04,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:04,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:04,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:04,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831019214] [2024-12-02 06:03:04,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831019214] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:04,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:04,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:04,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705907655] [2024-12-02 06:03:04,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:04,957 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:04,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:04,958 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:04,958 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:04,958 INFO L87 Difference]: Start difference. First operand 871 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:05,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:05,578 INFO L93 Difference]: Finished difference Result 2171 states and 3241 transitions. [2024-12-02 06:03:05,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:03:05,578 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 214 [2024-12-02 06:03:05,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:05,582 INFO L225 Difference]: With dead ends: 2171 [2024-12-02 06:03:05,582 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 06:03:05,584 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 06:03:05,585 INFO L435 NwaCegarLoop]: 1325 mSDtfsCounter, 2674 mSDsluCounter, 2354 mSDsCounter, 0 mSdLazyCounter, 414 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2674 SdHoareTripleChecker+Valid, 3679 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:05,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2674 Valid, 3679 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 414 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 06:03:05,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 06:03:05,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 06:03:05,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.491916859122402) internal successors, (1292), 866 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:05,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1298 transitions. [2024-12-02 06:03:05,609 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1298 transitions. Word has length 214 [2024-12-02 06:03:05,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:05,609 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1298 transitions. [2024-12-02 06:03:05,609 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:05,609 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1298 transitions. [2024-12-02 06:03:05,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-02 06:03:05,612 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:05,612 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:05,612 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 06:03:05,612 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:05,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:05,613 INFO L85 PathProgramCache]: Analyzing trace with hash -125930801, now seen corresponding path program 1 times [2024-12-02 06:03:05,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:05,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [282331955] [2024-12-02 06:03:05,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:05,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:05,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:06,185 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:06,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:06,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [282331955] [2024-12-02 06:03:06,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [282331955] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:06,186 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:06,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:06,186 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802999672] [2024-12-02 06:03:06,186 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:06,187 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:06,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:06,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:06,187 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:06,188 INFO L87 Difference]: Start difference. First operand 871 states and 1298 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:06,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:06,223 INFO L93 Difference]: Finished difference Result 1578 states and 2351 transitions. [2024-12-02 06:03:06,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:06,224 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 215 [2024-12-02 06:03:06,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:06,227 INFO L225 Difference]: With dead ends: 1578 [2024-12-02 06:03:06,227 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:06,227 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:06,228 INFO L435 NwaCegarLoop]: 1294 mSDtfsCounter, 0 mSDsluCounter, 2578 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3872 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:06,228 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3872 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:06,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:06,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:06,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4907834101382489) internal successors, (1294), 868 states have internal predecessors, (1294), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:06,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1300 transitions. [2024-12-02 06:03:06,246 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1300 transitions. Word has length 215 [2024-12-02 06:03:06,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:06,246 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1300 transitions. [2024-12-02 06:03:06,246 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:06,246 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1300 transitions. [2024-12-02 06:03:06,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-12-02 06:03:06,248 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:06,248 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:06,248 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 06:03:06,248 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:06,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:06,249 INFO L85 PathProgramCache]: Analyzing trace with hash -706852236, now seen corresponding path program 1 times [2024-12-02 06:03:06,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:06,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159921847] [2024-12-02 06:03:06,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:06,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:06,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:06,819 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:06,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:06,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159921847] [2024-12-02 06:03:06,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159921847] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:06,820 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:06,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:06,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805389369] [2024-12-02 06:03:06,820 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:06,821 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:06,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:06,821 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:06,822 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:06,822 INFO L87 Difference]: Start difference. First operand 873 states and 1300 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:07,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:07,184 INFO L93 Difference]: Finished difference Result 1580 states and 2352 transitions. [2024-12-02 06:03:07,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:07,185 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 216 [2024-12-02 06:03:07,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:07,188 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:07,188 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:07,189 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:07,189 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1130 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:07,190 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 2270 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:07,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:07,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:07,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.48963133640553) internal successors, (1293), 868 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:07,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1299 transitions. [2024-12-02 06:03:07,210 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1299 transitions. Word has length 216 [2024-12-02 06:03:07,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:07,210 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1299 transitions. [2024-12-02 06:03:07,211 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:07,211 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1299 transitions. [2024-12-02 06:03:07,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-12-02 06:03:07,213 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:07,214 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:07,214 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 06:03:07,214 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:07,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:07,215 INFO L85 PathProgramCache]: Analyzing trace with hash 1177044582, now seen corresponding path program 1 times [2024-12-02 06:03:07,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:07,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43567373] [2024-12-02 06:03:07,215 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:07,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:07,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:07,648 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:07,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:07,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43567373] [2024-12-02 06:03:07,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43567373] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:07,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:07,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:07,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061803661] [2024-12-02 06:03:07,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:07,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:07,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:07,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:07,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:07,651 INFO L87 Difference]: Start difference. First operand 873 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:07,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:07,895 INFO L93 Difference]: Finished difference Result 1582 states and 2352 transitions. [2024-12-02 06:03:07,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 06:03:07,896 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 217 [2024-12-02 06:03:07,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:07,900 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 06:03:07,900 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:07,901 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 06:03:07,901 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 1133 mSDsluCounter, 2426 mSDsCounter, 0 mSdLazyCounter, 174 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1133 SdHoareTripleChecker+Valid, 3714 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:07,902 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1133 Valid, 3714 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 174 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:07,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:07,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:07,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4884792626728112) internal successors, (1292), 868 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:07,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1298 transitions. [2024-12-02 06:03:07,919 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1298 transitions. Word has length 217 [2024-12-02 06:03:07,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:07,919 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1298 transitions. [2024-12-02 06:03:07,920 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:07,920 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1298 transitions. [2024-12-02 06:03:07,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-02 06:03:07,921 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:07,921 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:07,921 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 06:03:07,922 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:07,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:07,922 INFO L85 PathProgramCache]: Analyzing trace with hash 67362509, now seen corresponding path program 1 times [2024-12-02 06:03:07,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:07,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600448106] [2024-12-02 06:03:07,922 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:07,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:08,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:08,340 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:08,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:08,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600448106] [2024-12-02 06:03:08,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600448106] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:08,340 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:08,340 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:08,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356725325] [2024-12-02 06:03:08,341 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:08,341 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:08,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:08,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:08,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:08,342 INFO L87 Difference]: Start difference. First operand 873 states and 1298 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:08,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:08,651 INFO L93 Difference]: Finished difference Result 1580 states and 2348 transitions. [2024-12-02 06:03:08,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:08,652 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 218 [2024-12-02 06:03:08,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:08,655 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:08,655 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:08,656 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:08,657 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2401 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2404 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:08,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2404 Valid, 2270 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:08,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:08,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:08,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.487327188940092) internal successors, (1291), 868 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:08,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1297 transitions. [2024-12-02 06:03:08,679 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1297 transitions. Word has length 218 [2024-12-02 06:03:08,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:08,680 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1297 transitions. [2024-12-02 06:03:08,680 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:08,680 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1297 transitions. [2024-12-02 06:03:08,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-02 06:03:08,682 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:08,683 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:08,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 06:03:08,683 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:08,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:08,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1444744026, now seen corresponding path program 1 times [2024-12-02 06:03:08,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:08,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329213761] [2024-12-02 06:03:08,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:08,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:08,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:09,170 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:09,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:09,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329213761] [2024-12-02 06:03:09,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1329213761] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:09,171 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:09,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:09,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287128366] [2024-12-02 06:03:09,171 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:09,172 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:09,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:09,173 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:09,173 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:09,173 INFO L87 Difference]: Start difference. First operand 873 states and 1297 transitions. Second operand has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:09,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:09,474 INFO L93 Difference]: Finished difference Result 1580 states and 2346 transitions. [2024-12-02 06:03:09,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:09,475 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 219 [2024-12-02 06:03:09,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:09,479 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:09,479 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:09,480 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:09,481 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2393 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2396 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:09,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2396 Valid, 2270 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:09,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:09,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4861751152073732) internal successors, (1290), 868 states have internal predecessors, (1290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:09,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1296 transitions. [2024-12-02 06:03:09,503 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1296 transitions. Word has length 219 [2024-12-02 06:03:09,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:09,504 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1296 transitions. [2024-12-02 06:03:09,504 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:09,504 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1296 transitions. [2024-12-02 06:03:09,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-12-02 06:03:09,507 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:09,507 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:09,507 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 06:03:09,507 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:09,508 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:09,508 INFO L85 PathProgramCache]: Analyzing trace with hash 769514406, now seen corresponding path program 1 times [2024-12-02 06:03:09,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:09,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329466265] [2024-12-02 06:03:09,508 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:09,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:09,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:09,997 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:09,998 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:09,998 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329466265] [2024-12-02 06:03:09,998 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1329466265] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:09,998 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:09,998 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:09,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020838194] [2024-12-02 06:03:09,998 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:09,998 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:09,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:09,999 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:09,999 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:10,000 INFO L87 Difference]: Start difference. First operand 873 states and 1296 transitions. Second operand has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:10,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:10,304 INFO L93 Difference]: Finished difference Result 1580 states and 2344 transitions. [2024-12-02 06:03:10,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:10,305 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 220 [2024-12-02 06:03:10,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:10,308 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:10,309 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:10,310 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:10,310 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2385 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 316 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2388 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 316 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:10,310 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2388 Valid, 2270 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 316 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:10,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:10,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:10,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4850230414746544) internal successors, (1289), 868 states have internal predecessors, (1289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:10,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1295 transitions. [2024-12-02 06:03:10,333 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1295 transitions. Word has length 220 [2024-12-02 06:03:10,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:10,333 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1295 transitions. [2024-12-02 06:03:10,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:10,333 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1295 transitions. [2024-12-02 06:03:10,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-02 06:03:10,336 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:10,336 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:10,336 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 06:03:10,336 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:10,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:10,337 INFO L85 PathProgramCache]: Analyzing trace with hash 626929823, now seen corresponding path program 1 times [2024-12-02 06:03:10,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:10,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273273785] [2024-12-02 06:03:10,337 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:10,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:10,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:10,787 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:10,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:10,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273273785] [2024-12-02 06:03:10,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273273785] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:10,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:10,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:10,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024843010] [2024-12-02 06:03:10,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:10,788 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:10,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:10,789 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:10,789 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:10,789 INFO L87 Difference]: Start difference. First operand 873 states and 1295 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:11,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:11,089 INFO L93 Difference]: Finished difference Result 1580 states and 2342 transitions. [2024-12-02 06:03:11,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:11,090 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 221 [2024-12-02 06:03:11,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:11,093 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:11,093 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:11,094 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:11,095 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1267 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:11,095 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 2277 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:11,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:11,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:11,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4838709677419355) internal successors, (1288), 868 states have internal predecessors, (1288), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:11,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1294 transitions. [2024-12-02 06:03:11,117 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1294 transitions. Word has length 221 [2024-12-02 06:03:11,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:11,118 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1294 transitions. [2024-12-02 06:03:11,118 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:11,118 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1294 transitions. [2024-12-02 06:03:11,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-02 06:03:11,120 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:11,121 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:11,121 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 06:03:11,121 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:11,121 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:11,121 INFO L85 PathProgramCache]: Analyzing trace with hash 1873772799, now seen corresponding path program 1 times [2024-12-02 06:03:11,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:11,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962106210] [2024-12-02 06:03:11,122 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:11,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:11,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:11,600 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:11,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:11,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962106210] [2024-12-02 06:03:11,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [962106210] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:11,600 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:11,601 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:11,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975685276] [2024-12-02 06:03:11,601 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:11,601 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:11,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:11,602 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:11,602 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:11,602 INFO L87 Difference]: Start difference. First operand 873 states and 1294 transitions. Second operand has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:11,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:11,889 INFO L93 Difference]: Finished difference Result 1580 states and 2340 transitions. [2024-12-02 06:03:11,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:11,889 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 222 [2024-12-02 06:03:11,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:11,893 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:11,893 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:11,894 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:11,894 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1263 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1266 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:11,895 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1266 Valid, 2277 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:11,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:11,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:11,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4827188940092166) internal successors, (1287), 868 states have internal predecessors, (1287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:11,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1293 transitions. [2024-12-02 06:03:11,917 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1293 transitions. Word has length 222 [2024-12-02 06:03:11,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:11,917 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1293 transitions. [2024-12-02 06:03:11,917 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:11,917 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1293 transitions. [2024-12-02 06:03:11,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-12-02 06:03:11,920 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:11,920 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:11,920 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 06:03:11,921 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:11,921 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:11,921 INFO L85 PathProgramCache]: Analyzing trace with hash -241337064, now seen corresponding path program 1 times [2024-12-02 06:03:11,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:11,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913604438] [2024-12-02 06:03:11,921 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:11,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:12,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:12,411 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:12,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:12,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913604438] [2024-12-02 06:03:12,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913604438] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:12,411 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:12,411 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:12,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932600908] [2024-12-02 06:03:12,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:12,412 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:12,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:12,412 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:12,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:12,413 INFO L87 Difference]: Start difference. First operand 873 states and 1293 transitions. Second operand has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:12,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:12,710 INFO L93 Difference]: Finished difference Result 1580 states and 2338 transitions. [2024-12-02 06:03:12,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:12,711 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 223 [2024-12-02 06:03:12,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:12,715 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:12,715 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:12,716 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:12,716 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2361 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:12,717 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 2270 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:03:12,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:12,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:12,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4815668202764978) internal successors, (1286), 868 states have internal predecessors, (1286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:12,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1292 transitions. [2024-12-02 06:03:12,743 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1292 transitions. Word has length 223 [2024-12-02 06:03:12,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:12,744 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1292 transitions. [2024-12-02 06:03:12,744 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:12,744 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1292 transitions. [2024-12-02 06:03:12,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-02 06:03:12,747 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:12,748 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:12,748 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 06:03:12,748 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:12,748 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:12,748 INFO L85 PathProgramCache]: Analyzing trace with hash -962851112, now seen corresponding path program 1 times [2024-12-02 06:03:12,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:12,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543764750] [2024-12-02 06:03:12,749 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:12,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:12,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:13,326 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:13,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:13,326 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543764750] [2024-12-02 06:03:13,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543764750] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:13,326 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:13,326 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:13,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388705283] [2024-12-02 06:03:13,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:13,327 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:13,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:13,327 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:13,328 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:13,328 INFO L87 Difference]: Start difference. First operand 873 states and 1292 transitions. Second operand has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:13,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:13,606 INFO L93 Difference]: Finished difference Result 1580 states and 2336 transitions. [2024-12-02 06:03:13,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:13,607 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 224 [2024-12-02 06:03:13,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:13,610 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:13,610 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:13,611 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:13,612 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1255 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:13,612 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 2277 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:13,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:13,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:13,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4804147465437787) internal successors, (1285), 868 states have internal predecessors, (1285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:13,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1291 transitions. [2024-12-02 06:03:13,630 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1291 transitions. Word has length 224 [2024-12-02 06:03:13,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:13,631 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1291 transitions. [2024-12-02 06:03:13,631 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:13,631 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1291 transitions. [2024-12-02 06:03:13,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-12-02 06:03:13,632 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:13,633 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:13,633 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 06:03:13,633 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:13,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:13,633 INFO L85 PathProgramCache]: Analyzing trace with hash -308143599, now seen corresponding path program 1 times [2024-12-02 06:03:13,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:13,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935349598] [2024-12-02 06:03:13,633 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:13,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:13,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:14,076 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:14,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:14,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935349598] [2024-12-02 06:03:14,076 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1935349598] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:14,076 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:14,076 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:14,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587806545] [2024-12-02 06:03:14,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:14,077 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:14,077 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:14,078 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:14,078 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:14,078 INFO L87 Difference]: Start difference. First operand 873 states and 1291 transitions. Second operand has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:14,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:14,351 INFO L93 Difference]: Finished difference Result 1580 states and 2334 transitions. [2024-12-02 06:03:14,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:14,352 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 225 [2024-12-02 06:03:14,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:14,354 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:14,354 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:14,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:14,356 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2345 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2348 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:14,356 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2348 Valid, 2270 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:14,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:14,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:14,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4792626728110598) internal successors, (1284), 868 states have internal predecessors, (1284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:14,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1290 transitions. [2024-12-02 06:03:14,372 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1290 transitions. Word has length 225 [2024-12-02 06:03:14,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:14,372 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1290 transitions. [2024-12-02 06:03:14,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:14,373 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1290 transitions. [2024-12-02 06:03:14,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-02 06:03:14,374 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:14,374 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:14,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 06:03:14,374 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:14,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:14,375 INFO L85 PathProgramCache]: Analyzing trace with hash 816235825, now seen corresponding path program 1 times [2024-12-02 06:03:14,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:14,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669303938] [2024-12-02 06:03:14,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:14,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:14,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:14,820 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:14,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:14,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669303938] [2024-12-02 06:03:14,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669303938] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:14,820 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:14,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:14,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653687577] [2024-12-02 06:03:14,821 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:14,821 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:14,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:14,821 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:14,822 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:14,822 INFO L87 Difference]: Start difference. First operand 873 states and 1290 transitions. Second operand has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:15,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:15,085 INFO L93 Difference]: Finished difference Result 1580 states and 2332 transitions. [2024-12-02 06:03:15,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:15,085 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 226 [2024-12-02 06:03:15,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:15,087 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:15,088 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:15,088 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:15,089 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2337 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2340 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:15,089 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2340 Valid, 2270 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:15,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:15,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:15,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.478110599078341) internal successors, (1283), 868 states have internal predecessors, (1283), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:15,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1289 transitions. [2024-12-02 06:03:15,100 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1289 transitions. Word has length 226 [2024-12-02 06:03:15,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:15,101 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1289 transitions. [2024-12-02 06:03:15,101 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:15,101 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1289 transitions. [2024-12-02 06:03:15,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-02 06:03:15,102 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:15,102 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:15,102 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 06:03:15,102 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:15,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:15,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1707952010, now seen corresponding path program 1 times [2024-12-02 06:03:15,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:15,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792928727] [2024-12-02 06:03:15,103 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:15,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:15,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:15,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:15,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792928727] [2024-12-02 06:03:15,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [792928727] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:15,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:15,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:15,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965007291] [2024-12-02 06:03:15,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:15,396 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:15,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:15,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:15,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:15,396 INFO L87 Difference]: Start difference. First operand 873 states and 1289 transitions. Second operand has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:15,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:15,657 INFO L93 Difference]: Finished difference Result 1580 states and 2330 transitions. [2024-12-02 06:03:15,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:15,658 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 227 [2024-12-02 06:03:15,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:15,660 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:15,660 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:15,660 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:15,661 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1243 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:15,661 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2277 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:15,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:15,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:15,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.476958525345622) internal successors, (1282), 868 states have internal predecessors, (1282), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:15,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1288 transitions. [2024-12-02 06:03:15,671 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1288 transitions. Word has length 227 [2024-12-02 06:03:15,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:15,672 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1288 transitions. [2024-12-02 06:03:15,672 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:15,672 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1288 transitions. [2024-12-02 06:03:15,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-02 06:03:15,673 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:15,673 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:15,673 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 06:03:15,673 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:15,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:15,673 INFO L85 PathProgramCache]: Analyzing trace with hash -860691446, now seen corresponding path program 1 times [2024-12-02 06:03:15,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:15,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939123452] [2024-12-02 06:03:15,673 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:15,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:15,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:15,982 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:15,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:15,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939123452] [2024-12-02 06:03:15,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [939123452] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:15,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:15,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:15,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035039019] [2024-12-02 06:03:15,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:15,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:15,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:15,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:15,983 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:15,984 INFO L87 Difference]: Start difference. First operand 873 states and 1288 transitions. Second operand has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:16,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:16,212 INFO L93 Difference]: Finished difference Result 1580 states and 2328 transitions. [2024-12-02 06:03:16,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:16,212 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 228 [2024-12-02 06:03:16,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:16,214 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:16,214 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:16,215 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:16,216 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1239 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1242 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:16,216 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1242 Valid, 2277 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:16,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:16,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:16,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4758064516129032) internal successors, (1281), 868 states have internal predecessors, (1281), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:16,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1287 transitions. [2024-12-02 06:03:16,232 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1287 transitions. Word has length 228 [2024-12-02 06:03:16,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:16,232 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1287 transitions. [2024-12-02 06:03:16,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:16,233 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1287 transitions. [2024-12-02 06:03:16,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-02 06:03:16,234 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:16,234 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:16,234 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 06:03:16,234 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:16,235 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:16,235 INFO L85 PathProgramCache]: Analyzing trace with hash 333464963, now seen corresponding path program 1 times [2024-12-02 06:03:16,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:16,235 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138163950] [2024-12-02 06:03:16,235 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:16,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:16,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:16,608 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:16,608 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:16,608 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138163950] [2024-12-02 06:03:16,608 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138163950] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:16,608 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:16,609 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:16,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790471049] [2024-12-02 06:03:16,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:16,609 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:16,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:16,610 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:16,610 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:16,610 INFO L87 Difference]: Start difference. First operand 873 states and 1287 transitions. Second operand has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:16,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:16,830 INFO L93 Difference]: Finished difference Result 1580 states and 2326 transitions. [2024-12-02 06:03:16,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:16,831 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 229 [2024-12-02 06:03:16,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:16,832 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:16,832 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:16,833 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:16,833 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1235 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1238 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:16,833 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1238 Valid, 2277 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:16,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:16,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:16,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4746543778801844) internal successors, (1280), 868 states have internal predecessors, (1280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:16,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1286 transitions. [2024-12-02 06:03:16,845 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1286 transitions. Word has length 229 [2024-12-02 06:03:16,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:16,845 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1286 transitions. [2024-12-02 06:03:16,845 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:16,845 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1286 transitions. [2024-12-02 06:03:16,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-12-02 06:03:16,846 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:16,846 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:16,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 06:03:16,847 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:16,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:16,847 INFO L85 PathProgramCache]: Analyzing trace with hash -92034205, now seen corresponding path program 1 times [2024-12-02 06:03:16,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:16,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43727263] [2024-12-02 06:03:16,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:16,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:16,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:17,149 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:17,150 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:17,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43727263] [2024-12-02 06:03:17,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43727263] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:17,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:17,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:17,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1213484289] [2024-12-02 06:03:17,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:17,150 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:17,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:17,150 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:17,150 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:17,151 INFO L87 Difference]: Start difference. First operand 873 states and 1286 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:17,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:17,359 INFO L93 Difference]: Finished difference Result 1580 states and 2324 transitions. [2024-12-02 06:03:17,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:17,360 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 230 [2024-12-02 06:03:17,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:17,361 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:17,361 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:17,362 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:17,362 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2305 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2308 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:17,362 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2308 Valid, 2270 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:17,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:17,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:17,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4735023041474655) internal successors, (1279), 868 states have internal predecessors, (1279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:17,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1285 transitions. [2024-12-02 06:03:17,371 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1285 transitions. Word has length 230 [2024-12-02 06:03:17,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:17,371 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1285 transitions. [2024-12-02 06:03:17,371 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:17,371 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1285 transitions. [2024-12-02 06:03:17,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-02 06:03:17,372 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:17,372 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:17,372 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 06:03:17,373 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:17,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:17,373 INFO L85 PathProgramCache]: Analyzing trace with hash 519853052, now seen corresponding path program 1 times [2024-12-02 06:03:17,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:17,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752651482] [2024-12-02 06:03:17,373 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:17,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:17,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:17,654 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:17,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:17,654 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752651482] [2024-12-02 06:03:17,654 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1752651482] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:17,654 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:17,654 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:17,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499035497] [2024-12-02 06:03:17,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:17,654 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:17,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:17,655 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:17,655 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:17,655 INFO L87 Difference]: Start difference. First operand 873 states and 1285 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:17,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:17,870 INFO L93 Difference]: Finished difference Result 1580 states and 2322 transitions. [2024-12-02 06:03:17,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:17,871 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 231 [2024-12-02 06:03:17,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:17,874 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:17,874 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:17,875 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:17,875 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1227 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:17,875 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 2277 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:17,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:17,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:17,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4723502304147464) internal successors, (1278), 868 states have internal predecessors, (1278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:17,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1284 transitions. [2024-12-02 06:03:17,888 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1284 transitions. Word has length 231 [2024-12-02 06:03:17,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:17,889 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1284 transitions. [2024-12-02 06:03:17,889 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:17,889 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1284 transitions. [2024-12-02 06:03:17,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-02 06:03:17,890 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:17,890 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:17,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 06:03:17,891 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:17,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:17,891 INFO L85 PathProgramCache]: Analyzing trace with hash 2059164476, now seen corresponding path program 1 times [2024-12-02 06:03:17,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:17,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470559841] [2024-12-02 06:03:17,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:17,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:18,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:18,505 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:18,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:18,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470559841] [2024-12-02 06:03:18,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470559841] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:18,505 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:18,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:18,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010638580] [2024-12-02 06:03:18,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:18,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:18,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:18,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:18,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:18,507 INFO L87 Difference]: Start difference. First operand 873 states and 1284 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:18,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:18,640 INFO L93 Difference]: Finished difference Result 1580 states and 2320 transitions. [2024-12-02 06:03:18,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:18,641 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 232 [2024-12-02 06:03:18,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:18,644 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:18,644 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:18,645 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:18,645 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1120 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1120 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:18,645 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1120 Valid, 2398 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:18,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:18,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:18,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4711981566820276) internal successors, (1277), 868 states have internal predecessors, (1277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:18,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1283 transitions. [2024-12-02 06:03:18,659 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1283 transitions. Word has length 232 [2024-12-02 06:03:18,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:18,659 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1283 transitions. [2024-12-02 06:03:18,659 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:18,659 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1283 transitions. [2024-12-02 06:03:18,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-12-02 06:03:18,661 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:18,661 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:18,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 06:03:18,661 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:18,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:18,662 INFO L85 PathProgramCache]: Analyzing trace with hash 84533315, now seen corresponding path program 1 times [2024-12-02 06:03:18,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:18,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144415331] [2024-12-02 06:03:18,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:18,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:18,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:19,030 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:19,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:19,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144415331] [2024-12-02 06:03:19,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144415331] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:19,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:19,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:19,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264534142] [2024-12-02 06:03:19,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:19,031 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:19,031 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:19,031 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:19,031 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:19,031 INFO L87 Difference]: Start difference. First operand 873 states and 1283 transitions. Second operand has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:19,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:19,153 INFO L93 Difference]: Finished difference Result 1592 states and 2335 transitions. [2024-12-02 06:03:19,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 06:03:19,153 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 233 [2024-12-02 06:03:19,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:19,156 INFO L225 Difference]: With dead ends: 1592 [2024-12-02 06:03:19,156 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:19,157 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 06:03:19,158 INFO L435 NwaCegarLoop]: 1267 mSDtfsCounter, 1143 mSDsluCounter, 2469 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 3736 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:19,159 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 3736 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:19,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:19,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:19,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4700460829493087) internal successors, (1276), 868 states have internal predecessors, (1276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:19,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1282 transitions. [2024-12-02 06:03:19,173 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1282 transitions. Word has length 233 [2024-12-02 06:03:19,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:19,173 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1282 transitions. [2024-12-02 06:03:19,173 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:19,173 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1282 transitions. [2024-12-02 06:03:19,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-02 06:03:19,175 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:19,175 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:19,175 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 06:03:19,175 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:19,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:19,176 INFO L85 PathProgramCache]: Analyzing trace with hash -1868539278, now seen corresponding path program 1 times [2024-12-02 06:03:19,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:19,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136249251] [2024-12-02 06:03:19,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:19,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:19,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:19,516 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:19,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:19,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136249251] [2024-12-02 06:03:19,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [136249251] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:19,517 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:19,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:19,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244392396] [2024-12-02 06:03:19,517 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:19,517 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:19,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:19,518 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:19,518 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:19,518 INFO L87 Difference]: Start difference. First operand 873 states and 1282 transitions. Second operand has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:19,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:19,643 INFO L93 Difference]: Finished difference Result 1580 states and 2316 transitions. [2024-12-02 06:03:19,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:19,644 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 234 [2024-12-02 06:03:19,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:19,645 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:19,645 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:19,646 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:19,646 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1266 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1269 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:19,646 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1269 Valid, 2405 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:19,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:19,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:19,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4688940092165899) internal successors, (1275), 868 states have internal predecessors, (1275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:19,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1281 transitions. [2024-12-02 06:03:19,655 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1281 transitions. Word has length 234 [2024-12-02 06:03:19,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:19,655 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1281 transitions. [2024-12-02 06:03:19,655 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:19,655 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1281 transitions. [2024-12-02 06:03:19,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-12-02 06:03:19,656 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:19,656 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:19,656 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 06:03:19,656 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:19,656 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:19,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1766214646, now seen corresponding path program 1 times [2024-12-02 06:03:19,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:19,657 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275550152] [2024-12-02 06:03:19,657 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:19,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:19,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:19,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:19,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:19,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275550152] [2024-12-02 06:03:19,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1275550152] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:19,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:19,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:19,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789078949] [2024-12-02 06:03:19,957 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:19,957 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:19,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:19,957 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:19,957 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:19,958 INFO L87 Difference]: Start difference. First operand 873 states and 1281 transitions. Second operand has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:20,101 INFO L93 Difference]: Finished difference Result 1580 states and 2314 transitions. [2024-12-02 06:03:20,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:20,102 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 235 [2024-12-02 06:03:20,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:20,103 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:20,103 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:20,104 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:20,104 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2383 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2386 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:20,104 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2386 Valid, 2398 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:20,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:20,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:20,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.467741935483871) internal successors, (1274), 868 states have internal predecessors, (1274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:20,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1280 transitions. [2024-12-02 06:03:20,112 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1280 transitions. Word has length 235 [2024-12-02 06:03:20,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:20,112 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1280 transitions. [2024-12-02 06:03:20,112 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,112 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1280 transitions. [2024-12-02 06:03:20,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2024-12-02 06:03:20,113 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:20,113 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:20,113 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 06:03:20,113 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:20,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:20,114 INFO L85 PathProgramCache]: Analyzing trace with hash 963930393, now seen corresponding path program 1 times [2024-12-02 06:03:20,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:20,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629236102] [2024-12-02 06:03:20,114 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:20,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:20,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:20,384 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:20,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:20,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629236102] [2024-12-02 06:03:20,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1629236102] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:20,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:20,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:20,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875371181] [2024-12-02 06:03:20,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:20,384 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:20,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:20,385 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:20,385 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:20,385 INFO L87 Difference]: Start difference. First operand 873 states and 1280 transitions. Second operand has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:20,506 INFO L93 Difference]: Finished difference Result 1580 states and 2312 transitions. [2024-12-02 06:03:20,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:20,506 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 236 [2024-12-02 06:03:20,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:20,508 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:20,508 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:20,508 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:20,509 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1258 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1261 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:20,509 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1261 Valid, 2405 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:20,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:20,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:20,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4665898617511521) internal successors, (1273), 868 states have internal predecessors, (1273), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:20,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1279 transitions. [2024-12-02 06:03:20,517 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1279 transitions. Word has length 236 [2024-12-02 06:03:20,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:20,517 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1279 transitions. [2024-12-02 06:03:20,517 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,517 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1279 transitions. [2024-12-02 06:03:20,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-02 06:03:20,518 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:20,518 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:20,518 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 06:03:20,518 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:20,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:20,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1749422255, now seen corresponding path program 1 times [2024-12-02 06:03:20,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:20,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478066209] [2024-12-02 06:03:20,519 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:20,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:20,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:20,843 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:20,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:20,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478066209] [2024-12-02 06:03:20,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478066209] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:20,843 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:20,843 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:20,843 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051070170] [2024-12-02 06:03:20,843 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:20,844 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:20,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:20,844 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:20,844 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:20,845 INFO L87 Difference]: Start difference. First operand 873 states and 1279 transitions. Second operand has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:20,967 INFO L93 Difference]: Finished difference Result 1580 states and 2310 transitions. [2024-12-02 06:03:20,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:20,968 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 237 [2024-12-02 06:03:20,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:20,970 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:20,970 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:20,970 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:20,970 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2367 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2370 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:20,971 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2370 Valid, 2398 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:20,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:20,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:20,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4654377880184333) internal successors, (1272), 868 states have internal predecessors, (1272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:20,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1278 transitions. [2024-12-02 06:03:20,980 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1278 transitions. Word has length 237 [2024-12-02 06:03:20,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:20,980 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1278 transitions. [2024-12-02 06:03:20,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:20,980 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1278 transitions. [2024-12-02 06:03:20,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-02 06:03:20,981 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:20,982 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:20,982 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 06:03:20,982 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:20,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:20,982 INFO L85 PathProgramCache]: Analyzing trace with hash 1080293184, now seen corresponding path program 1 times [2024-12-02 06:03:20,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:20,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442779686] [2024-12-02 06:03:20,983 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:20,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:21,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:21,507 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:21,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:21,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442779686] [2024-12-02 06:03:21,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1442779686] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:21,507 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:21,507 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:21,507 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783088852] [2024-12-02 06:03:21,507 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:21,507 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:21,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:21,508 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:21,508 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:21,508 INFO L87 Difference]: Start difference. First operand 873 states and 1278 transitions. Second operand has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:21,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:21,633 INFO L93 Difference]: Finished difference Result 1580 states and 2308 transitions. [2024-12-02 06:03:21,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:21,634 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 238 [2024-12-02 06:03:21,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:21,636 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:21,637 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:21,637 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:21,638 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2359 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2362 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:21,638 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2362 Valid, 2398 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:21,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:21,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:21,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4642857142857142) internal successors, (1271), 868 states have internal predecessors, (1271), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:21,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1277 transitions. [2024-12-02 06:03:21,651 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1277 transitions. Word has length 238 [2024-12-02 06:03:21,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:21,651 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1277 transitions. [2024-12-02 06:03:21,651 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:21,652 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1277 transitions. [2024-12-02 06:03:21,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-02 06:03:21,653 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:21,653 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:21,653 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 06:03:21,653 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:21,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:21,654 INFO L85 PathProgramCache]: Analyzing trace with hash 1254052376, now seen corresponding path program 1 times [2024-12-02 06:03:21,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:21,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360897915] [2024-12-02 06:03:21,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:21,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:21,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:21,976 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:21,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:21,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360897915] [2024-12-02 06:03:21,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1360897915] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:21,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:21,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:21,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112636527] [2024-12-02 06:03:21,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:21,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:21,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:21,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:21,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:21,977 INFO L87 Difference]: Start difference. First operand 873 states and 1277 transitions. Second operand has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:22,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:22,122 INFO L93 Difference]: Finished difference Result 1580 states and 2306 transitions. [2024-12-02 06:03:22,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:22,122 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 239 [2024-12-02 06:03:22,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:22,125 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:22,125 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:22,126 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:22,126 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1243 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:22,126 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2405 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:22,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:22,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:22,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4631336405529953) internal successors, (1270), 868 states have internal predecessors, (1270), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:22,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1276 transitions. [2024-12-02 06:03:22,141 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1276 transitions. Word has length 239 [2024-12-02 06:03:22,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:22,142 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1276 transitions. [2024-12-02 06:03:22,142 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:22,142 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1276 transitions. [2024-12-02 06:03:22,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-02 06:03:22,143 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:22,143 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:22,143 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 06:03:22,143 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:22,144 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:22,144 INFO L85 PathProgramCache]: Analyzing trace with hash -1194218592, now seen corresponding path program 1 times [2024-12-02 06:03:22,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:22,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955140703] [2024-12-02 06:03:22,144 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:22,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:22,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:22,659 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:22,660 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:22,660 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955140703] [2024-12-02 06:03:22,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [955140703] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:22,660 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:22,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:22,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274440125] [2024-12-02 06:03:22,660 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:22,660 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:22,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:22,661 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:22,661 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:22,661 INFO L87 Difference]: Start difference. First operand 873 states and 1276 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:22,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:22,715 INFO L93 Difference]: Finished difference Result 1580 states and 2304 transitions. [2024-12-02 06:03:22,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:22,716 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 240 [2024-12-02 06:03:22,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:22,717 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:22,717 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:22,718 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:22,718 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1135 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:22,719 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2502 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:22,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:22,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:22,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4608294930875576) internal successors, (1268), 868 states have internal predecessors, (1268), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:22,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1274 transitions. [2024-12-02 06:03:22,727 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1274 transitions. Word has length 240 [2024-12-02 06:03:22,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:22,727 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1274 transitions. [2024-12-02 06:03:22,727 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:22,727 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1274 transitions. [2024-12-02 06:03:22,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-02 06:03:22,728 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:22,728 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:22,728 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 06:03:22,728 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:22,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:22,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1191452317, now seen corresponding path program 1 times [2024-12-02 06:03:22,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:22,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163340728] [2024-12-02 06:03:22,728 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:22,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:22,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:23,045 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:23,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:23,045 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1163340728] [2024-12-02 06:03:23,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1163340728] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:23,045 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:23,045 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:23,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1257358603] [2024-12-02 06:03:23,045 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:23,046 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:23,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:23,046 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:23,046 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:23,046 INFO L87 Difference]: Start difference. First operand 873 states and 1274 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:23,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:23,102 INFO L93 Difference]: Finished difference Result 1580 states and 2300 transitions. [2024-12-02 06:03:23,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:23,102 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 242 [2024-12-02 06:03:23,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:23,105 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:23,105 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:23,106 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:23,106 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1257 mSDsluCounter, 1259 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1260 SdHoareTripleChecker+Valid, 2509 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:23,106 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1260 Valid, 2509 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:23,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:23,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:23,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4596774193548387) internal successors, (1267), 868 states have internal predecessors, (1267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:23,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1273 transitions. [2024-12-02 06:03:23,117 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1273 transitions. Word has length 242 [2024-12-02 06:03:23,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:23,117 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1273 transitions. [2024-12-02 06:03:23,117 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:23,117 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1273 transitions. [2024-12-02 06:03:23,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-02 06:03:23,118 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:23,118 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:23,118 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 06:03:23,118 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:23,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:23,119 INFO L85 PathProgramCache]: Analyzing trace with hash 864928727, now seen corresponding path program 1 times [2024-12-02 06:03:23,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:23,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627184839] [2024-12-02 06:03:23,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:23,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:23,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:23,686 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:23,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:23,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627184839] [2024-12-02 06:03:23,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627184839] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:23,686 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:23,686 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:23,686 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522526740] [2024-12-02 06:03:23,686 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:23,687 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:23,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:23,687 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:23,687 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:23,688 INFO L87 Difference]: Start difference. First operand 873 states and 1273 transitions. Second operand has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:23,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:23,768 INFO L93 Difference]: Finished difference Result 1580 states and 2298 transitions. [2024-12-02 06:03:23,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:23,768 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 243 [2024-12-02 06:03:23,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:23,771 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:23,771 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:23,772 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:23,773 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1126 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:23,773 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2456 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:23,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:23,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:23,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4585253456221199) internal successors, (1266), 868 states have internal predecessors, (1266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:23,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1272 transitions. [2024-12-02 06:03:23,787 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1272 transitions. Word has length 243 [2024-12-02 06:03:23,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:23,788 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1272 transitions. [2024-12-02 06:03:23,788 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:23,788 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1272 transitions. [2024-12-02 06:03:23,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-02 06:03:23,790 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:23,790 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:23,790 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 06:03:23,790 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:23,791 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:23,791 INFO L85 PathProgramCache]: Analyzing trace with hash 243720918, now seen corresponding path program 1 times [2024-12-02 06:03:23,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:23,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374342429] [2024-12-02 06:03:23,791 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:23,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:23,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:24,140 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:24,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:24,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374342429] [2024-12-02 06:03:24,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [374342429] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:24,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:24,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:24,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059055822] [2024-12-02 06:03:24,140 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:24,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:24,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:24,141 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:24,141 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:24,141 INFO L87 Difference]: Start difference. First operand 873 states and 1272 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:24,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:24,240 INFO L93 Difference]: Finished difference Result 1580 states and 2296 transitions. [2024-12-02 06:03:24,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:24,240 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 244 [2024-12-02 06:03:24,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:24,242 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:24,242 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:24,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:24,243 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2376 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2379 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:24,243 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2379 Valid, 2456 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:24,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:24,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:24,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.457373271889401) internal successors, (1265), 868 states have internal predecessors, (1265), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:24,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1271 transitions. [2024-12-02 06:03:24,255 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1271 transitions. Word has length 244 [2024-12-02 06:03:24,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:24,255 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1271 transitions. [2024-12-02 06:03:24,255 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:24,256 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1271 transitions. [2024-12-02 06:03:24,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-02 06:03:24,257 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:24,257 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:24,257 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 06:03:24,257 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:24,257 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:24,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1180390672, now seen corresponding path program 1 times [2024-12-02 06:03:24,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:24,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691798747] [2024-12-02 06:03:24,258 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:24,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:24,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:24,622 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:24,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:24,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691798747] [2024-12-02 06:03:24,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1691798747] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:24,622 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:24,622 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:24,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518372707] [2024-12-02 06:03:24,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:24,623 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:24,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:24,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:24,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:24,623 INFO L87 Difference]: Start difference. First operand 873 states and 1271 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:24,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:24,720 INFO L93 Difference]: Finished difference Result 1580 states and 2294 transitions. [2024-12-02 06:03:24,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:24,721 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 245 [2024-12-02 06:03:24,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:24,723 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:24,723 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:24,723 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:24,724 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2368 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2371 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:24,724 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2371 Valid, 2456 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:24,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:24,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:24,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.456221198156682) internal successors, (1264), 868 states have internal predecessors, (1264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:24,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1270 transitions. [2024-12-02 06:03:24,737 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1270 transitions. Word has length 245 [2024-12-02 06:03:24,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:24,737 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1270 transitions. [2024-12-02 06:03:24,737 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:24,737 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1270 transitions. [2024-12-02 06:03:24,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-02 06:03:24,738 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:24,739 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:24,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 06:03:24,739 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:24,739 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:24,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1988978575, now seen corresponding path program 1 times [2024-12-02 06:03:24,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:24,739 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163514611] [2024-12-02 06:03:24,739 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:24,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:24,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:25,090 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:25,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:25,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1163514611] [2024-12-02 06:03:25,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1163514611] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:25,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:25,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:25,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777412] [2024-12-02 06:03:25,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:25,091 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:25,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:25,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:25,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:25,092 INFO L87 Difference]: Start difference. First operand 873 states and 1270 transitions. Second operand has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:25,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:25,167 INFO L93 Difference]: Finished difference Result 1580 states and 2292 transitions. [2024-12-02 06:03:25,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:25,168 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 246 [2024-12-02 06:03:25,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:25,169 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:25,169 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:25,170 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:25,170 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1248 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1251 SdHoareTripleChecker+Valid, 2463 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:25,170 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1251 Valid, 2463 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:25,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:25,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:25,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.455069124423963) internal successors, (1263), 868 states have internal predecessors, (1263), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:25,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1269 transitions. [2024-12-02 06:03:25,178 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1269 transitions. Word has length 246 [2024-12-02 06:03:25,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:25,179 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1269 transitions. [2024-12-02 06:03:25,179 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:25,179 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1269 transitions. [2024-12-02 06:03:25,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-02 06:03:25,179 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:25,180 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:25,180 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 06:03:25,180 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:25,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:25,180 INFO L85 PathProgramCache]: Analyzing trace with hash -180499831, now seen corresponding path program 1 times [2024-12-02 06:03:25,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:25,180 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905186491] [2024-12-02 06:03:25,180 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:25,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:25,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:25,673 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:25,673 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:25,673 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905186491] [2024-12-02 06:03:25,673 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905186491] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:25,673 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:25,673 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:25,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079294717] [2024-12-02 06:03:25,673 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:25,674 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:25,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:25,674 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:25,674 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:25,674 INFO L87 Difference]: Start difference. First operand 873 states and 1269 transitions. Second operand has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:25,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:25,734 INFO L93 Difference]: Finished difference Result 1580 states and 2290 transitions. [2024-12-02 06:03:25,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:25,735 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 247 [2024-12-02 06:03:25,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:25,737 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:25,737 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:25,737 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:25,738 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1166 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1168 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:25,738 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1168 Valid, 2500 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:25,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:25,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:25,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4539170506912442) internal successors, (1262), 868 states have internal predecessors, (1262), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:25,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1268 transitions. [2024-12-02 06:03:25,750 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1268 transitions. Word has length 247 [2024-12-02 06:03:25,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:25,750 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1268 transitions. [2024-12-02 06:03:25,750 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:25,750 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1268 transitions. [2024-12-02 06:03:25,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-02 06:03:25,751 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:25,751 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:25,751 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 06:03:25,751 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:25,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:25,752 INFO L85 PathProgramCache]: Analyzing trace with hash 51167845, now seen corresponding path program 1 times [2024-12-02 06:03:25,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:25,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259391091] [2024-12-02 06:03:25,752 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:25,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:26,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:26,379 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:26,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:26,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259391091] [2024-12-02 06:03:26,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259391091] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:26,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:26,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:26,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917795780] [2024-12-02 06:03:26,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:26,380 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:26,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:26,380 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:26,380 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:26,381 INFO L87 Difference]: Start difference. First operand 873 states and 1268 transitions. Second operand has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:26,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:26,428 INFO L93 Difference]: Finished difference Result 1580 states and 2288 transitions. [2024-12-02 06:03:26,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:26,428 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 248 [2024-12-02 06:03:26,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:26,430 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:26,430 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:26,430 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:26,431 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1164 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:26,431 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 2500 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:26,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:26,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:26,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4527649769585254) internal successors, (1261), 868 states have internal predecessors, (1261), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:26,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1267 transitions. [2024-12-02 06:03:26,443 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1267 transitions. Word has length 248 [2024-12-02 06:03:26,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:26,443 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1267 transitions. [2024-12-02 06:03:26,443 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 06:03:26,443 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1267 transitions. [2024-12-02 06:03:26,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-12-02 06:03:26,444 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:26,444 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:26,444 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 06:03:26,445 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:26,445 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:26,445 INFO L85 PathProgramCache]: Analyzing trace with hash -594336282, now seen corresponding path program 1 times [2024-12-02 06:03:26,445 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:26,445 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822881157] [2024-12-02 06:03:26,445 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:26,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:26,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:27,210 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:27,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:27,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822881157] [2024-12-02 06:03:27,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1822881157] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:27,211 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:27,211 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:27,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524727274] [2024-12-02 06:03:27,211 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:27,212 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:27,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:27,212 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:27,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:27,212 INFO L87 Difference]: Start difference. First operand 873 states and 1267 transitions. Second operand has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:27,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:27,315 INFO L93 Difference]: Finished difference Result 1580 states and 2286 transitions. [2024-12-02 06:03:27,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:27,316 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 249 [2024-12-02 06:03:27,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:27,317 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:27,317 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:27,318 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:27,318 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1119 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1119 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:27,318 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1119 Valid, 2452 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:27,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:27,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:27,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4516129032258065) internal successors, (1260), 868 states have internal predecessors, (1260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:27,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1266 transitions. [2024-12-02 06:03:27,334 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1266 transitions. Word has length 249 [2024-12-02 06:03:27,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:27,334 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1266 transitions. [2024-12-02 06:03:27,334 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:27,334 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1266 transitions. [2024-12-02 06:03:27,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2024-12-02 06:03:27,335 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:27,336 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:27,336 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 06:03:27,336 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:27,336 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:27,336 INFO L85 PathProgramCache]: Analyzing trace with hash -592829682, now seen corresponding path program 1 times [2024-12-02 06:03:27,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:27,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006528102] [2024-12-02 06:03:27,336 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:27,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:27,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:27,963 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:27,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:27,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006528102] [2024-12-02 06:03:27,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006528102] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:27,963 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:27,963 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:27,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041297660] [2024-12-02 06:03:27,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:27,963 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:27,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:27,964 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:27,964 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:27,964 INFO L87 Difference]: Start difference. First operand 873 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:28,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:28,054 INFO L93 Difference]: Finished difference Result 1580 states and 2284 transitions. [2024-12-02 06:03:28,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:28,055 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 250 [2024-12-02 06:03:28,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:28,056 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:28,056 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:28,057 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:28,057 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1115 mSDsluCounter, 1234 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1115 SdHoareTripleChecker+Valid, 2459 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:28,057 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1115 Valid, 2459 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:28,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:28,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:28,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4504608294930876) internal successors, (1259), 868 states have internal predecessors, (1259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:28,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1265 transitions. [2024-12-02 06:03:28,067 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1265 transitions. Word has length 250 [2024-12-02 06:03:28,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:28,067 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1265 transitions. [2024-12-02 06:03:28,067 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:28,067 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1265 transitions. [2024-12-02 06:03:28,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2024-12-02 06:03:28,068 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:28,068 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:28,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 06:03:28,068 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:28,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:28,069 INFO L85 PathProgramCache]: Analyzing trace with hash -142001561, now seen corresponding path program 1 times [2024-12-02 06:03:28,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:28,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536175308] [2024-12-02 06:03:28,069 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:28,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:28,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:28,535 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:28,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:28,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536175308] [2024-12-02 06:03:28,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1536175308] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:28,536 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:28,536 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:28,536 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202581869] [2024-12-02 06:03:28,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:28,536 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:28,536 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:28,537 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:28,537 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:28,537 INFO L87 Difference]: Start difference. First operand 873 states and 1265 transitions. Second operand has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:28,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:28,633 INFO L93 Difference]: Finished difference Result 1580 states and 2282 transitions. [2024-12-02 06:03:28,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:28,633 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 251 [2024-12-02 06:03:28,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:28,635 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:28,635 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:28,636 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:28,636 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 2220 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2220 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:28,637 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2220 Valid, 2452 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:28,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:28,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:28,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4493087557603688) internal successors, (1258), 868 states have internal predecessors, (1258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:28,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1264 transitions. [2024-12-02 06:03:28,650 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1264 transitions. Word has length 251 [2024-12-02 06:03:28,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:28,650 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1264 transitions. [2024-12-02 06:03:28,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:28,650 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1264 transitions. [2024-12-02 06:03:28,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-02 06:03:28,651 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:28,651 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:28,651 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 06:03:28,652 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:28,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:28,652 INFO L85 PathProgramCache]: Analyzing trace with hash 488879693, now seen corresponding path program 1 times [2024-12-02 06:03:28,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:28,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728030954] [2024-12-02 06:03:28,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:28,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:28,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:29,115 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:29,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:29,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728030954] [2024-12-02 06:03:29,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728030954] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:29,115 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:29,115 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:29,115 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035803154] [2024-12-02 06:03:29,115 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:29,116 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:29,116 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:29,116 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:29,116 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:29,117 INFO L87 Difference]: Start difference. First operand 873 states and 1264 transitions. Second operand has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:29,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:29,299 INFO L93 Difference]: Finished difference Result 1580 states and 2280 transitions. [2024-12-02 06:03:29,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:29,299 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 252 [2024-12-02 06:03:29,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:29,301 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:29,301 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:29,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:29,302 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1100 mSDsluCounter, 2369 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1100 SdHoareTripleChecker+Valid, 3555 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:29,302 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1100 Valid, 3555 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:29,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:29,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:29,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4481566820276497) internal successors, (1257), 868 states have internal predecessors, (1257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:29,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1263 transitions. [2024-12-02 06:03:29,310 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1263 transitions. Word has length 252 [2024-12-02 06:03:29,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:29,310 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1263 transitions. [2024-12-02 06:03:29,310 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:29,310 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1263 transitions. [2024-12-02 06:03:29,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2024-12-02 06:03:29,311 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:29,311 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:29,311 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 06:03:29,311 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:29,312 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:29,312 INFO L85 PathProgramCache]: Analyzing trace with hash -1768421689, now seen corresponding path program 1 times [2024-12-02 06:03:29,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:29,312 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405742504] [2024-12-02 06:03:29,312 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:29,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:29,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:29,799 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:29,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:29,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405742504] [2024-12-02 06:03:29,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1405742504] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:29,799 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:29,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:29,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786293973] [2024-12-02 06:03:29,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:29,800 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:29,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:29,801 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:29,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:29,801 INFO L87 Difference]: Start difference. First operand 873 states and 1263 transitions. Second operand has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:29,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:29,981 INFO L93 Difference]: Finished difference Result 1580 states and 2278 transitions. [2024-12-02 06:03:29,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:29,982 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 253 [2024-12-02 06:03:29,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:29,983 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:29,983 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:29,984 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:29,984 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1097 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1097 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:29,984 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1097 Valid, 2381 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:29,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:29,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:29,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4470046082949308) internal successors, (1256), 868 states have internal predecessors, (1256), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:29,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1262 transitions. [2024-12-02 06:03:29,998 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1262 transitions. Word has length 253 [2024-12-02 06:03:29,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:29,999 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1262 transitions. [2024-12-02 06:03:29,999 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:29,999 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1262 transitions. [2024-12-02 06:03:30,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-02 06:03:30,000 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:30,000 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:30,000 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 06:03:30,001 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:30,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:30,001 INFO L85 PathProgramCache]: Analyzing trace with hash -262754674, now seen corresponding path program 1 times [2024-12-02 06:03:30,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:30,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456824853] [2024-12-02 06:03:30,001 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:30,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:30,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:30,617 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:30,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:30,617 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [456824853] [2024-12-02 06:03:30,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [456824853] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:30,617 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:30,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:30,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841814535] [2024-12-02 06:03:30,617 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:30,618 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:30,618 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:30,618 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:30,618 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:30,619 INFO L87 Difference]: Start difference. First operand 873 states and 1262 transitions. Second operand has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:30,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:30,756 INFO L93 Difference]: Finished difference Result 1580 states and 2276 transitions. [2024-12-02 06:03:30,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:30,756 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 254 [2024-12-02 06:03:30,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:30,758 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:30,758 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:30,758 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:30,759 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2184 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2184 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:30,759 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2184 Valid, 2374 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:30,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:30,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:30,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.445852534562212) internal successors, (1255), 868 states have internal predecessors, (1255), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:30,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1261 transitions. [2024-12-02 06:03:30,767 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1261 transitions. Word has length 254 [2024-12-02 06:03:30,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:30,768 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1261 transitions. [2024-12-02 06:03:30,768 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:30,768 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1261 transitions. [2024-12-02 06:03:30,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-02 06:03:30,768 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:30,769 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:30,769 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 06:03:30,769 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:30,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:30,769 INFO L85 PathProgramCache]: Analyzing trace with hash 1822400070, now seen corresponding path program 1 times [2024-12-02 06:03:30,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:30,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091551736] [2024-12-02 06:03:30,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:30,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:30,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:31,178 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:31,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:31,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091551736] [2024-12-02 06:03:31,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091551736] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:31,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:31,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:31,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385498744] [2024-12-02 06:03:31,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:31,179 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:31,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:31,179 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:31,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:31,179 INFO L87 Difference]: Start difference. First operand 873 states and 1261 transitions. Second operand has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:31,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:31,326 INFO L93 Difference]: Finished difference Result 1580 states and 2274 transitions. [2024-12-02 06:03:31,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:31,327 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 255 [2024-12-02 06:03:31,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:31,329 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:31,329 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:31,329 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:31,330 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2178 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:31,330 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2178 Valid, 2374 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:31,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:31,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:31,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.444700460829493) internal successors, (1254), 868 states have internal predecessors, (1254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:31,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1260 transitions. [2024-12-02 06:03:31,340 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1260 transitions. Word has length 255 [2024-12-02 06:03:31,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:31,340 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1260 transitions. [2024-12-02 06:03:31,340 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:31,340 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1260 transitions. [2024-12-02 06:03:31,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2024-12-02 06:03:31,342 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:31,342 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:31,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 06:03:31,342 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:31,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:31,342 INFO L85 PathProgramCache]: Analyzing trace with hash -449010865, now seen corresponding path program 1 times [2024-12-02 06:03:31,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:31,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225596940] [2024-12-02 06:03:31,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:31,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:31,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:31,854 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:31,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:31,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225596940] [2024-12-02 06:03:31,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1225596940] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:31,855 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:31,855 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:31,855 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610501456] [2024-12-02 06:03:31,855 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:31,855 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:31,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:31,856 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:31,856 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:31,857 INFO L87 Difference]: Start difference. First operand 873 states and 1260 transitions. Second operand has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:31,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:31,987 INFO L93 Difference]: Finished difference Result 1580 states and 2272 transitions. [2024-12-02 06:03:31,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:31,987 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 256 [2024-12-02 06:03:31,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:31,988 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:31,988 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:31,989 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:31,989 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1079 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:31,989 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2374 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:31,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:31,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:31,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4435483870967742) internal successors, (1253), 868 states have internal predecessors, (1253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:32,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1259 transitions. [2024-12-02 06:03:32,000 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1259 transitions. Word has length 256 [2024-12-02 06:03:32,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:32,000 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1259 transitions. [2024-12-02 06:03:32,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:32,001 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1259 transitions. [2024-12-02 06:03:32,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2024-12-02 06:03:32,001 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:32,001 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:32,002 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 06:03:32,002 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:32,002 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:32,002 INFO L85 PathProgramCache]: Analyzing trace with hash 1710883141, now seen corresponding path program 1 times [2024-12-02 06:03:32,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:32,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996629734] [2024-12-02 06:03:32,002 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:32,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:32,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:32,437 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:32,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:32,438 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996629734] [2024-12-02 06:03:32,438 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996629734] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:32,438 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:32,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:32,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723126338] [2024-12-02 06:03:32,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:32,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:32,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:32,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:32,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:32,438 INFO L87 Difference]: Start difference. First operand 873 states and 1259 transitions. Second operand has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:32,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:32,584 INFO L93 Difference]: Finished difference Result 1580 states and 2270 transitions. [2024-12-02 06:03:32,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:32,584 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 257 [2024-12-02 06:03:32,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:32,586 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:32,586 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:32,586 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:32,587 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2166 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2166 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:32,587 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2166 Valid, 2374 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:32,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:32,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:32,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4423963133640554) internal successors, (1252), 868 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:32,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1258 transitions. [2024-12-02 06:03:32,596 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1258 transitions. Word has length 257 [2024-12-02 06:03:32,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:32,596 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1258 transitions. [2024-12-02 06:03:32,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:32,597 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1258 transitions. [2024-12-02 06:03:32,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2024-12-02 06:03:32,597 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:32,597 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:32,597 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 06:03:32,597 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:32,598 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:32,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1726874768, now seen corresponding path program 1 times [2024-12-02 06:03:32,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:32,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100720545] [2024-12-02 06:03:32,598 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:32,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:32,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:33,099 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:33,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:33,099 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100720545] [2024-12-02 06:03:33,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [100720545] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:33,099 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:33,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:33,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952532426] [2024-12-02 06:03:33,099 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:33,100 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:33,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:33,100 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:33,100 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:33,100 INFO L87 Difference]: Start difference. First operand 873 states and 1258 transitions. Second operand has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:33,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:33,257 INFO L93 Difference]: Finished difference Result 1580 states and 2268 transitions. [2024-12-02 06:03:33,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:33,258 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 258 [2024-12-02 06:03:33,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:33,261 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:33,261 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:33,262 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:33,262 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2160 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2160 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:33,262 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2160 Valid, 2374 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:33,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:33,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:33,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4412442396313363) internal successors, (1251), 868 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:33,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1257 transitions. [2024-12-02 06:03:33,278 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1257 transitions. Word has length 258 [2024-12-02 06:03:33,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:33,278 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1257 transitions. [2024-12-02 06:03:33,279 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:33,279 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1257 transitions. [2024-12-02 06:03:33,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2024-12-02 06:03:33,280 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:33,280 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:33,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 06:03:33,280 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:33,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:33,281 INFO L85 PathProgramCache]: Analyzing trace with hash 564576196, now seen corresponding path program 1 times [2024-12-02 06:03:33,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:33,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245740469] [2024-12-02 06:03:33,281 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:33,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:33,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:33,766 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:33,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:33,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245740469] [2024-12-02 06:03:33,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1245740469] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:33,766 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:33,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:33,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346348887] [2024-12-02 06:03:33,767 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:33,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:33,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:33,767 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:33,767 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:33,768 INFO L87 Difference]: Start difference. First operand 873 states and 1257 transitions. Second operand has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:34,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:34,027 INFO L93 Difference]: Finished difference Result 1580 states and 2266 transitions. [2024-12-02 06:03:34,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:34,028 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 259 [2024-12-02 06:03:34,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:34,030 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:34,030 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:34,030 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:34,031 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1061 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1061 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:34,031 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1061 Valid, 2216 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:34,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:34,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:34,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4400921658986174) internal successors, (1250), 868 states have internal predecessors, (1250), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:34,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1256 transitions. [2024-12-02 06:03:34,041 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1256 transitions. Word has length 259 [2024-12-02 06:03:34,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:34,041 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1256 transitions. [2024-12-02 06:03:34,041 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:34,041 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1256 transitions. [2024-12-02 06:03:34,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2024-12-02 06:03:34,042 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:34,042 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:34,042 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 06:03:34,042 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:34,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:34,043 INFO L85 PathProgramCache]: Analyzing trace with hash -1317954896, now seen corresponding path program 1 times [2024-12-02 06:03:34,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:34,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021220366] [2024-12-02 06:03:34,043 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:34,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:34,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:34,528 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:34,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:34,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021220366] [2024-12-02 06:03:34,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021220366] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:34,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:34,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:34,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318015322] [2024-12-02 06:03:34,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:34,528 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:34,528 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:34,529 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:34,529 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:34,529 INFO L87 Difference]: Start difference. First operand 873 states and 1256 transitions. Second operand has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:34,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:34,796 INFO L93 Difference]: Finished difference Result 1580 states and 2264 transitions. [2024-12-02 06:03:34,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:34,796 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 260 [2024-12-02 06:03:34,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:34,798 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:34,798 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:34,799 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:34,799 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1059 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1059 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:34,799 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1059 Valid, 2223 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:34,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:34,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:34,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4389400921658986) internal successors, (1249), 868 states have internal predecessors, (1249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:34,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1255 transitions. [2024-12-02 06:03:34,810 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1255 transitions. Word has length 260 [2024-12-02 06:03:34,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:34,810 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1255 transitions. [2024-12-02 06:03:34,810 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:34,810 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1255 transitions. [2024-12-02 06:03:34,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2024-12-02 06:03:34,811 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:34,811 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:34,811 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 06:03:34,811 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:34,812 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:34,812 INFO L85 PathProgramCache]: Analyzing trace with hash -1332823739, now seen corresponding path program 1 times [2024-12-02 06:03:34,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:34,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289630554] [2024-12-02 06:03:34,812 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:34,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:35,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:35,332 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:35,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:35,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289630554] [2024-12-02 06:03:35,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1289630554] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:35,332 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:35,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:35,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444377714] [2024-12-02 06:03:35,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:35,332 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:35,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:35,333 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:35,333 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:35,333 INFO L87 Difference]: Start difference. First operand 873 states and 1255 transitions. Second operand has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:35,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:35,599 INFO L93 Difference]: Finished difference Result 1580 states and 2262 transitions. [2024-12-02 06:03:35,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:35,600 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 261 [2024-12-02 06:03:35,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:35,602 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:35,602 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:35,603 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:35,604 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1058 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 288 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1058 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 288 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:35,604 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1058 Valid, 2223 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 288 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:35,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:35,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:35,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4377880184331797) internal successors, (1248), 868 states have internal predecessors, (1248), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:35,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1254 transitions. [2024-12-02 06:03:35,618 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1254 transitions. Word has length 261 [2024-12-02 06:03:35,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:35,618 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1254 transitions. [2024-12-02 06:03:35,618 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:35,618 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1254 transitions. [2024-12-02 06:03:35,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2024-12-02 06:03:35,619 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:35,619 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:35,619 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 06:03:35,619 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:35,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:35,619 INFO L85 PathProgramCache]: Analyzing trace with hash 1161378031, now seen corresponding path program 1 times [2024-12-02 06:03:35,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:35,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876515798] [2024-12-02 06:03:35,619 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:35,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:35,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:36,099 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:36,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:36,099 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876515798] [2024-12-02 06:03:36,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876515798] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:36,099 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:36,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:36,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614023360] [2024-12-02 06:03:36,099 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:36,099 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:36,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:36,100 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:36,100 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:36,100 INFO L87 Difference]: Start difference. First operand 873 states and 1254 transitions. Second operand has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:36,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:36,313 INFO L93 Difference]: Finished difference Result 1580 states and 2260 transitions. [2024-12-02 06:03:36,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:36,314 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 262 [2024-12-02 06:03:36,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:36,316 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:36,316 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:36,316 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:36,317 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2102 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2102 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:36,317 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2102 Valid, 2216 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:36,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:36,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:36,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4366359447004609) internal successors, (1247), 868 states have internal predecessors, (1247), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:36,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1253 transitions. [2024-12-02 06:03:36,325 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1253 transitions. Word has length 262 [2024-12-02 06:03:36,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:36,325 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1253 transitions. [2024-12-02 06:03:36,325 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:36,325 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1253 transitions. [2024-12-02 06:03:36,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2024-12-02 06:03:36,326 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:36,326 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:36,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 06:03:36,326 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:36,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:36,327 INFO L85 PathProgramCache]: Analyzing trace with hash 940351302, now seen corresponding path program 1 times [2024-12-02 06:03:36,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:36,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376781294] [2024-12-02 06:03:36,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:36,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:36,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:36,769 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:36,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:36,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376781294] [2024-12-02 06:03:36,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376781294] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:36,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:36,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:36,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097501474] [2024-12-02 06:03:36,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:36,769 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:36,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:36,769 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:36,769 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:36,769 INFO L87 Difference]: Start difference. First operand 873 states and 1253 transitions. Second operand has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:37,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:37,015 INFO L93 Difference]: Finished difference Result 1580 states and 2258 transitions. [2024-12-02 06:03:37,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:37,016 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 263 [2024-12-02 06:03:37,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:37,018 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:37,018 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:37,019 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:37,019 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1056 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:37,019 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2223 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:37,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:37,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:37,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.435483870967742) internal successors, (1246), 868 states have internal predecessors, (1246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:37,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1252 transitions. [2024-12-02 06:03:37,028 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1252 transitions. Word has length 263 [2024-12-02 06:03:37,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:37,028 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1252 transitions. [2024-12-02 06:03:37,028 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:37,029 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1252 transitions. [2024-12-02 06:03:37,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2024-12-02 06:03:37,029 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:37,030 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:37,030 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 06:03:37,030 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:37,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:37,030 INFO L85 PathProgramCache]: Analyzing trace with hash 2062987950, now seen corresponding path program 1 times [2024-12-02 06:03:37,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:37,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216752180] [2024-12-02 06:03:37,030 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:37,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:37,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:37,545 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:37,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:37,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216752180] [2024-12-02 06:03:37,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [216752180] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:37,545 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:37,545 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:37,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224150471] [2024-12-02 06:03:37,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:37,546 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:37,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:37,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:37,546 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:37,546 INFO L87 Difference]: Start difference. First operand 873 states and 1252 transitions. Second operand has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:37,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:37,800 INFO L93 Difference]: Finished difference Result 1580 states and 2256 transitions. [2024-12-02 06:03:37,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:37,801 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 264 [2024-12-02 06:03:37,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:37,803 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:37,803 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:37,803 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:37,804 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1055 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 282 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1055 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 282 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:37,804 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1055 Valid, 2223 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 282 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:37,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:37,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:37,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4343317972350231) internal successors, (1245), 868 states have internal predecessors, (1245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:37,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1251 transitions. [2024-12-02 06:03:37,823 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1251 transitions. Word has length 264 [2024-12-02 06:03:37,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:37,824 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1251 transitions. [2024-12-02 06:03:37,824 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:37,824 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1251 transitions. [2024-12-02 06:03:37,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2024-12-02 06:03:37,825 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:37,825 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:37,825 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 06:03:37,825 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:37,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:37,826 INFO L85 PathProgramCache]: Analyzing trace with hash -101916217, now seen corresponding path program 1 times [2024-12-02 06:03:37,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:37,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021292589] [2024-12-02 06:03:37,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:37,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:38,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:38,373 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:38,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:38,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021292589] [2024-12-02 06:03:38,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1021292589] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:38,373 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:38,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:38,373 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367810319] [2024-12-02 06:03:38,373 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:38,373 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:38,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:38,374 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:38,374 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:38,374 INFO L87 Difference]: Start difference. First operand 873 states and 1251 transitions. Second operand has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:38,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:38,626 INFO L93 Difference]: Finished difference Result 1580 states and 2254 transitions. [2024-12-02 06:03:38,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:38,627 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 265 [2024-12-02 06:03:38,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:38,628 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:38,628 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:38,628 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:38,628 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2084 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 280 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2084 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 280 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:38,629 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2084 Valid, 2216 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 280 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:38,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:38,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:38,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.433179723502304) internal successors, (1244), 868 states have internal predecessors, (1244), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:38,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1250 transitions. [2024-12-02 06:03:38,644 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1250 transitions. Word has length 265 [2024-12-02 06:03:38,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:38,644 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1250 transitions. [2024-12-02 06:03:38,644 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:38,644 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1250 transitions. [2024-12-02 06:03:38,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2024-12-02 06:03:38,645 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:38,646 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:38,646 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 06:03:38,646 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:38,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:38,646 INFO L85 PathProgramCache]: Analyzing trace with hash -277506067, now seen corresponding path program 1 times [2024-12-02 06:03:38,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:38,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912654894] [2024-12-02 06:03:38,646 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:38,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:38,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:39,121 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:39,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:39,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912654894] [2024-12-02 06:03:39,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912654894] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:39,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:39,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:39,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611940557] [2024-12-02 06:03:39,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:39,122 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:39,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:39,122 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:39,122 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:39,122 INFO L87 Difference]: Start difference. First operand 873 states and 1250 transitions. Second operand has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:39,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:39,370 INFO L93 Difference]: Finished difference Result 1580 states and 2252 transitions. [2024-12-02 06:03:39,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:39,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 266 [2024-12-02 06:03:39,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:39,372 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:39,372 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:39,373 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:39,373 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1053 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1053 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:39,373 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1053 Valid, 2223 Invalid, 278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:39,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:39,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:39,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4320276497695852) internal successors, (1243), 868 states have internal predecessors, (1243), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:39,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1249 transitions. [2024-12-02 06:03:39,382 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1249 transitions. Word has length 266 [2024-12-02 06:03:39,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:39,383 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1249 transitions. [2024-12-02 06:03:39,383 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:39,383 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1249 transitions. [2024-12-02 06:03:39,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2024-12-02 06:03:39,383 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:39,383 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:39,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 06:03:39,384 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:39,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:39,384 INFO L85 PathProgramCache]: Analyzing trace with hash 2047602888, now seen corresponding path program 1 times [2024-12-02 06:03:39,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:39,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299759918] [2024-12-02 06:03:39,384 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:39,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:39,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:39,860 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:39,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:39,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299759918] [2024-12-02 06:03:39,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [299759918] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:39,860 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:39,860 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:39,860 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625654599] [2024-12-02 06:03:39,860 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:39,861 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:39,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:39,861 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:39,861 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:39,861 INFO L87 Difference]: Start difference. First operand 873 states and 1249 transitions. Second operand has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:40,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:40,104 INFO L93 Difference]: Finished difference Result 1580 states and 2250 transitions. [2024-12-02 06:03:40,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:40,105 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 267 [2024-12-02 06:03:40,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:40,106 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:40,106 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:40,107 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:40,107 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1052 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1052 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:40,107 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1052 Valid, 2223 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 276 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:40,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:40,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:40,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4308755760368663) internal successors, (1242), 868 states have internal predecessors, (1242), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:40,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1248 transitions. [2024-12-02 06:03:40,124 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1248 transitions. Word has length 267 [2024-12-02 06:03:40,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:40,124 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1248 transitions. [2024-12-02 06:03:40,124 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:40,124 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1248 transitions. [2024-12-02 06:03:40,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2024-12-02 06:03:40,125 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:40,126 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:40,126 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 06:03:40,126 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:40,126 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:40,126 INFO L85 PathProgramCache]: Analyzing trace with hash 1324447916, now seen corresponding path program 1 times [2024-12-02 06:03:40,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:40,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756810417] [2024-12-02 06:03:40,126 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:40,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:40,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:40,619 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:40,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:40,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756810417] [2024-12-02 06:03:40,620 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1756810417] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:40,620 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:40,620 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:40,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027174568] [2024-12-02 06:03:40,620 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:40,620 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:40,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:40,620 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:40,620 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:40,620 INFO L87 Difference]: Start difference. First operand 873 states and 1248 transitions. Second operand has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:40,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:40,855 INFO L93 Difference]: Finished difference Result 1580 states and 2248 transitions. [2024-12-02 06:03:40,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:40,855 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 268 [2024-12-02 06:03:40,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:40,857 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:40,857 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:40,857 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:40,858 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2066 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2066 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:40,858 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2066 Valid, 2216 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:40,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:40,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:40,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4297235023041475) internal successors, (1241), 868 states have internal predecessors, (1241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:40,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1247 transitions. [2024-12-02 06:03:40,869 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1247 transitions. Word has length 268 [2024-12-02 06:03:40,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:40,869 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1247 transitions. [2024-12-02 06:03:40,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:40,869 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1247 transitions. [2024-12-02 06:03:40,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2024-12-02 06:03:40,871 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:40,871 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:40,871 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 06:03:40,871 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:40,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:40,872 INFO L85 PathProgramCache]: Analyzing trace with hash 995507273, now seen corresponding path program 1 times [2024-12-02 06:03:40,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:40,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361222194] [2024-12-02 06:03:40,872 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:40,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:41,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:41,396 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:41,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:41,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361222194] [2024-12-02 06:03:41,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1361222194] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:41,396 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:41,396 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:41,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [10426043] [2024-12-02 06:03:41,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:41,397 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:41,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:41,397 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:41,397 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:41,397 INFO L87 Difference]: Start difference. First operand 873 states and 1247 transitions. Second operand has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:41,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:41,661 INFO L93 Difference]: Finished difference Result 1580 states and 2246 transitions. [2024-12-02 06:03:41,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:41,661 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 269 [2024-12-02 06:03:41,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:41,663 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:41,663 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:41,663 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:41,663 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1050 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 272 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1050 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:41,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1050 Valid, 2223 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 272 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:41,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:41,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:41,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4285714285714286) internal successors, (1240), 868 states have internal predecessors, (1240), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:41,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1246 transitions. [2024-12-02 06:03:41,674 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1246 transitions. Word has length 269 [2024-12-02 06:03:41,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:41,674 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1246 transitions. [2024-12-02 06:03:41,674 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:41,674 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1246 transitions. [2024-12-02 06:03:41,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-12-02 06:03:41,675 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:41,675 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:41,675 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 06:03:41,675 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:41,675 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:41,676 INFO L85 PathProgramCache]: Analyzing trace with hash -669653781, now seen corresponding path program 1 times [2024-12-02 06:03:41,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:41,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [680517167] [2024-12-02 06:03:41,676 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:41,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:41,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:42,098 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:42,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:42,098 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [680517167] [2024-12-02 06:03:42,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [680517167] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:42,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:42,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:42,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156583524] [2024-12-02 06:03:42,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:42,099 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:42,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:42,099 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:42,099 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:42,099 INFO L87 Difference]: Start difference. First operand 873 states and 1246 transitions. Second operand has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:42,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:42,298 INFO L93 Difference]: Finished difference Result 1580 states and 2244 transitions. [2024-12-02 06:03:42,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:42,299 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 270 [2024-12-02 06:03:42,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:42,300 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:42,300 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:42,300 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:42,301 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2054 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2054 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:42,301 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2054 Valid, 2216 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:42,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:42,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:42,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4274193548387097) internal successors, (1239), 868 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:42,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1245 transitions. [2024-12-02 06:03:42,312 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1245 transitions. Word has length 270 [2024-12-02 06:03:42,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:42,312 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1245 transitions. [2024-12-02 06:03:42,312 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:42,312 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1245 transitions. [2024-12-02 06:03:42,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2024-12-02 06:03:42,313 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:42,313 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:42,313 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 06:03:42,313 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:42,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:42,313 INFO L85 PathProgramCache]: Analyzing trace with hash -53988278, now seen corresponding path program 1 times [2024-12-02 06:03:42,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:42,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143375389] [2024-12-02 06:03:42,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:42,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:42,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:42,796 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:42,796 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:42,796 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143375389] [2024-12-02 06:03:42,796 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2143375389] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:42,796 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:42,796 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:42,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614442341] [2024-12-02 06:03:42,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:42,797 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:42,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:42,797 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:42,797 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:42,797 INFO L87 Difference]: Start difference. First operand 873 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:43,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:43,027 INFO L93 Difference]: Finished difference Result 1580 states and 2242 transitions. [2024-12-02 06:03:43,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:43,028 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 271 [2024-12-02 06:03:43,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:43,029 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:43,029 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:43,030 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:43,030 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1048 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 268 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1048 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:43,030 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1048 Valid, 2223 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 268 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:43,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:43,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:43,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4262672811059909) internal successors, (1238), 868 states have internal predecessors, (1238), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:43,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1244 transitions. [2024-12-02 06:03:43,039 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1244 transitions. Word has length 271 [2024-12-02 06:03:43,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:43,040 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1244 transitions. [2024-12-02 06:03:43,040 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:43,040 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1244 transitions. [2024-12-02 06:03:43,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-12-02 06:03:43,041 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:43,041 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:43,041 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 06:03:43,041 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:43,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:43,041 INFO L85 PathProgramCache]: Analyzing trace with hash 1593732266, now seen corresponding path program 1 times [2024-12-02 06:03:43,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:43,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033541030] [2024-12-02 06:03:43,042 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:43,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:43,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:43,484 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:43,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:43,484 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033541030] [2024-12-02 06:03:43,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033541030] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:43,484 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:43,484 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:43,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240238646] [2024-12-02 06:03:43,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:43,484 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:43,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:43,484 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:43,485 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:43,485 INFO L87 Difference]: Start difference. First operand 873 states and 1244 transitions. Second operand has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:43,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:43,701 INFO L93 Difference]: Finished difference Result 1580 states and 2240 transitions. [2024-12-02 06:03:43,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:43,702 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 272 [2024-12-02 06:03:43,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:43,703 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:43,703 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:43,704 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:43,704 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2042 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2042 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:43,704 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2042 Valid, 2216 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:43,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:43,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:43,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4251152073732718) internal successors, (1237), 868 states have internal predecessors, (1237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:43,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1243 transitions. [2024-12-02 06:03:43,719 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1243 transitions. Word has length 272 [2024-12-02 06:03:43,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:43,720 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1243 transitions. [2024-12-02 06:03:43,720 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:43,720 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1243 transitions. [2024-12-02 06:03:43,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-12-02 06:03:43,721 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:43,721 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:43,721 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 06:03:43,721 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:43,722 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:43,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1986939083, now seen corresponding path program 1 times [2024-12-02 06:03:43,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:43,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353631751] [2024-12-02 06:03:43,722 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:43,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:43,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:44,361 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:44,361 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:44,362 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1353631751] [2024-12-02 06:03:44,362 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1353631751] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:44,362 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:44,362 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:44,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403910426] [2024-12-02 06:03:44,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:44,362 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:44,362 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:44,363 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:44,363 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:44,363 INFO L87 Difference]: Start difference. First operand 873 states and 1243 transitions. Second operand has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:44,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:44,576 INFO L93 Difference]: Finished difference Result 1580 states and 2238 transitions. [2024-12-02 06:03:44,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:44,576 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 273 [2024-12-02 06:03:44,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:44,577 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 06:03:44,577 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:44,578 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:44,578 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2036 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2036 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:44,578 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2036 Valid, 2216 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:44,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:44,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:44,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.423963133640553) internal successors, (1236), 868 states have internal predecessors, (1236), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:44,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1242 transitions. [2024-12-02 06:03:44,589 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1242 transitions. Word has length 273 [2024-12-02 06:03:44,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:44,589 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1242 transitions. [2024-12-02 06:03:44,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:44,590 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1242 transitions. [2024-12-02 06:03:44,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2024-12-02 06:03:44,590 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:44,591 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:44,591 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 06:03:44,591 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:44,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:44,591 INFO L85 PathProgramCache]: Analyzing trace with hash -801726487, now seen corresponding path program 1 times [2024-12-02 06:03:44,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:44,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315381618] [2024-12-02 06:03:44,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:44,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:44,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:45,050 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:45,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:45,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1315381618] [2024-12-02 06:03:45,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1315381618] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:45,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:45,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:03:45,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632340016] [2024-12-02 06:03:45,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:45,050 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:03:45,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:45,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:03:45,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:45,051 INFO L87 Difference]: Start difference. First operand 873 states and 1242 transitions. Second operand has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:45,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:45,322 INFO L93 Difference]: Finished difference Result 1582 states and 2238 transitions. [2024-12-02 06:03:45,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:45,323 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 274 [2024-12-02 06:03:45,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:45,324 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 06:03:45,324 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 06:03:45,324 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:03:45,325 INFO L435 NwaCegarLoop]: 1233 mSDtfsCounter, 2 mSDsluCounter, 2196 mSDsCounter, 0 mSdLazyCounter, 281 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 3429 SdHoareTripleChecker+Invalid, 281 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 281 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:45,325 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 3429 Invalid, 281 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 281 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:45,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 06:03:45,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 06:03:45,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.422811059907834) internal successors, (1235), 868 states have internal predecessors, (1235), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:45,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1241 transitions. [2024-12-02 06:03:45,336 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1241 transitions. Word has length 274 [2024-12-02 06:03:45,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:45,336 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1241 transitions. [2024-12-02 06:03:45,336 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:45,336 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1241 transitions. [2024-12-02 06:03:45,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2024-12-02 06:03:45,337 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:45,337 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:45,337 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 06:03:45,337 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:45,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:45,338 INFO L85 PathProgramCache]: Analyzing trace with hash -98183874, now seen corresponding path program 1 times [2024-12-02 06:03:45,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:45,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034414751] [2024-12-02 06:03:45,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:45,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:45,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:46,489 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:46,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:46,489 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034414751] [2024-12-02 06:03:46,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2034414751] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:46,490 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:46,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:46,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675554599] [2024-12-02 06:03:46,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:46,490 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:46,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:46,491 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:46,491 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:46,491 INFO L87 Difference]: Start difference. First operand 873 states and 1241 transitions. Second operand has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:46,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:46,548 INFO L93 Difference]: Finished difference Result 1720 states and 2386 transitions. [2024-12-02 06:03:46,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 06:03:46,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 275 [2024-12-02 06:03:46,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:46,551 INFO L225 Difference]: With dead ends: 1720 [2024-12-02 06:03:46,551 INFO L226 Difference]: Without dead ends: 1013 [2024-12-02 06:03:46,552 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:46,552 INFO L435 NwaCegarLoop]: 1231 mSDtfsCounter, 22 mSDsluCounter, 3684 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 4915 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:46,553 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 4915 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:03:46,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1013 states. [2024-12-02 06:03:46,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1013 to 1011. [2024-12-02 06:03:46,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 1006 states have (on average 1.374751491053678) internal successors, (1383), 1006 states have internal predecessors, (1383), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:03:46,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1389 transitions. [2024-12-02 06:03:46,575 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1389 transitions. Word has length 275 [2024-12-02 06:03:46,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:46,575 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1389 transitions. [2024-12-02 06:03:46,575 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:46,575 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1389 transitions. [2024-12-02 06:03:46,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2024-12-02 06:03:46,577 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:46,577 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:46,577 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 06:03:46,577 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:46,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:46,578 INFO L85 PathProgramCache]: Analyzing trace with hash -2134812052, now seen corresponding path program 1 times [2024-12-02 06:03:46,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:46,578 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000743753] [2024-12-02 06:03:46,578 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:46,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:46,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:47,938 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:03:47,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:47,938 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000743753] [2024-12-02 06:03:47,938 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000743753] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:47,938 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:47,938 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 06:03:47,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427783860] [2024-12-02 06:03:47,938 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:47,939 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 06:03:47,939 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:47,939 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 06:03:47,940 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 06:03:47,940 INFO L87 Difference]: Start difference. First operand 1011 states and 1389 transitions. Second operand has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:48,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:48,084 INFO L93 Difference]: Finished difference Result 2210 states and 2942 transitions. [2024-12-02 06:03:48,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:03:48,085 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 276 [2024-12-02 06:03:48,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:48,086 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:48,086 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:48,087 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-12-02 06:03:48,088 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1683 mSDsluCounter, 4888 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1686 SdHoareTripleChecker+Valid, 6113 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:48,088 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1686 Valid, 6113 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:48,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:48,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:48,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3176123802505526) internal successors, (1788), 1357 states have internal predecessors, (1788), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:48,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1800 transitions. [2024-12-02 06:03:48,115 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1800 transitions. Word has length 276 [2024-12-02 06:03:48,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:48,115 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1800 transitions. [2024-12-02 06:03:48,116 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:03:48,116 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1800 transitions. [2024-12-02 06:03:48,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 703 [2024-12-02 06:03:48,119 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:48,119 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:48,119 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 06:03:48,120 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:48,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:48,120 INFO L85 PathProgramCache]: Analyzing trace with hash -1200623010, now seen corresponding path program 1 times [2024-12-02 06:03:48,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:48,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340721616] [2024-12-02 06:03:48,120 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:48,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:48,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:49,226 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:49,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:49,226 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340721616] [2024-12-02 06:03:49,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [340721616] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:49,226 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:49,226 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:49,226 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185100031] [2024-12-02 06:03:49,227 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:49,227 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:49,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:49,228 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:49,228 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:49,228 INFO L87 Difference]: Start difference. First operand 1365 states and 1800 transitions. Second operand has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:49,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:49,450 INFO L93 Difference]: Finished difference Result 2210 states and 2941 transitions. [2024-12-02 06:03:49,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:49,450 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 702 [2024-12-02 06:03:49,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:49,452 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:49,452 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:49,452 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:49,453 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2095 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2098 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:49,453 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2098 Valid, 2214 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:49,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:49,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:49,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3168754605747974) internal successors, (1787), 1357 states have internal predecessors, (1787), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:49,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1799 transitions. [2024-12-02 06:03:49,474 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1799 transitions. Word has length 702 [2024-12-02 06:03:49,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:49,475 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1799 transitions. [2024-12-02 06:03:49,475 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:49,475 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1799 transitions. [2024-12-02 06:03:49,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 704 [2024-12-02 06:03:49,478 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:49,478 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:49,478 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 06:03:49,479 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:49,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:49,479 INFO L85 PathProgramCache]: Analyzing trace with hash 1043857648, now seen corresponding path program 1 times [2024-12-02 06:03:49,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:49,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406195750] [2024-12-02 06:03:49,479 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:49,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:49,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:50,385 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:50,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:50,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406195750] [2024-12-02 06:03:50,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406195750] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:50,385 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:50,385 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:50,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313381276] [2024-12-02 06:03:50,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:50,386 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:50,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:50,386 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:50,386 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:50,386 INFO L87 Difference]: Start difference. First operand 1365 states and 1799 transitions. Second operand has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:50,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:50,576 INFO L93 Difference]: Finished difference Result 2210 states and 2939 transitions. [2024-12-02 06:03:50,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:50,577 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 703 [2024-12-02 06:03:50,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:50,578 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:50,578 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:50,579 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:50,579 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2079 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2082 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:50,579 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2082 Valid, 2214 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:50,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:50,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:50,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.316138540899042) internal successors, (1786), 1357 states have internal predecessors, (1786), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:50,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1798 transitions. [2024-12-02 06:03:50,610 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1798 transitions. Word has length 703 [2024-12-02 06:03:50,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:50,610 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1798 transitions. [2024-12-02 06:03:50,610 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:50,610 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1798 transitions. [2024-12-02 06:03:50,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 705 [2024-12-02 06:03:50,615 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:50,616 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:50,616 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 06:03:50,616 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:50,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:50,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1924280905, now seen corresponding path program 1 times [2024-12-02 06:03:50,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:50,616 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207962518] [2024-12-02 06:03:50,617 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:50,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:50,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:51,731 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:51,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:51,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207962518] [2024-12-02 06:03:51,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207962518] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:51,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:51,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:51,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860745475] [2024-12-02 06:03:51,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:51,732 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:51,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:51,733 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:51,733 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:51,733 INFO L87 Difference]: Start difference. First operand 1365 states and 1798 transitions. Second operand has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:51,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:51,936 INFO L93 Difference]: Finished difference Result 2210 states and 2937 transitions. [2024-12-02 06:03:51,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:51,937 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 704 [2024-12-02 06:03:51,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:51,938 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:51,938 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:51,939 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:51,939 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1124 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 258 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1127 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 258 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:51,939 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1127 Valid, 2221 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 258 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:51,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:51,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:51,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3154016212232866) internal successors, (1785), 1357 states have internal predecessors, (1785), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:51,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1797 transitions. [2024-12-02 06:03:51,957 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1797 transitions. Word has length 704 [2024-12-02 06:03:51,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:51,957 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1797 transitions. [2024-12-02 06:03:51,957 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:51,958 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1797 transitions. [2024-12-02 06:03:51,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 706 [2024-12-02 06:03:51,960 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:51,961 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:51,961 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 06:03:51,961 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:51,961 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:51,961 INFO L85 PathProgramCache]: Analyzing trace with hash -1402931717, now seen corresponding path program 1 times [2024-12-02 06:03:51,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:51,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297950236] [2024-12-02 06:03:51,962 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:51,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:52,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:52,883 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:52,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:52,883 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297950236] [2024-12-02 06:03:52,883 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1297950236] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:52,883 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:52,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:52,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964043555] [2024-12-02 06:03:52,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:52,885 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:52,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:52,885 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:52,886 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:52,886 INFO L87 Difference]: Start difference. First operand 1365 states and 1797 transitions. Second operand has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:53,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:53,093 INFO L93 Difference]: Finished difference Result 2210 states and 2935 transitions. [2024-12-02 06:03:53,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:53,093 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 705 [2024-12-02 06:03:53,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:53,094 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:53,094 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:53,095 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:53,095 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1116 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1119 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:53,095 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1119 Valid, 2221 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:53,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:53,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:53,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3146647015475312) internal successors, (1784), 1357 states have internal predecessors, (1784), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:53,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1796 transitions. [2024-12-02 06:03:53,112 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1796 transitions. Word has length 705 [2024-12-02 06:03:53,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:53,112 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1796 transitions. [2024-12-02 06:03:53,112 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:53,112 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1796 transitions. [2024-12-02 06:03:53,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 707 [2024-12-02 06:03:53,115 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:53,115 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:53,115 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-02 06:03:53,115 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:53,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:53,116 INFO L85 PathProgramCache]: Analyzing trace with hash 1947860660, now seen corresponding path program 1 times [2024-12-02 06:03:53,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:53,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040216520] [2024-12-02 06:03:53,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:53,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:53,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:54,027 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:54,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:54,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040216520] [2024-12-02 06:03:54,027 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1040216520] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:54,027 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:54,027 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:54,027 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363246248] [2024-12-02 06:03:54,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:54,028 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:54,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:54,029 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:54,029 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:54,029 INFO L87 Difference]: Start difference. First operand 1365 states and 1796 transitions. Second operand has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:54,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:54,237 INFO L93 Difference]: Finished difference Result 2210 states and 2933 transitions. [2024-12-02 06:03:54,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:54,238 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 706 [2024-12-02 06:03:54,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:54,239 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:54,239 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:54,239 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:54,240 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2031 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2034 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:54,240 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2034 Valid, 2214 Invalid, 255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:54,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:54,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:54,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.313927781871776) internal successors, (1783), 1357 states have internal predecessors, (1783), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:54,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1795 transitions. [2024-12-02 06:03:54,257 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1795 transitions. Word has length 706 [2024-12-02 06:03:54,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:54,257 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1795 transitions. [2024-12-02 06:03:54,257 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:54,257 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1795 transitions. [2024-12-02 06:03:54,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-12-02 06:03:54,260 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:54,260 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:54,261 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 06:03:54,261 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:54,261 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:54,261 INFO L85 PathProgramCache]: Analyzing trace with hash 1244405638, now seen corresponding path program 1 times [2024-12-02 06:03:54,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:54,261 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744524275] [2024-12-02 06:03:54,261 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:54,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:54,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:55,168 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:55,168 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:55,168 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744524275] [2024-12-02 06:03:55,168 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744524275] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:55,168 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:55,169 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:55,169 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147810292] [2024-12-02 06:03:55,169 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:55,170 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:55,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:55,170 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:55,170 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:55,171 INFO L87 Difference]: Start difference. First operand 1365 states and 1795 transitions. Second operand has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:55,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:55,372 INFO L93 Difference]: Finished difference Result 2210 states and 2931 transitions. [2024-12-02 06:03:55,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:55,373 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 707 [2024-12-02 06:03:55,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:55,374 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:55,374 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:55,374 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:55,375 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1100 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1103 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:55,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1103 Valid, 2221 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:55,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:55,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3131908621960207) internal successors, (1782), 1357 states have internal predecessors, (1782), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:55,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1794 transitions. [2024-12-02 06:03:55,391 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1794 transitions. Word has length 707 [2024-12-02 06:03:55,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:55,391 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1794 transitions. [2024-12-02 06:03:55,392 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:55,392 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1794 transitions. [2024-12-02 06:03:55,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-12-02 06:03:55,394 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:55,395 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:55,395 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 06:03:55,395 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:55,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:55,395 INFO L85 PathProgramCache]: Analyzing trace with hash -520808545, now seen corresponding path program 1 times [2024-12-02 06:03:55,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:55,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793814677] [2024-12-02 06:03:55,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:55,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:55,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:56,320 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:56,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:56,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793814677] [2024-12-02 06:03:56,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1793814677] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:56,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:56,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:56,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378300781] [2024-12-02 06:03:56,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:56,321 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:56,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:56,322 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:56,322 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:56,322 INFO L87 Difference]: Start difference. First operand 1365 states and 1794 transitions. Second operand has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:56,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:56,500 INFO L93 Difference]: Finished difference Result 2210 states and 2929 transitions. [2024-12-02 06:03:56,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:56,501 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 708 [2024-12-02 06:03:56,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:56,502 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:56,503 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:56,503 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:56,504 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1999 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2002 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:56,504 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2002 Valid, 2214 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:03:56,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:56,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:56,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3124539425202653) internal successors, (1781), 1357 states have internal predecessors, (1781), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:56,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1793 transitions. [2024-12-02 06:03:56,522 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1793 transitions. Word has length 708 [2024-12-02 06:03:56,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:56,522 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1793 transitions. [2024-12-02 06:03:56,523 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:56,523 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1793 transitions. [2024-12-02 06:03:56,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 710 [2024-12-02 06:03:56,526 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:56,526 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:56,526 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 06:03:56,526 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:56,526 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:56,526 INFO L85 PathProgramCache]: Analyzing trace with hash -804962927, now seen corresponding path program 1 times [2024-12-02 06:03:56,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:56,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256708186] [2024-12-02 06:03:56,527 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:56,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:56,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:57,442 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:57,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:57,442 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256708186] [2024-12-02 06:03:57,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256708186] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:57,442 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:57,442 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:57,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615775009] [2024-12-02 06:03:57,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:57,442 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:57,443 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:57,443 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:57,443 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:57,443 INFO L87 Difference]: Start difference. First operand 1365 states and 1793 transitions. Second operand has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:57,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:57,632 INFO L93 Difference]: Finished difference Result 2210 states and 2927 transitions. [2024-12-02 06:03:57,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:57,633 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 709 [2024-12-02 06:03:57,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:57,634 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:57,634 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:57,635 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:57,635 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1983 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 248 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1986 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 248 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:57,635 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1986 Valid, 2214 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 248 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:57,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:57,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:57,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3117170228445099) internal successors, (1780), 1357 states have internal predecessors, (1780), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:57,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1792 transitions. [2024-12-02 06:03:57,652 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1792 transitions. Word has length 709 [2024-12-02 06:03:57,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:57,653 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1792 transitions. [2024-12-02 06:03:57,653 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:57,653 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1792 transitions. [2024-12-02 06:03:57,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 711 [2024-12-02 06:03:57,656 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:57,656 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:57,656 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 06:03:57,656 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:57,656 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:57,656 INFO L85 PathProgramCache]: Analyzing trace with hash 544292106, now seen corresponding path program 1 times [2024-12-02 06:03:57,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:57,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283047472] [2024-12-02 06:03:57,656 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:57,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:58,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:58,668 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:58,668 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283047472] [2024-12-02 06:03:58,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283047472] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:58,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:58,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:58,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089621156] [2024-12-02 06:03:58,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:58,669 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:58,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:58,670 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:58,670 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:58,670 INFO L87 Difference]: Start difference. First operand 1365 states and 1792 transitions. Second operand has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:58,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:03:58,889 INFO L93 Difference]: Finished difference Result 2210 states and 2925 transitions. [2024-12-02 06:03:58,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:03:58,890 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 710 [2024-12-02 06:03:58,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:03:58,891 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:03:58,891 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:03:58,892 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:03:58,892 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1076 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:03:58,893 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2221 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:03:58,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:03:58,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:03:58,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3109801031687547) internal successors, (1779), 1357 states have internal predecessors, (1779), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:03:58,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1791 transitions. [2024-12-02 06:03:58,921 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1791 transitions. Word has length 710 [2024-12-02 06:03:58,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:03:58,921 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1791 transitions. [2024-12-02 06:03:58,922 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:03:58,922 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1791 transitions. [2024-12-02 06:03:58,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 712 [2024-12-02 06:03:58,928 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:03:58,929 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:03:58,929 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 06:03:58,929 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:03:58,929 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:03:58,930 INFO L85 PathProgramCache]: Analyzing trace with hash 1706561564, now seen corresponding path program 1 times [2024-12-02 06:03:58,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:03:58,930 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133233117] [2024-12-02 06:03:58,930 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:03:58,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:03:59,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:03:59,924 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:03:59,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:03:59,924 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133233117] [2024-12-02 06:03:59,924 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133233117] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:03:59,925 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:03:59,925 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:03:59,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290334170] [2024-12-02 06:03:59,925 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:03:59,925 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:03:59,926 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:03:59,926 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:03:59,926 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:03:59,926 INFO L87 Difference]: Start difference. First operand 1365 states and 1791 transitions. Second operand has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:00,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:00,116 INFO L93 Difference]: Finished difference Result 2210 states and 2923 transitions. [2024-12-02 06:04:00,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:00,117 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 711 [2024-12-02 06:04:00,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:00,118 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:00,118 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:00,119 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:00,119 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1068 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1071 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 245 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:00,119 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1071 Valid, 2221 Invalid, 245 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:00,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:00,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:00,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3102431834929993) internal successors, (1778), 1357 states have internal predecessors, (1778), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:00,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1790 transitions. [2024-12-02 06:04:00,136 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1790 transitions. Word has length 711 [2024-12-02 06:04:00,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:00,136 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1790 transitions. [2024-12-02 06:04:00,136 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:00,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1790 transitions. [2024-12-02 06:04:00,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 713 [2024-12-02 06:04:00,139 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:00,139 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:00,140 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 06:04:00,140 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:00,140 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:00,140 INFO L85 PathProgramCache]: Analyzing trace with hash 479997685, now seen corresponding path program 1 times [2024-12-02 06:04:00,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:00,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763738988] [2024-12-02 06:04:00,140 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:00,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:00,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:01,051 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:01,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:01,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763738988] [2024-12-02 06:04:01,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763738988] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:01,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:01,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:01,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434171351] [2024-12-02 06:04:01,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:01,052 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:01,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:01,052 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:01,052 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:01,053 INFO L87 Difference]: Start difference. First operand 1365 states and 1790 transitions. Second operand has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:01,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:01,209 INFO L93 Difference]: Finished difference Result 2210 states and 2921 transitions. [2024-12-02 06:04:01,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:01,210 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 712 [2024-12-02 06:04:01,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:01,211 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:01,211 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:01,212 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:01,212 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1060 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1063 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:01,212 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1063 Valid, 2221 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:01,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:01,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:01,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3095062638172439) internal successors, (1777), 1357 states have internal predecessors, (1777), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:01,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1789 transitions. [2024-12-02 06:04:01,229 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1789 transitions. Word has length 712 [2024-12-02 06:04:01,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:01,229 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1789 transitions. [2024-12-02 06:04:01,229 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:01,229 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1789 transitions. [2024-12-02 06:04:01,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 714 [2024-12-02 06:04:01,232 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:01,232 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:01,233 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 06:04:01,233 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:01,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:01,233 INFO L85 PathProgramCache]: Analyzing trace with hash -1032825049, now seen corresponding path program 1 times [2024-12-02 06:04:01,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:01,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316653467] [2024-12-02 06:04:01,233 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:01,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:01,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:02,147 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:02,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:02,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316653467] [2024-12-02 06:04:02,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316653467] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:02,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:02,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:02,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484603166] [2024-12-02 06:04:02,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:02,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:02,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:02,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:02,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:02,149 INFO L87 Difference]: Start difference. First operand 1365 states and 1789 transitions. Second operand has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:02,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:02,332 INFO L93 Difference]: Finished difference Result 2210 states and 2919 transitions. [2024-12-02 06:04:02,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:02,332 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 713 [2024-12-02 06:04:02,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:02,334 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:02,334 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:02,334 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:02,334 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1052 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1055 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:02,335 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1055 Valid, 2221 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:02,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:02,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:02,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3087693441414885) internal successors, (1776), 1357 states have internal predecessors, (1776), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:02,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1788 transitions. [2024-12-02 06:04:02,350 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1788 transitions. Word has length 713 [2024-12-02 06:04:02,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:02,350 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1788 transitions. [2024-12-02 06:04:02,351 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:02,351 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1788 transitions. [2024-12-02 06:04:02,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-12-02 06:04:02,354 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:02,354 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:02,354 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 06:04:02,354 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:02,354 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:02,354 INFO L85 PathProgramCache]: Analyzing trace with hash -2107396768, now seen corresponding path program 1 times [2024-12-02 06:04:02,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:02,355 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913461642] [2024-12-02 06:04:02,355 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:02,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:02,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:03,231 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:03,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:03,232 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913461642] [2024-12-02 06:04:03,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913461642] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:03,232 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:03,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:03,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1469840937] [2024-12-02 06:04:03,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:03,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:03,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:03,233 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:03,233 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:03,233 INFO L87 Difference]: Start difference. First operand 1365 states and 1788 transitions. Second operand has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:03,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:03,388 INFO L93 Difference]: Finished difference Result 2210 states and 2917 transitions. [2024-12-02 06:04:03,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:03,388 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 714 [2024-12-02 06:04:03,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:03,389 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:03,389 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:03,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:03,390 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1044 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:03,390 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 2221 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:03,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:03,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:03,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3080324244657333) internal successors, (1775), 1357 states have internal predecessors, (1775), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:03,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1787 transitions. [2024-12-02 06:04:03,406 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1787 transitions. Word has length 714 [2024-12-02 06:04:03,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:03,406 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1787 transitions. [2024-12-02 06:04:03,406 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:03,406 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1787 transitions. [2024-12-02 06:04:03,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-12-02 06:04:03,409 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:03,409 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:03,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-02 06:04:03,410 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:03,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:03,410 INFO L85 PathProgramCache]: Analyzing trace with hash 1287246514, now seen corresponding path program 1 times [2024-12-02 06:04:03,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:03,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163265796] [2024-12-02 06:04:03,410 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:03,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:03,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:04,366 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:04,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:04,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163265796] [2024-12-02 06:04:04,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [163265796] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:04,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:04,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:04,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416206843] [2024-12-02 06:04:04,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:04,366 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:04,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:04,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:04,367 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:04,367 INFO L87 Difference]: Start difference. First operand 1365 states and 1787 transitions. Second operand has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:04,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:04,548 INFO L93 Difference]: Finished difference Result 2210 states and 2915 transitions. [2024-12-02 06:04:04,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:04,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 715 [2024-12-02 06:04:04,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:04,549 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:04,550 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:04,550 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:04,550 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1887 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 236 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1890 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 236 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:04,550 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1890 Valid, 2214 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 236 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:04,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:04,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:04,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.307295504789978) internal successors, (1774), 1357 states have internal predecessors, (1774), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:04,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1786 transitions. [2024-12-02 06:04:04,566 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1786 transitions. Word has length 715 [2024-12-02 06:04:04,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:04,566 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1786 transitions. [2024-12-02 06:04:04,566 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:04,566 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1786 transitions. [2024-12-02 06:04:04,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 717 [2024-12-02 06:04:04,569 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:04,569 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:04,569 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 06:04:04,570 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:04,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:04,570 INFO L85 PathProgramCache]: Analyzing trace with hash 26572875, now seen corresponding path program 1 times [2024-12-02 06:04:04,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:04,570 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095770704] [2024-12-02 06:04:04,570 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:04,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:04,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:05,497 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:05,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:05,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095770704] [2024-12-02 06:04:05,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095770704] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:05,497 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:05,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:05,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736506332] [2024-12-02 06:04:05,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:05,498 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:05,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:05,498 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:05,498 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:05,498 INFO L87 Difference]: Start difference. First operand 1365 states and 1786 transitions. Second operand has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:05,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:05,657 INFO L93 Difference]: Finished difference Result 2210 states and 2913 transitions. [2024-12-02 06:04:05,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:05,657 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 716 [2024-12-02 06:04:05,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:05,659 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:05,659 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:05,659 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:05,659 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1871 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 234 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1874 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 234 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:05,660 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1874 Valid, 2214 Invalid, 235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 234 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:05,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:05,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:05,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3065585851142225) internal successors, (1773), 1357 states have internal predecessors, (1773), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:05,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1785 transitions. [2024-12-02 06:04:05,677 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1785 transitions. Word has length 716 [2024-12-02 06:04:05,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:05,677 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1785 transitions. [2024-12-02 06:04:05,677 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:05,677 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1785 transitions. [2024-12-02 06:04:05,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 718 [2024-12-02 06:04:05,682 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:05,683 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:05,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-02 06:04:05,683 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:05,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:05,683 INFO L85 PathProgramCache]: Analyzing trace with hash 981484221, now seen corresponding path program 1 times [2024-12-02 06:04:05,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:05,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628248473] [2024-12-02 06:04:05,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:05,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:06,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:06,702 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:06,702 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:06,702 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628248473] [2024-12-02 06:04:06,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [628248473] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:06,702 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:06,703 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:06,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443275990] [2024-12-02 06:04:06,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:06,703 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:06,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:06,704 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:06,704 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:06,704 INFO L87 Difference]: Start difference. First operand 1365 states and 1785 transitions. Second operand has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:06,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:06,879 INFO L93 Difference]: Finished difference Result 2210 states and 2911 transitions. [2024-12-02 06:04:06,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:06,879 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 717 [2024-12-02 06:04:06,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:06,881 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:06,881 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:06,881 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:06,881 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1855 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1858 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:06,881 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1858 Valid, 2214 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:06,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:06,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:06,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3058216654384671) internal successors, (1772), 1357 states have internal predecessors, (1772), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:06,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1784 transitions. [2024-12-02 06:04:06,897 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1784 transitions. Word has length 717 [2024-12-02 06:04:06,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:06,897 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1784 transitions. [2024-12-02 06:04:06,897 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:06,897 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1784 transitions. [2024-12-02 06:04:06,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 719 [2024-12-02 06:04:06,900 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:06,900 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:06,900 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-02 06:04:06,900 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:06,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:06,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1931522122, now seen corresponding path program 1 times [2024-12-02 06:04:06,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:06,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950136731] [2024-12-02 06:04:06,901 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:06,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:07,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:07,871 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:07,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:07,871 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950136731] [2024-12-02 06:04:07,871 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1950136731] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:07,871 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:07,871 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:07,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553038285] [2024-12-02 06:04:07,872 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:07,872 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:07,872 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:07,873 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:07,873 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:07,873 INFO L87 Difference]: Start difference. First operand 1365 states and 1784 transitions. Second operand has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:08,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:08,000 INFO L93 Difference]: Finished difference Result 2210 states and 2909 transitions. [2024-12-02 06:04:08,000 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:08,000 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 718 [2024-12-02 06:04:08,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:08,002 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:08,002 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:08,002 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:08,002 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 981 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 984 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:08,002 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [984 Valid, 2317 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:08,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:08,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:08,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.305084745762712) internal successors, (1771), 1357 states have internal predecessors, (1771), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:08,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1783 transitions. [2024-12-02 06:04:08,018 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1783 transitions. Word has length 718 [2024-12-02 06:04:08,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:08,018 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1783 transitions. [2024-12-02 06:04:08,019 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:08,019 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1783 transitions. [2024-12-02 06:04:08,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 720 [2024-12-02 06:04:08,021 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:08,022 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:08,022 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 06:04:08,022 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:08,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:08,022 INFO L85 PathProgramCache]: Analyzing trace with hash -1324390584, now seen corresponding path program 1 times [2024-12-02 06:04:08,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:08,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185985302] [2024-12-02 06:04:08,023 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:08,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:08,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:09,277 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:09,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:09,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185985302] [2024-12-02 06:04:09,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185985302] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:09,277 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:09,277 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:09,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013172180] [2024-12-02 06:04:09,277 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:09,278 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:09,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:09,279 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:09,279 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:09,279 INFO L87 Difference]: Start difference. First operand 1365 states and 1783 transitions. Second operand has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:09,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:09,399 INFO L93 Difference]: Finished difference Result 2210 states and 2907 transitions. [2024-12-02 06:04:09,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:09,400 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 719 [2024-12-02 06:04:09,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:09,401 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:09,401 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:09,402 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:09,402 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1792 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1795 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:09,402 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1795 Valid, 2310 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:09,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:09,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:09,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3043478260869565) internal successors, (1770), 1357 states have internal predecessors, (1770), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:09,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1782 transitions. [2024-12-02 06:04:09,418 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1782 transitions. Word has length 719 [2024-12-02 06:04:09,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:09,418 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1782 transitions. [2024-12-02 06:04:09,418 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:09,418 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1782 transitions. [2024-12-02 06:04:09,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 721 [2024-12-02 06:04:09,421 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:09,421 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:09,421 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 06:04:09,421 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:09,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:09,422 INFO L85 PathProgramCache]: Analyzing trace with hash -1714490463, now seen corresponding path program 1 times [2024-12-02 06:04:09,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:09,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689472526] [2024-12-02 06:04:09,422 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:09,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:09,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:10,444 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:10,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:10,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689472526] [2024-12-02 06:04:10,444 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689472526] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:10,444 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:10,444 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:10,444 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405128927] [2024-12-02 06:04:10,444 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:10,445 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:10,445 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:10,445 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:10,445 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:10,445 INFO L87 Difference]: Start difference. First operand 1365 states and 1782 transitions. Second operand has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:10,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:10,575 INFO L93 Difference]: Finished difference Result 2210 states and 2905 transitions. [2024-12-02 06:04:10,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:10,576 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 720 [2024-12-02 06:04:10,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:10,577 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:10,577 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:10,577 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:10,578 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1776 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1779 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:10,578 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1779 Valid, 2310 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:10,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:10,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:10,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3036109064112011) internal successors, (1769), 1357 states have internal predecessors, (1769), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:10,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1781 transitions. [2024-12-02 06:04:10,593 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1781 transitions. Word has length 720 [2024-12-02 06:04:10,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:10,593 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1781 transitions. [2024-12-02 06:04:10,594 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:10,594 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1781 transitions. [2024-12-02 06:04:10,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 722 [2024-12-02 06:04:10,596 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:10,597 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:10,597 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-02 06:04:10,597 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:10,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:10,597 INFO L85 PathProgramCache]: Analyzing trace with hash -451739565, now seen corresponding path program 1 times [2024-12-02 06:04:10,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:10,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359098006] [2024-12-02 06:04:10,598 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:10,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:10,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:11,670 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:11,670 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:11,670 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359098006] [2024-12-02 06:04:11,670 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1359098006] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:11,670 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:11,670 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:11,670 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156815249] [2024-12-02 06:04:11,670 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:11,671 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:11,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:11,672 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:11,672 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:11,672 INFO L87 Difference]: Start difference. First operand 1365 states and 1781 transitions. Second operand has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:11,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:11,794 INFO L93 Difference]: Finished difference Result 2210 states and 2903 transitions. [2024-12-02 06:04:11,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:11,795 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 721 [2024-12-02 06:04:11,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:11,796 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:11,796 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:11,796 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:11,797 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 957 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 960 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:11,797 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [960 Valid, 2317 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:11,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:11,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:11,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3028739867354457) internal successors, (1768), 1357 states have internal predecessors, (1768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:11,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1780 transitions. [2024-12-02 06:04:11,812 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1780 transitions. Word has length 721 [2024-12-02 06:04:11,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:11,812 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1780 transitions. [2024-12-02 06:04:11,812 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:11,812 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1780 transitions. [2024-12-02 06:04:11,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 723 [2024-12-02 06:04:11,815 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:11,816 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:11,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-12-02 06:04:11,816 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:11,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:11,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1624384524, now seen corresponding path program 1 times [2024-12-02 06:04:11,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:11,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473464872] [2024-12-02 06:04:11,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:11,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:12,825 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:12,825 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:12,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473464872] [2024-12-02 06:04:12,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1473464872] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:12,825 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:12,825 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:12,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079643111] [2024-12-02 06:04:12,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:12,826 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:12,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:12,826 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:12,826 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:12,826 INFO L87 Difference]: Start difference. First operand 1365 states and 1780 transitions. Second operand has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:12,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:12,934 INFO L93 Difference]: Finished difference Result 2210 states and 2901 transitions. [2024-12-02 06:04:12,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:12,935 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 722 [2024-12-02 06:04:12,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:12,936 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:12,936 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:12,937 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:12,937 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1744 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1747 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:12,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1747 Valid, 2310 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:12,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:12,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:12,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3021370670596906) internal successors, (1767), 1357 states have internal predecessors, (1767), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:12,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1779 transitions. [2024-12-02 06:04:12,953 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1779 transitions. Word has length 722 [2024-12-02 06:04:12,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:12,953 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1779 transitions. [2024-12-02 06:04:12,953 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:12,953 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1779 transitions. [2024-12-02 06:04:12,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-12-02 06:04:12,958 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:12,958 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:12,958 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-02 06:04:12,958 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:12,959 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:12,959 INFO L85 PathProgramCache]: Analyzing trace with hash 982961630, now seen corresponding path program 1 times [2024-12-02 06:04:12,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:12,959 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181130182] [2024-12-02 06:04:12,959 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:12,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:13,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:13,920 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:13,920 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:13,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181130182] [2024-12-02 06:04:13,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1181130182] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:13,920 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:13,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:13,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [467105173] [2024-12-02 06:04:13,920 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:13,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:13,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:13,922 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:13,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:13,922 INFO L87 Difference]: Start difference. First operand 1365 states and 1779 transitions. Second operand has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:14,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:14,025 INFO L93 Difference]: Finished difference Result 2210 states and 2899 transitions. [2024-12-02 06:04:14,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:14,025 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 723 [2024-12-02 06:04:14,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:14,026 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:14,026 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:14,027 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:14,027 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 941 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 944 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:14,027 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [944 Valid, 2317 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:14,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:14,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:14,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3014001473839352) internal successors, (1766), 1357 states have internal predecessors, (1766), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:14,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1778 transitions. [2024-12-02 06:04:14,043 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1778 transitions. Word has length 723 [2024-12-02 06:04:14,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:14,043 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1778 transitions. [2024-12-02 06:04:14,044 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:14,044 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1778 transitions. [2024-12-02 06:04:14,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 725 [2024-12-02 06:04:14,047 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:14,047 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:14,047 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 06:04:14,047 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:14,047 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:14,048 INFO L85 PathProgramCache]: Analyzing trace with hash 490119415, now seen corresponding path program 1 times [2024-12-02 06:04:14,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:14,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451834369] [2024-12-02 06:04:14,048 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:14,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:14,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:15,038 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:15,038 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:15,038 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451834369] [2024-12-02 06:04:15,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451834369] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:15,038 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:15,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:15,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088824024] [2024-12-02 06:04:15,038 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:15,039 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:15,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:15,039 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:15,039 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:15,040 INFO L87 Difference]: Start difference. First operand 1365 states and 1778 transitions. Second operand has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:15,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:15,158 INFO L93 Difference]: Finished difference Result 2210 states and 2897 transitions. [2024-12-02 06:04:15,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:15,159 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 724 [2024-12-02 06:04:15,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:15,160 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:15,160 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:15,160 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:15,160 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 933 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 936 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:15,161 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [936 Valid, 2317 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:15,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:15,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:15,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3006632277081798) internal successors, (1765), 1357 states have internal predecessors, (1765), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:15,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1777 transitions. [2024-12-02 06:04:15,182 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1777 transitions. Word has length 724 [2024-12-02 06:04:15,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:15,182 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1777 transitions. [2024-12-02 06:04:15,182 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:15,182 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1777 transitions. [2024-12-02 06:04:15,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-12-02 06:04:15,186 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:15,186 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:15,186 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 06:04:15,186 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:15,186 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:15,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1694928873, now seen corresponding path program 1 times [2024-12-02 06:04:15,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:15,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080750405] [2024-12-02 06:04:15,187 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:15,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:15,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:16,185 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:16,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:16,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080750405] [2024-12-02 06:04:16,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2080750405] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:16,185 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:16,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:16,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254568277] [2024-12-02 06:04:16,185 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:16,186 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:16,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:16,186 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:16,186 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:16,186 INFO L87 Difference]: Start difference. First operand 1365 states and 1777 transitions. Second operand has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:16,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:16,295 INFO L93 Difference]: Finished difference Result 2210 states and 2895 transitions. [2024-12-02 06:04:16,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:16,296 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 725 [2024-12-02 06:04:16,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:16,297 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:16,297 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:16,298 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:16,298 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 925 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 928 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:16,298 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [928 Valid, 2317 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:16,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:16,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:16,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2999263080324244) internal successors, (1764), 1357 states have internal predecessors, (1764), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:16,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1776 transitions. [2024-12-02 06:04:16,313 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1776 transitions. Word has length 725 [2024-12-02 06:04:16,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:16,313 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1776 transitions. [2024-12-02 06:04:16,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:16,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1776 transitions. [2024-12-02 06:04:16,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 727 [2024-12-02 06:04:16,317 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:16,317 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:16,317 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-02 06:04:16,317 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:16,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:16,318 INFO L85 PathProgramCache]: Analyzing trace with hash 1294608994, now seen corresponding path program 1 times [2024-12-02 06:04:16,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:16,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238727641] [2024-12-02 06:04:16,318 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:16,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:16,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:17,296 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:17,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:17,296 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238727641] [2024-12-02 06:04:17,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [238727641] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:17,296 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:17,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:17,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514982727] [2024-12-02 06:04:17,296 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:17,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:17,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:17,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:17,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:17,298 INFO L87 Difference]: Start difference. First operand 1365 states and 1776 transitions. Second operand has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:17,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:17,372 INFO L93 Difference]: Finished difference Result 2210 states and 2893 transitions. [2024-12-02 06:04:17,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:17,373 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 726 [2024-12-02 06:04:17,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:17,374 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:17,374 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:17,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:17,375 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1665 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1668 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:17,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1668 Valid, 2358 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:17,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:17,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:17,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2991893883566692) internal successors, (1763), 1357 states have internal predecessors, (1763), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:17,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1775 transitions. [2024-12-02 06:04:17,390 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1775 transitions. Word has length 726 [2024-12-02 06:04:17,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:17,390 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1775 transitions. [2024-12-02 06:04:17,391 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:17,391 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1775 transitions. [2024-12-02 06:04:17,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 728 [2024-12-02 06:04:17,393 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:17,394 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:17,394 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 06:04:17,394 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:17,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:17,394 INFO L85 PathProgramCache]: Analyzing trace with hash -2027026828, now seen corresponding path program 1 times [2024-12-02 06:04:17,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:17,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551402093] [2024-12-02 06:04:17,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:17,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:17,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:18,385 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:18,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:18,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551402093] [2024-12-02 06:04:18,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [551402093] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:18,385 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:18,385 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:18,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518480793] [2024-12-02 06:04:18,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:18,386 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:18,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:18,387 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:18,387 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:18,387 INFO L87 Difference]: Start difference. First operand 1365 states and 1775 transitions. Second operand has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:18,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:18,456 INFO L93 Difference]: Finished difference Result 2210 states and 2891 transitions. [2024-12-02 06:04:18,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:18,456 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 727 [2024-12-02 06:04:18,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:18,457 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:18,457 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:18,458 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:18,458 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 894 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 897 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:18,458 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [897 Valid, 2365 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:18,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:18,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:18,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2984524686809138) internal successors, (1762), 1357 states have internal predecessors, (1762), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:18,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1774 transitions. [2024-12-02 06:04:18,474 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1774 transitions. Word has length 727 [2024-12-02 06:04:18,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:18,474 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1774 transitions. [2024-12-02 06:04:18,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:18,474 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1774 transitions. [2024-12-02 06:04:18,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 729 [2024-12-02 06:04:18,477 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:18,477 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:18,478 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-02 06:04:18,478 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:18,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:18,478 INFO L85 PathProgramCache]: Analyzing trace with hash -239435699, now seen corresponding path program 1 times [2024-12-02 06:04:18,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:18,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982900324] [2024-12-02 06:04:18,478 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:18,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:18,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:19,509 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:19,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:19,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982900324] [2024-12-02 06:04:19,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1982900324] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:19,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:19,509 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:19,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776100873] [2024-12-02 06:04:19,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:19,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:19,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:19,510 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:19,510 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:19,511 INFO L87 Difference]: Start difference. First operand 1365 states and 1774 transitions. Second operand has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:19,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:19,588 INFO L93 Difference]: Finished difference Result 2210 states and 2889 transitions. [2024-12-02 06:04:19,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:19,588 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 728 [2024-12-02 06:04:19,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:19,589 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:19,589 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:19,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:19,590 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1633 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1636 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:19,590 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1636 Valid, 2358 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:19,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:19,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:19,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2977155490051584) internal successors, (1761), 1357 states have internal predecessors, (1761), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:19,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1773 transitions. [2024-12-02 06:04:19,606 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1773 transitions. Word has length 728 [2024-12-02 06:04:19,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:19,606 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1773 transitions. [2024-12-02 06:04:19,606 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:19,606 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1773 transitions. [2024-12-02 06:04:19,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2024-12-02 06:04:19,609 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:19,609 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:19,609 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90 [2024-12-02 06:04:19,609 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:19,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:19,610 INFO L85 PathProgramCache]: Analyzing trace with hash 1396240767, now seen corresponding path program 1 times [2024-12-02 06:04:19,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:19,610 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805870463] [2024-12-02 06:04:19,610 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:19,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:19,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:20,610 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:20,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:20,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805870463] [2024-12-02 06:04:20,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1805870463] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:20,610 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:20,610 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:20,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068319547] [2024-12-02 06:04:20,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:20,611 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:20,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:20,611 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:20,611 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:20,612 INFO L87 Difference]: Start difference. First operand 1365 states and 1773 transitions. Second operand has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:20,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:20,694 INFO L93 Difference]: Finished difference Result 2210 states and 2887 transitions. [2024-12-02 06:04:20,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:20,695 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 729 [2024-12-02 06:04:20,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:20,697 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:20,697 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:20,697 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:20,697 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 878 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 881 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:20,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [881 Valid, 2365 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:20,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:20,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:20,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.296978629329403) internal successors, (1760), 1357 states have internal predecessors, (1760), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:20,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1772 transitions. [2024-12-02 06:04:20,713 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1772 transitions. Word has length 729 [2024-12-02 06:04:20,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:20,713 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1772 transitions. [2024-12-02 06:04:20,713 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:20,713 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1772 transitions. [2024-12-02 06:04:20,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 731 [2024-12-02 06:04:20,716 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:20,716 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:20,716 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-12-02 06:04:20,716 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:20,716 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:20,717 INFO L85 PathProgramCache]: Analyzing trace with hash -824876360, now seen corresponding path program 1 times [2024-12-02 06:04:20,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:20,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144294713] [2024-12-02 06:04:20,717 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:20,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:21,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:21,819 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:21,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:21,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144294713] [2024-12-02 06:04:21,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144294713] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:21,819 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:21,819 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:21,819 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324001077] [2024-12-02 06:04:21,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:21,820 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:21,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:21,821 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:21,821 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:21,821 INFO L87 Difference]: Start difference. First operand 1365 states and 1772 transitions. Second operand has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:21,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:21,877 INFO L93 Difference]: Finished difference Result 2210 states and 2885 transitions. [2024-12-02 06:04:21,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:21,878 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 730 [2024-12-02 06:04:21,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:21,879 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:21,879 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:21,880 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:21,880 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 1594 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1597 SdHoareTripleChecker+Valid, 2382 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:21,880 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1597 Valid, 2382 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:21,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:21,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:21,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2962417096536478) internal successors, (1759), 1357 states have internal predecessors, (1759), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:21,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1771 transitions. [2024-12-02 06:04:21,895 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1771 transitions. Word has length 730 [2024-12-02 06:04:21,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:21,895 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1771 transitions. [2024-12-02 06:04:21,895 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:21,896 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1771 transitions. [2024-12-02 06:04:21,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2024-12-02 06:04:21,898 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:21,899 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:21,899 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-12-02 06:04:21,899 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:21,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:21,899 INFO L85 PathProgramCache]: Analyzing trace with hash 716378378, now seen corresponding path program 1 times [2024-12-02 06:04:21,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:21,899 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062123125] [2024-12-02 06:04:21,899 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:21,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:22,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:23,019 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:23,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:23,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062123125] [2024-12-02 06:04:23,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1062123125] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:23,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:23,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:23,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235742299] [2024-12-02 06:04:23,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:23,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:23,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:23,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:23,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:23,021 INFO L87 Difference]: Start difference. First operand 1365 states and 1771 transitions. Second operand has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:23,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:23,076 INFO L93 Difference]: Finished difference Result 2210 states and 2883 transitions. [2024-12-02 06:04:23,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:23,076 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 731 [2024-12-02 06:04:23,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:23,078 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:23,078 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:23,078 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:23,078 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 1578 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1581 SdHoareTripleChecker+Valid, 2382 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:23,079 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1581 Valid, 2382 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:23,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:23,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:23,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2955047899778924) internal successors, (1758), 1357 states have internal predecessors, (1758), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:23,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1770 transitions. [2024-12-02 06:04:23,094 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1770 transitions. Word has length 731 [2024-12-02 06:04:23,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:23,094 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1770 transitions. [2024-12-02 06:04:23,094 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:23,094 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1770 transitions. [2024-12-02 06:04:23,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 733 [2024-12-02 06:04:23,097 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:23,097 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:23,097 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-12-02 06:04:23,097 INFO L396 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:23,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:23,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1421307485, now seen corresponding path program 1 times [2024-12-02 06:04:23,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:23,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463256912] [2024-12-02 06:04:23,098 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:23,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:23,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:24,189 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:24,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:24,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463256912] [2024-12-02 06:04:24,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [463256912] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:24,190 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:24,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:24,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508210422] [2024-12-02 06:04:24,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:24,191 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:24,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:24,191 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:24,191 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:24,192 INFO L87 Difference]: Start difference. First operand 1365 states and 1770 transitions. Second operand has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:24,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:24,539 INFO L93 Difference]: Finished difference Result 2210 states and 2881 transitions. [2024-12-02 06:04:24,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:24,539 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 732 [2024-12-02 06:04:24,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:24,541 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:24,541 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:24,541 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:24,541 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 1556 mSDsluCounter, 933 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1559 SdHoareTripleChecker+Valid, 1864 SdHoareTripleChecker+Invalid, 553 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:24,541 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1559 Valid, 1864 Invalid, 553 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 552 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:04:24,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:24,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:24,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.294767870302137) internal successors, (1757), 1357 states have internal predecessors, (1757), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:24,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1769 transitions. [2024-12-02 06:04:24,559 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1769 transitions. Word has length 732 [2024-12-02 06:04:24,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:24,559 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1769 transitions. [2024-12-02 06:04:24,559 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:24,559 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1769 transitions. [2024-12-02 06:04:24,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-12-02 06:04:24,562 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:24,562 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:24,562 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94 [2024-12-02 06:04:24,562 INFO L396 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:24,562 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:24,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1049109781, now seen corresponding path program 1 times [2024-12-02 06:04:24,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:24,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921594676] [2024-12-02 06:04:24,563 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:24,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:25,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:26,887 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:26,887 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:26,887 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921594676] [2024-12-02 06:04:26,887 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [921594676] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:26,887 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:26,887 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:04:26,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327291157] [2024-12-02 06:04:26,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:26,888 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:04:26,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:26,888 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:04:26,888 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:04:26,888 INFO L87 Difference]: Start difference. First operand 1365 states and 1769 transitions. Second operand has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:26,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:26,943 INFO L93 Difference]: Finished difference Result 2210 states and 2879 transitions. [2024-12-02 06:04:26,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:26,944 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 733 [2024-12-02 06:04:26,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:26,945 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:26,945 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:26,946 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:26,946 INFO L435 NwaCegarLoop]: 1189 mSDtfsCounter, 722 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 722 SdHoareTripleChecker+Valid, 2380 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:26,946 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [722 Valid, 2380 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:26,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:26,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:26,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2940309506263816) internal successors, (1756), 1357 states have internal predecessors, (1756), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:26,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1768 transitions. [2024-12-02 06:04:26,962 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1768 transitions. Word has length 733 [2024-12-02 06:04:26,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:26,963 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1768 transitions. [2024-12-02 06:04:26,963 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:26,963 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1768 transitions. [2024-12-02 06:04:26,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-12-02 06:04:26,966 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:26,966 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:26,966 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95 [2024-12-02 06:04:26,966 INFO L396 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:26,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:26,967 INFO L85 PathProgramCache]: Analyzing trace with hash 1275586929, now seen corresponding path program 1 times [2024-12-02 06:04:26,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:26,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744426648] [2024-12-02 06:04:26,967 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:26,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:28,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:28,909 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:28,909 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:28,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1744426648] [2024-12-02 06:04:28,909 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1744426648] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:28,909 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:28,909 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:28,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065596092] [2024-12-02 06:04:28,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:28,910 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:28,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:28,911 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:28,911 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:28,911 INFO L87 Difference]: Start difference. First operand 1365 states and 1768 transitions. Second operand has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:28,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:28,997 INFO L93 Difference]: Finished difference Result 2210 states and 2877 transitions. [2024-12-02 06:04:28,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:28,998 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 734 [2024-12-02 06:04:28,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:28,999 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:28,999 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:29,000 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:29,000 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1057 mSDsluCounter, 1183 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1057 SdHoareTripleChecker+Valid, 2357 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:29,000 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1057 Valid, 2357 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:29,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:29,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:29,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2932940309506264) internal successors, (1755), 1357 states have internal predecessors, (1755), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:29,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1767 transitions. [2024-12-02 06:04:29,018 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1767 transitions. Word has length 734 [2024-12-02 06:04:29,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:29,018 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1767 transitions. [2024-12-02 06:04:29,019 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:29,019 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1767 transitions. [2024-12-02 06:04:29,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2024-12-02 06:04:29,024 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:29,024 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:29,024 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96 [2024-12-02 06:04:29,024 INFO L396 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:29,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:29,025 INFO L85 PathProgramCache]: Analyzing trace with hash 517215829, now seen corresponding path program 1 times [2024-12-02 06:04:29,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:29,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939343485] [2024-12-02 06:04:29,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:29,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:30,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:30,975 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:30,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:30,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939343485] [2024-12-02 06:04:30,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1939343485] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:30,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:30,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:30,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263494083] [2024-12-02 06:04:30,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:30,976 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:30,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:30,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:30,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:30,977 INFO L87 Difference]: Start difference. First operand 1365 states and 1767 transitions. Second operand has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:31,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:31,053 INFO L93 Difference]: Finished difference Result 2210 states and 2875 transitions. [2024-12-02 06:04:31,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:31,054 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 735 [2024-12-02 06:04:31,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:31,055 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:31,055 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:31,056 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:31,056 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1056 mSDsluCounter, 1183 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2357 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:31,056 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2357 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:31,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:31,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:31,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.292557111274871) internal successors, (1754), 1357 states have internal predecessors, (1754), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:31,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1766 transitions. [2024-12-02 06:04:31,071 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1766 transitions. Word has length 735 [2024-12-02 06:04:31,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:31,072 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1766 transitions. [2024-12-02 06:04:31,072 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:31,072 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1766 transitions. [2024-12-02 06:04:31,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 737 [2024-12-02 06:04:31,075 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:31,075 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:31,075 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable97 [2024-12-02 06:04:31,075 INFO L396 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:31,075 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:31,075 INFO L85 PathProgramCache]: Analyzing trace with hash 290647682, now seen corresponding path program 1 times [2024-12-02 06:04:31,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:31,075 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840811570] [2024-12-02 06:04:31,075 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:31,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:32,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:33,073 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:33,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:33,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840811570] [2024-12-02 06:04:33,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840811570] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:33,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:33,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:04:33,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75888194] [2024-12-02 06:04:33,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:33,074 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:04:33,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:33,075 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:04:33,075 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:04:33,075 INFO L87 Difference]: Start difference. First operand 1365 states and 1766 transitions. Second operand has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:33,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:33,142 INFO L93 Difference]: Finished difference Result 2210 states and 2873 transitions. [2024-12-02 06:04:33,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:33,143 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 736 [2024-12-02 06:04:33,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:33,144 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:33,144 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:33,145 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:33,145 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 731 mSDsluCounter, 1176 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 731 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:33,145 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [731 Valid, 2350 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:04:33,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:33,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:33,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2918201915991157) internal successors, (1753), 1357 states have internal predecessors, (1753), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:33,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1765 transitions. [2024-12-02 06:04:33,160 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1765 transitions. Word has length 736 [2024-12-02 06:04:33,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:33,160 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1765 transitions. [2024-12-02 06:04:33,161 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:33,161 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1765 transitions. [2024-12-02 06:04:33,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 738 [2024-12-02 06:04:33,163 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:33,164 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:33,164 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable98 [2024-12-02 06:04:33,164 INFO L396 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:33,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:33,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1703199876, now seen corresponding path program 1 times [2024-12-02 06:04:33,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:33,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692939202] [2024-12-02 06:04:33,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:33,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:34,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:35,295 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:35,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:35,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [692939202] [2024-12-02 06:04:35,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [692939202] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:35,295 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:35,295 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:35,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115553669] [2024-12-02 06:04:35,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:35,296 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:35,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:35,297 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:35,297 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:35,297 INFO L87 Difference]: Start difference. First operand 1365 states and 1765 transitions. Second operand has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:35,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:35,430 INFO L93 Difference]: Finished difference Result 2210 states and 2871 transitions. [2024-12-02 06:04:35,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:35,431 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 737 [2024-12-02 06:04:35,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:35,432 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:35,432 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:35,433 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:35,433 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1039 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1039 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:35,433 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1039 Valid, 2295 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:35,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:35,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:35,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2910832719233603) internal successors, (1752), 1357 states have internal predecessors, (1752), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:35,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1764 transitions. [2024-12-02 06:04:35,449 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1764 transitions. Word has length 737 [2024-12-02 06:04:35,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:35,449 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1764 transitions. [2024-12-02 06:04:35,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:35,450 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1764 transitions. [2024-12-02 06:04:35,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-12-02 06:04:35,452 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:35,453 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:35,453 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable99 [2024-12-02 06:04:35,453 INFO L396 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:35,453 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:35,453 INFO L85 PathProgramCache]: Analyzing trace with hash -1741512288, now seen corresponding path program 1 times [2024-12-02 06:04:35,453 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:35,453 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969715406] [2024-12-02 06:04:35,453 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:35,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:36,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:37,558 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:37,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:37,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969715406] [2024-12-02 06:04:37,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [969715406] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:37,558 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:37,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:37,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403236639] [2024-12-02 06:04:37,558 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:37,559 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:37,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:37,559 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:37,559 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:37,560 INFO L87 Difference]: Start difference. First operand 1365 states and 1764 transitions. Second operand has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:37,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:37,667 INFO L93 Difference]: Finished difference Result 2210 states and 2869 transitions. [2024-12-02 06:04:37,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:37,668 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 738 [2024-12-02 06:04:37,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:37,669 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:37,669 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:37,670 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:37,670 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1830 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1830 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:37,670 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1830 Valid, 2288 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:37,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:37,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:37,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.290346352247605) internal successors, (1751), 1357 states have internal predecessors, (1751), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:37,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1763 transitions. [2024-12-02 06:04:37,686 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1763 transitions. Word has length 738 [2024-12-02 06:04:37,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:37,687 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1763 transitions. [2024-12-02 06:04:37,687 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:37,687 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1763 transitions. [2024-12-02 06:04:37,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2024-12-02 06:04:37,690 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:37,690 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:37,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100 [2024-12-02 06:04:37,690 INFO L396 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:37,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:37,691 INFO L85 PathProgramCache]: Analyzing trace with hash -484429613, now seen corresponding path program 1 times [2024-12-02 06:04:37,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:37,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052404104] [2024-12-02 06:04:37,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:37,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:39,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:40,056 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:40,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:40,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052404104] [2024-12-02 06:04:40,056 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052404104] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:40,056 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:40,056 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:04:40,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281232853] [2024-12-02 06:04:40,056 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:40,057 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:04:40,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:40,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:04:40,057 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:04:40,057 INFO L87 Difference]: Start difference. First operand 1365 states and 1763 transitions. Second operand has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:40,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:40,160 INFO L93 Difference]: Finished difference Result 2210 states and 2867 transitions. [2024-12-02 06:04:40,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:40,160 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 739 [2024-12-02 06:04:40,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:40,162 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:40,162 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:40,162 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:40,162 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 784 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 784 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:40,162 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [784 Valid, 2288 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:40,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:40,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:40,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2896094325718497) internal successors, (1750), 1357 states have internal predecessors, (1750), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:40,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1762 transitions. [2024-12-02 06:04:40,178 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1762 transitions. Word has length 739 [2024-12-02 06:04:40,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:40,178 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1762 transitions. [2024-12-02 06:04:40,178 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:40,178 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1762 transitions. [2024-12-02 06:04:40,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 741 [2024-12-02 06:04:40,181 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:40,181 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:40,181 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable101 [2024-12-02 06:04:40,181 INFO L396 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:40,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:40,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1334082065, now seen corresponding path program 1 times [2024-12-02 06:04:40,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:40,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455846185] [2024-12-02 06:04:40,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:40,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:41,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:42,282 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:42,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:42,282 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455846185] [2024-12-02 06:04:42,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [455846185] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:42,283 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:42,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:42,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139176672] [2024-12-02 06:04:42,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:42,283 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:42,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:42,283 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:42,283 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:42,283 INFO L87 Difference]: Start difference. First operand 1365 states and 1762 transitions. Second operand has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:42,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:42,404 INFO L93 Difference]: Finished difference Result 2210 states and 2865 transitions. [2024-12-02 06:04:42,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:42,404 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 740 [2024-12-02 06:04:42,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:42,405 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:42,405 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:42,406 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:42,406 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1810 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1810 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:42,406 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1810 Valid, 2288 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:42,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:42,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:42,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2888725128960943) internal successors, (1749), 1357 states have internal predecessors, (1749), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:42,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1761 transitions. [2024-12-02 06:04:42,422 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1761 transitions. Word has length 740 [2024-12-02 06:04:42,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:42,422 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1761 transitions. [2024-12-02 06:04:42,423 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:42,423 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1761 transitions. [2024-12-02 06:04:42,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-12-02 06:04:42,425 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:42,426 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:42,426 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102 [2024-12-02 06:04:42,426 INFO L396 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:42,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:42,426 INFO L85 PathProgramCache]: Analyzing trace with hash 2118395810, now seen corresponding path program 1 times [2024-12-02 06:04:42,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:42,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075306375] [2024-12-02 06:04:42,426 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:42,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:43,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:44,538 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:44,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:44,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075306375] [2024-12-02 06:04:44,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075306375] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:44,538 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:44,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:44,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179074005] [2024-12-02 06:04:44,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:44,539 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:44,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:44,539 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:44,539 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:44,539 INFO L87 Difference]: Start difference. First operand 1365 states and 1761 transitions. Second operand has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:44,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:44,664 INFO L93 Difference]: Finished difference Result 2210 states and 2863 transitions. [2024-12-02 06:04:44,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:44,664 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 741 [2024-12-02 06:04:44,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:44,665 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:44,665 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:44,666 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:44,666 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1035 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1035 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:44,666 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1035 Valid, 2295 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:44,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:44,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:44,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2881355932203389) internal successors, (1748), 1357 states have internal predecessors, (1748), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:44,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1760 transitions. [2024-12-02 06:04:44,682 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1760 transitions. Word has length 741 [2024-12-02 06:04:44,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:44,682 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1760 transitions. [2024-12-02 06:04:44,682 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:44,682 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1760 transitions. [2024-12-02 06:04:44,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 743 [2024-12-02 06:04:44,685 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:44,685 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:44,685 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable103 [2024-12-02 06:04:44,686 INFO L396 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:44,686 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:44,686 INFO L85 PathProgramCache]: Analyzing trace with hash -713187326, now seen corresponding path program 1 times [2024-12-02 06:04:44,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:44,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052712132] [2024-12-02 06:04:44,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:44,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:45,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:46,697 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:46,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:46,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052712132] [2024-12-02 06:04:46,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052712132] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:46,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:46,698 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:46,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916199797] [2024-12-02 06:04:46,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:46,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:46,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:46,698 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:46,698 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:46,698 INFO L87 Difference]: Start difference. First operand 1365 states and 1760 transitions. Second operand has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:46,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:46,824 INFO L93 Difference]: Finished difference Result 2210 states and 2861 transitions. [2024-12-02 06:04:46,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:46,825 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 742 [2024-12-02 06:04:46,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:46,826 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:46,826 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:46,826 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:46,827 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1034 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1034 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:46,827 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1034 Valid, 2295 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:46,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:46,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:46,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2873986735445837) internal successors, (1747), 1357 states have internal predecessors, (1747), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:46,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1759 transitions. [2024-12-02 06:04:46,842 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1759 transitions. Word has length 742 [2024-12-02 06:04:46,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:46,842 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1759 transitions. [2024-12-02 06:04:46,842 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:46,842 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1759 transitions. [2024-12-02 06:04:46,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 744 [2024-12-02 06:04:46,845 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:46,845 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:46,845 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104 [2024-12-02 06:04:46,845 INFO L396 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:46,846 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:46,846 INFO L85 PathProgramCache]: Analyzing trace with hash 2119497969, now seen corresponding path program 1 times [2024-12-02 06:04:46,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:46,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038251556] [2024-12-02 06:04:46,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:46,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:48,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:48,822 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:48,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:48,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038251556] [2024-12-02 06:04:48,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1038251556] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:48,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:48,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 06:04:48,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918844627] [2024-12-02 06:04:48,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:48,823 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:04:48,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:48,823 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:04:48,823 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 06:04:48,823 INFO L87 Difference]: Start difference. First operand 1365 states and 1759 transitions. Second operand has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:48,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:48,930 INFO L93 Difference]: Finished difference Result 2210 states and 2859 transitions. [2024-12-02 06:04:48,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:48,930 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 743 [2024-12-02 06:04:48,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:48,931 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:48,931 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:48,932 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:48,932 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 748 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 748 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:48,932 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [748 Valid, 2288 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:04:48,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:48,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:48,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2866617538688283) internal successors, (1746), 1357 states have internal predecessors, (1746), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:48,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1758 transitions. [2024-12-02 06:04:48,947 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1758 transitions. Word has length 743 [2024-12-02 06:04:48,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:48,948 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1758 transitions. [2024-12-02 06:04:48,948 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:48,948 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1758 transitions. [2024-12-02 06:04:48,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 745 [2024-12-02 06:04:48,951 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:48,951 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:48,951 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable105 [2024-12-02 06:04:48,951 INFO L396 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:48,951 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:48,951 INFO L85 PathProgramCache]: Analyzing trace with hash 466731891, now seen corresponding path program 1 times [2024-12-02 06:04:48,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:48,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985211852] [2024-12-02 06:04:48,952 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:48,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:50,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:51,260 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:51,260 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985211852] [2024-12-02 06:04:51,260 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [985211852] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:51,260 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:51,260 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:51,260 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121933175] [2024-12-02 06:04:51,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:51,260 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:51,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:51,261 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:51,261 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:51,261 INFO L87 Difference]: Start difference. First operand 1365 states and 1758 transitions. Second operand has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:51,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:51,478 INFO L93 Difference]: Finished difference Result 2210 states and 2857 transitions. [2024-12-02 06:04:51,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:51,479 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 744 [2024-12-02 06:04:51,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:51,480 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:51,480 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:51,480 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:51,481 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1001 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1001 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:51,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1001 Valid, 2169 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:51,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:51,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:51,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.285924834193073) internal successors, (1745), 1357 states have internal predecessors, (1745), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:51,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1757 transitions. [2024-12-02 06:04:51,496 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1757 transitions. Word has length 744 [2024-12-02 06:04:51,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:51,497 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1757 transitions. [2024-12-02 06:04:51,497 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:51,497 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1757 transitions. [2024-12-02 06:04:51,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 746 [2024-12-02 06:04:51,500 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:51,500 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:51,500 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106 [2024-12-02 06:04:51,500 INFO L396 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:51,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:51,500 INFO L85 PathProgramCache]: Analyzing trace with hash -313473577, now seen corresponding path program 1 times [2024-12-02 06:04:51,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:51,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113313368] [2024-12-02 06:04:51,501 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:51,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:52,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:53,624 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:53,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:53,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113313368] [2024-12-02 06:04:53,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113313368] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:53,624 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:53,625 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:53,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1191126891] [2024-12-02 06:04:53,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:53,625 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:53,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:53,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:53,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:53,626 INFO L87 Difference]: Start difference. First operand 1365 states and 1757 transitions. Second operand has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:53,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:53,819 INFO L93 Difference]: Finished difference Result 2210 states and 2855 transitions. [2024-12-02 06:04:53,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:53,820 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 745 [2024-12-02 06:04:53,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:53,821 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:53,821 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:53,822 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:53,822 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1897 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1897 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:53,822 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1897 Valid, 2162 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:53,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:53,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:53,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2851879145173175) internal successors, (1744), 1357 states have internal predecessors, (1744), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:53,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1756 transitions. [2024-12-02 06:04:53,837 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1756 transitions. Word has length 745 [2024-12-02 06:04:53,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:53,837 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1756 transitions. [2024-12-02 06:04:53,838 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:53,838 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1756 transitions. [2024-12-02 06:04:53,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2024-12-02 06:04:53,840 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:53,841 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:53,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107 [2024-12-02 06:04:53,841 INFO L396 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:53,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:53,841 INFO L85 PathProgramCache]: Analyzing trace with hash 2070102596, now seen corresponding path program 1 times [2024-12-02 06:04:53,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:53,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680793326] [2024-12-02 06:04:53,842 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:53,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:55,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:56,048 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:56,048 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:56,048 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680793326] [2024-12-02 06:04:56,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1680793326] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:56,049 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:56,049 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:56,049 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559941990] [2024-12-02 06:04:56,049 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:56,049 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:56,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:56,049 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:56,049 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:56,050 INFO L87 Difference]: Start difference. First operand 1365 states and 1756 transitions. Second operand has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:56,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:56,253 INFO L93 Difference]: Finished difference Result 2210 states and 2853 transitions. [2024-12-02 06:04:56,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:56,254 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 746 [2024-12-02 06:04:56,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:56,255 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:56,255 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:56,255 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:56,256 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1887 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1887 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:56,256 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1887 Valid, 2162 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:56,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:56,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:56,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2844509948415623) internal successors, (1743), 1357 states have internal predecessors, (1743), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:56,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1755 transitions. [2024-12-02 06:04:56,270 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1755 transitions. Word has length 746 [2024-12-02 06:04:56,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:56,271 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1755 transitions. [2024-12-02 06:04:56,271 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:56,271 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1755 transitions. [2024-12-02 06:04:56,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2024-12-02 06:04:56,274 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:56,274 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:56,274 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable108 [2024-12-02 06:04:56,274 INFO L396 AbstractCegarLoop]: === Iteration 110 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:56,274 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:56,274 INFO L85 PathProgramCache]: Analyzing trace with hash 980789830, now seen corresponding path program 1 times [2024-12-02 06:04:56,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:56,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346757053] [2024-12-02 06:04:56,274 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:56,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:04:57,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:04:58,380 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:04:58,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:04:58,381 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346757053] [2024-12-02 06:04:58,381 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1346757053] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:04:58,381 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:04:58,381 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:04:58,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59408735] [2024-12-02 06:04:58,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:04:58,381 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:04:58,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:04:58,381 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:04:58,382 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:04:58,382 INFO L87 Difference]: Start difference. First operand 1365 states and 1755 transitions. Second operand has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:58,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:04:58,609 INFO L93 Difference]: Finished difference Result 2210 states and 2851 transitions. [2024-12-02 06:04:58,609 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:04:58,609 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 747 [2024-12-02 06:04:58,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:04:58,610 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:04:58,610 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:04:58,611 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:04:58,611 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 998 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 998 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:04:58,611 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [998 Valid, 2169 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 224 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:04:58,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:04:58,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:04:58,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.283714075165807) internal successors, (1742), 1357 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:04:58,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1754 transitions. [2024-12-02 06:04:58,626 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1754 transitions. Word has length 747 [2024-12-02 06:04:58,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:04:58,626 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1754 transitions. [2024-12-02 06:04:58,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:04:58,626 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1754 transitions. [2024-12-02 06:04:58,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 749 [2024-12-02 06:04:58,629 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:04:58,629 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:04:58,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable109 [2024-12-02 06:04:58,630 INFO L396 AbstractCegarLoop]: === Iteration 111 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:04:58,630 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:04:58,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1130260117, now seen corresponding path program 1 times [2024-12-02 06:04:58,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:04:58,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919547352] [2024-12-02 06:04:58,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:04:58,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:05:00,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:05:00,890 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:05:00,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:05:00,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919547352] [2024-12-02 06:05:00,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [919547352] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:05:00,890 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:05:00,890 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:05:00,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957550201] [2024-12-02 06:05:00,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:05:00,891 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:05:00,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:05:00,891 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:05:00,891 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:05:00,891 INFO L87 Difference]: Start difference. First operand 1365 states and 1754 transitions. Second operand has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:01,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:05:01,103 INFO L93 Difference]: Finished difference Result 2210 states and 2849 transitions. [2024-12-02 06:05:01,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:05:01,103 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 748 [2024-12-02 06:05:01,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:05:01,104 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:05:01,105 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:05:01,105 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:05:01,105 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 997 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 222 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 997 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:05:01,105 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [997 Valid, 2169 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 222 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:05:01,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:05:01,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:05:01,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2829771554900515) internal successors, (1741), 1357 states have internal predecessors, (1741), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:05:01,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1753 transitions. [2024-12-02 06:05:01,121 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1753 transitions. Word has length 748 [2024-12-02 06:05:01,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:05:01,121 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1753 transitions. [2024-12-02 06:05:01,121 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:01,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1753 transitions. [2024-12-02 06:05:01,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-12-02 06:05:01,124 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:05:01,124 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:05:01,125 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110 [2024-12-02 06:05:01,125 INFO L396 AbstractCegarLoop]: === Iteration 112 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:05:01,125 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:05:01,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1546776267, now seen corresponding path program 1 times [2024-12-02 06:05:01,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:05:01,125 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998591715] [2024-12-02 06:05:01,125 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:05:01,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:05:02,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:05:03,115 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:05:03,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:05:03,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998591715] [2024-12-02 06:05:03,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [998591715] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:05:03,115 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:05:03,115 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:05:03,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830862446] [2024-12-02 06:05:03,116 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:05:03,116 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:05:03,116 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:05:03,116 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:05:03,116 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:05:03,116 INFO L87 Difference]: Start difference. First operand 1365 states and 1753 transitions. Second operand has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:03,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:05:03,323 INFO L93 Difference]: Finished difference Result 2210 states and 2847 transitions. [2024-12-02 06:05:03,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:05:03,324 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 749 [2024-12-02 06:05:03,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:05:03,325 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:05:03,325 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:05:03,326 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:05:03,326 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 996 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 220 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 996 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 220 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:05:03,326 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [996 Valid, 2169 Invalid, 220 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 220 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:05:03,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:05:03,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:05:03,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2822402358142961) internal successors, (1740), 1357 states have internal predecessors, (1740), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:05:03,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1752 transitions. [2024-12-02 06:05:03,341 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1752 transitions. Word has length 749 [2024-12-02 06:05:03,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:05:03,341 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1752 transitions. [2024-12-02 06:05:03,342 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:03,342 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1752 transitions. [2024-12-02 06:05:03,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 751 [2024-12-02 06:05:03,344 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:05:03,345 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:05:03,345 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable111 [2024-12-02 06:05:03,345 INFO L396 AbstractCegarLoop]: === Iteration 113 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:05:03,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:05:03,345 INFO L85 PathProgramCache]: Analyzing trace with hash 507830374, now seen corresponding path program 1 times [2024-12-02 06:05:03,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:05:03,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380990637] [2024-12-02 06:05:03,345 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:05:03,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:05:04,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:05:05,343 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:05:05,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:05:05,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1380990637] [2024-12-02 06:05:05,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1380990637] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:05:05,344 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:05:05,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:05:05,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625045269] [2024-12-02 06:05:05,344 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:05:05,344 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:05:05,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:05:05,344 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:05:05,344 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:05:05,345 INFO L87 Difference]: Start difference. First operand 1365 states and 1752 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:05,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:05:05,554 INFO L93 Difference]: Finished difference Result 2210 states and 2845 transitions. [2024-12-02 06:05:05,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:05:05,555 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 750 [2024-12-02 06:05:05,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:05:05,556 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:05:05,556 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 06:05:05,557 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:05:05,557 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 995 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 995 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:05:05,557 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [995 Valid, 2169 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 06:05:05,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 06:05:05,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 06:05:05,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.281503316138541) internal successors, (1739), 1357 states have internal predecessors, (1739), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:05:05,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1751 transitions. [2024-12-02 06:05:05,572 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1751 transitions. Word has length 750 [2024-12-02 06:05:05,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:05:05,572 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1751 transitions. [2024-12-02 06:05:05,572 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:05,572 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1751 transitions. [2024-12-02 06:05:05,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 752 [2024-12-02 06:05:05,577 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:05:05,578 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:05:05,578 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable112 [2024-12-02 06:05:05,578 INFO L396 AbstractCegarLoop]: === Iteration 114 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:05:05,578 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:05:05,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1790986916, now seen corresponding path program 1 times [2024-12-02 06:05:05,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:05:05,579 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933265838] [2024-12-02 06:05:05,579 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:05:05,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:05:06,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:05:07,733 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:05:07,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:05:07,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933265838] [2024-12-02 06:05:07,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933265838] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:05:07,733 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:05:07,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:05:07,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641961567] [2024-12-02 06:05:07,734 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:05:07,734 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:05:07,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:05:07,734 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:05:07,734 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:05:07,735 INFO L87 Difference]: Start difference. First operand 1365 states and 1751 transitions. Second operand has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:05:07,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:05:07,917 INFO L93 Difference]: Finished difference Result 2210 states and 2843 transitions. [2024-12-02 06:05:07,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:05:07,918 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 751 [2024-12-02 06:05:07,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:05:07,919 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 06:05:07,919 INFO L226 Difference]: Without dead ends: 1365 WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-02 06:05:53,543 INFO L276 IsEmpty]: Start isEmpty. Operand 2288 states and 2916 transitions. [2024-12-02 06:05:53,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 770 [2024-12-02 06:05:53,547 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:05:53,547 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:05:53,547 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable127 [2024-12-02 06:05:53,547 INFO L396 AbstractCegarLoop]: === Iteration 129 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:05:53,548 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:05:53,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1935522237, now seen corresponding path program 1 times [2024-12-02 06:05:53,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:05:53,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795132630] [2024-12-02 06:05:53,548 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:05:53,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:05:56,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:05:57,826 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 152 proven. 4 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2024-12-02 06:05:57,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:05:57,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795132630] [2024-12-02 06:05:57,826 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795132630] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:05:57,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [732480044] [2024-12-02 06:05:57,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:05:57,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:05:57,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:05:57,828 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:05:57,829 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 06:06:06,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:06,075 INFO L256 TraceCheckSpWp]: Trace formula consists of 4795 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 06:06:06,095 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:06:06,445 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 211 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 06:06:06,446 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:06:06,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [732480044] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:06,446 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:06:06,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [6] total 12 [2024-12-02 06:06:06,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946978092] [2024-12-02 06:06:06,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:06,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 06:06:06,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:06,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 06:06:06,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-12-02 06:06:06,448 INFO L87 Difference]: Start difference. First operand 2288 states and 2916 transitions. Second operand has 8 states, 8 states have (on average 92.75) internal successors, (742), 8 states have internal predecessors, (742), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:07,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:07,336 INFO L93 Difference]: Finished difference Result 5309 states and 6808 transitions. [2024-12-02 06:06:07,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 06:06:07,336 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 92.75) internal successors, (742), 8 states have internal predecessors, (742), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 769 [2024-12-02 06:06:07,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:07,339 INFO L225 Difference]: With dead ends: 5309 [2024-12-02 06:06:07,340 INFO L226 Difference]: Without dead ends: 4018 [2024-12-02 06:06:07,341 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 779 GetRequests, 767 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2024-12-02 06:06:07,341 INFO L435 NwaCegarLoop]: 904 mSDtfsCounter, 2902 mSDsluCounter, 4254 mSDsCounter, 0 mSdLazyCounter, 1643 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2908 SdHoareTripleChecker+Valid, 5158 SdHoareTripleChecker+Invalid, 1646 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:07,341 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2908 Valid, 5158 Invalid, 1646 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1643 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 06:06:07,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4018 states. [2024-12-02 06:06:07,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4018 to 3096. [2024-12-02 06:06:07,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3096 states, 3073 states have (on average 1.2440611780019526) internal successors, (3823), 3073 states have internal predecessors, (3823), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 06:06:07,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3096 states to 3096 states and 3865 transitions. [2024-12-02 06:06:07,410 INFO L78 Accepts]: Start accepts. Automaton has 3096 states and 3865 transitions. Word has length 769 [2024-12-02 06:06:07,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:07,410 INFO L471 AbstractCegarLoop]: Abstraction has 3096 states and 3865 transitions. [2024-12-02 06:06:07,410 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 92.75) internal successors, (742), 8 states have internal predecessors, (742), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:07,410 INFO L276 IsEmpty]: Start isEmpty. Operand 3096 states and 3865 transitions. [2024-12-02 06:06:07,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 770 [2024-12-02 06:06:07,414 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:07,414 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:07,455 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 06:06:07,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable128 [2024-12-02 06:06:07,615 INFO L396 AbstractCegarLoop]: === Iteration 130 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:07,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:07,615 INFO L85 PathProgramCache]: Analyzing trace with hash -1050543704, now seen corresponding path program 1 times [2024-12-02 06:06:07,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:07,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17061398] [2024-12-02 06:06:07,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:07,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:08,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:08,828 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2024-12-02 06:06:08,828 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:08,828 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17061398] [2024-12-02 06:06:08,828 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [17061398] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:08,828 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:06:08,828 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 06:06:08,828 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007310588] [2024-12-02 06:06:08,828 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:08,829 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 06:06:08,829 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:08,829 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 06:06:08,829 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:06:08,829 INFO L87 Difference]: Start difference. First operand 3096 states and 3865 transitions. Second operand has 5 states, 5 states have (on average 122.2) internal successors, (611), 5 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:08,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:08,893 INFO L93 Difference]: Finished difference Result 5051 states and 6305 transitions. [2024-12-02 06:06:08,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 06:06:08,893 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 122.2) internal successors, (611), 5 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 769 [2024-12-02 06:06:08,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:08,896 INFO L225 Difference]: With dead ends: 5051 [2024-12-02 06:06:08,896 INFO L226 Difference]: Without dead ends: 3186 [2024-12-02 06:06:08,897 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 06:06:08,897 INFO L435 NwaCegarLoop]: 1175 mSDtfsCounter, 16 mSDsluCounter, 3513 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 4688 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:08,897 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 4688 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:06:08,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3186 states. [2024-12-02 06:06:08,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3186 to 3186. [2024-12-02 06:06:08,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3186 states, 3163 states have (on average 1.2497628833386025) internal successors, (3953), 3163 states have internal predecessors, (3953), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 06:06:08,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3186 states to 3186 states and 3995 transitions. [2024-12-02 06:06:08,946 INFO L78 Accepts]: Start accepts. Automaton has 3186 states and 3995 transitions. Word has length 769 [2024-12-02 06:06:08,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:08,946 INFO L471 AbstractCegarLoop]: Abstraction has 3186 states and 3995 transitions. [2024-12-02 06:06:08,946 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 122.2) internal successors, (611), 5 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:08,947 INFO L276 IsEmpty]: Start isEmpty. Operand 3186 states and 3995 transitions. [2024-12-02 06:06:08,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 771 [2024-12-02 06:06:08,950 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:08,951 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:08,951 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable129 [2024-12-02 06:06:08,951 INFO L396 AbstractCegarLoop]: === Iteration 131 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:08,951 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:08,951 INFO L85 PathProgramCache]: Analyzing trace with hash 1888529770, now seen corresponding path program 1 times [2024-12-02 06:06:08,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:08,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74918508] [2024-12-02 06:06:08,951 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:08,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:12,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:13,286 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2024-12-02 06:06:13,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:13,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74918508] [2024-12-02 06:06:13,287 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74918508] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:13,287 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:06:13,287 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 06:06:13,287 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181751572] [2024-12-02 06:06:13,287 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:13,287 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:06:13,287 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:13,287 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:06:13,288 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:06:13,288 INFO L87 Difference]: Start difference. First operand 3186 states and 3995 transitions. Second operand has 6 states, 6 states have (on average 96.0) internal successors, (576), 6 states have internal predecessors, (576), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:06:13,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:13,881 INFO L93 Difference]: Finished difference Result 6069 states and 7551 transitions. [2024-12-02 06:06:13,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:06:13,882 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 96.0) internal successors, (576), 6 states have internal predecessors, (576), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 770 [2024-12-02 06:06:13,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:13,884 INFO L225 Difference]: With dead ends: 6069 [2024-12-02 06:06:13,884 INFO L226 Difference]: Without dead ends: 3200 [2024-12-02 06:06:13,886 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 06:06:13,886 INFO L435 NwaCegarLoop]: 898 mSDtfsCounter, 1090 mSDsluCounter, 2687 mSDsCounter, 0 mSdLazyCounter, 1130 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1093 SdHoareTripleChecker+Valid, 3585 SdHoareTripleChecker+Invalid, 1130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:13,886 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1093 Valid, 3585 Invalid, 1130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1130 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 06:06:13,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3200 states. [2024-12-02 06:06:13,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3200 to 3193. [2024-12-02 06:06:13,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3193 states, 3170 states have (on average 1.249211356466877) internal successors, (3960), 3170 states have internal predecessors, (3960), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 06:06:13,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3193 states to 3193 states and 4002 transitions. [2024-12-02 06:06:13,937 INFO L78 Accepts]: Start accepts. Automaton has 3193 states and 4002 transitions. Word has length 770 [2024-12-02 06:06:13,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:13,937 INFO L471 AbstractCegarLoop]: Abstraction has 3193 states and 4002 transitions. [2024-12-02 06:06:13,937 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 96.0) internal successors, (576), 6 states have internal predecessors, (576), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:06:13,937 INFO L276 IsEmpty]: Start isEmpty. Operand 3193 states and 4002 transitions. [2024-12-02 06:06:13,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 773 [2024-12-02 06:06:13,941 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:13,941 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:13,941 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable130 [2024-12-02 06:06:13,941 INFO L396 AbstractCegarLoop]: === Iteration 132 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:13,942 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:13,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1407422298, now seen corresponding path program 1 times [2024-12-02 06:06:13,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:13,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302282147] [2024-12-02 06:06:13,942 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:13,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:16,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:17,719 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 152 proven. 4 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2024-12-02 06:06:17,719 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:17,719 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302282147] [2024-12-02 06:06:17,719 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1302282147] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:06:17,719 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1807269557] [2024-12-02 06:06:17,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:17,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:06:17,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:06:17,721 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:06:17,722 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 06:06:22,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:22,527 INFO L256 TraceCheckSpWp]: Trace formula consists of 4800 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 06:06:22,541 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:06:22,814 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2024-12-02 06:06:22,814 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:06:22,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1807269557] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:22,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:06:22,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2024-12-02 06:06:22,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598975207] [2024-12-02 06:06:22,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:22,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:06:22,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:22,815 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:06:22,815 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-12-02 06:06:22,815 INFO L87 Difference]: Start difference. First operand 3193 states and 4002 transitions. Second operand has 6 states, 6 states have (on average 98.83333333333333) internal successors, (593), 6 states have internal predecessors, (593), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 06:06:23,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:23,425 INFO L93 Difference]: Finished difference Result 5989 states and 7436 transitions. [2024-12-02 06:06:23,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:06:23,425 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 98.83333333333333) internal successors, (593), 6 states have internal predecessors, (593), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 772 [2024-12-02 06:06:23,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:23,427 INFO L225 Difference]: With dead ends: 5989 [2024-12-02 06:06:23,427 INFO L226 Difference]: Without dead ends: 3221 [2024-12-02 06:06:23,429 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 780 GetRequests, 773 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-12-02 06:06:23,429 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1072 mSDsluCounter, 2663 mSDsCounter, 0 mSdLazyCounter, 1130 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1074 SdHoareTripleChecker+Valid, 3560 SdHoareTripleChecker+Invalid, 1132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:23,429 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1074 Valid, 3560 Invalid, 1132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1130 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 06:06:23,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3221 states. [2024-12-02 06:06:23,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3221 to 3179. [2024-12-02 06:06:23,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3179 states, 3156 states have (on average 1.2436628643852978) internal successors, (3925), 3156 states have internal predecessors, (3925), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 06:06:23,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3179 states to 3179 states and 3967 transitions. [2024-12-02 06:06:23,477 INFO L78 Accepts]: Start accepts. Automaton has 3179 states and 3967 transitions. Word has length 772 [2024-12-02 06:06:23,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:23,477 INFO L471 AbstractCegarLoop]: Abstraction has 3179 states and 3967 transitions. [2024-12-02 06:06:23,477 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 98.83333333333333) internal successors, (593), 6 states have internal predecessors, (593), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 06:06:23,477 INFO L276 IsEmpty]: Start isEmpty. Operand 3179 states and 3967 transitions. [2024-12-02 06:06:23,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 775 [2024-12-02 06:06:23,481 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:23,481 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:23,521 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 06:06:23,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable131,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:06:23,682 INFO L396 AbstractCegarLoop]: === Iteration 133 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:23,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:23,682 INFO L85 PathProgramCache]: Analyzing trace with hash 1427841582, now seen corresponding path program 1 times [2024-12-02 06:06:23,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:23,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659622009] [2024-12-02 06:06:23,682 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:23,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:26,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:27,741 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2024-12-02 06:06:27,741 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:27,741 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [659622009] [2024-12-02 06:06:27,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [659622009] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:27,741 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:06:27,742 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 06:06:27,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493152708] [2024-12-02 06:06:27,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:27,742 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 06:06:27,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:27,743 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 06:06:27,743 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 06:06:27,743 INFO L87 Difference]: Start difference. First operand 3179 states and 3967 transitions. Second operand has 8 states, 8 states have (on average 78.0) internal successors, (624), 8 states have internal predecessors, (624), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:06:28,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:28,726 INFO L93 Difference]: Finished difference Result 8139 states and 9956 transitions. [2024-12-02 06:06:28,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 06:06:28,726 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 78.0) internal successors, (624), 8 states have internal predecessors, (624), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 774 [2024-12-02 06:06:28,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:28,730 INFO L225 Difference]: With dead ends: 8139 [2024-12-02 06:06:28,730 INFO L226 Difference]: Without dead ends: 5825 [2024-12-02 06:06:28,732 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 06:06:28,732 INFO L435 NwaCegarLoop]: 1764 mSDtfsCounter, 2003 mSDsluCounter, 7649 mSDsCounter, 0 mSdLazyCounter, 1941 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2006 SdHoareTripleChecker+Valid, 9413 SdHoareTripleChecker+Invalid, 1941 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1941 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:28,732 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2006 Valid, 9413 Invalid, 1941 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1941 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 06:06:28,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5825 states. [2024-12-02 06:06:28,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5825 to 5814. [2024-12-02 06:06:28,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5814 states, 5782 states have (on average 1.2303701141473538) internal successors, (7114), 5782 states have internal predecessors, (7114), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-12-02 06:06:28,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5814 states to 5814 states and 7174 transitions. [2024-12-02 06:06:28,808 INFO L78 Accepts]: Start accepts. Automaton has 5814 states and 7174 transitions. Word has length 774 [2024-12-02 06:06:28,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:28,808 INFO L471 AbstractCegarLoop]: Abstraction has 5814 states and 7174 transitions. [2024-12-02 06:06:28,809 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 78.0) internal successors, (624), 8 states have internal predecessors, (624), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:06:28,809 INFO L276 IsEmpty]: Start isEmpty. Operand 5814 states and 7174 transitions. [2024-12-02 06:06:28,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 06:06:28,814 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:28,814 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:28,814 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable132 [2024-12-02 06:06:28,814 INFO L396 AbstractCegarLoop]: === Iteration 134 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:28,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:28,815 INFO L85 PathProgramCache]: Analyzing trace with hash 513670662, now seen corresponding path program 1 times [2024-12-02 06:06:28,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:28,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146406768] [2024-12-02 06:06:28,815 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:28,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:32,333 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 153 proven. 4 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2024-12-02 06:06:32,333 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:32,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146406768] [2024-12-02 06:06:32,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146406768] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:06:32,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1581081194] [2024-12-02 06:06:32,334 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:32,334 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:06:32,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:06:32,335 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:06:32,336 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 06:06:37,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:37,134 INFO L256 TraceCheckSpWp]: Trace formula consists of 4804 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-12-02 06:06:37,146 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:06:37,526 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 92 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2024-12-02 06:06:37,526 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:06:37,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1581081194] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:37,526 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:06:37,527 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-12-02 06:06:37,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501709053] [2024-12-02 06:06:37,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:37,527 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:06:37,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:37,528 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:06:37,528 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 06:06:37,528 INFO L87 Difference]: Start difference. First operand 5814 states and 7174 transitions. Second operand has 4 states, 4 states have (on average 157.0) internal successors, (628), 4 states have internal predecessors, (628), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:37,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:37,979 INFO L93 Difference]: Finished difference Result 8203 states and 10040 transitions. [2024-12-02 06:06:37,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:06:37,980 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 157.0) internal successors, (628), 4 states have internal predecessors, (628), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 776 [2024-12-02 06:06:37,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:37,982 INFO L225 Difference]: With dead ends: 8203 [2024-12-02 06:06:37,983 INFO L226 Difference]: Without dead ends: 3176 [2024-12-02 06:06:37,985 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 783 GetRequests, 777 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 06:06:37,985 INFO L435 NwaCegarLoop]: 902 mSDtfsCounter, 1032 mSDsluCounter, 904 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1032 SdHoareTripleChecker+Valid, 1806 SdHoareTripleChecker+Invalid, 549 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:37,985 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1032 Valid, 1806 Invalid, 549 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 06:06:37,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3176 states. [2024-12-02 06:06:38,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3176 to 3176. [2024-12-02 06:06:38,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3176 states, 3153 states have (on average 1.2407231208372977) internal successors, (3912), 3153 states have internal predecessors, (3912), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 06:06:38,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3176 states to 3176 states and 3954 transitions. [2024-12-02 06:06:38,071 INFO L78 Accepts]: Start accepts. Automaton has 3176 states and 3954 transitions. Word has length 776 [2024-12-02 06:06:38,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:38,071 INFO L471 AbstractCegarLoop]: Abstraction has 3176 states and 3954 transitions. [2024-12-02 06:06:38,071 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 157.0) internal successors, (628), 4 states have internal predecessors, (628), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:38,071 INFO L276 IsEmpty]: Start isEmpty. Operand 3176 states and 3954 transitions. [2024-12-02 06:06:38,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 06:06:38,075 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:38,075 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:38,114 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 06:06:38,276 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable133 [2024-12-02 06:06:38,276 INFO L396 AbstractCegarLoop]: === Iteration 135 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:38,276 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:38,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1334210106, now seen corresponding path program 1 times [2024-12-02 06:06:38,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:38,276 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170296793] [2024-12-02 06:06:38,276 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:38,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:42,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:45,503 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-12-02 06:06:45,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:45,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170296793] [2024-12-02 06:06:45,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [170296793] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:06:45,503 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:06:45,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 06:06:45,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383165648] [2024-12-02 06:06:45,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:45,504 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 06:06:45,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:45,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 06:06:45,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-12-02 06:06:45,504 INFO L87 Difference]: Start difference. First operand 3176 states and 3954 transitions. Second operand has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:06:46,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:46,007 INFO L93 Difference]: Finished difference Result 6278 states and 7786 transitions. [2024-12-02 06:06:46,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 06:06:46,008 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-02 06:06:46,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:46,010 INFO L225 Difference]: With dead ends: 6278 [2024-12-02 06:06:46,010 INFO L226 Difference]: Without dead ends: 4354 [2024-12-02 06:06:46,012 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2024-12-02 06:06:46,012 INFO L435 NwaCegarLoop]: 1909 mSDtfsCounter, 5335 mSDsluCounter, 8752 mSDsCounter, 0 mSdLazyCounter, 496 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5340 SdHoareTripleChecker+Valid, 10661 SdHoareTripleChecker+Invalid, 503 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 496 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:46,012 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5340 Valid, 10661 Invalid, 503 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 496 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 06:06:46,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4354 states. [2024-12-02 06:06:46,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4354 to 3250. [2024-12-02 06:06:46,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3250 states, 3223 states have (on average 1.2417002792429415) internal successors, (4002), 3223 states have internal predecessors, (4002), 25 states have call successors, (25), 1 states have call predecessors, (25), 1 states have return successors, (25), 25 states have call predecessors, (25), 25 states have call successors, (25) [2024-12-02 06:06:46,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3250 states to 3250 states and 4052 transitions. [2024-12-02 06:06:46,065 INFO L78 Accepts]: Start accepts. Automaton has 3250 states and 4052 transitions. Word has length 776 [2024-12-02 06:06:46,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:46,066 INFO L471 AbstractCegarLoop]: Abstraction has 3250 states and 4052 transitions. [2024-12-02 06:06:46,066 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:06:46,066 INFO L276 IsEmpty]: Start isEmpty. Operand 3250 states and 4052 transitions. [2024-12-02 06:06:46,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 06:06:46,069 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:46,070 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:46,070 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable134 [2024-12-02 06:06:46,070 INFO L396 AbstractCegarLoop]: === Iteration 136 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:06:46,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:06:46,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1560612902, now seen corresponding path program 1 times [2024-12-02 06:06:46,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:06:46,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901139885] [2024-12-02 06:06:46,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:46,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:06:48,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:51,239 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:06:51,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:06:51,239 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901139885] [2024-12-02 06:06:51,239 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901139885] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:06:51,239 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [289309224] [2024-12-02 06:06:51,239 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:06:51,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:06:51,239 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:06:51,240 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:06:51,241 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 06:06:58,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:06:58,862 INFO L256 TraceCheckSpWp]: Trace formula consists of 4804 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 06:06:58,874 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:06:59,174 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 176 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:06:59,175 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:06:59,643 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 182 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:06:59,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [289309224] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 06:06:59,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 06:06:59,644 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10, 8] total 21 [2024-12-02 06:06:59,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623216170] [2024-12-02 06:06:59,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:06:59,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 06:06:59,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:06:59,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 06:06:59,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=370, Unknown=0, NotChecked=0, Total=420 [2024-12-02 06:06:59,645 INFO L87 Difference]: Start difference. First operand 3250 states and 4052 transitions. Second operand has 7 states, 7 states have (on average 107.0) internal successors, (749), 7 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:59,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:06:59,812 INFO L93 Difference]: Finished difference Result 5000 states and 6287 transitions. [2024-12-02 06:06:59,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 06:06:59,812 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 107.0) internal successors, (749), 7 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 776 [2024-12-02 06:06:59,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:06:59,815 INFO L225 Difference]: With dead ends: 5000 [2024-12-02 06:06:59,815 INFO L226 Difference]: Without dead ends: 4124 [2024-12-02 06:06:59,816 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1564 GetRequests, 1543 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2024-12-02 06:06:59,817 INFO L435 NwaCegarLoop]: 2078 mSDtfsCounter, 742 mSDsluCounter, 9458 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 742 SdHoareTripleChecker+Valid, 11536 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:06:59,817 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [742 Valid, 11536 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:06:59,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4124 states. [2024-12-02 06:06:59,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4124 to 3633. [2024-12-02 06:06:59,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3633 states, 3603 states have (on average 1.2317513183458229) internal successors, (4438), 3603 states have internal predecessors, (4438), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 06:06:59,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3633 states to 3633 states and 4494 transitions. [2024-12-02 06:06:59,885 INFO L78 Accepts]: Start accepts. Automaton has 3633 states and 4494 transitions. Word has length 776 [2024-12-02 06:06:59,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:06:59,885 INFO L471 AbstractCegarLoop]: Abstraction has 3633 states and 4494 transitions. [2024-12-02 06:06:59,885 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 107.0) internal successors, (749), 7 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:06:59,885 INFO L276 IsEmpty]: Start isEmpty. Operand 3633 states and 4494 transitions. [2024-12-02 06:06:59,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 06:06:59,889 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:06:59,889 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:06:59,932 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 06:07:00,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable135 [2024-12-02 06:07:00,090 INFO L396 AbstractCegarLoop]: === Iteration 137 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:07:00,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:07:00,090 INFO L85 PathProgramCache]: Analyzing trace with hash -2046413155, now seen corresponding path program 1 times [2024-12-02 06:07:00,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:07:00,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850104178] [2024-12-02 06:07:00,090 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:00,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:07:03,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:05,644 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 149 proven. 17 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-12-02 06:07:05,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:07:05,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850104178] [2024-12-02 06:07:05,645 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [850104178] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:07:05,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [439474193] [2024-12-02 06:07:05,645 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:05,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:07:05,645 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:07:05,647 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:07:05,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 06:07:12,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:12,616 INFO L256 TraceCheckSpWp]: Trace formula consists of 4807 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 06:07:12,628 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:07:12,686 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2024-12-02 06:07:12,686 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:07:12,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [439474193] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:07:12,687 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:07:12,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2024-12-02 06:07:12,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330822222] [2024-12-02 06:07:12,687 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:07:12,687 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:07:12,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:07:12,688 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:07:12,688 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2024-12-02 06:07:12,688 INFO L87 Difference]: Start difference. First operand 3633 states and 4494 transitions. Second operand has 6 states, 5 states have (on average 119.8) internal successors, (599), 6 states have internal predecessors, (599), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 06:07:12,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:07:12,831 INFO L93 Difference]: Finished difference Result 6747 states and 8268 transitions. [2024-12-02 06:07:12,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:07:12,831 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 119.8) internal successors, (599), 6 states have internal predecessors, (599), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 777 [2024-12-02 06:07:12,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:07:12,834 INFO L225 Difference]: With dead ends: 6747 [2024-12-02 06:07:12,835 INFO L226 Difference]: Without dead ends: 3633 [2024-12-02 06:07:12,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 785 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2024-12-02 06:07:12,836 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 0 mSDsluCounter, 4669 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5841 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:07:12,837 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5841 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 06:07:12,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3633 states. [2024-12-02 06:07:12,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3633 to 3633. [2024-12-02 06:07:12,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3633 states, 3603 states have (on average 1.2295309464335276) internal successors, (4430), 3603 states have internal predecessors, (4430), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 06:07:12,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3633 states to 3633 states and 4486 transitions. [2024-12-02 06:07:12,903 INFO L78 Accepts]: Start accepts. Automaton has 3633 states and 4486 transitions. Word has length 777 [2024-12-02 06:07:12,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:07:12,903 INFO L471 AbstractCegarLoop]: Abstraction has 3633 states and 4486 transitions. [2024-12-02 06:07:12,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 119.8) internal successors, (599), 6 states have internal predecessors, (599), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 06:07:12,903 INFO L276 IsEmpty]: Start isEmpty. Operand 3633 states and 4486 transitions. [2024-12-02 06:07:12,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 06:07:12,908 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:07:12,908 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:07:12,963 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 06:07:13,109 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable136 [2024-12-02 06:07:13,109 INFO L396 AbstractCegarLoop]: === Iteration 138 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:07:13,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:07:13,109 INFO L85 PathProgramCache]: Analyzing trace with hash 554416412, now seen corresponding path program 1 times [2024-12-02 06:07:13,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:07:13,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036819907] [2024-12-02 06:07:13,109 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:13,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:07:16,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:18,849 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 4 proven. 181 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:07:18,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:07:18,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036819907] [2024-12-02 06:07:18,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2036819907] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:07:18,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1224451751] [2024-12-02 06:07:18,849 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:18,849 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:07:18,849 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:07:18,850 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:07:18,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 06:07:24,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:24,407 INFO L256 TraceCheckSpWp]: Trace formula consists of 4809 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 06:07:24,420 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:07:26,917 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 221 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 06:07:26,917 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:07:26,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1224451751] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:07:26,917 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:07:26,917 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [10] total 18 [2024-12-02 06:07:26,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [668912443] [2024-12-02 06:07:26,917 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:07:26,918 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 06:07:26,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:07:26,919 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 06:07:26,919 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2024-12-02 06:07:26,919 INFO L87 Difference]: Start difference. First operand 3633 states and 4486 transitions. Second operand has 10 states, 10 states have (on average 75.3) internal successors, (753), 10 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:07:28,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:07:28,084 INFO L93 Difference]: Finished difference Result 5369 states and 6700 transitions. [2024-12-02 06:07:28,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 06:07:28,084 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 75.3) internal successors, (753), 10 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 777 [2024-12-02 06:07:28,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:07:28,087 INFO L225 Difference]: With dead ends: 5369 [2024-12-02 06:07:28,087 INFO L226 Difference]: Without dead ends: 4110 [2024-12-02 06:07:28,089 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 787 GetRequests, 771 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2024-12-02 06:07:28,089 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 2021 mSDsluCounter, 5877 mSDsCounter, 0 mSdLazyCounter, 2206 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2024 SdHoareTripleChecker+Valid, 6808 SdHoareTripleChecker+Invalid, 2210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 2206 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 06:07:28,089 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2024 Valid, 6808 Invalid, 2210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 2206 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 06:07:28,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4110 states. [2024-12-02 06:07:28,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4110 to 4084. [2024-12-02 06:07:28,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4084 states, 4054 states have (on average 1.2446965959546128) internal successors, (5046), 4054 states have internal predecessors, (5046), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 06:07:28,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4084 states to 4084 states and 5102 transitions. [2024-12-02 06:07:28,151 INFO L78 Accepts]: Start accepts. Automaton has 4084 states and 5102 transitions. Word has length 777 [2024-12-02 06:07:28,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:07:28,151 INFO L471 AbstractCegarLoop]: Abstraction has 4084 states and 5102 transitions. [2024-12-02 06:07:28,151 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 75.3) internal successors, (753), 10 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:07:28,152 INFO L276 IsEmpty]: Start isEmpty. Operand 4084 states and 5102 transitions. [2024-12-02 06:07:28,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-02 06:07:28,156 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:07:28,156 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:07:28,197 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 06:07:28,356 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable137 [2024-12-02 06:07:28,356 INFO L396 AbstractCegarLoop]: === Iteration 139 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:07:28,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:07:28,357 INFO L85 PathProgramCache]: Analyzing trace with hash -412536348, now seen corresponding path program 1 times [2024-12-02 06:07:28,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:07:28,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481153687] [2024-12-02 06:07:28,357 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:28,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:07:28,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:29,866 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2024-12-02 06:07:29,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:07:29,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481153687] [2024-12-02 06:07:29,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [481153687] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:07:29,866 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:07:29,867 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 06:07:29,867 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466707208] [2024-12-02 06:07:29,867 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:07:29,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:07:29,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:07:29,867 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:07:29,868 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:07:29,868 INFO L87 Difference]: Start difference. First operand 4084 states and 5102 transitions. Second operand has 6 states, 6 states have (on average 101.83333333333333) internal successors, (611), 6 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:07:30,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:07:30,444 INFO L93 Difference]: Finished difference Result 7479 states and 9252 transitions. [2024-12-02 06:07:30,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:07:30,445 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 101.83333333333333) internal successors, (611), 6 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 778 [2024-12-02 06:07:30,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:07:30,448 INFO L225 Difference]: With dead ends: 7479 [2024-12-02 06:07:30,448 INFO L226 Difference]: Without dead ends: 4132 [2024-12-02 06:07:30,449 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:07:30,449 INFO L435 NwaCegarLoop]: 907 mSDtfsCounter, 1133 mSDsluCounter, 2701 mSDsCounter, 0 mSdLazyCounter, 1102 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1133 SdHoareTripleChecker+Valid, 3608 SdHoareTripleChecker+Invalid, 1103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 06:07:30,449 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1133 Valid, 3608 Invalid, 1103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1102 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 06:07:30,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4132 states. [2024-12-02 06:07:30,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4132 to 4108. [2024-12-02 06:07:30,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4108 states, 4078 states have (on average 1.2432564982834724) internal successors, (5070), 4078 states have internal predecessors, (5070), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 06:07:30,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4108 states to 4108 states and 5126 transitions. [2024-12-02 06:07:30,510 INFO L78 Accepts]: Start accepts. Automaton has 4108 states and 5126 transitions. Word has length 778 [2024-12-02 06:07:30,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:07:30,511 INFO L471 AbstractCegarLoop]: Abstraction has 4108 states and 5126 transitions. [2024-12-02 06:07:30,511 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 101.83333333333333) internal successors, (611), 6 states have internal predecessors, (611), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:07:30,511 INFO L276 IsEmpty]: Start isEmpty. Operand 4108 states and 5126 transitions. [2024-12-02 06:07:30,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-02 06:07:30,515 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:07:30,515 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:07:30,515 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable138 [2024-12-02 06:07:30,515 INFO L396 AbstractCegarLoop]: === Iteration 140 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:07:30,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:07:30,515 INFO L85 PathProgramCache]: Analyzing trace with hash -1801184490, now seen corresponding path program 1 times [2024-12-02 06:07:30,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:07:30,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465252996] [2024-12-02 06:07:30,516 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:30,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:07:33,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:35,621 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 4 proven. 180 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:07:35,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:07:35,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465252996] [2024-12-02 06:07:35,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1465252996] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:07:35,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [983837356] [2024-12-02 06:07:35,622 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:07:35,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:07:35,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:07:35,623 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:07:35,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 06:07:57,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:07:57,483 INFO L256 TraceCheckSpWp]: Trace formula consists of 4810 conjuncts, 212 conjuncts are in the unsatisfiable core [2024-12-02 06:07:57,502 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:08:05,491 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 145 proven. 39 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:08:05,491 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:08:24,718 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 143 proven. 41 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:08:24,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [983837356] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 06:08:24,718 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 06:08:24,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 40, 31] total 77 [2024-12-02 06:08:24,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691077819] [2024-12-02 06:08:24,719 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 06:08:24,720 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 77 states [2024-12-02 06:08:24,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:08:24,720 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2024-12-02 06:08:24,721 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=644, Invalid=5208, Unknown=0, NotChecked=0, Total=5852 [2024-12-02 06:08:24,721 INFO L87 Difference]: Start difference. First operand 4108 states and 5126 transitions. Second operand has 77 states, 77 states have (on average 27.181818181818183) internal successors, (2093), 77 states have internal predecessors, (2093), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 06:09:11,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:09:11,926 INFO L93 Difference]: Finished difference Result 52433 states and 64187 transitions. [2024-12-02 06:09:11,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 227 states. [2024-12-02 06:09:11,927 INFO L78 Accepts]: Start accepts. Automaton has has 77 states, 77 states have (on average 27.181818181818183) internal successors, (2093), 77 states have internal predecessors, (2093), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 778 [2024-12-02 06:09:11,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:09:11,949 INFO L225 Difference]: With dead ends: 52433 [2024-12-02 06:09:11,949 INFO L226 Difference]: Without dead ends: 49030 [2024-12-02 06:09:11,960 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1775 GetRequests, 1490 SyntacticMatches, 0 SemanticMatches, 285 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27060 ImplicationChecksByTransitivity, 16.7s TimeCoverageRelationStatistics Valid=10437, Invalid=71645, Unknown=0, NotChecked=0, Total=82082 [2024-12-02 06:09:11,960 INFO L435 NwaCegarLoop]: 3718 mSDtfsCounter, 36943 mSDsluCounter, 142773 mSDsCounter, 0 mSdLazyCounter, 59545 mSolverCounterSat, 152 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 25.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36948 SdHoareTripleChecker+Valid, 146491 SdHoareTripleChecker+Invalid, 59697 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 152 IncrementalHoareTripleChecker+Valid, 59545 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 28.9s IncrementalHoareTripleChecker+Time [2024-12-02 06:09:11,960 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [36948 Valid, 146491 Invalid, 59697 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [152 Valid, 59545 Invalid, 0 Unknown, 0 Unchecked, 28.9s Time] [2024-12-02 06:09:11,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49030 states. [2024-12-02 06:09:12,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49030 to 11499. [2024-12-02 06:09:12,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11499 states, 11407 states have (on average 1.2439729990356798) internal successors, (14190), 11407 states have internal predecessors, (14190), 90 states have call successors, (90), 1 states have call predecessors, (90), 1 states have return successors, (90), 90 states have call predecessors, (90), 90 states have call successors, (90) [2024-12-02 06:09:12,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11499 states to 11499 states and 14370 transitions. [2024-12-02 06:09:12,270 INFO L78 Accepts]: Start accepts. Automaton has 11499 states and 14370 transitions. Word has length 778 [2024-12-02 06:09:12,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:09:12,271 INFO L471 AbstractCegarLoop]: Abstraction has 11499 states and 14370 transitions. [2024-12-02 06:09:12,271 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 77 states, 77 states have (on average 27.181818181818183) internal successors, (2093), 77 states have internal predecessors, (2093), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 06:09:12,271 INFO L276 IsEmpty]: Start isEmpty. Operand 11499 states and 14370 transitions. [2024-12-02 06:09:12,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 06:09:12,284 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:09:12,284 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:09:12,335 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-12-02 06:09:12,485 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable139 [2024-12-02 06:09:12,485 INFO L396 AbstractCegarLoop]: === Iteration 141 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:09:12,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:09:12,485 INFO L85 PathProgramCache]: Analyzing trace with hash -940333643, now seen corresponding path program 1 times [2024-12-02 06:09:12,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:09:12,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893496052] [2024-12-02 06:09:12,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:09:12,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:09:15,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:09:17,795 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 148 proven. 17 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2024-12-02 06:09:17,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:09:17,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893496052] [2024-12-02 06:09:17,795 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1893496052] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:09:17,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [65743532] [2024-12-02 06:09:17,795 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:09:17,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:09:17,795 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:09:17,797 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:09:17,798 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 06:09:33,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:09:33,174 INFO L256 TraceCheckSpWp]: Trace formula consists of 4811 conjuncts, 56 conjuncts are in the unsatisfiable core [2024-12-02 06:09:33,186 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:09:35,344 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 215 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 06:09:35,344 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:09:38,501 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 179 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:09:38,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [65743532] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 06:09:38,502 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 06:09:38,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12, 11] total 28 [2024-12-02 06:09:38,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767090170] [2024-12-02 06:09:38,502 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 06:09:38,503 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-12-02 06:09:38,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:09:38,503 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-12-02 06:09:38,503 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=641, Unknown=0, NotChecked=0, Total=756 [2024-12-02 06:09:38,504 INFO L87 Difference]: Start difference. First operand 11499 states and 14370 transitions. Second operand has 28 states, 28 states have (on average 68.28571428571429) internal successors, (1912), 28 states have internal predecessors, (1912), 6 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) [2024-12-02 06:09:43,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:09:43,727 INFO L93 Difference]: Finished difference Result 37286 states and 46869 transitions. [2024-12-02 06:09:43,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2024-12-02 06:09:43,727 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 68.28571428571429) internal successors, (1912), 28 states have internal predecessors, (1912), 6 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) Word has length 779 [2024-12-02 06:09:43,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:09:43,745 INFO L225 Difference]: With dead ends: 37286 [2024-12-02 06:09:43,745 INFO L226 Difference]: Without dead ends: 27788 [2024-12-02 06:09:43,755 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1601 GetRequests, 1539 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 824 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=684, Invalid=3348, Unknown=0, NotChecked=0, Total=4032 [2024-12-02 06:09:43,755 INFO L435 NwaCegarLoop]: 1797 mSDtfsCounter, 6817 mSDsluCounter, 23189 mSDsCounter, 0 mSdLazyCounter, 8575 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6820 SdHoareTripleChecker+Valid, 24986 SdHoareTripleChecker+Invalid, 8583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 8575 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:09:43,755 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6820 Valid, 24986 Invalid, 8583 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [8 Valid, 8575 Invalid, 0 Unknown, 0 Unchecked, 4.0s Time] [2024-12-02 06:09:43,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27788 states. [2024-12-02 06:09:44,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27788 to 12749. [2024-12-02 06:09:44,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12749 states, 12623 states have (on average 1.2513665531173255) internal successors, (15796), 12623 states have internal predecessors, (15796), 124 states have call successors, (124), 1 states have call predecessors, (124), 1 states have return successors, (124), 124 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 06:09:44,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12749 states to 12749 states and 16044 transitions. [2024-12-02 06:09:44,071 INFO L78 Accepts]: Start accepts. Automaton has 12749 states and 16044 transitions. Word has length 779 [2024-12-02 06:09:44,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:09:44,071 INFO L471 AbstractCegarLoop]: Abstraction has 12749 states and 16044 transitions. [2024-12-02 06:09:44,072 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 68.28571428571429) internal successors, (1912), 28 states have internal predecessors, (1912), 6 states have call successors, (16), 2 states have call predecessors, (16), 2 states have return successors, (16), 6 states have call predecessors, (16), 6 states have call successors, (16) [2024-12-02 06:09:44,072 INFO L276 IsEmpty]: Start isEmpty. Operand 12749 states and 16044 transitions. [2024-12-02 06:09:44,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 06:09:44,081 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:09:44,081 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:09:44,127 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 06:09:44,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable140,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:09:44,282 INFO L396 AbstractCegarLoop]: === Iteration 142 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:09:44,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:09:44,282 INFO L85 PathProgramCache]: Analyzing trace with hash 340418389, now seen corresponding path program 1 times [2024-12-02 06:09:44,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:09:44,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525821530] [2024-12-02 06:09:44,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:09:44,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:09:50,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:09:51,914 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 178 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:09:51,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:09:51,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [525821530] [2024-12-02 06:09:51,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [525821530] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:09:51,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1889740154] [2024-12-02 06:09:51,914 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:09:51,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:09:51,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:09:51,916 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:09:51,917 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 06:10:01,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:01,998 INFO L256 TraceCheckSpWp]: Trace formula consists of 4811 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 06:10:02,006 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:10:02,054 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 167 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-12-02 06:10:02,055 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:10:02,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1889740154] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:10:02,055 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:10:02,055 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-12-02 06:10:02,055 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899879250] [2024-12-02 06:10:02,055 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:10:02,055 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:10:02,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:10:02,056 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:10:02,056 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 06:10:02,056 INFO L87 Difference]: Start difference. First operand 12749 states and 16044 transitions. Second operand has 6 states, 5 states have (on average 146.6) internal successors, (733), 6 states have internal predecessors, (733), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 06:10:02,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:10:02,432 INFO L93 Difference]: Finished difference Result 23783 states and 29794 transitions. [2024-12-02 06:10:02,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:10:02,432 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 146.6) internal successors, (733), 6 states have internal predecessors, (733), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 779 [2024-12-02 06:10:02,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:10:02,440 INFO L225 Difference]: With dead ends: 23783 [2024-12-02 06:10:02,440 INFO L226 Difference]: Without dead ends: 12749 [2024-12-02 06:10:02,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 786 GetRequests, 777 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 06:10:02,446 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 0 mSDsluCounter, 4665 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5836 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:10:02,446 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5836 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:10:02,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12749 states. [2024-12-02 06:10:02,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12749 to 12749. [2024-12-02 06:10:02,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12749 states, 12623 states have (on average 1.245979561118593) internal successors, (15728), 12623 states have internal predecessors, (15728), 124 states have call successors, (124), 1 states have call predecessors, (124), 1 states have return successors, (124), 124 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 06:10:02,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12749 states to 12749 states and 15976 transitions. [2024-12-02 06:10:02,715 INFO L78 Accepts]: Start accepts. Automaton has 12749 states and 15976 transitions. Word has length 779 [2024-12-02 06:10:02,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:10:02,715 INFO L471 AbstractCegarLoop]: Abstraction has 12749 states and 15976 transitions. [2024-12-02 06:10:02,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 146.6) internal successors, (733), 6 states have internal predecessors, (733), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 06:10:02,715 INFO L276 IsEmpty]: Start isEmpty. Operand 12749 states and 15976 transitions. [2024-12-02 06:10:02,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 06:10:02,724 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:10:02,725 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:10:02,769 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 06:10:02,925 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable141,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:10:02,925 INFO L396 AbstractCegarLoop]: === Iteration 143 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:10:02,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:10:02,926 INFO L85 PathProgramCache]: Analyzing trace with hash -1151822979, now seen corresponding path program 1 times [2024-12-02 06:10:02,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:10:02,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758158363] [2024-12-02 06:10:02,926 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:10:02,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:10:06,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:09,866 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 182 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:10:09,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:10:09,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [758158363] [2024-12-02 06:10:09,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [758158363] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:10:09,866 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:10:09,866 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 06:10:09,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078352723] [2024-12-02 06:10:09,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:10:09,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 06:10:09,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:10:09,867 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 06:10:09,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2024-12-02 06:10:09,868 INFO L87 Difference]: Start difference. First operand 12749 states and 15976 transitions. Second operand has 10 states, 10 states have (on average 75.4) internal successors, (754), 10 states have internal predecessors, (754), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:10:12,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:10:12,469 INFO L93 Difference]: Finished difference Result 36995 states and 45846 transitions. [2024-12-02 06:10:12,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-12-02 06:10:12,469 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 75.4) internal successors, (754), 10 states have internal predecessors, (754), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 781 [2024-12-02 06:10:12,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:10:12,487 INFO L225 Difference]: With dead ends: 36995 [2024-12-02 06:10:12,487 INFO L226 Difference]: Without dead ends: 30291 [2024-12-02 06:10:12,496 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=237, Unknown=0, NotChecked=0, Total=306 [2024-12-02 06:10:12,496 INFO L435 NwaCegarLoop]: 1481 mSDtfsCounter, 2498 mSDsluCounter, 9701 mSDsCounter, 0 mSdLazyCounter, 3862 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2499 SdHoareTripleChecker+Valid, 11182 SdHoareTripleChecker+Invalid, 3865 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 3862 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2024-12-02 06:10:12,496 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2499 Valid, 11182 Invalid, 3865 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 3862 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2024-12-02 06:10:12,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30291 states. [2024-12-02 06:10:12,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30291 to 17861. [2024-12-02 06:10:12,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17861 states, 17735 states have (on average 1.2067098956864957) internal successors, (21401), 17735 states have internal predecessors, (21401), 124 states have call successors, (124), 1 states have call predecessors, (124), 1 states have return successors, (124), 124 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 06:10:12,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17861 states to 17861 states and 21649 transitions. [2024-12-02 06:10:12,869 INFO L78 Accepts]: Start accepts. Automaton has 17861 states and 21649 transitions. Word has length 781 [2024-12-02 06:10:12,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:10:12,869 INFO L471 AbstractCegarLoop]: Abstraction has 17861 states and 21649 transitions. [2024-12-02 06:10:12,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 75.4) internal successors, (754), 10 states have internal predecessors, (754), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:10:12,869 INFO L276 IsEmpty]: Start isEmpty. Operand 17861 states and 21649 transitions. [2024-12-02 06:10:12,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 06:10:12,882 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:10:12,883 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:10:12,883 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable142 [2024-12-02 06:10:12,883 INFO L396 AbstractCegarLoop]: === Iteration 144 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:10:12,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:10:12,883 INFO L85 PathProgramCache]: Analyzing trace with hash 61764508, now seen corresponding path program 1 times [2024-12-02 06:10:12,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:10:12,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112731575] [2024-12-02 06:10:12,884 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:10:12,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:10:16,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:20,534 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 2 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:10:20,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:10:20,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112731575] [2024-12-02 06:10:20,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2112731575] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:10:20,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1783413237] [2024-12-02 06:10:20,534 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:10:20,535 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:10:20,535 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:10:20,536 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:10:20,537 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 06:10:29,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:29,212 INFO L256 TraceCheckSpWp]: Trace formula consists of 4817 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 06:10:29,220 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:10:29,273 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 215 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 06:10:29,273 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:10:29,273 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1783413237] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:10:29,273 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:10:29,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-12-02 06:10:29,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679925149] [2024-12-02 06:10:29,274 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:10:29,274 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:10:29,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:10:29,275 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:10:29,275 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 06:10:29,275 INFO L87 Difference]: Start difference. First operand 17861 states and 21649 transitions. Second operand has 6 states, 5 states have (on average 151.2) internal successors, (756), 6 states have internal predecessors, (756), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:10:29,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:10:29,554 INFO L93 Difference]: Finished difference Result 35143 states and 42478 transitions. [2024-12-02 06:10:29,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:10:29,555 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 151.2) internal successors, (756), 6 states have internal predecessors, (756), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 781 [2024-12-02 06:10:29,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:10:29,567 INFO L225 Difference]: With dead ends: 35143 [2024-12-02 06:10:29,567 INFO L226 Difference]: Without dead ends: 17861 [2024-12-02 06:10:29,576 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 796 GetRequests, 781 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 06:10:29,576 INFO L435 NwaCegarLoop]: 1170 mSDtfsCounter, 0 mSDsluCounter, 4661 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5831 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:10:29,576 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5831 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:10:29,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17861 states. [2024-12-02 06:10:29,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17861 to 17861. [2024-12-02 06:10:29,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17861 states, 17735 states have (on average 1.2054694107696644) internal successors, (21379), 17735 states have internal predecessors, (21379), 124 states have call successors, (124), 1 states have call predecessors, (124), 1 states have return successors, (124), 124 states have call predecessors, (124), 124 states have call successors, (124) [2024-12-02 06:10:29,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17861 states to 17861 states and 21627 transitions. [2024-12-02 06:10:29,892 INFO L78 Accepts]: Start accepts. Automaton has 17861 states and 21627 transitions. Word has length 781 [2024-12-02 06:10:29,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:10:29,893 INFO L471 AbstractCegarLoop]: Abstraction has 17861 states and 21627 transitions. [2024-12-02 06:10:29,893 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 151.2) internal successors, (756), 6 states have internal predecessors, (756), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:10:29,893 INFO L276 IsEmpty]: Start isEmpty. Operand 17861 states and 21627 transitions. [2024-12-02 06:10:29,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 06:10:29,906 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:10:29,906 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:10:29,953 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 06:10:30,107 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable143,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:10:30,107 INFO L396 AbstractCegarLoop]: === Iteration 145 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:10:30,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:10:30,107 INFO L85 PathProgramCache]: Analyzing trace with hash -1282797311, now seen corresponding path program 1 times [2024-12-02 06:10:30,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:10:30,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165528454] [2024-12-02 06:10:30,107 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:10:30,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:10:36,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:39,551 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:10:39,551 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:10:39,551 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165528454] [2024-12-02 06:10:39,551 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1165528454] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:10:39,551 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [729817528] [2024-12-02 06:10:39,551 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:10:39,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:10:39,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:10:39,553 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:10:39,554 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-12-02 06:10:56,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:10:56,787 INFO L256 TraceCheckSpWp]: Trace formula consists of 4820 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-12-02 06:10:56,797 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:10:58,184 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:10:58,184 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:11:01,084 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:11:01,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [729817528] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 06:11:01,084 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 06:11:01,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13] total 33 [2024-12-02 06:11:01,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886727032] [2024-12-02 06:11:01,084 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 06:11:01,085 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-12-02 06:11:01,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:11:01,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-12-02 06:11:01,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=881, Unknown=0, NotChecked=0, Total=1056 [2024-12-02 06:11:01,087 INFO L87 Difference]: Start difference. First operand 17861 states and 21627 transitions. Second operand has 33 states, 33 states have (on average 57.484848484848484) internal successors, (1897), 33 states have internal predecessors, (1897), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 06:11:05,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:11:05,888 INFO L93 Difference]: Finished difference Result 46557 states and 56066 transitions. [2024-12-02 06:11:05,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-12-02 06:11:05,888 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 57.484848484848484) internal successors, (1897), 33 states have internal predecessors, (1897), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 782 [2024-12-02 06:11:05,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:11:05,912 INFO L225 Difference]: With dead ends: 46557 [2024-12-02 06:11:05,912 INFO L226 Difference]: Without dead ends: 35591 [2024-12-02 06:11:05,924 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1598 GetRequests, 1542 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 790 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=522, Invalid=2558, Unknown=0, NotChecked=0, Total=3080 [2024-12-02 06:11:05,924 INFO L435 NwaCegarLoop]: 1522 mSDtfsCounter, 3483 mSDsluCounter, 25776 mSDsCounter, 0 mSdLazyCounter, 9633 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3486 SdHoareTripleChecker+Valid, 27298 SdHoareTripleChecker+Invalid, 9642 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 9633 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.8s IncrementalHoareTripleChecker+Time [2024-12-02 06:11:05,924 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3486 Valid, 27298 Invalid, 9642 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [9 Valid, 9633 Invalid, 0 Unknown, 0 Unchecked, 3.8s Time] [2024-12-02 06:11:05,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35591 states. [2024-12-02 06:11:06,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35591 to 23931. [2024-12-02 06:11:06,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23931 states, 23781 states have (on average 1.2002438921828351) internal successors, (28543), 23781 states have internal predecessors, (28543), 148 states have call successors, (148), 1 states have call predecessors, (148), 1 states have return successors, (148), 148 states have call predecessors, (148), 148 states have call successors, (148) [2024-12-02 06:11:06,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23931 states to 23931 states and 28839 transitions. [2024-12-02 06:11:06,380 INFO L78 Accepts]: Start accepts. Automaton has 23931 states and 28839 transitions. Word has length 782 [2024-12-02 06:11:06,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:11:06,380 INFO L471 AbstractCegarLoop]: Abstraction has 23931 states and 28839 transitions. [2024-12-02 06:11:06,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 57.484848484848484) internal successors, (1897), 33 states have internal predecessors, (1897), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 06:11:06,381 INFO L276 IsEmpty]: Start isEmpty. Operand 23931 states and 28839 transitions. [2024-12-02 06:11:06,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 06:11:06,396 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:11:06,397 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:11:06,445 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-12-02 06:11:06,597 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable144,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:11:06,597 INFO L396 AbstractCegarLoop]: === Iteration 146 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:11:06,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:11:06,598 INFO L85 PathProgramCache]: Analyzing trace with hash -835229083, now seen corresponding path program 1 times [2024-12-02 06:11:06,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:11:06,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975212353] [2024-12-02 06:11:06,598 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:11:06,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:11:10,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:11:14,160 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:11:14,160 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:11:14,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975212353] [2024-12-02 06:11:14,160 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [975212353] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:11:14,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1595397506] [2024-12-02 06:11:14,161 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:11:14,161 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:11:14,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:11:14,162 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:11:14,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-12-02 06:11:33,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:11:33,347 INFO L256 TraceCheckSpWp]: Trace formula consists of 4820 conjuncts, 377 conjuncts are in the unsatisfiable core [2024-12-02 06:11:33,366 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:11:49,386 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 16 proven. 183 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 06:11:49,386 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:12:13,422 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 14 proven. 185 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 06:12:13,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1595397506] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 06:12:13,422 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 06:12:13,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 74, 58] total 140 [2024-12-02 06:12:13,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773687799] [2024-12-02 06:12:13,422 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 06:12:13,424 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 140 states [2024-12-02 06:12:13,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:12:13,426 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 140 interpolants. [2024-12-02 06:12:13,427 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=2359, Invalid=17101, Unknown=0, NotChecked=0, Total=19460 [2024-12-02 06:12:13,427 INFO L87 Difference]: Start difference. First operand 23931 states and 28839 transitions. Second operand has 140 states, 137 states have (on average 16.467153284671532) internal successors, (2256), 139 states have internal predecessors, (2256), 13 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-12-02 06:13:06,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:13:06,641 INFO L93 Difference]: Finished difference Result 163838 states and 192749 transitions. [2024-12-02 06:13:06,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 255 states. [2024-12-02 06:13:06,642 INFO L78 Accepts]: Start accepts. Automaton has has 140 states, 137 states have (on average 16.467153284671532) internal successors, (2256), 139 states have internal predecessors, (2256), 13 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) Word has length 782 [2024-12-02 06:13:06,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:13:06,724 INFO L225 Difference]: With dead ends: 163838 [2024-12-02 06:13:06,724 INFO L226 Difference]: Without dead ends: 148593 [2024-12-02 06:13:06,745 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1806 GetRequests, 1440 SyntacticMatches, 0 SemanticMatches, 366 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45628 ImplicationChecksByTransitivity, 26.7s TimeCoverageRelationStatistics Valid=15555, Invalid=119501, Unknown=0, NotChecked=0, Total=135056 [2024-12-02 06:13:06,746 INFO L435 NwaCegarLoop]: 1296 mSDtfsCounter, 40514 mSDsluCounter, 71631 mSDsCounter, 0 mSdLazyCounter, 48090 mSolverCounterSat, 102 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 25.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40538 SdHoareTripleChecker+Valid, 72927 SdHoareTripleChecker+Invalid, 48192 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 102 IncrementalHoareTripleChecker+Valid, 48090 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 28.6s IncrementalHoareTripleChecker+Time [2024-12-02 06:13:06,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [40538 Valid, 72927 Invalid, 48192 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [102 Valid, 48090 Invalid, 0 Unknown, 0 Unchecked, 28.6s Time] [2024-12-02 06:13:06,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148593 states. [2024-12-02 06:13:07,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148593 to 37120. [2024-12-02 06:13:07,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37120 states, 36834 states have (on average 1.2142585654558289) internal successors, (44726), 36834 states have internal predecessors, (44726), 284 states have call successors, (284), 1 states have call predecessors, (284), 1 states have return successors, (284), 284 states have call predecessors, (284), 284 states have call successors, (284) [2024-12-02 06:13:07,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37120 states to 37120 states and 45294 transitions. [2024-12-02 06:13:07,757 INFO L78 Accepts]: Start accepts. Automaton has 37120 states and 45294 transitions. Word has length 782 [2024-12-02 06:13:07,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:13:07,758 INFO L471 AbstractCegarLoop]: Abstraction has 37120 states and 45294 transitions. [2024-12-02 06:13:07,758 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 140 states, 137 states have (on average 16.467153284671532) internal successors, (2256), 139 states have internal predecessors, (2256), 13 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-12-02 06:13:07,758 INFO L276 IsEmpty]: Start isEmpty. Operand 37120 states and 45294 transitions. [2024-12-02 06:13:07,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 06:13:07,781 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:13:07,781 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:13:07,828 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2024-12-02 06:13:07,981 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable145 [2024-12-02 06:13:07,982 INFO L396 AbstractCegarLoop]: === Iteration 147 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:13:07,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:13:07,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1693405887, now seen corresponding path program 1 times [2024-12-02 06:13:07,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:13:07,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477093860] [2024-12-02 06:13:07,982 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:07,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:13:08,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:13:10,197 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 06:13:10,197 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 06:13:10,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477093860] [2024-12-02 06:13:10,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477093860] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:13:10,197 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 06:13:10,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 06:13:10,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444302033] [2024-12-02 06:13:10,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:13:10,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 06:13:10,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 06:13:10,198 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 06:13:10,198 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 06:13:10,199 INFO L87 Difference]: Start difference. First operand 37120 states and 45294 transitions. Second operand has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:13:11,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:13:11,050 INFO L93 Difference]: Finished difference Result 70412 states and 86015 transitions. [2024-12-02 06:13:11,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 06:13:11,051 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 782 [2024-12-02 06:13:11,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:13:11,087 INFO L225 Difference]: With dead ends: 70412 [2024-12-02 06:13:11,088 INFO L226 Difference]: Without dead ends: 51836 [2024-12-02 06:13:11,104 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 06:13:11,105 INFO L435 NwaCegarLoop]: 2044 mSDtfsCounter, 855 mSDsluCounter, 7288 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 855 SdHoareTripleChecker+Valid, 9332 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 06:13:11,105 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [855 Valid, 9332 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 06:13:11,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51836 states. [2024-12-02 06:13:12,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51836 to 40220. [2024-12-02 06:13:12,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40220 states, 39786 states have (on average 1.2156537475493892) internal successors, (48366), 39786 states have internal predecessors, (48366), 432 states have call successors, (432), 1 states have call predecessors, (432), 1 states have return successors, (432), 432 states have call predecessors, (432), 432 states have call successors, (432) [2024-12-02 06:13:12,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40220 states to 40220 states and 49230 transitions. [2024-12-02 06:13:12,086 INFO L78 Accepts]: Start accepts. Automaton has 40220 states and 49230 transitions. Word has length 782 [2024-12-02 06:13:12,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:13:12,087 INFO L471 AbstractCegarLoop]: Abstraction has 40220 states and 49230 transitions. [2024-12-02 06:13:12,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 06:13:12,087 INFO L276 IsEmpty]: Start isEmpty. Operand 40220 states and 49230 transitions. [2024-12-02 06:13:12,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 06:13:12,115 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:13:12,115 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:13:12,115 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable146 [2024-12-02 06:13:12,115 INFO L396 AbstractCegarLoop]: === Iteration 148 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:13:12,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:13:12,116 INFO L85 PathProgramCache]: Analyzing trace with hash 1442248545, now seen corresponding path program 1 times [2024-12-02 06:13:12,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 06:13:12,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745487134] [2024-12-02 06:13:12,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:12,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 06:13:25,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 06:13:25,802 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 06:13:38,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 06:13:39,556 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 06:13:39,556 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 06:13:39,557 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 06:13:39,558 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable147 [2024-12-02 06:13:39,560 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:13:40,074 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 06:13:40,077 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 06:13:40 BoogieIcfgContainer [2024-12-02 06:13:40,077 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 06:13:40,078 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 06:13:40,078 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 06:13:40,078 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 06:13:40,079 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 06:03:01" (3/4) ... [2024-12-02 06:13:40,081 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 06:13:40,081 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 06:13:40,082 INFO L158 Benchmark]: Toolchain (without parser) took 643879.63ms. Allocated memory was 117.4MB in the beginning and 3.5GB in the end (delta: 3.4GB). Free memory was 91.3MB in the beginning and 2.7GB in the end (delta: -2.6GB). Peak memory consumption was 822.6MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,082 INFO L158 Benchmark]: CDTParser took 0.30ms. Allocated memory is still 117.4MB. Free memory is still 73.5MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 06:13:40,082 INFO L158 Benchmark]: CACSL2BoogieTranslator took 522.28ms. Allocated memory is still 117.4MB. Free memory was 91.3MB in the beginning and 38.7MB in the end (delta: 52.6MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,082 INFO L158 Benchmark]: Boogie Procedure Inliner took 284.81ms. Allocated memory was 117.4MB in the beginning and 251.7MB in the end (delta: 134.2MB). Free memory was 38.7MB in the beginning and 186.3MB in the end (delta: -147.6MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,082 INFO L158 Benchmark]: Boogie Preprocessor took 279.61ms. Allocated memory is still 251.7MB. Free memory was 186.3MB in the beginning and 172.0MB in the end (delta: 14.3MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,082 INFO L158 Benchmark]: RCFGBuilder took 3773.97ms. Allocated memory was 251.7MB in the beginning and 620.8MB in the end (delta: 369.1MB). Free memory was 172.0MB in the beginning and 502.9MB in the end (delta: -330.9MB). Peak memory consumption was 336.6MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,083 INFO L158 Benchmark]: TraceAbstraction took 639009.70ms. Allocated memory was 620.8MB in the beginning and 3.5GB in the end (delta: 2.9GB). Free memory was 502.9MB in the beginning and 2.7GB in the end (delta: -2.2GB). Peak memory consumption was 2.3GB. Max. memory is 16.1GB. [2024-12-02 06:13:40,083 INFO L158 Benchmark]: Witness Printer took 3.69ms. Allocated memory is still 3.5GB. Free memory was 2.7GB in the beginning and 2.7GB in the end (delta: 300.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 06:13:40,083 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30ms. Allocated memory is still 117.4MB. Free memory is still 73.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 522.28ms. Allocated memory is still 117.4MB. Free memory was 91.3MB in the beginning and 38.7MB in the end (delta: 52.6MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 284.81ms. Allocated memory was 117.4MB in the beginning and 251.7MB in the end (delta: 134.2MB). Free memory was 38.7MB in the beginning and 186.3MB in the end (delta: -147.6MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 279.61ms. Allocated memory is still 251.7MB. Free memory was 186.3MB in the beginning and 172.0MB in the end (delta: 14.3MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. * RCFGBuilder took 3773.97ms. Allocated memory was 251.7MB in the beginning and 620.8MB in the end (delta: 369.1MB). Free memory was 172.0MB in the beginning and 502.9MB in the end (delta: -330.9MB). Peak memory consumption was 336.6MB. Max. memory is 16.1GB. * TraceAbstraction took 639009.70ms. Allocated memory was 620.8MB in the beginning and 3.5GB in the end (delta: 2.9GB). Free memory was 502.9MB in the beginning and 2.7GB in the end (delta: -2.2GB). Peak memory consumption was 2.3GB. Max. memory is 16.1GB. * Witness Printer took 3.69ms. Allocated memory is still 3.5GB. Free memory was 2.7GB in the beginning and 2.7GB in the end (delta: 300.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 22]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 585, overapproximation of bitwiseOr at line 181, overapproximation of bitwiseOr at line 200, overapproximation of bitwiseAnd at line 698, overapproximation of bitwiseAnd at line 325, overapproximation of bitwiseAnd at line 301, overapproximation of bitwiseAnd at line 964, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 337, overapproximation of bitwiseAnd at line 379, overapproximation of bitwiseAnd at line 355, overapproximation of bitwiseAnd at line 850, overapproximation of bitwiseAnd at line 1021, overapproximation of bitwiseAnd at line 793, overapproximation of bitwiseAnd at line 660, overapproximation of bitwiseAnd at line 283, overapproximation of bitwiseAnd at line 307, overapproximation of bitwiseAnd at line 1154, overapproximation of bitwiseAnd at line 349, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 409, overapproximation of bitwiseAnd at line 385, overapproximation of bitwiseAnd at line 415, overapproximation of bitwiseAnd at line 983, overapproximation of bitwiseAnd at line 319, overapproximation of bitwiseAnd at line 289, overapproximation of bitwiseAnd at line 391, overapproximation of bitwiseAnd at line 1192, overapproximation of bitwiseAnd at line 421, overapproximation of bitwiseAnd at line 736, overapproximation of bitwiseAnd at line 1135, overapproximation of bitwiseAnd at line 869, overapproximation of bitwiseAnd at line 1059, overapproximation of bitwiseAnd at line 1116, overapproximation of bitwiseAnd at line 161, overapproximation of bitwiseAnd at line 313, overapproximation of bitwiseAnd at line 1078, overapproximation of bitwiseAnd at line 277, overapproximation of bitwiseAnd at line 717, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 367, overapproximation of bitwiseAnd at line 373, overapproximation of bitwiseAnd at line 361, overapproximation of bitwiseAnd at line 831, overapproximation of bitwiseAnd at line 888, overapproximation of bitwiseAnd at line 774, overapproximation of bitwiseAnd at line 1040, overapproximation of bitwiseAnd at line 331, overapproximation of bitwiseAnd at line 201, overapproximation of bitwiseAnd at line 926, overapproximation of bitwiseAnd at line 812, overapproximation of bitwiseAnd at line 1266, overapproximation of bitwiseAnd at line 257, overapproximation of bitwiseAnd at line 1002, overapproximation of bitwiseAnd at line 907, overapproximation of bitwiseAnd at line 397, overapproximation of bitwiseAnd at line 427, overapproximation of bitwiseAnd at line 594, overapproximation of bitwiseAnd at line 433, overapproximation of bitwiseAnd at line 755, overapproximation of bitwiseAnd at line 679. Possible FailurePath: [L27] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L28] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L30] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 128); [L31] const SORT_3 msb_SORT_3 = (SORT_3)1 << (128 - 1); [L33] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L34] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L36] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L37] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L39] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L40] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L42] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L43] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L45] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L46] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L48] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L49] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L51] const SORT_13 var_15 = 32; [L52] const SORT_19 var_20 = 31; [L53] const SORT_19 var_25 = 30; [L54] const SORT_19 var_30 = 29; [L55] const SORT_19 var_35 = 28; [L56] const SORT_19 var_40 = 27; [L57] const SORT_19 var_45 = 26; [L58] const SORT_19 var_50 = 25; [L59] const SORT_19 var_55 = 24; [L60] const SORT_19 var_60 = 23; [L61] const SORT_19 var_65 = 22; [L62] const SORT_19 var_70 = 21; [L63] const SORT_19 var_75 = 20; [L64] const SORT_19 var_80 = 19; [L65] const SORT_19 var_85 = 18; [L66] const SORT_19 var_90 = 17; [L67] const SORT_19 var_95 = 16; [L68] const SORT_100 var_101 = 15; [L69] const SORT_100 var_106 = 14; [L70] const SORT_100 var_111 = 13; [L71] const SORT_100 var_116 = 12; [L72] const SORT_100 var_121 = 11; [L73] const SORT_100 var_126 = 10; [L74] const SORT_100 var_131 = 9; [L75] const SORT_100 var_136 = 8; [L76] const SORT_141 var_142 = 7; [L77] const SORT_141 var_147 = 6; [L78] const SORT_141 var_152 = 5; [L79] const SORT_141 var_157 = 4; [L80] const SORT_162 var_163 = 3; [L81] const SORT_162 var_168 = 2; [L82] const SORT_1 var_173 = 1; [L83] const SORT_13 var_186 = 33; [L84] const SORT_11 var_203 = 0; [L85] const SORT_1 var_233 = 0; [L86] const SORT_3 var_582 = 0; [L88] SORT_1 input_2; [L89] SORT_3 input_4; [L90] SORT_1 input_5; [L91] SORT_1 input_6; [L92] SORT_1 input_7; [L93] SORT_1 input_8; [L94] SORT_3 input_9; [L95] SORT_1 input_231; [L97] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L97] SORT_3 state_10 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L98] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L99] SORT_3 state_18 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L100] SORT_3 state_24 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L101] SORT_3 state_29 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L102] SORT_3 state_34 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L103] SORT_3 state_39 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L104] SORT_3 state_44 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L105] SORT_3 state_49 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L106] SORT_3 state_54 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L107] SORT_3 state_59 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L108] SORT_3 state_64 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L109] SORT_3 state_69 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L110] SORT_3 state_74 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L111] SORT_3 state_79 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L112] SORT_3 state_84 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L113] SORT_3 state_89 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L114] SORT_3 state_94 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L115] SORT_3 state_99 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L116] SORT_3 state_105 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L117] SORT_3 state_110 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L118] SORT_3 state_115 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L119] SORT_3 state_120 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L120] SORT_3 state_125 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L121] SORT_3 state_130 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L122] SORT_3 state_135 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L123] SORT_3 state_140 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L124] SORT_3 state_146 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L125] SORT_3 state_151 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L126] SORT_3 state_156 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L127] SORT_3 state_161 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L128] SORT_3 state_167 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L129] SORT_3 state_172 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L130] SORT_3 state_177 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L131] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L132] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L133] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L134] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L135] EXPR __VERIFIER_nondet_uint128() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L135] SORT_3 state_209 = __VERIFIER_nondet_uint128() & mask_SORT_3; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L136] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L137] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L137] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L139] SORT_1 init_214_arg_1 = var_173; [L140] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L143] input_2 = __VERIFIER_nondet_uchar() [L144] input_4 = __VERIFIER_nondet_uint128() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L148] input_7 = input_7 & mask_SORT_1 [L149] input_8 = __VERIFIER_nondet_uchar() [L150] input_9 = __VERIFIER_nondet_uint128() [L151] input_231 = __VERIFIER_nondet_uchar() [L153] SORT_1 var_215_arg_0 = input_7; [L154] SORT_1 var_215_arg_1 = state_213; [L155] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L156] SORT_1 var_216_arg_0 = var_173; [L157] SORT_1 var_216 = ~var_216_arg_0; [L158] SORT_1 var_217_arg_0 = var_215; [L159] SORT_1 var_217_arg_1 = var_216; VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L161] EXPR var_217 & mask_SORT_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L161] var_217 = var_217 & mask_SORT_1 [L162] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L163] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L165] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L165] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L166] SORT_11 var_187 = var_187_arg_0; [L167] SORT_11 var_188_arg_0 = state_182; [L168] SORT_11 var_188_arg_1 = var_187; [L169] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L170] SORT_1 var_219_arg_0 = var_188; [L171] SORT_1 var_219 = ~var_219_arg_0; [L172] SORT_1 var_220_arg_0 = input_6; [L173] SORT_1 var_220 = ~var_220_arg_0; [L174] SORT_1 var_221_arg_0 = var_219; [L175] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L176] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L176] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L177] SORT_1 var_222_arg_0 = var_173; [L178] SORT_1 var_222 = ~var_222_arg_0; [L179] SORT_1 var_223_arg_0 = var_221; [L180] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L182] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L182] var_223 = var_223 & mask_SORT_1 [L183] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L184] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L185] SORT_11 var_183_arg_0 = state_182; [L186] SORT_1 var_183 = var_183_arg_0 != 0; [L187] SORT_1 var_184_arg_0 = var_183; [L188] SORT_1 var_184 = ~var_184_arg_0; [L189] SORT_1 var_225_arg_0 = var_184; [L190] SORT_1 var_225 = ~var_225_arg_0; [L191] SORT_1 var_226_arg_0 = input_5; [L192] SORT_1 var_226 = ~var_226_arg_0; [L193] SORT_1 var_227_arg_0 = var_225; [L194] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L195] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L195] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L196] SORT_1 var_228_arg_0 = var_173; [L197] SORT_1 var_228 = ~var_228_arg_0; [L198] SORT_1 var_229_arg_0 = var_227; [L199] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=255, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L201] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L201] var_229 = var_229 & mask_SORT_1 [L202] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L203] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L203] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L205] SORT_1 var_234_arg_0 = state_213; [L206] SORT_1 var_234_arg_1 = var_233; [L207] SORT_1 var_234_arg_2 = var_173; [L208] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L209] SORT_1 var_192_arg_0 = state_191; [L210] SORT_1 var_192 = ~var_192_arg_0; [L211] SORT_1 var_193_arg_0 = state_190; [L212] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L213] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L213] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L214] SORT_11 var_195_arg_0 = state_194; [L215] SORT_1 var_195 = var_195_arg_0 != 0; [L216] SORT_1 var_196_arg_0 = var_193; [L217] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L218] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L218] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L219] SORT_1 var_197_arg_0 = state_190; [L220] SORT_1 var_197 = ~var_197_arg_0; [L221] SORT_1 var_198_arg_0 = input_6; [L222] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L223] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L223] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L224] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L225] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L225] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L226] SORT_11 var_199 = var_199_arg_0; [L227] SORT_11 var_200_arg_0 = state_194; [L228] SORT_11 var_200_arg_1 = var_199; [L229] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L230] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=256, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L231] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L231] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L232] SORT_11 var_201 = var_201_arg_0; [L233] SORT_11 var_202_arg_0 = var_200; [L234] SORT_11 var_202_arg_1 = var_201; [L235] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L236] SORT_1 var_204_arg_0 = input_7; [L237] SORT_11 var_204_arg_1 = var_203; [L238] SORT_11 var_204_arg_2 = var_202; [L239] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L240] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L240] var_204 = var_204 & mask_SORT_11 [L241] SORT_11 var_205_arg_0 = var_204; [L242] SORT_1 var_205 = var_205_arg_0 != 0; [L243] SORT_1 var_206_arg_0 = var_205; [L244] SORT_1 var_206 = ~var_206_arg_0; [L245] SORT_1 var_207_arg_0 = var_196; [L246] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L247] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L247] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L248] SORT_1 var_208_arg_0 = var_207; [L249] SORT_1 var_208 = ~var_208_arg_0; [L250] SORT_11 var_14_arg_0 = state_12; [L251] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L252] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L252] var_14 = var_14 & mask_SORT_13 [L253] SORT_13 var_178_arg_0 = var_14; [L254] SORT_1 var_178 = var_178_arg_0 != 0; [L255] SORT_1 var_179_arg_0 = var_178; [L256] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L257] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L257] var_179 = var_179 & mask_SORT_1 [L258] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L259] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L259] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L260] SORT_13 var_174 = var_174_arg_0; [L261] SORT_13 var_175_arg_0 = var_14; [L262] SORT_13 var_175_arg_1 = var_174; [L263] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L264] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L265] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L265] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L266] SORT_13 var_169 = var_169_arg_0; [L267] SORT_13 var_170_arg_0 = var_14; [L268] SORT_13 var_170_arg_1 = var_169; [L269] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L270] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L271] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L271] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L272] SORT_13 var_164 = var_164_arg_0; [L273] SORT_13 var_165_arg_0 = var_14; [L274] SORT_13 var_165_arg_1 = var_164; [L275] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L276] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L277] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L277] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L278] SORT_13 var_158 = var_158_arg_0; [L279] SORT_13 var_159_arg_0 = var_14; [L280] SORT_13 var_159_arg_1 = var_158; [L281] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L282] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L283] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L283] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L284] SORT_13 var_153 = var_153_arg_0; [L285] SORT_13 var_154_arg_0 = var_14; [L286] SORT_13 var_154_arg_1 = var_153; [L287] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L288] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L289] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L289] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L290] SORT_13 var_148 = var_148_arg_0; [L291] SORT_13 var_149_arg_0 = var_14; [L292] SORT_13 var_149_arg_1 = var_148; [L293] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L294] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L295] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L295] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L296] SORT_13 var_143 = var_143_arg_0; [L297] SORT_13 var_144_arg_0 = var_14; [L298] SORT_13 var_144_arg_1 = var_143; [L299] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L300] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L301] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L301] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L302] SORT_13 var_137 = var_137_arg_0; [L303] SORT_13 var_138_arg_0 = var_14; [L304] SORT_13 var_138_arg_1 = var_137; [L305] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L306] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L307] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L307] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L308] SORT_13 var_132 = var_132_arg_0; [L309] SORT_13 var_133_arg_0 = var_14; [L310] SORT_13 var_133_arg_1 = var_132; [L311] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L312] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L313] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L313] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L314] SORT_13 var_127 = var_127_arg_0; [L315] SORT_13 var_128_arg_0 = var_14; [L316] SORT_13 var_128_arg_1 = var_127; [L317] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L318] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L319] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L319] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L320] SORT_13 var_122 = var_122_arg_0; [L321] SORT_13 var_123_arg_0 = var_14; [L322] SORT_13 var_123_arg_1 = var_122; [L323] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L324] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L325] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L325] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L326] SORT_13 var_117 = var_117_arg_0; [L327] SORT_13 var_118_arg_0 = var_14; [L328] SORT_13 var_118_arg_1 = var_117; [L329] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L330] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L331] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L331] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L332] SORT_13 var_112 = var_112_arg_0; [L333] SORT_13 var_113_arg_0 = var_14; [L334] SORT_13 var_113_arg_1 = var_112; [L335] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L336] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L337] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L337] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L338] SORT_13 var_107 = var_107_arg_0; [L339] SORT_13 var_108_arg_0 = var_14; [L340] SORT_13 var_108_arg_1 = var_107; [L341] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L342] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L343] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L343] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L344] SORT_13 var_102 = var_102_arg_0; [L345] SORT_13 var_103_arg_0 = var_14; [L346] SORT_13 var_103_arg_1 = var_102; [L347] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L348] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L349] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L349] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L350] SORT_13 var_96 = var_96_arg_0; [L351] SORT_13 var_97_arg_0 = var_14; [L352] SORT_13 var_97_arg_1 = var_96; [L353] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L354] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L355] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L355] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L356] SORT_13 var_91 = var_91_arg_0; [L357] SORT_13 var_92_arg_0 = var_14; [L358] SORT_13 var_92_arg_1 = var_91; [L359] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L360] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=0, var_95=16, var_97=0] [L361] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=0, var_95=16, var_97=0] [L361] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L362] SORT_13 var_86 = var_86_arg_0; [L363] SORT_13 var_87_arg_0 = var_14; [L364] SORT_13 var_87_arg_1 = var_86; [L365] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L366] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L367] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L367] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L368] SORT_13 var_81 = var_81_arg_0; [L369] SORT_13 var_82_arg_0 = var_14; [L370] SORT_13 var_82_arg_1 = var_81; [L371] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L372] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L373] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L373] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L374] SORT_13 var_76 = var_76_arg_0; [L375] SORT_13 var_77_arg_0 = var_14; [L376] SORT_13 var_77_arg_1 = var_76; [L377] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L378] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L379] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L379] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L380] SORT_13 var_71 = var_71_arg_0; [L381] SORT_13 var_72_arg_0 = var_14; [L382] SORT_13 var_72_arg_1 = var_71; [L383] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L384] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L385] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L385] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L386] SORT_13 var_66 = var_66_arg_0; [L387] SORT_13 var_67_arg_0 = var_14; [L388] SORT_13 var_67_arg_1 = var_66; [L389] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L390] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L391] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L391] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L392] SORT_13 var_61 = var_61_arg_0; [L393] SORT_13 var_62_arg_0 = var_14; [L394] SORT_13 var_62_arg_1 = var_61; [L395] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L396] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L397] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L397] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L398] SORT_13 var_56 = var_56_arg_0; [L399] SORT_13 var_57_arg_0 = var_14; [L400] SORT_13 var_57_arg_1 = var_56; [L401] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L402] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L403] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L403] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L404] SORT_13 var_51 = var_51_arg_0; [L405] SORT_13 var_52_arg_0 = var_14; [L406] SORT_13 var_52_arg_1 = var_51; [L407] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L408] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L409] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L409] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L410] SORT_13 var_46 = var_46_arg_0; [L411] SORT_13 var_47_arg_0 = var_14; [L412] SORT_13 var_47_arg_1 = var_46; [L413] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L414] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L415] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L415] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L416] SORT_13 var_41 = var_41_arg_0; [L417] SORT_13 var_42_arg_0 = var_14; [L418] SORT_13 var_42_arg_1 = var_41; [L419] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L420] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L421] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L421] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L422] SORT_13 var_36 = var_36_arg_0; [L423] SORT_13 var_37_arg_0 = var_14; [L424] SORT_13 var_37_arg_1 = var_36; [L425] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L426] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L427] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L427] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L428] SORT_13 var_31 = var_31_arg_0; [L429] SORT_13 var_32_arg_0 = var_14; [L430] SORT_13 var_32_arg_1 = var_31; [L431] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L432] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L433] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L433] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L434] SORT_13 var_26 = var_26_arg_0; [L435] SORT_13 var_27_arg_0 = var_14; [L436] SORT_13 var_27_arg_1 = var_26; [L437] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L438] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L439] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L439] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L440] SORT_13 var_21 = var_21_arg_0; [L441] SORT_13 var_22_arg_0 = var_14; [L442] SORT_13 var_22_arg_1 = var_21; [L443] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L444] SORT_13 var_16_arg_0 = var_14; [L445] SORT_13 var_16_arg_1 = var_15; [L446] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L447] SORT_1 var_17_arg_0 = var_16; [L448] SORT_3 var_17_arg_1 = state_10; [L449] SORT_3 var_17_arg_2 = input_9; [L450] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L451] SORT_1 var_23_arg_0 = var_22; [L452] SORT_3 var_23_arg_1 = state_18; [L453] SORT_3 var_23_arg_2 = var_17; [L454] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L455] SORT_1 var_28_arg_0 = var_27; [L456] SORT_3 var_28_arg_1 = state_24; [L457] SORT_3 var_28_arg_2 = var_23; [L458] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L459] SORT_1 var_33_arg_0 = var_32; [L460] SORT_3 var_33_arg_1 = state_29; [L461] SORT_3 var_33_arg_2 = var_28; [L462] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L463] SORT_1 var_38_arg_0 = var_37; [L464] SORT_3 var_38_arg_1 = state_34; [L465] SORT_3 var_38_arg_2 = var_33; [L466] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L467] SORT_1 var_43_arg_0 = var_42; [L468] SORT_3 var_43_arg_1 = state_39; [L469] SORT_3 var_43_arg_2 = var_38; [L470] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L471] SORT_1 var_48_arg_0 = var_47; [L472] SORT_3 var_48_arg_1 = state_44; [L473] SORT_3 var_48_arg_2 = var_43; [L474] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L475] SORT_1 var_53_arg_0 = var_52; [L476] SORT_3 var_53_arg_1 = state_49; [L477] SORT_3 var_53_arg_2 = var_48; [L478] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L479] SORT_1 var_58_arg_0 = var_57; [L480] SORT_3 var_58_arg_1 = state_54; [L481] SORT_3 var_58_arg_2 = var_53; [L482] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L483] SORT_1 var_63_arg_0 = var_62; [L484] SORT_3 var_63_arg_1 = state_59; [L485] SORT_3 var_63_arg_2 = var_58; [L486] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L487] SORT_1 var_68_arg_0 = var_67; [L488] SORT_3 var_68_arg_1 = state_64; [L489] SORT_3 var_68_arg_2 = var_63; [L490] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L491] SORT_1 var_73_arg_0 = var_72; [L492] SORT_3 var_73_arg_1 = state_69; [L493] SORT_3 var_73_arg_2 = var_68; [L494] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L495] SORT_1 var_78_arg_0 = var_77; [L496] SORT_3 var_78_arg_1 = state_74; [L497] SORT_3 var_78_arg_2 = var_73; [L498] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L499] SORT_1 var_83_arg_0 = var_82; [L500] SORT_3 var_83_arg_1 = state_79; [L501] SORT_3 var_83_arg_2 = var_78; [L502] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L503] SORT_1 var_88_arg_0 = var_87; [L504] SORT_3 var_88_arg_1 = state_84; [L505] SORT_3 var_88_arg_2 = var_83; [L506] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L507] SORT_1 var_93_arg_0 = var_92; [L508] SORT_3 var_93_arg_1 = state_89; [L509] SORT_3 var_93_arg_2 = var_88; [L510] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L511] SORT_1 var_98_arg_0 = var_97; [L512] SORT_3 var_98_arg_1 = state_94; [L513] SORT_3 var_98_arg_2 = var_93; [L514] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L515] SORT_1 var_104_arg_0 = var_103; [L516] SORT_3 var_104_arg_1 = state_99; [L517] SORT_3 var_104_arg_2 = var_98; [L518] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L519] SORT_1 var_109_arg_0 = var_108; [L520] SORT_3 var_109_arg_1 = state_105; [L521] SORT_3 var_109_arg_2 = var_104; [L522] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L523] SORT_1 var_114_arg_0 = var_113; [L524] SORT_3 var_114_arg_1 = state_110; [L525] SORT_3 var_114_arg_2 = var_109; [L526] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L527] SORT_1 var_119_arg_0 = var_118; [L528] SORT_3 var_119_arg_1 = state_115; [L529] SORT_3 var_119_arg_2 = var_114; [L530] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L531] SORT_1 var_124_arg_0 = var_123; [L532] SORT_3 var_124_arg_1 = state_120; [L533] SORT_3 var_124_arg_2 = var_119; [L534] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L535] SORT_1 var_129_arg_0 = var_128; [L536] SORT_3 var_129_arg_1 = state_125; [L537] SORT_3 var_129_arg_2 = var_124; [L538] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L539] SORT_1 var_134_arg_0 = var_133; [L540] SORT_3 var_134_arg_1 = state_130; [L541] SORT_3 var_134_arg_2 = var_129; [L542] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L543] SORT_1 var_139_arg_0 = var_138; [L544] SORT_3 var_139_arg_1 = state_135; [L545] SORT_3 var_139_arg_2 = var_134; [L546] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L547] SORT_1 var_145_arg_0 = var_144; [L548] SORT_3 var_145_arg_1 = state_140; [L549] SORT_3 var_145_arg_2 = var_139; [L550] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L551] SORT_1 var_150_arg_0 = var_149; [L552] SORT_3 var_150_arg_1 = state_146; [L553] SORT_3 var_150_arg_2 = var_145; [L554] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L555] SORT_1 var_155_arg_0 = var_154; [L556] SORT_3 var_155_arg_1 = state_151; [L557] SORT_3 var_155_arg_2 = var_150; [L558] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L559] SORT_1 var_160_arg_0 = var_159; [L560] SORT_3 var_160_arg_1 = state_156; [L561] SORT_3 var_160_arg_2 = var_155; [L562] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L563] SORT_1 var_166_arg_0 = var_165; [L564] SORT_3 var_166_arg_1 = state_161; [L565] SORT_3 var_166_arg_2 = var_160; [L566] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L567] SORT_1 var_171_arg_0 = var_170; [L568] SORT_3 var_171_arg_1 = state_167; [L569] SORT_3 var_171_arg_2 = var_166; [L570] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L571] SORT_1 var_176_arg_0 = var_175; [L572] SORT_3 var_176_arg_1 = state_172; [L573] SORT_3 var_176_arg_2 = var_171; [L574] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L575] SORT_1 var_180_arg_0 = var_179; [L576] SORT_3 var_180_arg_1 = state_177; [L577] SORT_3 var_180_arg_2 = var_176; [L578] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=(((unsigned __int128) 18446744073709551615U << 64) | 18446744073709551615U), var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L579] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L579] var_180 = var_180 & mask_SORT_3 [L580] SORT_3 var_210_arg_0 = state_209; [L581] SORT_3 var_210_arg_1 = var_180; [L582] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L583] SORT_1 var_211_arg_0 = var_208; [L584] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=0, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L585] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L585] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L586] SORT_1 var_232_arg_0 = state_213; [L587] SORT_1 var_232_arg_1 = input_231; [L588] SORT_1 var_232_arg_2 = var_211; [L589] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L590] SORT_1 var_235_arg_0 = var_232; [L591] SORT_1 var_235 = ~var_235_arg_0; [L592] SORT_1 var_236_arg_0 = var_234; [L593] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=0, var_236_arg_1=-256, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L595] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L595] var_236 = var_236 & mask_SORT_1 [L596] SORT_1 bad_237_arg_0 = var_236; [L597] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L22] COND FALSE !(!(cond)) [L597] RET __VERIFIER_assert(!(bad_237_arg_0)) [L599] SORT_11 var_283_arg_0 = state_282; [L600] SORT_13 var_283 = var_283_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L601] EXPR var_283 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L601] var_283 = var_283 & mask_SORT_13 [L602] SORT_13 var_459_arg_0 = var_283; [L603] SORT_13 var_459_arg_1 = var_15; [L604] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L605] SORT_1 var_460_arg_0 = input_6; [L606] SORT_1 var_460_arg_1 = var_459; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_460_arg_0=0, var_460_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] EXPR var_460_arg_0 & var_460_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L608] EXPR var_460 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L608] var_460 = var_460 & mask_SORT_1 [L609] SORT_1 var_581_arg_0 = var_460; [L610] SORT_3 var_581_arg_1 = input_4; [L611] SORT_3 var_581_arg_2 = state_10; [L612] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L613] SORT_1 var_583_arg_0 = input_7; [L614] SORT_3 var_583_arg_1 = var_582; [L615] SORT_3 var_583_arg_2 = var_581; [L616] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L617] SORT_3 next_584_arg_1 = var_583; [L618] SORT_1 var_241_arg_0 = input_6; [L619] SORT_1 var_241_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_241_arg_0=0, var_241_arg_1=256, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L620] EXPR var_241_arg_0 | var_241_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L620] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L621] SORT_1 var_242_arg_0 = var_241; [L622] SORT_1 var_242_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242_arg_0=0, var_242_arg_1=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] EXPR var_242_arg_0 | var_242_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L624] EXPR var_242 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L624] var_242 = var_242 & mask_SORT_1 [L625] SORT_1 var_512_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_512_arg_0=256, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L626] EXPR var_512_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L626] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L627] SORT_11 var_512 = var_512_arg_0; [L628] SORT_11 var_513_arg_0 = state_12; [L629] SORT_11 var_513_arg_1 = var_512; [L630] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L631] SORT_1 var_585_arg_0 = var_242; [L632] SORT_11 var_585_arg_1 = var_513; [L633] SORT_11 var_585_arg_2 = state_12; [L634] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L635] SORT_1 var_586_arg_0 = input_7; [L636] SORT_11 var_586_arg_1 = var_203; [L637] SORT_11 var_586_arg_2 = var_585; [L638] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L639] SORT_11 next_587_arg_1 = var_586; [L640] SORT_19 var_452_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_452_arg_0=31, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L641] EXPR var_452_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L641] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L642] SORT_13 var_452 = var_452_arg_0; [L643] SORT_13 var_453_arg_0 = var_283; [L644] SORT_13 var_453_arg_1 = var_452; [L645] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L646] SORT_1 var_454_arg_0 = input_6; [L647] SORT_1 var_454_arg_1 = var_453; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_454_arg_0=0, var_454_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] EXPR var_454_arg_0 & var_454_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L649] EXPR var_454 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L649] var_454 = var_454 & mask_SORT_1 [L650] SORT_1 var_588_arg_0 = var_454; [L651] SORT_3 var_588_arg_1 = input_4; [L652] SORT_3 var_588_arg_2 = state_18; [L653] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L654] SORT_1 var_589_arg_0 = input_7; [L655] SORT_3 var_589_arg_1 = var_582; [L656] SORT_3 var_589_arg_2 = var_588; [L657] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L658] SORT_3 next_590_arg_1 = var_589; [L659] SORT_19 var_445_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_445_arg_0=30, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L660] EXPR var_445_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L660] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L661] SORT_13 var_445 = var_445_arg_0; [L662] SORT_13 var_446_arg_0 = var_283; [L663] SORT_13 var_446_arg_1 = var_445; [L664] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L665] SORT_1 var_447_arg_0 = input_6; [L666] SORT_1 var_447_arg_1 = var_446; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_447_arg_0=0, var_447_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] EXPR var_447_arg_0 & var_447_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L668] EXPR var_447 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L668] var_447 = var_447 & mask_SORT_1 [L669] SORT_1 var_591_arg_0 = var_447; [L670] SORT_3 var_591_arg_1 = input_4; [L671] SORT_3 var_591_arg_2 = state_24; [L672] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L673] SORT_1 var_592_arg_0 = input_7; [L674] SORT_3 var_592_arg_1 = var_582; [L675] SORT_3 var_592_arg_2 = var_591; [L676] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L677] SORT_3 next_593_arg_1 = var_592; [L678] SORT_19 var_431_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_431_arg_0=29, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L679] EXPR var_431_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L679] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L680] SORT_13 var_431 = var_431_arg_0; [L681] SORT_13 var_432_arg_0 = var_283; [L682] SORT_13 var_432_arg_1 = var_431; [L683] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L684] SORT_1 var_433_arg_0 = input_6; [L685] SORT_1 var_433_arg_1 = var_432; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_433_arg_0=0, var_433_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] EXPR var_433_arg_0 & var_433_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L687] EXPR var_433 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L687] var_433 = var_433 & mask_SORT_1 [L688] SORT_1 var_594_arg_0 = var_433; [L689] SORT_3 var_594_arg_1 = input_4; [L690] SORT_3 var_594_arg_2 = state_29; [L691] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L692] SORT_1 var_595_arg_0 = input_7; [L693] SORT_3 var_595_arg_1 = var_582; [L694] SORT_3 var_595_arg_2 = var_594; [L695] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L696] SORT_3 next_596_arg_1 = var_595; [L697] SORT_19 var_424_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_424_arg_0=28, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L698] EXPR var_424_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L698] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L699] SORT_13 var_424 = var_424_arg_0; [L700] SORT_13 var_425_arg_0 = var_283; [L701] SORT_13 var_425_arg_1 = var_424; [L702] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L703] SORT_1 var_426_arg_0 = input_6; [L704] SORT_1 var_426_arg_1 = var_425; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_426_arg_0=0, var_426_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] EXPR var_426_arg_0 & var_426_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L706] EXPR var_426 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L706] var_426 = var_426 & mask_SORT_1 [L707] SORT_1 var_597_arg_0 = var_426; [L708] SORT_3 var_597_arg_1 = input_4; [L709] SORT_3 var_597_arg_2 = state_34; [L710] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L711] SORT_1 var_598_arg_0 = input_7; [L712] SORT_3 var_598_arg_1 = var_582; [L713] SORT_3 var_598_arg_2 = var_597; [L714] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L715] SORT_3 next_599_arg_1 = var_598; [L716] SORT_19 var_417_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_417_arg_0=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L717] EXPR var_417_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L717] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L718] SORT_13 var_417 = var_417_arg_0; [L719] SORT_13 var_418_arg_0 = var_283; [L720] SORT_13 var_418_arg_1 = var_417; [L721] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L722] SORT_1 var_419_arg_0 = input_6; [L723] SORT_1 var_419_arg_1 = var_418; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_419_arg_0=0, var_419_arg_1=1, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] EXPR var_419_arg_0 & var_419_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L725] EXPR var_419 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L725] var_419 = var_419 & mask_SORT_1 [L726] SORT_1 var_600_arg_0 = var_419; [L727] SORT_3 var_600_arg_1 = input_4; [L728] SORT_3 var_600_arg_2 = state_39; [L729] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L730] SORT_1 var_601_arg_0 = input_7; [L731] SORT_3 var_601_arg_1 = var_582; [L732] SORT_3 var_601_arg_2 = var_600; [L733] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L734] SORT_3 next_602_arg_1 = var_601; [L735] SORT_19 var_410_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_410_arg_0=26, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L736] EXPR var_410_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L736] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L737] SORT_13 var_410 = var_410_arg_0; [L738] SORT_13 var_411_arg_0 = var_283; [L739] SORT_13 var_411_arg_1 = var_410; [L740] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L741] SORT_1 var_412_arg_0 = input_6; [L742] SORT_1 var_412_arg_1 = var_411; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_412_arg_0=0, var_412_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] EXPR var_412_arg_0 & var_412_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L744] EXPR var_412 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L744] var_412 = var_412 & mask_SORT_1 [L745] SORT_1 var_603_arg_0 = var_412; [L746] SORT_3 var_603_arg_1 = input_4; [L747] SORT_3 var_603_arg_2 = state_44; [L748] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L749] SORT_1 var_604_arg_0 = input_7; [L750] SORT_3 var_604_arg_1 = var_582; [L751] SORT_3 var_604_arg_2 = var_603; [L752] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L753] SORT_3 next_605_arg_1 = var_604; [L754] SORT_19 var_403_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_403_arg_0=25, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L755] EXPR var_403_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L755] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L756] SORT_13 var_403 = var_403_arg_0; [L757] SORT_13 var_404_arg_0 = var_283; [L758] SORT_13 var_404_arg_1 = var_403; [L759] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L760] SORT_1 var_405_arg_0 = input_6; [L761] SORT_1 var_405_arg_1 = var_404; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_405_arg_0=0, var_405_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] EXPR var_405_arg_0 & var_405_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L763] EXPR var_405 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L763] var_405 = var_405 & mask_SORT_1 [L764] SORT_1 var_606_arg_0 = var_405; [L765] SORT_3 var_606_arg_1 = input_4; [L766] SORT_3 var_606_arg_2 = state_49; [L767] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L768] SORT_1 var_607_arg_0 = input_7; [L769] SORT_3 var_607_arg_1 = var_582; [L770] SORT_3 var_607_arg_2 = var_606; [L771] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L772] SORT_3 next_608_arg_1 = var_607; [L773] SORT_19 var_396_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_396_arg_0=24, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L774] EXPR var_396_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L774] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L775] SORT_13 var_396 = var_396_arg_0; [L776] SORT_13 var_397_arg_0 = var_283; [L777] SORT_13 var_397_arg_1 = var_396; [L778] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L779] SORT_1 var_398_arg_0 = input_6; [L780] SORT_1 var_398_arg_1 = var_397; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_398_arg_0=0, var_398_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] EXPR var_398_arg_0 & var_398_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L782] EXPR var_398 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L782] var_398 = var_398 & mask_SORT_1 [L783] SORT_1 var_609_arg_0 = var_398; [L784] SORT_3 var_609_arg_1 = input_4; [L785] SORT_3 var_609_arg_2 = state_54; [L786] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L787] SORT_1 var_610_arg_0 = input_7; [L788] SORT_3 var_610_arg_1 = var_582; [L789] SORT_3 var_610_arg_2 = var_609; [L790] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L791] SORT_3 next_611_arg_1 = var_610; [L792] SORT_19 var_389_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_389_arg_0=23, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L793] EXPR var_389_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L793] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L794] SORT_13 var_389 = var_389_arg_0; [L795] SORT_13 var_390_arg_0 = var_283; [L796] SORT_13 var_390_arg_1 = var_389; [L797] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L798] SORT_1 var_391_arg_0 = input_6; [L799] SORT_1 var_391_arg_1 = var_390; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_391_arg_0=0, var_391_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] EXPR var_391_arg_0 & var_391_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L801] EXPR var_391 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L801] var_391 = var_391 & mask_SORT_1 [L802] SORT_1 var_612_arg_0 = var_391; [L803] SORT_3 var_612_arg_1 = input_4; [L804] SORT_3 var_612_arg_2 = state_59; [L805] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L806] SORT_1 var_613_arg_0 = input_7; [L807] SORT_3 var_613_arg_1 = var_582; [L808] SORT_3 var_613_arg_2 = var_612; [L809] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L810] SORT_3 next_614_arg_1 = var_613; [L811] SORT_19 var_382_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_382_arg_0=22, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L812] EXPR var_382_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L812] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L813] SORT_13 var_382 = var_382_arg_0; [L814] SORT_13 var_383_arg_0 = var_283; [L815] SORT_13 var_383_arg_1 = var_382; [L816] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L817] SORT_1 var_384_arg_0 = input_6; [L818] SORT_1 var_384_arg_1 = var_383; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_384_arg_0=0, var_384_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] EXPR var_384_arg_0 & var_384_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L820] EXPR var_384 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L820] var_384 = var_384 & mask_SORT_1 [L821] SORT_1 var_615_arg_0 = var_384; [L822] SORT_3 var_615_arg_1 = input_4; [L823] SORT_3 var_615_arg_2 = state_64; [L824] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L825] SORT_1 var_616_arg_0 = input_7; [L826] SORT_3 var_616_arg_1 = var_582; [L827] SORT_3 var_616_arg_2 = var_615; [L828] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L829] SORT_3 next_617_arg_1 = var_616; [L830] SORT_19 var_375_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_375_arg_0=21, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L831] EXPR var_375_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L831] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L832] SORT_13 var_375 = var_375_arg_0; [L833] SORT_13 var_376_arg_0 = var_283; [L834] SORT_13 var_376_arg_1 = var_375; [L835] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L836] SORT_1 var_377_arg_0 = input_6; [L837] SORT_1 var_377_arg_1 = var_376; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_377_arg_0=0, var_377_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] EXPR var_377_arg_0 & var_377_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L839] EXPR var_377 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L839] var_377 = var_377 & mask_SORT_1 [L840] SORT_1 var_618_arg_0 = var_377; [L841] SORT_3 var_618_arg_1 = input_4; [L842] SORT_3 var_618_arg_2 = state_69; [L843] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L844] SORT_1 var_619_arg_0 = input_7; [L845] SORT_3 var_619_arg_1 = var_582; [L846] SORT_3 var_619_arg_2 = var_618; [L847] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L848] SORT_3 next_620_arg_1 = var_619; [L849] SORT_19 var_368_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_368_arg_0=20, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L850] EXPR var_368_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L850] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L851] SORT_13 var_368 = var_368_arg_0; [L852] SORT_13 var_369_arg_0 = var_283; [L853] SORT_13 var_369_arg_1 = var_368; [L854] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L855] SORT_1 var_370_arg_0 = input_6; [L856] SORT_1 var_370_arg_1 = var_369; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_370_arg_0=0, var_370_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] EXPR var_370_arg_0 & var_370_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L858] EXPR var_370 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L858] var_370 = var_370 & mask_SORT_1 [L859] SORT_1 var_621_arg_0 = var_370; [L860] SORT_3 var_621_arg_1 = input_4; [L861] SORT_3 var_621_arg_2 = state_74; [L862] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L863] SORT_1 var_622_arg_0 = input_7; [L864] SORT_3 var_622_arg_1 = var_582; [L865] SORT_3 var_622_arg_2 = var_621; [L866] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L867] SORT_3 next_623_arg_1 = var_622; [L868] SORT_19 var_354_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_354_arg_0=19, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L869] EXPR var_354_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L869] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L870] SORT_13 var_354 = var_354_arg_0; [L871] SORT_13 var_355_arg_0 = var_283; [L872] SORT_13 var_355_arg_1 = var_354; [L873] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L874] SORT_1 var_356_arg_0 = input_6; [L875] SORT_1 var_356_arg_1 = var_355; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_356_arg_0=0, var_356_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] EXPR var_356_arg_0 & var_356_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L877] EXPR var_356 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L877] var_356 = var_356 & mask_SORT_1 [L878] SORT_1 var_624_arg_0 = var_356; [L879] SORT_3 var_624_arg_1 = input_4; [L880] SORT_3 var_624_arg_2 = state_79; [L881] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L882] SORT_1 var_625_arg_0 = input_7; [L883] SORT_3 var_625_arg_1 = var_582; [L884] SORT_3 var_625_arg_2 = var_624; [L885] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L886] SORT_3 next_626_arg_1 = var_625; [L887] SORT_19 var_347_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_347_arg_0=18, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L888] EXPR var_347_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L888] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L889] SORT_13 var_347 = var_347_arg_0; [L890] SORT_13 var_348_arg_0 = var_283; [L891] SORT_13 var_348_arg_1 = var_347; [L892] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L893] SORT_1 var_349_arg_0 = input_6; [L894] SORT_1 var_349_arg_1 = var_348; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_349_arg_0=0, var_349_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] EXPR var_349_arg_0 & var_349_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L896] EXPR var_349 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L896] var_349 = var_349 & mask_SORT_1 [L897] SORT_1 var_627_arg_0 = var_349; [L898] SORT_3 var_627_arg_1 = input_4; [L899] SORT_3 var_627_arg_2 = state_84; [L900] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L901] SORT_1 var_628_arg_0 = input_7; [L902] SORT_3 var_628_arg_1 = var_582; [L903] SORT_3 var_628_arg_2 = var_627; [L904] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L905] SORT_3 next_629_arg_1 = var_628; [L906] SORT_19 var_340_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_340_arg_0=17, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L907] EXPR var_340_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L907] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L908] SORT_13 var_340 = var_340_arg_0; [L909] SORT_13 var_341_arg_0 = var_283; [L910] SORT_13 var_341_arg_1 = var_340; [L911] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L912] SORT_1 var_342_arg_0 = input_6; [L913] SORT_1 var_342_arg_1 = var_341; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_342_arg_0=0, var_342_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] EXPR var_342_arg_0 & var_342_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L915] EXPR var_342 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L915] var_342 = var_342 & mask_SORT_1 [L916] SORT_1 var_630_arg_0 = var_342; [L917] SORT_3 var_630_arg_1 = input_4; [L918] SORT_3 var_630_arg_2 = state_89; [L919] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L920] SORT_1 var_631_arg_0 = input_7; [L921] SORT_3 var_631_arg_1 = var_582; [L922] SORT_3 var_631_arg_2 = var_630; [L923] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L924] SORT_3 next_632_arg_1 = var_631; [L925] SORT_19 var_333_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_333_arg_0=16, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L926] EXPR var_333_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L926] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L927] SORT_13 var_333 = var_333_arg_0; [L928] SORT_13 var_334_arg_0 = var_283; [L929] SORT_13 var_334_arg_1 = var_333; [L930] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L931] SORT_1 var_335_arg_0 = input_6; [L932] SORT_1 var_335_arg_1 = var_334; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_335_arg_0=0, var_335_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] EXPR var_335_arg_0 & var_335_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L934] EXPR var_335 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L934] var_335 = var_335 & mask_SORT_1 [L935] SORT_1 var_633_arg_0 = var_335; [L936] SORT_3 var_633_arg_1 = input_4; [L937] SORT_3 var_633_arg_2 = state_94; [L938] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L939] SORT_1 var_634_arg_0 = input_7; [L940] SORT_3 var_634_arg_1 = var_582; [L941] SORT_3 var_634_arg_2 = var_633; [L942] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L943] SORT_3 next_635_arg_1 = var_634; [L944] SORT_100 var_326_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_326_arg_0=15, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L945] EXPR var_326_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L945] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L946] SORT_13 var_326 = var_326_arg_0; [L947] SORT_13 var_327_arg_0 = var_283; [L948] SORT_13 var_327_arg_1 = var_326; [L949] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L950] SORT_1 var_328_arg_0 = input_6; [L951] SORT_1 var_328_arg_1 = var_327; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_328_arg_0=0, var_328_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] EXPR var_328_arg_0 & var_328_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L953] EXPR var_328 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L953] var_328 = var_328 & mask_SORT_1 [L954] SORT_1 var_636_arg_0 = var_328; [L955] SORT_3 var_636_arg_1 = input_4; [L956] SORT_3 var_636_arg_2 = state_99; [L957] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L958] SORT_1 var_637_arg_0 = input_7; [L959] SORT_3 var_637_arg_1 = var_582; [L960] SORT_3 var_637_arg_2 = var_636; [L961] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L962] SORT_3 next_638_arg_1 = var_637; [L963] SORT_100 var_319_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_319_arg_0=14, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L964] EXPR var_319_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L964] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L965] SORT_13 var_319 = var_319_arg_0; [L966] SORT_13 var_320_arg_0 = var_283; [L967] SORT_13 var_320_arg_1 = var_319; [L968] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L969] SORT_1 var_321_arg_0 = input_6; [L970] SORT_1 var_321_arg_1 = var_320; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_321_arg_0=0, var_321_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] EXPR var_321_arg_0 & var_321_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L972] EXPR var_321 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L972] var_321 = var_321 & mask_SORT_1 [L973] SORT_1 var_639_arg_0 = var_321; [L974] SORT_3 var_639_arg_1 = input_4; [L975] SORT_3 var_639_arg_2 = state_105; [L976] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L977] SORT_1 var_640_arg_0 = input_7; [L978] SORT_3 var_640_arg_1 = var_582; [L979] SORT_3 var_640_arg_2 = var_639; [L980] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L981] SORT_3 next_641_arg_1 = var_640; [L982] SORT_100 var_312_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_312_arg_0=13, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L983] EXPR var_312_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L983] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L984] SORT_13 var_312 = var_312_arg_0; [L985] SORT_13 var_313_arg_0 = var_283; [L986] SORT_13 var_313_arg_1 = var_312; [L987] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L988] SORT_1 var_314_arg_0 = input_6; [L989] SORT_1 var_314_arg_1 = var_313; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_314_arg_0=0, var_314_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] EXPR var_314_arg_0 & var_314_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L991] EXPR var_314 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L991] var_314 = var_314 & mask_SORT_1 [L992] SORT_1 var_642_arg_0 = var_314; [L993] SORT_3 var_642_arg_1 = input_4; [L994] SORT_3 var_642_arg_2 = state_110; [L995] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L996] SORT_1 var_643_arg_0 = input_7; [L997] SORT_3 var_643_arg_1 = var_582; [L998] SORT_3 var_643_arg_2 = var_642; [L999] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L1000] SORT_3 next_644_arg_1 = var_643; [L1001] SORT_100 var_305_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_305_arg_0=12, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1002] EXPR var_305_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1002] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1003] SORT_13 var_305 = var_305_arg_0; [L1004] SORT_13 var_306_arg_0 = var_283; [L1005] SORT_13 var_306_arg_1 = var_305; [L1006] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1007] SORT_1 var_307_arg_0 = input_6; [L1008] SORT_1 var_307_arg_1 = var_306; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_307_arg_0=0, var_307_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] EXPR var_307_arg_0 & var_307_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1010] EXPR var_307 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1010] var_307 = var_307 & mask_SORT_1 [L1011] SORT_1 var_645_arg_0 = var_307; [L1012] SORT_3 var_645_arg_1 = input_4; [L1013] SORT_3 var_645_arg_2 = state_115; [L1014] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1015] SORT_1 var_646_arg_0 = input_7; [L1016] SORT_3 var_646_arg_1 = var_582; [L1017] SORT_3 var_646_arg_2 = var_645; [L1018] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1019] SORT_3 next_647_arg_1 = var_646; [L1020] SORT_100 var_298_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_298_arg_0=11, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1021] EXPR var_298_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1021] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1022] SORT_13 var_298 = var_298_arg_0; [L1023] SORT_13 var_299_arg_0 = var_283; [L1024] SORT_13 var_299_arg_1 = var_298; [L1025] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1026] SORT_1 var_300_arg_0 = input_6; [L1027] SORT_1 var_300_arg_1 = var_299; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_300_arg_0=0, var_300_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1029] EXPR var_300 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1029] var_300 = var_300 & mask_SORT_1 [L1030] SORT_1 var_648_arg_0 = var_300; [L1031] SORT_3 var_648_arg_1 = input_4; [L1032] SORT_3 var_648_arg_2 = state_120; [L1033] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1034] SORT_1 var_649_arg_0 = input_7; [L1035] SORT_3 var_649_arg_1 = var_582; [L1036] SORT_3 var_649_arg_2 = var_648; [L1037] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1038] SORT_3 next_650_arg_1 = var_649; [L1039] SORT_100 var_291_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_291_arg_0=10, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1040] EXPR var_291_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1040] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1041] SORT_13 var_291 = var_291_arg_0; [L1042] SORT_13 var_292_arg_0 = var_283; [L1043] SORT_13 var_292_arg_1 = var_291; [L1044] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1045] SORT_1 var_293_arg_0 = input_6; [L1046] SORT_1 var_293_arg_1 = var_292; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_293_arg_0=0, var_293_arg_1=1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1048] EXPR var_293 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1048] var_293 = var_293 & mask_SORT_1 [L1049] SORT_1 var_651_arg_0 = var_293; [L1050] SORT_3 var_651_arg_1 = input_4; [L1051] SORT_3 var_651_arg_2 = state_125; [L1052] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1053] SORT_1 var_652_arg_0 = input_7; [L1054] SORT_3 var_652_arg_1 = var_582; [L1055] SORT_3 var_652_arg_2 = var_651; [L1056] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1057] SORT_3 next_653_arg_1 = var_652; [L1058] SORT_100 var_507_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_507_arg_0=9, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1059] EXPR var_507_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1059] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1060] SORT_13 var_507 = var_507_arg_0; [L1061] SORT_13 var_508_arg_0 = var_283; [L1062] SORT_13 var_508_arg_1 = var_507; [L1063] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1064] SORT_1 var_509_arg_0 = input_6; [L1065] SORT_1 var_509_arg_1 = var_508; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_509_arg_0=0, var_509_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] EXPR var_509_arg_0 & var_509_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1067] EXPR var_509 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1067] var_509 = var_509 & mask_SORT_1 [L1068] SORT_1 var_654_arg_0 = var_509; [L1069] SORT_3 var_654_arg_1 = input_4; [L1070] SORT_3 var_654_arg_2 = state_130; [L1071] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1072] SORT_1 var_655_arg_0 = input_7; [L1073] SORT_3 var_655_arg_1 = var_582; [L1074] SORT_3 var_655_arg_2 = var_654; [L1075] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1076] SORT_3 next_656_arg_1 = var_655; [L1077] SORT_100 var_500_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_500_arg_0=8, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1078] EXPR var_500_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1078] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1079] SORT_13 var_500 = var_500_arg_0; [L1080] SORT_13 var_501_arg_0 = var_283; [L1081] SORT_13 var_501_arg_1 = var_500; [L1082] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1083] SORT_1 var_502_arg_0 = input_6; [L1084] SORT_1 var_502_arg_1 = var_501; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_502_arg_0=0, var_502_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] EXPR var_502_arg_0 & var_502_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1086] EXPR var_502 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1086] var_502 = var_502 & mask_SORT_1 [L1087] SORT_1 var_657_arg_0 = var_502; [L1088] SORT_3 var_657_arg_1 = input_4; [L1089] SORT_3 var_657_arg_2 = state_135; [L1090] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1091] SORT_1 var_658_arg_0 = input_7; [L1092] SORT_3 var_658_arg_1 = var_582; [L1093] SORT_3 var_658_arg_2 = var_657; [L1094] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1095] SORT_3 next_659_arg_1 = var_658; [L1096] SORT_141 var_493_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_493_arg_0=7, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1097] EXPR var_493_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1097] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1098] SORT_13 var_493 = var_493_arg_0; [L1099] SORT_13 var_494_arg_0 = var_283; [L1100] SORT_13 var_494_arg_1 = var_493; [L1101] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1102] SORT_1 var_495_arg_0 = input_6; [L1103] SORT_1 var_495_arg_1 = var_494; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_495_arg_0=0, var_495_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] EXPR var_495_arg_0 & var_495_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1105] EXPR var_495 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1105] var_495 = var_495 & mask_SORT_1 [L1106] SORT_1 var_660_arg_0 = var_495; [L1107] SORT_3 var_660_arg_1 = input_4; [L1108] SORT_3 var_660_arg_2 = state_140; [L1109] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1110] SORT_1 var_661_arg_0 = input_7; [L1111] SORT_3 var_661_arg_1 = var_582; [L1112] SORT_3 var_661_arg_2 = var_660; [L1113] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1114] SORT_3 next_662_arg_1 = var_661; [L1115] SORT_141 var_486_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_486_arg_0=6, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1116] EXPR var_486_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1116] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1117] SORT_13 var_486 = var_486_arg_0; [L1118] SORT_13 var_487_arg_0 = var_283; [L1119] SORT_13 var_487_arg_1 = var_486; [L1120] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1121] SORT_1 var_488_arg_0 = input_6; [L1122] SORT_1 var_488_arg_1 = var_487; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_488_arg_0=0, var_488_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] EXPR var_488_arg_0 & var_488_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1124] EXPR var_488 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1124] var_488 = var_488 & mask_SORT_1 [L1125] SORT_1 var_663_arg_0 = var_488; [L1126] SORT_3 var_663_arg_1 = input_4; [L1127] SORT_3 var_663_arg_2 = state_146; [L1128] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1129] SORT_1 var_664_arg_0 = input_7; [L1130] SORT_3 var_664_arg_1 = var_582; [L1131] SORT_3 var_664_arg_2 = var_663; [L1132] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1133] SORT_3 next_665_arg_1 = var_664; [L1134] SORT_141 var_479_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_479_arg_0=5, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1135] EXPR var_479_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1135] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1136] SORT_13 var_479 = var_479_arg_0; [L1137] SORT_13 var_480_arg_0 = var_283; [L1138] SORT_13 var_480_arg_1 = var_479; [L1139] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1140] SORT_1 var_481_arg_0 = input_6; [L1141] SORT_1 var_481_arg_1 = var_480; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_481_arg_0=0, var_481_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] EXPR var_481_arg_0 & var_481_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1143] EXPR var_481 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1143] var_481 = var_481 & mask_SORT_1 [L1144] SORT_1 var_666_arg_0 = var_481; [L1145] SORT_3 var_666_arg_1 = input_4; [L1146] SORT_3 var_666_arg_2 = state_151; [L1147] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1148] SORT_1 var_667_arg_0 = input_7; [L1149] SORT_3 var_667_arg_1 = var_582; [L1150] SORT_3 var_667_arg_2 = var_666; [L1151] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1152] SORT_3 next_668_arg_1 = var_667; [L1153] SORT_141 var_472_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_472_arg_0=4, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1154] EXPR var_472_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1154] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1155] SORT_13 var_472 = var_472_arg_0; [L1156] SORT_13 var_473_arg_0 = var_283; [L1157] SORT_13 var_473_arg_1 = var_472; [L1158] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1159] SORT_1 var_474_arg_0 = input_6; [L1160] SORT_1 var_474_arg_1 = var_473; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_474_arg_0=0, var_474_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] EXPR var_474_arg_0 & var_474_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1162] EXPR var_474 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1162] var_474 = var_474 & mask_SORT_1 [L1163] SORT_1 var_669_arg_0 = var_474; [L1164] SORT_3 var_669_arg_1 = input_4; [L1165] SORT_3 var_669_arg_2 = state_156; [L1166] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1167] SORT_1 var_670_arg_0 = input_7; [L1168] SORT_3 var_670_arg_1 = var_582; [L1169] SORT_3 var_670_arg_2 = var_669; [L1170] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1171] SORT_3 next_671_arg_1 = var_670; [L1172] SORT_162 var_465_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_465_arg_0=3, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1173] EXPR var_465_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1173] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1174] SORT_13 var_465 = var_465_arg_0; [L1175] SORT_13 var_466_arg_0 = var_283; [L1176] SORT_13 var_466_arg_1 = var_465; [L1177] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1178] SORT_1 var_467_arg_0 = input_6; [L1179] SORT_1 var_467_arg_1 = var_466; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_467_arg_0=0, var_467_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] EXPR var_467_arg_0 & var_467_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1181] EXPR var_467 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1181] var_467 = var_467 & mask_SORT_1 [L1182] SORT_1 var_672_arg_0 = var_467; [L1183] SORT_3 var_672_arg_1 = input_4; [L1184] SORT_3 var_672_arg_2 = state_161; [L1185] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1186] SORT_1 var_673_arg_0 = input_7; [L1187] SORT_3 var_673_arg_1 = var_582; [L1188] SORT_3 var_673_arg_2 = var_672; [L1189] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1190] SORT_3 next_674_arg_1 = var_673; [L1191] SORT_162 var_438_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_438_arg_0=2, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1192] EXPR var_438_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1192] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1193] SORT_13 var_438 = var_438_arg_0; [L1194] SORT_13 var_439_arg_0 = var_283; [L1195] SORT_13 var_439_arg_1 = var_438; [L1196] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1197] SORT_1 var_440_arg_0 = input_6; [L1198] SORT_1 var_440_arg_1 = var_439; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_440_arg_0=0, var_440_arg_1=1, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] EXPR var_440_arg_0 & var_440_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1200] EXPR var_440 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1200] var_440 = var_440 & mask_SORT_1 [L1201] SORT_1 var_675_arg_0 = var_440; [L1202] SORT_3 var_675_arg_1 = input_4; [L1203] SORT_3 var_675_arg_2 = state_167; [L1204] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1205] SORT_1 var_676_arg_0 = input_7; [L1206] SORT_3 var_676_arg_1 = var_582; [L1207] SORT_3 var_676_arg_2 = var_675; [L1208] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1209] SORT_3 next_677_arg_1 = var_676; [L1210] SORT_1 var_361_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_361_arg_0=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1211] EXPR var_361_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1211] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1212] SORT_13 var_361 = var_361_arg_0; [L1213] SORT_13 var_362_arg_0 = var_283; [L1214] SORT_13 var_362_arg_1 = var_361; [L1215] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1216] SORT_1 var_363_arg_0 = input_6; [L1217] SORT_1 var_363_arg_1 = var_362; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_363_arg_0=0, var_363_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] EXPR var_363_arg_0 & var_363_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1219] EXPR var_363 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1219] var_363 = var_363 & mask_SORT_1 [L1220] SORT_1 var_678_arg_0 = var_363; [L1221] SORT_3 var_678_arg_1 = input_4; [L1222] SORT_3 var_678_arg_2 = state_172; [L1223] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1224] SORT_1 var_679_arg_0 = input_7; [L1225] SORT_3 var_679_arg_1 = var_582; [L1226] SORT_3 var_679_arg_2 = var_678; [L1227] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1228] SORT_3 next_680_arg_1 = var_679; [L1229] SORT_13 var_284_arg_0 = var_283; [L1230] SORT_1 var_284 = var_284_arg_0 != 0; [L1231] SORT_1 var_285_arg_0 = var_284; [L1232] SORT_1 var_285 = ~var_285_arg_0; [L1233] SORT_1 var_286_arg_0 = input_6; [L1234] SORT_1 var_286_arg_1 = var_285; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_286_arg_0=0, var_286_arg_1=-1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1236] EXPR var_286 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1236] var_286 = var_286 & mask_SORT_1 [L1237] SORT_1 var_681_arg_0 = var_286; [L1238] SORT_3 var_681_arg_1 = input_4; [L1239] SORT_3 var_681_arg_2 = state_177; [L1240] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1241] SORT_1 var_682_arg_0 = input_7; [L1242] SORT_3 var_682_arg_1 = var_582; [L1243] SORT_3 var_682_arg_2 = var_681; [L1244] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1245] SORT_3 next_683_arg_1 = var_682; [L1246] SORT_1 var_684_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_684_arg_0=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1247] EXPR var_684_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1247] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1248] SORT_11 var_684 = var_684_arg_0; [L1249] SORT_11 var_685_arg_0 = state_182; [L1250] SORT_11 var_685_arg_1 = var_684; [L1251] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1252] SORT_1 var_686_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_686_arg_0=256, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1253] EXPR var_686_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1253] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1254] SORT_11 var_686 = var_686_arg_0; [L1255] SORT_11 var_687_arg_0 = var_685; [L1256] SORT_11 var_687_arg_1 = var_686; [L1257] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1258] SORT_1 var_688_arg_0 = input_7; [L1259] SORT_11 var_688_arg_1 = var_203; [L1260] SORT_11 var_688_arg_2 = var_687; [L1261] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_688=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1262] EXPR var_688 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1262] var_688 = var_688 & mask_SORT_11 [L1263] SORT_11 next_689_arg_1 = var_688; [L1264] SORT_1 var_542_arg_0 = state_190; [L1265] SORT_1 var_542 = ~var_542_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=-1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1266] EXPR var_542 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1266] var_542 = var_542 & mask_SORT_1 [L1267] SORT_1 var_538_arg_0 = input_8; [L1268] SORT_1 var_538_arg_1 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538_arg_0=0, var_538_arg_1=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1269] EXPR var_538_arg_0 & var_538_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1269] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1270] SORT_1 var_539_arg_0 = state_190; [L1271] SORT_1 var_539_arg_1 = var_538; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_539_arg_0=0, var_539_arg_1=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1272] EXPR var_539_arg_0 | var_539_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1272] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1273] SORT_1 var_690_arg_0 = var_542; [L1274] SORT_1 var_690_arg_1 = var_539; [L1275] SORT_1 var_690_arg_2 = state_190; [L1276] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1277] SORT_1 var_691_arg_0 = input_7; [L1278] SORT_1 var_691_arg_1 = var_233; [L1279] SORT_1 var_691_arg_2 = var_690; [L1280] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1281] SORT_1 next_692_arg_1 = var_691; [L1282] SORT_1 var_550_arg_0 = var_207; [L1283] SORT_1 var_550_arg_1 = state_191; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_550_arg_0=0, var_550_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1284] EXPR var_550_arg_0 | var_550_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1284] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1285] SORT_1 var_693_arg_0 = var_173; [L1286] SORT_1 var_693_arg_1 = var_550; [L1287] SORT_1 var_693_arg_2 = state_191; [L1288] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1289] SORT_1 var_694_arg_0 = input_7; [L1290] SORT_1 var_694_arg_1 = var_233; [L1291] SORT_1 var_694_arg_2 = var_693; [L1292] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1293] SORT_1 next_695_arg_1 = var_694; [L1294] SORT_1 var_562_arg_0 = input_6; [L1295] SORT_1 var_562_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_562_arg_0=0, var_562_arg_1=256, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1296] EXPR var_562_arg_0 | var_562_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1296] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1297] SORT_1 var_563_arg_0 = var_562; [L1298] SORT_1 var_563_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_563_arg_0=0, var_563_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1299] EXPR var_563_arg_0 | var_563_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1299] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1300] SORT_1 var_564_arg_0 = var_563; [L1301] SORT_1 var_564_arg_1 = state_190; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_564_arg_0=0, var_564_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] EXPR var_564_arg_0 | var_564_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1303] EXPR var_564 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1303] var_564 = var_564 & mask_SORT_1 [L1304] SORT_1 var_696_arg_0 = var_564; [L1305] SORT_11 var_696_arg_1 = var_204; [L1306] SORT_11 var_696_arg_2 = state_194; [L1307] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1308] SORT_1 var_697_arg_0 = input_7; [L1309] SORT_11 var_697_arg_1 = var_203; [L1310] SORT_11 var_697_arg_2 = var_696; [L1311] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_697=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1312] EXPR var_697 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1312] var_697 = var_697 & mask_SORT_11 [L1313] SORT_11 next_698_arg_1 = var_697; [L1314] SORT_1 var_547_arg_0 = var_538; [L1315] SORT_1 var_547_arg_1 = var_542; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_547_arg_0=0, var_547_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] EXPR var_547_arg_0 & var_547_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1317] EXPR var_547 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1317] var_547 = var_547 & mask_SORT_1 [L1318] SORT_1 var_699_arg_0 = var_547; [L1319] SORT_3 var_699_arg_1 = input_4; [L1320] SORT_3 var_699_arg_2 = state_209; [L1321] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1322] SORT_1 var_700_arg_0 = input_7; [L1323] SORT_3 var_700_arg_1 = var_582; [L1324] SORT_3 var_700_arg_2 = var_699; [L1325] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_700=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1326] EXPR var_700 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1326] var_700 = var_700 & mask_SORT_3 [L1327] SORT_3 next_701_arg_1 = var_700; [L1328] SORT_1 next_702_arg_1 = var_233; [L1329] SORT_1 var_518_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_518_arg_0=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1330] EXPR var_518_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1330] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1331] SORT_11 var_518 = var_518_arg_0; [L1332] SORT_11 var_519_arg_0 = state_282; [L1333] SORT_11 var_519_arg_1 = var_518; [L1334] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1335] SORT_1 var_703_arg_0 = var_242; [L1336] SORT_11 var_703_arg_1 = var_519; [L1337] SORT_11 var_703_arg_2 = state_282; [L1338] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1339] SORT_1 var_704_arg_0 = input_7; [L1340] SORT_11 var_704_arg_1 = var_203; [L1341] SORT_11 var_704_arg_2 = var_703; [L1342] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1343] SORT_11 next_705_arg_1 = var_704; [L1345] state_10 = next_584_arg_1 [L1346] state_12 = next_587_arg_1 [L1347] state_18 = next_590_arg_1 [L1348] state_24 = next_593_arg_1 [L1349] state_29 = next_596_arg_1 [L1350] state_34 = next_599_arg_1 [L1351] state_39 = next_602_arg_1 [L1352] state_44 = next_605_arg_1 [L1353] state_49 = next_608_arg_1 [L1354] state_54 = next_611_arg_1 [L1355] state_59 = next_614_arg_1 [L1356] state_64 = next_617_arg_1 [L1357] state_69 = next_620_arg_1 [L1358] state_74 = next_623_arg_1 [L1359] state_79 = next_626_arg_1 [L1360] state_84 = next_629_arg_1 [L1361] state_89 = next_632_arg_1 [L1362] state_94 = next_635_arg_1 [L1363] state_99 = next_638_arg_1 [L1364] state_105 = next_641_arg_1 [L1365] state_110 = next_644_arg_1 [L1366] state_115 = next_647_arg_1 [L1367] state_120 = next_650_arg_1 [L1368] state_125 = next_653_arg_1 [L1369] state_130 = next_656_arg_1 [L1370] state_135 = next_659_arg_1 [L1371] state_140 = next_662_arg_1 [L1372] state_146 = next_665_arg_1 [L1373] state_151 = next_668_arg_1 [L1374] state_156 = next_671_arg_1 [L1375] state_161 = next_674_arg_1 [L1376] state_167 = next_677_arg_1 [L1377] state_172 = next_680_arg_1 [L1378] state_177 = next_683_arg_1 [L1379] state_182 = next_689_arg_1 [L1380] state_190 = next_692_arg_1 [L1381] state_191 = next_695_arg_1 [L1382] state_194 = next_698_arg_1 [L1383] state_209 = next_701_arg_1 [L1384] state_213 = next_702_arg_1 [L1385] state_282 = next_705_arg_1 [L143] input_2 = __VERIFIER_nondet_uchar() [L144] input_4 = __VERIFIER_nondet_uint128() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L148] input_7 = input_7 & mask_SORT_1 [L149] input_8 = __VERIFIER_nondet_uchar() [L150] input_9 = __VERIFIER_nondet_uint128() [L151] input_231 = __VERIFIER_nondet_uchar() [L153] SORT_1 var_215_arg_0 = input_7; [L154] SORT_1 var_215_arg_1 = state_213; [L155] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L156] SORT_1 var_216_arg_0 = var_173; [L157] SORT_1 var_216 = ~var_216_arg_0; [L158] SORT_1 var_217_arg_0 = var_215; [L159] SORT_1 var_217_arg_1 = var_216; VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L161] EXPR var_217 & mask_SORT_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L161] var_217 = var_217 & mask_SORT_1 [L162] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L163] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L165] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L165] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L166] SORT_11 var_187 = var_187_arg_0; [L167] SORT_11 var_188_arg_0 = state_182; [L168] SORT_11 var_188_arg_1 = var_187; [L169] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L170] SORT_1 var_219_arg_0 = var_188; [L171] SORT_1 var_219 = ~var_219_arg_0; [L172] SORT_1 var_220_arg_0 = input_6; [L173] SORT_1 var_220 = ~var_220_arg_0; [L174] SORT_1 var_221_arg_0 = var_219; [L175] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L176] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L176] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L177] SORT_1 var_222_arg_0 = var_173; [L178] SORT_1 var_222 = ~var_222_arg_0; [L179] SORT_1 var_223_arg_0 = var_221; [L180] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L182] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L182] var_223 = var_223 & mask_SORT_1 [L183] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L184] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L185] SORT_11 var_183_arg_0 = state_182; [L186] SORT_1 var_183 = var_183_arg_0 != 0; [L187] SORT_1 var_184_arg_0 = var_183; [L188] SORT_1 var_184 = ~var_184_arg_0; [L189] SORT_1 var_225_arg_0 = var_184; [L190] SORT_1 var_225 = ~var_225_arg_0; [L191] SORT_1 var_226_arg_0 = input_5; [L192] SORT_1 var_226 = ~var_226_arg_0; [L193] SORT_1 var_227_arg_0 = var_225; [L194] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L195] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L195] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L196] SORT_1 var_228_arg_0 = var_173; [L197] SORT_1 var_228 = ~var_228_arg_0; [L198] SORT_1 var_229_arg_0 = var_227; [L199] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=254, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L201] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L201] var_229 = var_229 & mask_SORT_1 [L202] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L203] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L23] COND FALSE !(!cond) VAL [\old(cond)=1] [L203] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L205] SORT_1 var_234_arg_0 = state_213; [L206] SORT_1 var_234_arg_1 = var_233; [L207] SORT_1 var_234_arg_2 = var_173; [L208] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L209] SORT_1 var_192_arg_0 = state_191; [L210] SORT_1 var_192 = ~var_192_arg_0; [L211] SORT_1 var_193_arg_0 = state_190; [L212] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L213] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L213] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L214] SORT_11 var_195_arg_0 = state_194; [L215] SORT_1 var_195 = var_195_arg_0 != 0; [L216] SORT_1 var_196_arg_0 = var_193; [L217] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L218] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L218] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L219] SORT_1 var_197_arg_0 = state_190; [L220] SORT_1 var_197 = ~var_197_arg_0; [L221] SORT_1 var_198_arg_0 = input_6; [L222] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L223] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L223] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L224] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L225] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L225] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L226] SORT_11 var_199 = var_199_arg_0; [L227] SORT_11 var_200_arg_0 = state_194; [L228] SORT_11 var_200_arg_1 = var_199; [L229] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L230] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=257, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L231] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L231] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L232] SORT_11 var_201 = var_201_arg_0; [L233] SORT_11 var_202_arg_0 = var_200; [L234] SORT_11 var_202_arg_1 = var_201; [L235] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L236] SORT_1 var_204_arg_0 = input_7; [L237] SORT_11 var_204_arg_1 = var_203; [L238] SORT_11 var_204_arg_2 = var_202; [L239] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L240] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L240] var_204 = var_204 & mask_SORT_11 [L241] SORT_11 var_205_arg_0 = var_204; [L242] SORT_1 var_205 = var_205_arg_0 != 0; [L243] SORT_1 var_206_arg_0 = var_205; [L244] SORT_1 var_206 = ~var_206_arg_0; [L245] SORT_1 var_207_arg_0 = var_196; [L246] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L247] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L247] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L248] SORT_1 var_208_arg_0 = var_207; [L249] SORT_1 var_208 = ~var_208_arg_0; [L250] SORT_11 var_14_arg_0 = state_12; [L251] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L252] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L252] var_14 = var_14 & mask_SORT_13 [L253] SORT_13 var_178_arg_0 = var_14; [L254] SORT_1 var_178 = var_178_arg_0 != 0; [L255] SORT_1 var_179_arg_0 = var_178; [L256] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L257] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L257] var_179 = var_179 & mask_SORT_1 [L258] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L259] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L259] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L260] SORT_13 var_174 = var_174_arg_0; [L261] SORT_13 var_175_arg_0 = var_14; [L262] SORT_13 var_175_arg_1 = var_174; [L263] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L264] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L265] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L265] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L266] SORT_13 var_169 = var_169_arg_0; [L267] SORT_13 var_170_arg_0 = var_14; [L268] SORT_13 var_170_arg_1 = var_169; [L269] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L270] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L271] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L271] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L272] SORT_13 var_164 = var_164_arg_0; [L273] SORT_13 var_165_arg_0 = var_14; [L274] SORT_13 var_165_arg_1 = var_164; [L275] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L276] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L277] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L277] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L278] SORT_13 var_158 = var_158_arg_0; [L279] SORT_13 var_159_arg_0 = var_14; [L280] SORT_13 var_159_arg_1 = var_158; [L281] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L282] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L283] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L283] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L284] SORT_13 var_153 = var_153_arg_0; [L285] SORT_13 var_154_arg_0 = var_14; [L286] SORT_13 var_154_arg_1 = var_153; [L287] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L288] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L289] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L289] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L290] SORT_13 var_148 = var_148_arg_0; [L291] SORT_13 var_149_arg_0 = var_14; [L292] SORT_13 var_149_arg_1 = var_148; [L293] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L294] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L295] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L295] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L296] SORT_13 var_143 = var_143_arg_0; [L297] SORT_13 var_144_arg_0 = var_14; [L298] SORT_13 var_144_arg_1 = var_143; [L299] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L300] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L301] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L301] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L302] SORT_13 var_137 = var_137_arg_0; [L303] SORT_13 var_138_arg_0 = var_14; [L304] SORT_13 var_138_arg_1 = var_137; [L305] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L306] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L307] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L307] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L308] SORT_13 var_132 = var_132_arg_0; [L309] SORT_13 var_133_arg_0 = var_14; [L310] SORT_13 var_133_arg_1 = var_132; [L311] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L312] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L313] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L313] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L314] SORT_13 var_127 = var_127_arg_0; [L315] SORT_13 var_128_arg_0 = var_14; [L316] SORT_13 var_128_arg_1 = var_127; [L317] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L318] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L319] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L319] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L320] SORT_13 var_122 = var_122_arg_0; [L321] SORT_13 var_123_arg_0 = var_14; [L322] SORT_13 var_123_arg_1 = var_122; [L323] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L324] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L325] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L325] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L326] SORT_13 var_117 = var_117_arg_0; [L327] SORT_13 var_118_arg_0 = var_14; [L328] SORT_13 var_118_arg_1 = var_117; [L329] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L330] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L331] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L331] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L332] SORT_13 var_112 = var_112_arg_0; [L333] SORT_13 var_113_arg_0 = var_14; [L334] SORT_13 var_113_arg_1 = var_112; [L335] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L336] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L337] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L337] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L338] SORT_13 var_107 = var_107_arg_0; [L339] SORT_13 var_108_arg_0 = var_14; [L340] SORT_13 var_108_arg_1 = var_107; [L341] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L342] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L343] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L343] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L344] SORT_13 var_102 = var_102_arg_0; [L345] SORT_13 var_103_arg_0 = var_14; [L346] SORT_13 var_103_arg_1 = var_102; [L347] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L348] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L349] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L349] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L350] SORT_13 var_96 = var_96_arg_0; [L351] SORT_13 var_97_arg_0 = var_14; [L352] SORT_13 var_97_arg_1 = var_96; [L353] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L354] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L355] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L355] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L356] SORT_13 var_91 = var_91_arg_0; [L357] SORT_13 var_92_arg_0 = var_14; [L358] SORT_13 var_92_arg_1 = var_91; [L359] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L360] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=1, var_95=16, var_97=0] [L361] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=1, var_95=16, var_97=0] [L361] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L362] SORT_13 var_86 = var_86_arg_0; [L363] SORT_13 var_87_arg_0 = var_14; [L364] SORT_13 var_87_arg_1 = var_86; [L365] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L366] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L367] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L367] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L368] SORT_13 var_81 = var_81_arg_0; [L369] SORT_13 var_82_arg_0 = var_14; [L370] SORT_13 var_82_arg_1 = var_81; [L371] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L372] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L373] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L373] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L374] SORT_13 var_76 = var_76_arg_0; [L375] SORT_13 var_77_arg_0 = var_14; [L376] SORT_13 var_77_arg_1 = var_76; [L377] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L378] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L379] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L379] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L380] SORT_13 var_71 = var_71_arg_0; [L381] SORT_13 var_72_arg_0 = var_14; [L382] SORT_13 var_72_arg_1 = var_71; [L383] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L384] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L385] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L385] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L386] SORT_13 var_66 = var_66_arg_0; [L387] SORT_13 var_67_arg_0 = var_14; [L388] SORT_13 var_67_arg_1 = var_66; [L389] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L390] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L391] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L391] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L392] SORT_13 var_61 = var_61_arg_0; [L393] SORT_13 var_62_arg_0 = var_14; [L394] SORT_13 var_62_arg_1 = var_61; [L395] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L396] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L397] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L397] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L398] SORT_13 var_56 = var_56_arg_0; [L399] SORT_13 var_57_arg_0 = var_14; [L400] SORT_13 var_57_arg_1 = var_56; [L401] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L402] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L403] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L403] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L404] SORT_13 var_51 = var_51_arg_0; [L405] SORT_13 var_52_arg_0 = var_14; [L406] SORT_13 var_52_arg_1 = var_51; [L407] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L408] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L409] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L409] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L410] SORT_13 var_46 = var_46_arg_0; [L411] SORT_13 var_47_arg_0 = var_14; [L412] SORT_13 var_47_arg_1 = var_46; [L413] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L414] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L415] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L415] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L416] SORT_13 var_41 = var_41_arg_0; [L417] SORT_13 var_42_arg_0 = var_14; [L418] SORT_13 var_42_arg_1 = var_41; [L419] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L420] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L421] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L421] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L422] SORT_13 var_36 = var_36_arg_0; [L423] SORT_13 var_37_arg_0 = var_14; [L424] SORT_13 var_37_arg_1 = var_36; [L425] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L426] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L427] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L427] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L428] SORT_13 var_31 = var_31_arg_0; [L429] SORT_13 var_32_arg_0 = var_14; [L430] SORT_13 var_32_arg_1 = var_31; [L431] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L432] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L433] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L433] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L434] SORT_13 var_26 = var_26_arg_0; [L435] SORT_13 var_27_arg_0 = var_14; [L436] SORT_13 var_27_arg_1 = var_26; [L437] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L438] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L439] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=1, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=1, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L439] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L440] SORT_13 var_21 = var_21_arg_0; [L441] SORT_13 var_22_arg_0 = var_14; [L442] SORT_13 var_22_arg_1 = var_21; [L443] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L444] SORT_13 var_16_arg_0 = var_14; [L445] SORT_13 var_16_arg_1 = var_15; [L446] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L447] SORT_1 var_17_arg_0 = var_16; [L448] SORT_3 var_17_arg_1 = state_10; [L449] SORT_3 var_17_arg_2 = input_9; [L450] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L451] SORT_1 var_23_arg_0 = var_22; [L452] SORT_3 var_23_arg_1 = state_18; [L453] SORT_3 var_23_arg_2 = var_17; [L454] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L455] SORT_1 var_28_arg_0 = var_27; [L456] SORT_3 var_28_arg_1 = state_24; [L457] SORT_3 var_28_arg_2 = var_23; [L458] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L459] SORT_1 var_33_arg_0 = var_32; [L460] SORT_3 var_33_arg_1 = state_29; [L461] SORT_3 var_33_arg_2 = var_28; [L462] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L463] SORT_1 var_38_arg_0 = var_37; [L464] SORT_3 var_38_arg_1 = state_34; [L465] SORT_3 var_38_arg_2 = var_33; [L466] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L467] SORT_1 var_43_arg_0 = var_42; [L468] SORT_3 var_43_arg_1 = state_39; [L469] SORT_3 var_43_arg_2 = var_38; [L470] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L471] SORT_1 var_48_arg_0 = var_47; [L472] SORT_3 var_48_arg_1 = state_44; [L473] SORT_3 var_48_arg_2 = var_43; [L474] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L475] SORT_1 var_53_arg_0 = var_52; [L476] SORT_3 var_53_arg_1 = state_49; [L477] SORT_3 var_53_arg_2 = var_48; [L478] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L479] SORT_1 var_58_arg_0 = var_57; [L480] SORT_3 var_58_arg_1 = state_54; [L481] SORT_3 var_58_arg_2 = var_53; [L482] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L483] SORT_1 var_63_arg_0 = var_62; [L484] SORT_3 var_63_arg_1 = state_59; [L485] SORT_3 var_63_arg_2 = var_58; [L486] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L487] SORT_1 var_68_arg_0 = var_67; [L488] SORT_3 var_68_arg_1 = state_64; [L489] SORT_3 var_68_arg_2 = var_63; [L490] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L491] SORT_1 var_73_arg_0 = var_72; [L492] SORT_3 var_73_arg_1 = state_69; [L493] SORT_3 var_73_arg_2 = var_68; [L494] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L495] SORT_1 var_78_arg_0 = var_77; [L496] SORT_3 var_78_arg_1 = state_74; [L497] SORT_3 var_78_arg_2 = var_73; [L498] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L499] SORT_1 var_83_arg_0 = var_82; [L500] SORT_3 var_83_arg_1 = state_79; [L501] SORT_3 var_83_arg_2 = var_78; [L502] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L503] SORT_1 var_88_arg_0 = var_87; [L504] SORT_3 var_88_arg_1 = state_84; [L505] SORT_3 var_88_arg_2 = var_83; [L506] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L507] SORT_1 var_93_arg_0 = var_92; [L508] SORT_3 var_93_arg_1 = state_89; [L509] SORT_3 var_93_arg_2 = var_88; [L510] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L511] SORT_1 var_98_arg_0 = var_97; [L512] SORT_3 var_98_arg_1 = state_94; [L513] SORT_3 var_98_arg_2 = var_93; [L514] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L515] SORT_1 var_104_arg_0 = var_103; [L516] SORT_3 var_104_arg_1 = state_99; [L517] SORT_3 var_104_arg_2 = var_98; [L518] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L519] SORT_1 var_109_arg_0 = var_108; [L520] SORT_3 var_109_arg_1 = state_105; [L521] SORT_3 var_109_arg_2 = var_104; [L522] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L523] SORT_1 var_114_arg_0 = var_113; [L524] SORT_3 var_114_arg_1 = state_110; [L525] SORT_3 var_114_arg_2 = var_109; [L526] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L527] SORT_1 var_119_arg_0 = var_118; [L528] SORT_3 var_119_arg_1 = state_115; [L529] SORT_3 var_119_arg_2 = var_114; [L530] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L531] SORT_1 var_124_arg_0 = var_123; [L532] SORT_3 var_124_arg_1 = state_120; [L533] SORT_3 var_124_arg_2 = var_119; [L534] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L535] SORT_1 var_129_arg_0 = var_128; [L536] SORT_3 var_129_arg_1 = state_125; [L537] SORT_3 var_129_arg_2 = var_124; [L538] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L539] SORT_1 var_134_arg_0 = var_133; [L540] SORT_3 var_134_arg_1 = state_130; [L541] SORT_3 var_134_arg_2 = var_129; [L542] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L543] SORT_1 var_139_arg_0 = var_138; [L544] SORT_3 var_139_arg_1 = state_135; [L545] SORT_3 var_139_arg_2 = var_134; [L546] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L547] SORT_1 var_145_arg_0 = var_144; [L548] SORT_3 var_145_arg_1 = state_140; [L549] SORT_3 var_145_arg_2 = var_139; [L550] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L551] SORT_1 var_150_arg_0 = var_149; [L552] SORT_3 var_150_arg_1 = state_146; [L553] SORT_3 var_150_arg_2 = var_145; [L554] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L555] SORT_1 var_155_arg_0 = var_154; [L556] SORT_3 var_155_arg_1 = state_151; [L557] SORT_3 var_155_arg_2 = var_150; [L558] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L559] SORT_1 var_160_arg_0 = var_159; [L560] SORT_3 var_160_arg_1 = state_156; [L561] SORT_3 var_160_arg_2 = var_155; [L562] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L563] SORT_1 var_166_arg_0 = var_165; [L564] SORT_3 var_166_arg_1 = state_161; [L565] SORT_3 var_166_arg_2 = var_160; [L566] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L567] SORT_1 var_171_arg_0 = var_170; [L568] SORT_3 var_171_arg_1 = state_167; [L569] SORT_3 var_171_arg_2 = var_166; [L570] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L571] SORT_1 var_176_arg_0 = var_175; [L572] SORT_3 var_176_arg_1 = state_172; [L573] SORT_3 var_176_arg_2 = var_171; [L574] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L575] SORT_1 var_180_arg_0 = var_179; [L576] SORT_3 var_180_arg_1 = state_177; [L577] SORT_3 var_180_arg_2 = var_176; [L578] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L579] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L579] var_180 = var_180 & mask_SORT_3 [L580] SORT_3 var_210_arg_0 = state_209; [L581] SORT_3 var_210_arg_1 = var_180; [L582] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L583] SORT_1 var_211_arg_0 = var_208; [L584] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=1, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L585] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L585] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L586] SORT_1 var_232_arg_0 = state_213; [L587] SORT_1 var_232_arg_1 = input_231; [L588] SORT_1 var_232_arg_2 = var_211; [L589] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L590] SORT_1 var_235_arg_0 = var_232; [L591] SORT_1 var_235 = ~var_235_arg_0; [L592] SORT_1 var_236_arg_0 = var_234; [L593] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=1, var_236_arg_1=-1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L595] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L595] var_236 = var_236 & mask_SORT_1 [L596] SORT_1 bad_237_arg_0 = var_236; [L597] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L22] COND TRUE !(cond) [L22] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 872 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 638.4s, OverallIterations: 148, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.5s, AutomataDifference: 146.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 288800 SdHoareTripleChecker+Valid, 93.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 288555 mSDsluCounter, 703704 SdHoareTripleChecker+Invalid, 80.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 528160 mSDsCounter, 432 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 169093 IncrementalHoareTripleChecker+Invalid, 169525 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 432 mSolverCounterUnsat, 175544 mSDtfsCounter, 169093 mSolverCounterSat, 1.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 14971 GetRequests, 13537 SyntacticMatches, 2 SemanticMatches, 1432 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74675 ImplicationChecksByTransitivity, 49.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=40220occurred in iteration=147, InterpolantAutomatonStates: 1196, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.7s AutomataMinimizationTime, 147 MinimizatonAttempts, 204129 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 5.7s SsaConstructionTime, 197.5s SatisfiabilityAnalysisTime, 194.9s InterpolantComputationTime, 87651 NumberOfCodeBlocks, 87651 NumberOfCodeBlocksAsserted, 161 NumberOfCheckSat, 90600 ConstructedInterpolants, 0 QuantifiedInterpolants, 595811 SizeOfPredicates, 89 NumberOfNonLiveVariables, 59121 ConjunctsInSsa, 837 ConjunctsInUnsatCore, 165 InterpolantComputations, 143 PerfectInterpolantSequences, 23176/24692 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 06:13:40,170 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 06:13:42,225 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 06:13:42,301 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 06:13:42,307 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 06:13:42,308 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 06:13:42,331 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 06:13:42,331 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 06:13:42,331 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 06:13:42,332 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 06:13:42,332 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 06:13:42,332 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 06:13:42,332 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 06:13:42,332 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 06:13:42,333 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 06:13:42,333 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 06:13:42,333 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 06:13:42,333 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 06:13:42,333 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 06:13:42,333 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 06:13:42,334 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 06:13:42,334 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:13:42,335 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 06:13:42,335 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:13:42,335 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 06:13:42,336 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 06:13:42,337 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3dcfde8a71d42fe3baf4d2089c86bd7d84b36e1d1bc23ee26c9bd4a8e8f007b4 [2024-12-02 06:13:42,561 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 06:13:42,567 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 06:13:42,569 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 06:13:42,570 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 06:13:42,571 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 06:13:42,572 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:13:45,251 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/56eea18b8/b44981b77a0c4369a09bacb5f834daf9/FLAGec9ba517e [2024-12-02 06:13:45,494 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 06:13:45,495 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:13:45,508 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/56eea18b8/b44981b77a0c4369a09bacb5f834daf9/FLAGec9ba517e [2024-12-02 06:13:45,525 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/data/56eea18b8/b44981b77a0c4369a09bacb5f834daf9 [2024-12-02 06:13:45,528 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 06:13:45,529 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 06:13:45,531 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 06:13:45,531 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 06:13:45,536 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 06:13:45,537 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 06:13:45" (1/1) ... [2024-12-02 06:13:45,538 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@d416576 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:45, skipping insertion in model container [2024-12-02 06:13:45,538 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 06:13:45" (1/1) ... [2024-12-02 06:13:45,581 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 06:13:45,738 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-12-02 06:13:45,937 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 06:13:45,949 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 06:13:45,956 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c[1335,1348] [2024-12-02 06:13:46,059 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 06:13:46,073 INFO L204 MainTranslator]: Completed translation [2024-12-02 06:13:46,073 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46 WrapperNode [2024-12-02 06:13:46,073 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 06:13:46,074 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 06:13:46,074 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 06:13:46,074 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 06:13:46,079 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,102 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,162 INFO L138 Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-12-02 06:13:46,163 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 06:13:46,163 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 06:13:46,163 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 06:13:46,163 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 06:13:46,170 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,170 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,178 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,202 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 06:13:46,202 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,203 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,247 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,251 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,255 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,260 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,265 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,276 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 06:13:46,277 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 06:13:46,277 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 06:13:46,277 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 06:13:46,279 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (1/1) ... [2024-12-02 06:13:46,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 06:13:46,296 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:13:46,306 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 06:13:46,308 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 06:13:46,327 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 06:13:46,327 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 06:13:46,327 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 06:13:46,327 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 06:13:46,327 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 06:13:46,327 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 06:13:46,592 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 06:13:46,594 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 06:13:47,833 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-12-02 06:13:47,834 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 06:13:47,840 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 06:13:47,840 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 06:13:47,840 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 06:13:47 BoogieIcfgContainer [2024-12-02 06:13:47,840 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 06:13:47,842 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 06:13:47,842 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 06:13:47,846 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 06:13:47,846 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 06:13:45" (1/3) ... [2024-12-02 06:13:47,846 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47928b2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 06:13:47, skipping insertion in model container [2024-12-02 06:13:47,847 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 06:13:46" (2/3) ... [2024-12-02 06:13:47,847 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47928b2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 06:13:47, skipping insertion in model container [2024-12-02 06:13:47,847 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 06:13:47" (3/3) ... [2024-12-02 06:13:47,848 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c [2024-12-02 06:13:47,858 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 06:13:47,860 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w128_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 06:13:47,895 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 06:13:47,905 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3a50b5bf, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 06:13:47,906 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 06:13:47,908 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 06:13:47,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 06:13:47,913 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:13:47,913 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 06:13:47,914 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:13:47,917 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:13:47,918 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 06:13:47,927 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 06:13:47,928 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [232050975] [2024-12-02 06:13:47,928 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:47,928 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:13:47,928 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:13:47,930 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:13:47,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 06:13:48,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:13:48,449 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 06:13:48,458 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:13:48,733 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 06:13:48,733 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:13:48,901 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 06:13:48,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [232050975] [2024-12-02 06:13:48,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [232050975] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:13:48,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1533300274] [2024-12-02 06:13:48,902 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:48,903 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 06:13:48,903 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 06:13:48,905 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 06:13:48,907 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 06:13:49,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:13:49,963 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 06:13:49,971 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:13:50,100 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 06:13:50,100 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 06:13:50,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1533300274] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 06:13:50,100 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 06:13:50,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 06:13:50,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836218768] [2024-12-02 06:13:50,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 06:13:50,107 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 06:13:50,107 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 06:13:50,125 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 06:13:50,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 06:13:50,128 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:13:50,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:13:50,543 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 06:13:50,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 06:13:50,545 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 06:13:50,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:13:50,551 INFO L225 Difference]: With dead ends: 43 [2024-12-02 06:13:50,551 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 06:13:50,554 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 06:13:50,557 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 06:13:50,558 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 06:13:50,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 06:13:50,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 06:13:50,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 06:13:50,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 06:13:50,593 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 06:13:50,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:13:50,594 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 06:13:50,594 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 06:13:50,594 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 06:13:50,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 06:13:50,596 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:13:50,596 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 06:13:50,608 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 06:13:50,805 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 06:13:50,997 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:13:50,997 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:13:50,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:13:50,998 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 06:13:50,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 06:13:50,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1385625586] [2024-12-02 06:13:50,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:50,999 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:13:50,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:13:51,001 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:13:51,002 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 06:13:51,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:13:51,714 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 06:13:51,727 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:13:52,230 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 06:13:52,230 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:13:52,420 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 06:13:52,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1385625586] [2024-12-02 06:13:52,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1385625586] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:13:52,420 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1018595921] [2024-12-02 06:13:52,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 06:13:52,420 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 06:13:52,420 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 06:13:52,422 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 06:13:52,424 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 06:13:54,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 06:13:54,325 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 06:13:54,336 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:13:54,635 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 06:13:54,635 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:13:54,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1018595921] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:13:54,763 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 06:13:54,763 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 06:13:54,763 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61777321] [2024-12-02 06:13:54,763 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 06:13:54,764 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 06:13:54,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 06:13:54,764 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 06:13:54,764 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 06:13:54,765 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:13:55,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 06:13:55,588 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 06:13:55,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 06:13:55,588 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 06:13:55,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 06:13:55,589 INFO L225 Difference]: With dead ends: 36 [2024-12-02 06:13:55,589 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 06:13:55,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 06:13:55,590 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 06:13:55,591 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 06:13:55,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 06:13:55,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 06:13:55,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 06:13:55,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 06:13:55,597 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 06:13:55,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 06:13:55,597 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 06:13:55,597 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 06:13:55,598 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 06:13:55,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 06:13:55,599 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 06:13:55,599 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 06:13:55,613 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 06:13:55,815 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 06:13:56,000 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 06:13:56,000 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 06:13:56,000 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 06:13:56,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 06:13:56,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 06:13:56,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [52401971] [2024-12-02 06:13:56,003 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 06:13:56,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:13:56,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 06:13:56,004 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 06:13:56,005 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 06:13:57,148 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 06:13:57,148 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 06:13:57,170 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-02 06:13:57,185 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:14:00,955 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 06:14:00,955 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:14:06,684 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse14 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_213~0#1|)) (.cse6 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32))))) (.cse4 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse0 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse2 (not .cse0)) (.cse5 (not .cse4)) (.cse8 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|)) (.cse7 (not .cse6)) (.cse11 (not .cse14)) (.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse12 (or (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_17|))))))))))))) .cse14))) (and (or (let ((.cse1 (not .cse8)) (.cse3 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 128))) (not (= (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|))))) (and (or (and (or .cse0 .cse1) (or .cse2 .cse3)) .cse4) (or .cse5 (and (or .cse6 .cse1) (or .cse7 .cse3))))) (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse10))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|)))))))))))))))))))))) .cse11) .cse12)) (or (let ((.cse13 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 128))) (= (bvand |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|)))) (and (or (and (or .cse2 .cse13) (or .cse0 .cse8)) .cse4) (or .cse5 (and (or .cse6 .cse8) (or .cse7 .cse13))))) (and (or .cse11 (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse10))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|))))))))) .cse12)))))) is different from false [2024-12-02 06:14:06,870 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 06:14:06,870 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [52401971] [2024-12-02 06:14:06,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [52401971] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:14:06,870 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1610442939] [2024-12-02 06:14:06,870 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 06:14:06,870 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 06:14:06,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 06:14:06,881 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 06:14:06,882 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 06:14:09,757 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 06:14:09,757 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 06:14:09,840 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 06:14:09,857 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 06:14:22,659 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 06:14:22,660 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 06:14:27,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1610442939] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 06:14:27,894 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 06:14:27,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-12-02 06:14:27,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138877578] [2024-12-02 06:14:27,895 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 06:14:27,895 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-12-02 06:14:27,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 06:14:27,896 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-12-02 06:14:27,896 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=225, Unknown=2, NotChecked=30, Total=306 [2024-12-02 06:14:27,896 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-12-02 06:14:33,707 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-12-02 06:14:35,142 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-12-02 06:14:35,142 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-12-02 06:14:35,143 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=59, Invalid=285, Unknown=2, NotChecked=34, Total=380 [2024-12-02 06:14:35,144 INFO L435 NwaCegarLoop]: 7 mSDtfsCounter, 6 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 7 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 43 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.5s IncrementalHoareTripleChecker+Time [2024-12-02 06:14:35,144 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 43 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 55 Invalid, 1 Unknown, 0 Unchecked, 5.5s Time] [2024-12-02 06:14:35,169 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-12-02 06:14:35,358 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 06:14:35,546 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 06:14:35,546 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:337) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:177) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:139) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:138) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.unAssertPostcondition(IncrementalHoareTripleChecker.java:665) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.clearAssertionStack(IncrementalHoareTripleChecker.java:269) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.releaseLock(IncrementalHoareTripleChecker.java:284) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.ChainingHoareTripleChecker$ProtectedHtc.releaseLock(ChainingHoareTripleChecker.java:449) at java.base/java.util.ArrayList$ArrayListSpliterator.forEachRemaining(ArrayList.java:1708) at java.base/java.util.stream.ReferencePipeline$Head.forEach(ReferencePipeline.java:762) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.ChainingHoareTripleChecker.releaseLock(ChainingHoareTripleChecker.java:98) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.hoaretriple.CachingHoareTripleChecker.releaseLock(CachingHoareTripleChecker.java:159) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.switchToReadonlyMode(AbstractInterpolantAutomaton.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.computeAutomataDifference(NwaCegarLoop.java:388) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.refineAbstraction(NwaCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.refineAbstractionInternal(AbstractCegarLoop.java:463) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: java.io.IOException: Stream closed at java.base/java.lang.ProcessBuilder$NullOutputStream.write(ProcessBuilder.java:447) at java.base/java.io.OutputStream.write(OutputStream.java:167) at java.base/java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:125) at java.base/java.io.BufferedOutputStream.implFlush(BufferedOutputStream.java:252) at java.base/java.io.BufferedOutputStream.flush(BufferedOutputStream.java:246) at java.base/sun.nio.cs.StreamEncoder.implFlush(StreamEncoder.java:412) at java.base/sun.nio.cs.StreamEncoder.lockedFlush(StreamEncoder.java:214) at java.base/sun.nio.cs.StreamEncoder.flush(StreamEncoder.java:201) at java.base/java.io.OutputStreamWriter.flush(OutputStreamWriter.java:262) at java.base/java.io.BufferedWriter.implFlush(BufferedWriter.java:372) at java.base/java.io.BufferedWriter.flush(BufferedWriter.java:359) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:175) ... 36 more [2024-12-02 06:14:35,550 INFO L158 Benchmark]: Toolchain (without parser) took 50021.32ms. Allocated memory was 92.3MB in the beginning and 604.0MB in the end (delta: 511.7MB). Free memory was 67.8MB in the beginning and 276.1MB in the end (delta: -208.3MB). Peak memory consumption was 304.4MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,551 INFO L158 Benchmark]: CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 46.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 06:14:35,551 INFO L158 Benchmark]: CACSL2BoogieTranslator took 542.38ms. Allocated memory is still 92.3MB. Free memory was 67.6MB in the beginning and 50.3MB in the end (delta: 17.3MB). Peak memory consumption was 31.6MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,551 INFO L158 Benchmark]: Boogie Procedure Inliner took 88.96ms. Allocated memory is still 92.3MB. Free memory was 50.3MB in the beginning and 40.2MB in the end (delta: 10.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,552 INFO L158 Benchmark]: Boogie Preprocessor took 112.91ms. Allocated memory is still 92.3MB. Free memory was 40.2MB in the beginning and 58.4MB in the end (delta: -18.2MB). Peak memory consumption was 12.5MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,552 INFO L158 Benchmark]: RCFGBuilder took 1563.81ms. Allocated memory was 92.3MB in the beginning and 142.6MB in the end (delta: 50.3MB). Free memory was 58.4MB in the beginning and 104.6MB in the end (delta: -46.3MB). Peak memory consumption was 83.5MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,552 INFO L158 Benchmark]: TraceAbstraction took 47707.85ms. Allocated memory was 142.6MB in the beginning and 604.0MB in the end (delta: 461.4MB). Free memory was 103.3MB in the beginning and 276.1MB in the end (delta: -172.8MB). Peak memory consumption was 287.4MB. Max. memory is 16.1GB. [2024-12-02 06:14:35,554 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 46.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 542.38ms. Allocated memory is still 92.3MB. Free memory was 67.6MB in the beginning and 50.3MB in the end (delta: 17.3MB). Peak memory consumption was 31.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 88.96ms. Allocated memory is still 92.3MB. Free memory was 50.3MB in the beginning and 40.2MB in the end (delta: 10.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 112.91ms. Allocated memory is still 92.3MB. Free memory was 40.2MB in the beginning and 58.4MB in the end (delta: -18.2MB). Peak memory consumption was 12.5MB. Max. memory is 16.1GB. * RCFGBuilder took 1563.81ms. Allocated memory was 92.3MB in the beginning and 142.6MB in the end (delta: 50.3MB). Free memory was 58.4MB in the beginning and 104.6MB in the end (delta: -46.3MB). Peak memory consumption was 83.5MB. Max. memory is 16.1GB. * TraceAbstraction took 47707.85ms. Allocated memory was 142.6MB in the beginning and 604.0MB in the end (delta: 461.4MB). Free memory was 103.3MB in the beginning and 276.1MB in the end (delta: -172.8MB). Peak memory consumption was 287.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.convertIOException(Executor.java:337) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_62c227f1-d2d9-42e4-a151-89592f74c60f/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Connection to SMT solver broken