./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 222be94abfdbb514b1917b4bfb3a2a13389b64e1e049c782003790d790f6753f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:09:45,175 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:09:45,233 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 08:09:45,238 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:09:45,238 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:09:45,258 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:09:45,259 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:09:45,259 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:09:45,259 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:09:45,259 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:09:45,259 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:09:45,260 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:09:45,260 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 08:09:45,260 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:09:45,261 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:09:45,261 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:09:45,261 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:09:45,262 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:09:45,262 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:09:45,263 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 222be94abfdbb514b1917b4bfb3a2a13389b64e1e049c782003790d790f6753f [2024-12-02 08:09:45,503 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:09:45,511 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:09:45,513 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:09:45,515 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:09:45,515 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:09:45,516 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:09:48,127 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/916153aeb/f10848255cb34fbfad27e40b5cee0169/FLAG7ed6844b6 [2024-12-02 08:09:48,375 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:09:48,376 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:09:48,385 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/916153aeb/f10848255cb34fbfad27e40b5cee0169/FLAG7ed6844b6 [2024-12-02 08:09:48,397 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/916153aeb/f10848255cb34fbfad27e40b5cee0169 [2024-12-02 08:09:48,398 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:09:48,399 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:09:48,400 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:09:48,400 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:09:48,403 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:09:48,404 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:48,404 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a2a80b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48, skipping insertion in model container [2024-12-02 08:09:48,404 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:48,433 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:09:48,581 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c[1280,1293] [2024-12-02 08:09:48,761 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:09:48,770 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:09:48,780 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c[1280,1293] [2024-12-02 08:09:48,864 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:09:48,877 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:09:48,877 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48 WrapperNode [2024-12-02 08:09:48,877 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:09:48,878 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:09:48,878 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:09:48,879 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:09:48,884 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:48,910 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,097 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1976 [2024-12-02 08:09:49,098 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:09:49,098 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:09:49,098 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:09:49,098 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:09:49,108 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,108 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,134 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,199 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:09:49,200 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,200 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,255 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,264 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,275 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,293 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,302 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,341 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:09:49,342 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:09:49,342 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:09:49,342 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:09:49,343 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (1/1) ... [2024-12-02 08:09:49,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:09:49,359 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:09:49,370 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:09:49,373 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:09:49,429 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:09:49,430 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:09:49,430 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:09:49,430 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 08:09:49,430 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:09:49,430 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:09:49,629 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:09:49,630 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:09:51,808 INFO L? ?]: Removed 1091 outVars from TransFormulas that were not future-live. [2024-12-02 08:09:51,808 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:09:51,829 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:09:51,829 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:09:51,830 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:09:51 BoogieIcfgContainer [2024-12-02 08:09:51,830 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:09:51,832 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:09:51,833 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:09:51,837 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:09:51,837 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:09:48" (1/3) ... [2024-12-02 08:09:51,838 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63371877 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:09:51, skipping insertion in model container [2024-12-02 08:09:51,838 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:09:48" (2/3) ... [2024-12-02 08:09:51,838 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63371877 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:09:51, skipping insertion in model container [2024-12-02 08:09:51,838 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:09:51" (3/3) ... [2024-12-02 08:09:51,839 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:09:51,851 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:09:51,853 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c that has 2 procedures, 552 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:09:51,911 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:09:51,922 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@d23ad0e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:09:51,922 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:09:51,927 INFO L276 IsEmpty]: Start isEmpty. Operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:51,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 08:09:51,939 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:51,940 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:51,940 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:51,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:51,945 INFO L85 PathProgramCache]: Analyzing trace with hash 105595379, now seen corresponding path program 1 times [2024-12-02 08:09:51,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:51,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [178778641] [2024-12-02 08:09:51,963 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:51,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:52,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:52,332 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:09:52,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:52,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [178778641] [2024-12-02 08:09:52,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [178778641] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:09:52,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [212038841] [2024-12-02 08:09:52,333 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:52,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:09:52,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:09:52,337 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:09:52,342 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:09:52,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:52,769 INFO L256 TraceCheckSpWp]: Trace formula consists of 929 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 08:09:52,777 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:09:52,796 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:09:52,796 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:09:52,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [212038841] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:52,797 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:09:52,797 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 08:09:52,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1949674090] [2024-12-02 08:09:52,799 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:52,803 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 08:09:52,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:52,823 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 08:09:52,824 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:09:52,827 INFO L87 Difference]: Start difference. First operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:09:52,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:52,880 INFO L93 Difference]: Finished difference Result 999 states and 1493 transitions. [2024-12-02 08:09:52,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 08:09:52,883 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 149 [2024-12-02 08:09:52,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:52,892 INFO L225 Difference]: With dead ends: 999 [2024-12-02 08:09:52,892 INFO L226 Difference]: Without dead ends: 549 [2024-12-02 08:09:52,896 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:09:52,899 INFO L435 NwaCegarLoop]: 817 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 817 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:52,900 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 817 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:09:52,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 549 states. [2024-12-02 08:09:52,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 549 to 549. [2024-12-02 08:09:52,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 549 states, 544 states have (on average 1.4908088235294117) internal successors, (811), 544 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:52,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 817 transitions. [2024-12-02 08:09:52,950 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 817 transitions. Word has length 149 [2024-12-02 08:09:52,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:52,950 INFO L471 AbstractCegarLoop]: Abstraction has 549 states and 817 transitions. [2024-12-02 08:09:52,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:09:52,951 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 817 transitions. [2024-12-02 08:09:52,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 08:09:52,954 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:52,954 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:52,962 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:09:53,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-12-02 08:09:53,155 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:53,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:53,155 INFO L85 PathProgramCache]: Analyzing trace with hash 677396781, now seen corresponding path program 1 times [2024-12-02 08:09:53,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:53,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460905279] [2024-12-02 08:09:53,155 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:53,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:53,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:54,146 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:54,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:54,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460905279] [2024-12-02 08:09:54,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460905279] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:54,147 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:54,147 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:09:54,147 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031753663] [2024-12-02 08:09:54,147 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:54,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:09:54,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:54,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:09:54,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:09:54,149 INFO L87 Difference]: Start difference. First operand 549 states and 817 transitions. Second operand has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:54,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:54,194 INFO L93 Difference]: Finished difference Result 553 states and 821 transitions. [2024-12-02 08:09:54,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:54,196 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 149 [2024-12-02 08:09:54,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:54,199 INFO L225 Difference]: With dead ends: 553 [2024-12-02 08:09:54,199 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 08:09:54,199 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:09:54,200 INFO L435 NwaCegarLoop]: 815 mSDtfsCounter, 0 mSDsluCounter, 1624 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2439 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:54,200 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2439 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:09:54,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 08:09:54,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 08:09:54,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.489010989010989) internal successors, (813), 546 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:54,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 819 transitions. [2024-12-02 08:09:54,220 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 819 transitions. Word has length 149 [2024-12-02 08:09:54,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:54,222 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 819 transitions. [2024-12-02 08:09:54,222 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:54,222 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 819 transitions. [2024-12-02 08:09:54,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-12-02 08:09:54,224 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:54,224 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:54,224 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 08:09:54,225 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:54,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:54,225 INFO L85 PathProgramCache]: Analyzing trace with hash -473840291, now seen corresponding path program 1 times [2024-12-02 08:09:54,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:54,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084132224] [2024-12-02 08:09:54,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:54,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:54,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:54,785 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:54,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:54,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084132224] [2024-12-02 08:09:54,786 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084132224] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:54,786 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:54,786 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:54,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471394591] [2024-12-02 08:09:54,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:54,787 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:54,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:54,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:54,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:54,788 INFO L87 Difference]: Start difference. First operand 551 states and 819 transitions. Second operand has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:55,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:55,290 INFO L93 Difference]: Finished difference Result 1371 states and 2041 transitions. [2024-12-02 08:09:55,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:09:55,290 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 150 [2024-12-02 08:09:55,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:55,293 INFO L225 Difference]: With dead ends: 1371 [2024-12-02 08:09:55,293 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 08:09:55,295 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:09:55,295 INFO L435 NwaCegarLoop]: 861 mSDtfsCounter, 1618 mSDsluCounter, 1490 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1618 SdHoareTripleChecker+Valid, 2351 SdHoareTripleChecker+Invalid, 339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:55,295 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1618 Valid, 2351 Invalid, 339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:09:55,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 08:09:55,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 08:09:55,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.4871794871794872) internal successors, (812), 546 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:55,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 818 transitions. [2024-12-02 08:09:55,313 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 818 transitions. Word has length 150 [2024-12-02 08:09:55,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:55,314 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 818 transitions. [2024-12-02 08:09:55,314 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:55,314 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 818 transitions. [2024-12-02 08:09:55,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-12-02 08:09:55,316 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:55,316 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:55,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 08:09:55,316 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:55,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:55,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1290588625, now seen corresponding path program 1 times [2024-12-02 08:09:55,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:55,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630107893] [2024-12-02 08:09:55,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:55,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:55,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:55,787 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:55,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:55,788 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630107893] [2024-12-02 08:09:55,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1630107893] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:55,788 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:55,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:09:55,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448541673] [2024-12-02 08:09:55,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:55,788 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:09:55,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:55,789 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:09:55,789 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:09:55,789 INFO L87 Difference]: Start difference. First operand 551 states and 818 transitions. Second operand has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:55,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:55,830 INFO L93 Difference]: Finished difference Result 1002 states and 1487 transitions. [2024-12-02 08:09:55,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:55,831 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 151 [2024-12-02 08:09:55,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:55,833 INFO L225 Difference]: With dead ends: 1002 [2024-12-02 08:09:55,833 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:55,834 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:09:55,835 INFO L435 NwaCegarLoop]: 814 mSDtfsCounter, 0 mSDsluCounter, 1618 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2432 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:55,835 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2432 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:09:55,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:55,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:55,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4854014598540146) internal successors, (814), 548 states have internal predecessors, (814), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:55,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2024-12-02 08:09:55,850 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 151 [2024-12-02 08:09:55,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:55,850 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2024-12-02 08:09:55,850 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:55,850 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2024-12-02 08:09:55,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2024-12-02 08:09:55,852 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:55,852 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:55,852 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 08:09:55,853 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:55,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:55,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1843460468, now seen corresponding path program 1 times [2024-12-02 08:09:55,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:55,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323065040] [2024-12-02 08:09:55,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:55,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:55,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:56,493 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:56,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:56,494 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323065040] [2024-12-02 08:09:56,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1323065040] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:56,494 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:56,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:09:56,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256422107] [2024-12-02 08:09:56,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:56,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:09:56,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:56,495 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:09:56,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:09:56,495 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:56,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:56,692 INFO L93 Difference]: Finished difference Result 1004 states and 1488 transitions. [2024-12-02 08:09:56,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:56,692 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 152 [2024-12-02 08:09:56,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:56,695 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:56,695 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:56,695 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:56,696 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 694 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:56,696 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 1470 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:09:56,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:56,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:56,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4835766423357664) internal successors, (813), 548 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:56,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 819 transitions. [2024-12-02 08:09:56,710 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 819 transitions. Word has length 152 [2024-12-02 08:09:56,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:56,710 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 819 transitions. [2024-12-02 08:09:56,710 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:56,710 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 819 transitions. [2024-12-02 08:09:56,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-12-02 08:09:56,712 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:56,712 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:56,712 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 08:09:56,712 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:56,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:56,713 INFO L85 PathProgramCache]: Analyzing trace with hash -954896960, now seen corresponding path program 1 times [2024-12-02 08:09:56,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:56,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454594197] [2024-12-02 08:09:56,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:56,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:56,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:57,039 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:57,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:57,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454594197] [2024-12-02 08:09:57,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1454594197] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:57,039 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:57,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:57,040 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68082594] [2024-12-02 08:09:57,040 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:57,040 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:57,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:57,041 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:57,041 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:57,041 INFO L87 Difference]: Start difference. First operand 553 states and 819 transitions. Second operand has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:57,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:57,194 INFO L93 Difference]: Finished difference Result 1010 states and 1494 transitions. [2024-12-02 08:09:57,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:09:57,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 153 [2024-12-02 08:09:57,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:57,196 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:09:57,196 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:57,197 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:09:57,197 INFO L435 NwaCegarLoop]: 806 mSDtfsCounter, 705 mSDsluCounter, 1544 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 705 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:57,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [705 Valid, 2350 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:57,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:57,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:57,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4817518248175183) internal successors, (812), 548 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:57,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 818 transitions. [2024-12-02 08:09:57,209 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 818 transitions. Word has length 153 [2024-12-02 08:09:57,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:57,210 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 818 transitions. [2024-12-02 08:09:57,210 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:57,210 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 818 transitions. [2024-12-02 08:09:57,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-12-02 08:09:57,211 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:57,211 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:57,211 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 08:09:57,211 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:57,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:57,212 INFO L85 PathProgramCache]: Analyzing trace with hash 690807295, now seen corresponding path program 1 times [2024-12-02 08:09:57,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:57,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741678040] [2024-12-02 08:09:57,212 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:57,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:57,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:57,498 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:57,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:57,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741678040] [2024-12-02 08:09:57,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1741678040] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:57,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:57,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:57,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186456497] [2024-12-02 08:09:57,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:57,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:57,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:57,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:57,499 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:57,500 INFO L87 Difference]: Start difference. First operand 553 states and 818 transitions. Second operand has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:57,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:57,672 INFO L93 Difference]: Finished difference Result 1004 states and 1484 transitions. [2024-12-02 08:09:57,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:57,673 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 154 [2024-12-02 08:09:57,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:57,675 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:57,675 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:57,676 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:57,676 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 802 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 805 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:57,677 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [805 Valid, 1477 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:57,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:57,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:57,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.47992700729927) internal successors, (811), 548 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:57,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 817 transitions. [2024-12-02 08:09:57,687 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 817 transitions. Word has length 154 [2024-12-02 08:09:57,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:57,687 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 817 transitions. [2024-12-02 08:09:57,687 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:57,687 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 817 transitions. [2024-12-02 08:09:57,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-02 08:09:57,689 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:57,689 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:57,689 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 08:09:57,689 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:57,689 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:57,689 INFO L85 PathProgramCache]: Analyzing trace with hash -1444639353, now seen corresponding path program 1 times [2024-12-02 08:09:57,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:57,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259068234] [2024-12-02 08:09:57,690 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:57,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:57,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:57,947 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:57,947 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:57,947 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259068234] [2024-12-02 08:09:57,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259068234] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:57,947 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:57,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:57,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520661347] [2024-12-02 08:09:57,947 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:57,948 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:57,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:57,948 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:57,948 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:57,948 INFO L87 Difference]: Start difference. First operand 553 states and 817 transitions. Second operand has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:58,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:58,116 INFO L93 Difference]: Finished difference Result 1004 states and 1482 transitions. [2024-12-02 08:09:58,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:58,116 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 155 [2024-12-02 08:09:58,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:58,118 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:58,118 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:58,119 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:58,119 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 798 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 801 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:58,119 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [801 Valid, 1477 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:58,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:58,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:58,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4781021897810218) internal successors, (810), 548 states have internal predecessors, (810), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:58,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 816 transitions. [2024-12-02 08:09:58,129 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 816 transitions. Word has length 155 [2024-12-02 08:09:58,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:58,130 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 816 transitions. [2024-12-02 08:09:58,130 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:58,130 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 816 transitions. [2024-12-02 08:09:58,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 08:09:58,132 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:58,132 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:58,132 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 08:09:58,132 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:58,133 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:58,133 INFO L85 PathProgramCache]: Analyzing trace with hash 457554086, now seen corresponding path program 1 times [2024-12-02 08:09:58,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:58,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482782210] [2024-12-02 08:09:58,133 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:58,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:58,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:58,424 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:58,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:58,425 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482782210] [2024-12-02 08:09:58,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1482782210] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:58,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:58,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:58,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499641202] [2024-12-02 08:09:58,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:58,426 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:58,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:58,426 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:58,426 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:58,427 INFO L87 Difference]: Start difference. First operand 553 states and 816 transitions. Second operand has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:58,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:58,587 INFO L93 Difference]: Finished difference Result 1004 states and 1480 transitions. [2024-12-02 08:09:58,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:58,588 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 156 [2024-12-02 08:09:58,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:58,590 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:58,590 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:58,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:58,591 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 791 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 794 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:58,591 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [794 Valid, 1477 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:58,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:58,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:58,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4762773722627738) internal successors, (809), 548 states have internal predecessors, (809), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:58,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 815 transitions. [2024-12-02 08:09:58,601 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 815 transitions. Word has length 156 [2024-12-02 08:09:58,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:58,602 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 815 transitions. [2024-12-02 08:09:58,602 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:58,602 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 815 transitions. [2024-12-02 08:09:58,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-12-02 08:09:58,603 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:58,603 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:58,603 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 08:09:58,604 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:58,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:58,604 INFO L85 PathProgramCache]: Analyzing trace with hash -1750596921, now seen corresponding path program 1 times [2024-12-02 08:09:58,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:58,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127513257] [2024-12-02 08:09:58,604 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:58,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:58,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:58,864 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:58,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:58,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127513257] [2024-12-02 08:09:58,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127513257] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:58,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:58,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:58,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104316035] [2024-12-02 08:09:58,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:58,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:58,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:58,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:58,866 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:58,866 INFO L87 Difference]: Start difference. First operand 553 states and 815 transitions. Second operand has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:59,030 INFO L93 Difference]: Finished difference Result 1004 states and 1478 transitions. [2024-12-02 08:09:59,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:59,031 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 157 [2024-12-02 08:09:59,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:59,034 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:59,034 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:59,035 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:59,035 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1465 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1468 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:59,035 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1468 Valid, 1470 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:59,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:59,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:59,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4744525547445255) internal successors, (808), 548 states have internal predecessors, (808), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:59,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 814 transitions. [2024-12-02 08:09:59,044 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 814 transitions. Word has length 157 [2024-12-02 08:09:59,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:59,045 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 814 transitions. [2024-12-02 08:09:59,045 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,045 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 814 transitions. [2024-12-02 08:09:59,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 08:09:59,046 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:59,046 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:59,046 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 08:09:59,046 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:59,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:59,047 INFO L85 PathProgramCache]: Analyzing trace with hash -273443585, now seen corresponding path program 1 times [2024-12-02 08:09:59,047 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:59,047 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001051511] [2024-12-02 08:09:59,047 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:59,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:59,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:59,305 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:59,305 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:59,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001051511] [2024-12-02 08:09:59,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001051511] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:59,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:59,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:59,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859850762] [2024-12-02 08:09:59,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:59,306 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:59,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:59,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:59,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:59,307 INFO L87 Difference]: Start difference. First operand 553 states and 814 transitions. Second operand has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:59,471 INFO L93 Difference]: Finished difference Result 1004 states and 1476 transitions. [2024-12-02 08:09:59,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:59,471 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 158 [2024-12-02 08:09:59,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:59,473 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:59,473 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:59,474 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:59,474 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1457 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1460 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:59,474 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1460 Valid, 1470 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:59,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:59,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:59,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4726277372262773) internal successors, (807), 548 states have internal predecessors, (807), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:59,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 813 transitions. [2024-12-02 08:09:59,484 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 813 transitions. Word has length 158 [2024-12-02 08:09:59,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:59,484 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 813 transitions. [2024-12-02 08:09:59,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,484 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 813 transitions. [2024-12-02 08:09:59,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 08:09:59,485 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:59,486 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:59,486 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 08:09:59,486 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:59,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:59,486 INFO L85 PathProgramCache]: Analyzing trace with hash -808870848, now seen corresponding path program 1 times [2024-12-02 08:09:59,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:59,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566281143] [2024-12-02 08:09:59,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:59,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:59,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:59,722 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:09:59,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:59,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566281143] [2024-12-02 08:09:59,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566281143] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:09:59,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:09:59,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:09:59,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109664916] [2024-12-02 08:09:59,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:09:59,723 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:09:59,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:09:59,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:09:59,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:09:59,724 INFO L87 Difference]: Start difference. First operand 553 states and 813 transitions. Second operand has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:59,908 INFO L93 Difference]: Finished difference Result 1004 states and 1474 transitions. [2024-12-02 08:09:59,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:09:59,909 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 159 [2024-12-02 08:09:59,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:59,911 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:09:59,911 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:09:59,911 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:09:59,912 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 779 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 782 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:59,912 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [782 Valid, 1477 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:09:59,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:09:59,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:09:59,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4708029197080292) internal successors, (806), 548 states have internal predecessors, (806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:09:59,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 812 transitions. [2024-12-02 08:09:59,924 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 812 transitions. Word has length 159 [2024-12-02 08:09:59,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:59,925 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 812 transitions. [2024-12-02 08:09:59,925 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:09:59,925 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 812 transitions. [2024-12-02 08:09:59,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 08:09:59,926 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:59,927 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:59,927 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 08:09:59,927 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:59,927 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:59,927 INFO L85 PathProgramCache]: Analyzing trace with hash -476571176, now seen corresponding path program 1 times [2024-12-02 08:09:59,927 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:59,927 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333684576] [2024-12-02 08:09:59,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:59,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:00,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:00,316 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:00,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:00,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333684576] [2024-12-02 08:10:00,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1333684576] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:00,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:00,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:00,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846402318] [2024-12-02 08:10:00,317 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:00,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:00,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:00,318 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:00,318 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:00,318 INFO L87 Difference]: Start difference. First operand 553 states and 812 transitions. Second operand has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:00,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:00,425 INFO L93 Difference]: Finished difference Result 1004 states and 1472 transitions. [2024-12-02 08:10:00,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:00,426 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 160 [2024-12-02 08:10:00,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:00,428 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:00,428 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:00,429 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:00,429 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 696 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 696 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:00,429 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [696 Valid, 1534 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:00,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:00,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:00,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.468978102189781) internal successors, (805), 548 states have internal predecessors, (805), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:00,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 811 transitions. [2024-12-02 08:10:00,439 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 811 transitions. Word has length 160 [2024-12-02 08:10:00,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:00,440 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 811 transitions. [2024-12-02 08:10:00,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:00,440 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 811 transitions. [2024-12-02 08:10:00,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-12-02 08:10:00,441 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:00,441 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:00,441 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 08:10:00,441 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:00,442 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:00,442 INFO L85 PathProgramCache]: Analyzing trace with hash 2018153223, now seen corresponding path program 1 times [2024-12-02 08:10:00,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:00,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347625283] [2024-12-02 08:10:00,442 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:00,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:00,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:00,672 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:00,672 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:00,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347625283] [2024-12-02 08:10:00,672 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1347625283] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:00,673 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:00,673 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:00,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198401136] [2024-12-02 08:10:00,673 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:00,673 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:00,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:00,674 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:00,674 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:00,674 INFO L87 Difference]: Start difference. First operand 553 states and 811 transitions. Second operand has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:00,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:00,767 INFO L93 Difference]: Finished difference Result 1008 states and 1475 transitions. [2024-12-02 08:10:00,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:10:00,767 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 161 [2024-12-02 08:10:00,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:00,769 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:10:00,769 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:00,770 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:10:00,770 INFO L435 NwaCegarLoop]: 799 mSDtfsCounter, 703 mSDsluCounter, 1569 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 703 SdHoareTripleChecker+Valid, 2368 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:00,770 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [703 Valid, 2368 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:00,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:00,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:00,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.467153284671533) internal successors, (804), 548 states have internal predecessors, (804), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:00,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 810 transitions. [2024-12-02 08:10:00,779 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 810 transitions. Word has length 161 [2024-12-02 08:10:00,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:00,780 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 810 transitions. [2024-12-02 08:10:00,780 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:00,780 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 810 transitions. [2024-12-02 08:10:00,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-02 08:10:00,781 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:00,782 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:00,782 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 08:10:00,782 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:00,782 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:00,782 INFO L85 PathProgramCache]: Analyzing trace with hash -968614358, now seen corresponding path program 1 times [2024-12-02 08:10:00,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:00,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961936724] [2024-12-02 08:10:00,782 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:00,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:00,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:01,004 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:01,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:01,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961936724] [2024-12-02 08:10:01,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961936724] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:01,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:01,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:01,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546523185] [2024-12-02 08:10:01,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:01,006 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:01,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:01,006 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:01,006 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:01,007 INFO L87 Difference]: Start difference. First operand 553 states and 810 transitions. Second operand has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:01,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:01,110 INFO L93 Difference]: Finished difference Result 1004 states and 1468 transitions. [2024-12-02 08:10:01,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:01,111 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 162 [2024-12-02 08:10:01,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:01,113 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:01,113 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:01,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:01,114 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 794 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 797 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:01,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [797 Valid, 1541 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:01,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:01,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:01,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4653284671532847) internal successors, (803), 548 states have internal predecessors, (803), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:01,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 809 transitions. [2024-12-02 08:10:01,125 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 809 transitions. Word has length 162 [2024-12-02 08:10:01,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:01,125 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 809 transitions. [2024-12-02 08:10:01,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:01,125 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 809 transitions. [2024-12-02 08:10:01,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-02 08:10:01,126 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:01,126 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:01,126 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 08:10:01,127 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:01,127 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:01,127 INFO L85 PathProgramCache]: Analyzing trace with hash 311812430, now seen corresponding path program 1 times [2024-12-02 08:10:01,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:01,127 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353797955] [2024-12-02 08:10:01,127 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:01,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:01,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:01,353 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:01,353 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:01,353 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [353797955] [2024-12-02 08:10:01,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [353797955] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:01,353 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:01,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:01,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271417599] [2024-12-02 08:10:01,353 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:01,354 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:01,354 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:01,354 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:01,354 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:01,355 INFO L87 Difference]: Start difference. First operand 553 states and 809 transitions. Second operand has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:01,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:01,487 INFO L93 Difference]: Finished difference Result 1004 states and 1466 transitions. [2024-12-02 08:10:01,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:01,487 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 163 [2024-12-02 08:10:01,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:01,490 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:01,490 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:01,490 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:01,491 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 787 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:01,491 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 1541 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:01,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:01,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:01,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4635036496350364) internal successors, (802), 548 states have internal predecessors, (802), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:01,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 808 transitions. [2024-12-02 08:10:01,506 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 808 transitions. Word has length 163 [2024-12-02 08:10:01,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:01,507 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 808 transitions. [2024-12-02 08:10:01,507 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:01,507 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 808 transitions. [2024-12-02 08:10:01,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2024-12-02 08:10:01,509 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:01,509 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:01,509 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 08:10:01,509 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:01,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:01,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1761805302, now seen corresponding path program 1 times [2024-12-02 08:10:01,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:01,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228838774] [2024-12-02 08:10:01,510 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:01,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:01,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:01,944 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:01,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:01,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [228838774] [2024-12-02 08:10:01,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [228838774] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:01,945 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:01,945 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:01,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341115603] [2024-12-02 08:10:01,945 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:01,945 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:01,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:01,946 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:01,946 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:01,946 INFO L87 Difference]: Start difference. First operand 553 states and 808 transitions. Second operand has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:02,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:02,016 INFO L93 Difference]: Finished difference Result 1004 states and 1464 transitions. [2024-12-02 08:10:02,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:02,017 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 164 [2024-12-02 08:10:02,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:02,019 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:02,019 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:02,020 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:02,020 INFO L435 NwaCegarLoop]: 782 mSDtfsCounter, 699 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 699 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:02,020 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [699 Valid, 1566 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:02,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:02,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:02,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4598540145985401) internal successors, (800), 548 states have internal predecessors, (800), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:02,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 806 transitions. [2024-12-02 08:10:02,036 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 806 transitions. Word has length 164 [2024-12-02 08:10:02,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:02,036 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 806 transitions. [2024-12-02 08:10:02,037 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:02,037 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 806 transitions. [2024-12-02 08:10:02,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-12-02 08:10:02,038 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:02,039 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:02,039 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 08:10:02,039 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:02,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:02,039 INFO L85 PathProgramCache]: Analyzing trace with hash -540920697, now seen corresponding path program 1 times [2024-12-02 08:10:02,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:02,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968816396] [2024-12-02 08:10:02,040 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:02,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:02,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:02,461 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:02,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:02,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968816396] [2024-12-02 08:10:02,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1968816396] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:02,461 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:02,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:02,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329768078] [2024-12-02 08:10:02,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:02,462 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:02,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:02,463 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:02,463 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:02,463 INFO L87 Difference]: Start difference. First operand 553 states and 806 transitions. Second operand has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:02,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:02,530 INFO L93 Difference]: Finished difference Result 1004 states and 1460 transitions. [2024-12-02 08:10:02,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:02,530 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 166 [2024-12-02 08:10:02,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:02,532 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:02,533 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:02,533 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:02,534 INFO L435 NwaCegarLoop]: 782 mSDtfsCounter, 1481 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1484 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:02,534 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1484 Valid, 1566 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:02,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:02,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:02,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4580291970802919) internal successors, (799), 548 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:02,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 805 transitions. [2024-12-02 08:10:02,549 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 805 transitions. Word has length 166 [2024-12-02 08:10:02,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:02,549 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 805 transitions. [2024-12-02 08:10:02,549 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:02,549 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 805 transitions. [2024-12-02 08:10:02,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-02 08:10:02,551 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:02,551 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:02,551 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 08:10:02,551 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:02,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:02,552 INFO L85 PathProgramCache]: Analyzing trace with hash 430318257, now seen corresponding path program 1 times [2024-12-02 08:10:02,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:02,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349666051] [2024-12-02 08:10:02,552 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:02,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:02,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:02,995 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:02,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:02,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349666051] [2024-12-02 08:10:02,995 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [349666051] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:02,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:02,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:02,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059143002] [2024-12-02 08:10:02,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:02,996 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:02,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:02,997 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:02,997 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:02,997 INFO L87 Difference]: Start difference. First operand 553 states and 805 transitions. Second operand has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:10:03,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:03,064 INFO L93 Difference]: Finished difference Result 1004 states and 1458 transitions. [2024-12-02 08:10:03,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:03,065 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 167 [2024-12-02 08:10:03,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:03,067 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:03,067 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:03,067 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:03,068 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 734 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 736 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:03,068 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [736 Valid, 1572 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:03,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:03,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:03,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4562043795620438) internal successors, (798), 548 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:03,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 804 transitions. [2024-12-02 08:10:03,083 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 804 transitions. Word has length 167 [2024-12-02 08:10:03,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:03,083 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 804 transitions. [2024-12-02 08:10:03,084 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:10:03,084 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 804 transitions. [2024-12-02 08:10:03,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 08:10:03,085 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:03,085 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:03,085 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 08:10:03,086 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:03,086 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:03,086 INFO L85 PathProgramCache]: Analyzing trace with hash -274414691, now seen corresponding path program 1 times [2024-12-02 08:10:03,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:03,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687508095] [2024-12-02 08:10:03,086 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:03,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:03,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:03,671 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:03,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:03,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687508095] [2024-12-02 08:10:03,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1687508095] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:03,671 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:03,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:03,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642804808] [2024-12-02 08:10:03,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:03,672 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:03,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:03,672 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:03,673 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:03,673 INFO L87 Difference]: Start difference. First operand 553 states and 804 transitions. Second operand has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:10:03,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:03,738 INFO L93 Difference]: Finished difference Result 1004 states and 1456 transitions. [2024-12-02 08:10:03,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:03,739 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 168 [2024-12-02 08:10:03,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:03,741 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:03,741 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:03,742 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:03,742 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 732 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:03,742 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 1572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:03,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:03,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:03,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4543795620437956) internal successors, (797), 548 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:03,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 803 transitions. [2024-12-02 08:10:03,757 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 803 transitions. Word has length 168 [2024-12-02 08:10:03,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:03,757 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 803 transitions. [2024-12-02 08:10:03,757 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:10:03,758 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 803 transitions. [2024-12-02 08:10:03,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-02 08:10:03,759 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:03,760 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:03,760 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 08:10:03,760 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:03,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:03,760 INFO L85 PathProgramCache]: Analyzing trace with hash 848604686, now seen corresponding path program 1 times [2024-12-02 08:10:03,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:03,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656179850] [2024-12-02 08:10:03,761 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:03,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:04,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:04,284 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:04,284 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:04,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656179850] [2024-12-02 08:10:04,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656179850] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:04,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:04,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:04,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38691417] [2024-12-02 08:10:04,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:04,285 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:04,285 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:04,285 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:04,285 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:04,285 INFO L87 Difference]: Start difference. First operand 553 states and 803 transitions. Second operand has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:04,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:04,393 INFO L93 Difference]: Finished difference Result 1004 states and 1454 transitions. [2024-12-02 08:10:04,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:04,394 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 169 [2024-12-02 08:10:04,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:04,396 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:04,396 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:04,397 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:04,397 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 685 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 685 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:04,398 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [685 Valid, 1524 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:04,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:04,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:04,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4525547445255473) internal successors, (796), 548 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:04,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 802 transitions. [2024-12-02 08:10:04,412 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 802 transitions. Word has length 169 [2024-12-02 08:10:04,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:04,412 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 802 transitions. [2024-12-02 08:10:04,412 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.25) internal successors, (157), 4 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:04,412 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 802 transitions. [2024-12-02 08:10:04,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-02 08:10:04,414 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:04,414 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:04,414 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 08:10:04,414 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:04,415 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:04,415 INFO L85 PathProgramCache]: Analyzing trace with hash -781157562, now seen corresponding path program 1 times [2024-12-02 08:10:04,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:04,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807291050] [2024-12-02 08:10:04,415 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:04,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:04,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:04,994 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:04,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:04,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807291050] [2024-12-02 08:10:04,995 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1807291050] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:04,995 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:04,995 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:04,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847932881] [2024-12-02 08:10:04,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:04,995 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:04,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:04,996 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:04,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:04,996 INFO L87 Difference]: Start difference. First operand 553 states and 802 transitions. Second operand has 5 states, 5 states have (on average 31.6) internal successors, (158), 5 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:05,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:05,114 INFO L93 Difference]: Finished difference Result 1004 states and 1452 transitions. [2024-12-02 08:10:05,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:05,115 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.6) internal successors, (158), 5 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 170 [2024-12-02 08:10:05,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:05,117 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:05,117 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:05,118 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:05,120 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 683 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 683 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:05,120 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [683 Valid, 1531 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:05,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:05,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:05,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4507299270072993) internal successors, (795), 548 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:05,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 801 transitions. [2024-12-02 08:10:05,135 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 801 transitions. Word has length 170 [2024-12-02 08:10:05,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:05,135 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 801 transitions. [2024-12-02 08:10:05,135 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.6) internal successors, (158), 5 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:05,135 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 801 transitions. [2024-12-02 08:10:05,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-02 08:10:05,137 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:05,138 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:05,138 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 08:10:05,138 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:05,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:05,138 INFO L85 PathProgramCache]: Analyzing trace with hash 1923885711, now seen corresponding path program 1 times [2024-12-02 08:10:05,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:05,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134733960] [2024-12-02 08:10:05,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:05,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:05,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:05,690 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:05,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:05,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134733960] [2024-12-02 08:10:05,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134733960] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:05,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:05,691 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:05,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234790000] [2024-12-02 08:10:05,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:05,691 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:05,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:05,692 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:05,692 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:05,692 INFO L87 Difference]: Start difference. First operand 553 states and 801 transitions. Second operand has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:05,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:05,808 INFO L93 Difference]: Finished difference Result 1004 states and 1450 transitions. [2024-12-02 08:10:05,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:05,809 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 171 [2024-12-02 08:10:05,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:05,811 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 08:10:05,811 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:05,812 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:05,812 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 682 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 682 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:05,813 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [682 Valid, 1531 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:05,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:05,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:05,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.448905109489051) internal successors, (794), 548 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:05,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 800 transitions. [2024-12-02 08:10:05,826 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 800 transitions. Word has length 171 [2024-12-02 08:10:05,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:05,826 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 800 transitions. [2024-12-02 08:10:05,826 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:05,826 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 800 transitions. [2024-12-02 08:10:05,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2024-12-02 08:10:05,827 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:05,827 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:05,828 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 08:10:05,828 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:05,828 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:05,828 INFO L85 PathProgramCache]: Analyzing trace with hash -1902156155, now seen corresponding path program 1 times [2024-12-02 08:10:05,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:05,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073242081] [2024-12-02 08:10:05,828 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:05,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:05,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:06,297 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:06,297 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:06,297 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073242081] [2024-12-02 08:10:06,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073242081] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:06,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:06,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:06,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964128960] [2024-12-02 08:10:06,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:06,298 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:06,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:06,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:06,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:06,299 INFO L87 Difference]: Start difference. First operand 553 states and 800 transitions. Second operand has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:06,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:06,528 INFO L93 Difference]: Finished difference Result 1006 states and 1450 transitions. [2024-12-02 08:10:06,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:06,528 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 172 [2024-12-02 08:10:06,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:06,530 INFO L225 Difference]: With dead ends: 1006 [2024-12-02 08:10:06,530 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 08:10:06,531 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:06,532 INFO L435 NwaCegarLoop]: 791 mSDtfsCounter, 2 mSDsluCounter, 1392 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 201 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:06,532 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2183 Invalid, 201 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:10:06,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 08:10:06,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 08:10:06,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.447080291970803) internal successors, (793), 548 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:06,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 799 transitions. [2024-12-02 08:10:06,547 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 799 transitions. Word has length 172 [2024-12-02 08:10:06,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:06,547 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 799 transitions. [2024-12-02 08:10:06,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:06,547 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 799 transitions. [2024-12-02 08:10:06,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-02 08:10:06,548 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:06,548 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:06,548 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 08:10:06,549 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:06,549 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:06,549 INFO L85 PathProgramCache]: Analyzing trace with hash -63304310, now seen corresponding path program 1 times [2024-12-02 08:10:06,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:06,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716981886] [2024-12-02 08:10:06,549 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:06,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:06,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:07,476 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:07,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:07,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716981886] [2024-12-02 08:10:07,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716981886] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:07,476 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:07,476 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:07,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811294608] [2024-12-02 08:10:07,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:07,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:07,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:07,478 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:07,478 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:07,478 INFO L87 Difference]: Start difference. First operand 553 states and 799 transitions. Second operand has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:07,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:07,866 INFO L93 Difference]: Finished difference Result 1008 states and 1451 transitions. [2024-12-02 08:10:07,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:10:07,867 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173 [2024-12-02 08:10:07,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:07,869 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 08:10:07,869 INFO L226 Difference]: Without dead ends: 557 [2024-12-02 08:10:07,870 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:07,870 INFO L435 NwaCegarLoop]: 606 mSDtfsCounter, 695 mSDsluCounter, 1205 mSDsCounter, 0 mSdLazyCounter, 580 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 1811 SdHoareTripleChecker+Invalid, 580 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 580 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:07,870 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 1811 Invalid, 580 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 580 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:10:07,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-12-02 08:10:07,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 556. [2024-12-02 08:10:07,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4446460980036298) internal successors, (796), 551 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:07,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 802 transitions. [2024-12-02 08:10:07,884 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 802 transitions. Word has length 173 [2024-12-02 08:10:07,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:07,884 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 802 transitions. [2024-12-02 08:10:07,885 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:07,885 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 802 transitions. [2024-12-02 08:10:07,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-12-02 08:10:07,886 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:07,886 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:07,886 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 08:10:07,886 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:07,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:07,887 INFO L85 PathProgramCache]: Analyzing trace with hash 480433128, now seen corresponding path program 1 times [2024-12-02 08:10:07,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:07,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086225409] [2024-12-02 08:10:07,887 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:07,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:08,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:08,192 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:08,192 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:08,192 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1086225409] [2024-12-02 08:10:08,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1086225409] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:08,192 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:08,193 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:08,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807630853] [2024-12-02 08:10:08,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:08,193 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:08,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:08,194 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:08,194 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:08,195 INFO L87 Difference]: Start difference. First operand 556 states and 802 transitions. Second operand has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:08,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:08,358 INFO L93 Difference]: Finished difference Result 1010 states and 1452 transitions. [2024-12-02 08:10:08,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:08,359 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 174 [2024-12-02 08:10:08,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:08,362 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:08,362 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:08,363 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:08,363 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 664 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 664 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:08,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [664 Valid, 1444 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:08,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:08,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:08,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.442831215970962) internal successors, (795), 551 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:08,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 801 transitions. [2024-12-02 08:10:08,376 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 801 transitions. Word has length 174 [2024-12-02 08:10:08,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:08,377 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 801 transitions. [2024-12-02 08:10:08,377 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:08,377 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 801 transitions. [2024-12-02 08:10:08,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2024-12-02 08:10:08,378 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:08,378 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:08,378 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 08:10:08,378 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:08,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:08,379 INFO L85 PathProgramCache]: Analyzing trace with hash -13174804, now seen corresponding path program 1 times [2024-12-02 08:10:08,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:08,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791499871] [2024-12-02 08:10:08,379 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:08,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:08,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:08,794 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:08,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:08,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791499871] [2024-12-02 08:10:08,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791499871] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:08,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:08,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:08,795 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1754150082] [2024-12-02 08:10:08,795 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:08,795 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:08,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:08,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:08,796 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:08,796 INFO L87 Difference]: Start difference. First operand 556 states and 801 transitions. Second operand has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:08,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:08,962 INFO L93 Difference]: Finished difference Result 1010 states and 1450 transitions. [2024-12-02 08:10:08,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:08,962 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 175 [2024-12-02 08:10:08,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:08,964 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:08,964 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:08,964 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:08,964 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 662 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 662 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:08,965 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [662 Valid, 1451 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:08,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:08,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:08,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.441016333938294) internal successors, (794), 551 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:08,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 800 transitions. [2024-12-02 08:10:08,974 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 800 transitions. Word has length 175 [2024-12-02 08:10:08,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:08,974 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 800 transitions. [2024-12-02 08:10:08,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:08,974 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 800 transitions. [2024-12-02 08:10:08,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-02 08:10:08,975 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:08,975 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:08,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 08:10:08,975 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:08,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:08,976 INFO L85 PathProgramCache]: Analyzing trace with hash -1816091799, now seen corresponding path program 1 times [2024-12-02 08:10:08,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:08,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643082508] [2024-12-02 08:10:08,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:08,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:09,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:09,315 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:09,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:09,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643082508] [2024-12-02 08:10:09,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1643082508] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:09,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:09,316 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:09,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997705704] [2024-12-02 08:10:09,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:09,316 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:09,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:09,317 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:09,317 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:09,317 INFO L87 Difference]: Start difference. First operand 556 states and 800 transitions. Second operand has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:09,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:09,478 INFO L93 Difference]: Finished difference Result 1010 states and 1448 transitions. [2024-12-02 08:10:09,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:09,479 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 176 [2024-12-02 08:10:09,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:09,480 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:09,480 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:09,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:09,481 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 661 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 661 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:09,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [661 Valid, 1451 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:09,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:09,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4392014519056262) internal successors, (793), 551 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:09,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 799 transitions. [2024-12-02 08:10:09,491 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 799 transitions. Word has length 176 [2024-12-02 08:10:09,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:09,491 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 799 transitions. [2024-12-02 08:10:09,491 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:09,491 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 799 transitions. [2024-12-02 08:10:09,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 08:10:09,492 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:09,493 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:09,493 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 08:10:09,493 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:09,493 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:09,493 INFO L85 PathProgramCache]: Analyzing trace with hash -1929879509, now seen corresponding path program 1 times [2024-12-02 08:10:09,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:09,493 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664930988] [2024-12-02 08:10:09,493 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:09,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:09,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:09,952 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:09,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:09,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664930988] [2024-12-02 08:10:09,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664930988] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:09,953 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:09,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:09,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891149209] [2024-12-02 08:10:09,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:09,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:09,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:09,953 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:09,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:09,954 INFO L87 Difference]: Start difference. First operand 556 states and 799 transitions. Second operand has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:10,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:10,098 INFO L93 Difference]: Finished difference Result 1010 states and 1446 transitions. [2024-12-02 08:10:10,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:10,099 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 177 [2024-12-02 08:10:10,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:10,100 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:10,100 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:10,100 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:10,101 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1308 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1308 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:10,101 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1308 Valid, 1444 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:10,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:10,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:10,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4373865698729582) internal successors, (792), 551 states have internal predecessors, (792), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:10,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 798 transitions. [2024-12-02 08:10:10,111 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 798 transitions. Word has length 177 [2024-12-02 08:10:10,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:10,111 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 798 transitions. [2024-12-02 08:10:10,111 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:10,111 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 798 transitions. [2024-12-02 08:10:10,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-02 08:10:10,112 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:10,112 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:10,112 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 08:10:10,113 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:10,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:10,113 INFO L85 PathProgramCache]: Analyzing trace with hash -466280598, now seen corresponding path program 1 times [2024-12-02 08:10:10,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:10,113 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990468515] [2024-12-02 08:10:10,113 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:10,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:10,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:10,659 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:10,659 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:10,660 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990468515] [2024-12-02 08:10:10,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1990468515] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:10,660 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:10,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:10,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891895318] [2024-12-02 08:10:10,660 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:10,660 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:10,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:10,661 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:10,661 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:10,661 INFO L87 Difference]: Start difference. First operand 556 states and 798 transitions. Second operand has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:10,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:10,789 INFO L93 Difference]: Finished difference Result 1010 states and 1444 transitions. [2024-12-02 08:10:10,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:10,789 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 178 [2024-12-02 08:10:10,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:10,791 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:10,791 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:10,791 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:10,792 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 644 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 644 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:10,792 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [644 Valid, 1444 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:10,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:10,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:10,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4355716878402904) internal successors, (791), 551 states have internal predecessors, (791), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:10,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 797 transitions. [2024-12-02 08:10:10,800 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 797 transitions. Word has length 178 [2024-12-02 08:10:10,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:10,800 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 797 transitions. [2024-12-02 08:10:10,800 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:10,801 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 797 transitions. [2024-12-02 08:10:10,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-02 08:10:10,802 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:10,802 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:10,802 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 08:10:10,802 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:10,802 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:10,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1697571818, now seen corresponding path program 1 times [2024-12-02 08:10:10,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:10,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952921416] [2024-12-02 08:10:10,802 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:10,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:10,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:11,132 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:11,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:11,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952921416] [2024-12-02 08:10:11,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1952921416] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:11,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:11,132 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:11,132 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425097264] [2024-12-02 08:10:11,132 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:11,133 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:11,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:11,133 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:11,133 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:11,133 INFO L87 Difference]: Start difference. First operand 556 states and 797 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:11,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:11,283 INFO L93 Difference]: Finished difference Result 1010 states and 1442 transitions. [2024-12-02 08:10:11,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:11,283 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 179 [2024-12-02 08:10:11,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:11,285 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:11,285 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:11,286 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:11,286 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 658 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 658 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:11,287 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [658 Valid, 1451 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:11,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:11,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:11,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4337568058076224) internal successors, (790), 551 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:11,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 796 transitions. [2024-12-02 08:10:11,296 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 796 transitions. Word has length 179 [2024-12-02 08:10:11,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:11,296 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 796 transitions. [2024-12-02 08:10:11,296 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:11,296 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 796 transitions. [2024-12-02 08:10:11,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 08:10:11,297 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:11,298 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:11,298 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 08:10:11,298 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:11,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:11,298 INFO L85 PathProgramCache]: Analyzing trace with hash 910997483, now seen corresponding path program 1 times [2024-12-02 08:10:11,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:11,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1358749927] [2024-12-02 08:10:11,298 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:11,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:11,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:11,767 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:11,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:11,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1358749927] [2024-12-02 08:10:11,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1358749927] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:11,768 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:11,768 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:11,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431915880] [2024-12-02 08:10:11,768 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:11,768 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:11,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:11,769 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:11,769 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:11,769 INFO L87 Difference]: Start difference. First operand 556 states and 796 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:11,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:11,901 INFO L93 Difference]: Finished difference Result 1010 states and 1440 transitions. [2024-12-02 08:10:11,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:11,902 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-12-02 08:10:11,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:11,903 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 08:10:11,903 INFO L226 Difference]: Without dead ends: 556 [2024-12-02 08:10:11,903 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:11,904 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 657 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 657 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:11,904 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [657 Valid, 1451 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:11,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-12-02 08:10:11,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-12-02 08:10:11,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4319419237749547) internal successors, (789), 551 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:10:11,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 795 transitions. [2024-12-02 08:10:11,915 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 795 transitions. Word has length 180 [2024-12-02 08:10:11,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:11,915 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 795 transitions. [2024-12-02 08:10:11,915 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:11,915 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 795 transitions. [2024-12-02 08:10:11,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2024-12-02 08:10:11,916 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:11,916 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:11,916 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 08:10:11,916 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:11,917 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:11,917 INFO L85 PathProgramCache]: Analyzing trace with hash 203821865, now seen corresponding path program 1 times [2024-12-02 08:10:11,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:11,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83838334] [2024-12-02 08:10:11,917 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:11,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:12,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:12,601 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:10:12,601 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:12,601 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83838334] [2024-12-02 08:10:12,601 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [83838334] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:12,601 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:12,601 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:10:12,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184413987] [2024-12-02 08:10:12,601 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:12,602 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:10:12,602 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:12,602 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:10:12,602 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:12,603 INFO L87 Difference]: Start difference. First operand 556 states and 795 transitions. Second operand has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:12,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:12,713 INFO L93 Difference]: Finished difference Result 1165 states and 1640 transitions. [2024-12-02 08:10:12,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:10:12,713 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 181 [2024-12-02 08:10:12,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:12,717 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:12,717 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:12,718 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:10:12,718 INFO L435 NwaCegarLoop]: 776 mSDtfsCounter, 1134 mSDsluCounter, 2322 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 3098 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:12,718 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 3098 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:12,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:12,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:12,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.399715504978663) internal successors, (984), 703 states have internal predecessors, (984), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:12,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 996 transitions. [2024-12-02 08:10:12,730 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 996 transitions. Word has length 181 [2024-12-02 08:10:12,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:12,731 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 996 transitions. [2024-12-02 08:10:12,731 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:10:12,731 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 996 transitions. [2024-12-02 08:10:12,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 449 [2024-12-02 08:10:12,733 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:12,733 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:12,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 08:10:12,734 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:12,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:12,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1787257894, now seen corresponding path program 1 times [2024-12-02 08:10:12,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:12,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666278183] [2024-12-02 08:10:12,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:12,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:12,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:13,466 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:13,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:13,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666278183] [2024-12-02 08:10:13,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666278183] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:13,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:13,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:13,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504596669] [2024-12-02 08:10:13,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:13,468 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:13,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:13,469 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:13,469 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:13,469 INFO L87 Difference]: Start difference. First operand 711 states and 996 transitions. Second operand has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:13,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:13,617 INFO L93 Difference]: Finished difference Result 1165 states and 1639 transitions. [2024-12-02 08:10:13,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:13,618 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 448 [2024-12-02 08:10:13,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:13,620 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:13,620 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:13,620 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:13,621 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 724 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 727 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:13,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [727 Valid, 1451 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:13,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:13,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:13,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3982930298719773) internal successors, (983), 703 states have internal predecessors, (983), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:13,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 995 transitions. [2024-12-02 08:10:13,639 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 995 transitions. Word has length 448 [2024-12-02 08:10:13,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:13,639 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 995 transitions. [2024-12-02 08:10:13,639 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:13,639 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 995 transitions. [2024-12-02 08:10:13,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 450 [2024-12-02 08:10:13,642 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:13,642 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:13,642 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 08:10:13,643 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:13,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:13,643 INFO L85 PathProgramCache]: Analyzing trace with hash 2025497410, now seen corresponding path program 1 times [2024-12-02 08:10:13,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:13,643 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547622056] [2024-12-02 08:10:13,643 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:13,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:13,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:14,526 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:14,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:14,526 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547622056] [2024-12-02 08:10:14,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1547622056] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:14,527 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:14,527 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:14,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933750456] [2024-12-02 08:10:14,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:14,527 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:14,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:14,528 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:14,528 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:14,528 INFO L87 Difference]: Start difference. First operand 711 states and 995 transitions. Second operand has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:14,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:14,654 INFO L93 Difference]: Finished difference Result 1165 states and 1637 transitions. [2024-12-02 08:10:14,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:14,655 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 449 [2024-12-02 08:10:14,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:14,657 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:14,657 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:14,658 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:14,658 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 716 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 719 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:14,658 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [719 Valid, 1451 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:14,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:14,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:14,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3968705547652915) internal successors, (982), 703 states have internal predecessors, (982), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:14,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 994 transitions. [2024-12-02 08:10:14,676 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 994 transitions. Word has length 449 [2024-12-02 08:10:14,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:14,676 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 994 transitions. [2024-12-02 08:10:14,677 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:14,677 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 994 transitions. [2024-12-02 08:10:14,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 451 [2024-12-02 08:10:14,679 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:14,680 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:14,680 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 08:10:14,680 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:14,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:14,680 INFO L85 PathProgramCache]: Analyzing trace with hash -19188593, now seen corresponding path program 1 times [2024-12-02 08:10:14,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:14,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220035423] [2024-12-02 08:10:14,681 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:14,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:14,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:15,364 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:15,364 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:15,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220035423] [2024-12-02 08:10:15,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1220035423] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:15,365 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:15,365 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:15,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143202935] [2024-12-02 08:10:15,365 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:15,365 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:15,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:15,365 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:15,365 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:15,366 INFO L87 Difference]: Start difference. First operand 711 states and 994 transitions. Second operand has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:15,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:15,459 INFO L93 Difference]: Finished difference Result 1165 states and 1635 transitions. [2024-12-02 08:10:15,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:15,459 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 450 [2024-12-02 08:10:15,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:15,460 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:15,460 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:15,461 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:15,461 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 708 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 711 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:15,461 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [711 Valid, 1451 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:15,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:15,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:15,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.395448079658606) internal successors, (981), 703 states have internal predecessors, (981), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:15,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 993 transitions. [2024-12-02 08:10:15,473 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 993 transitions. Word has length 450 [2024-12-02 08:10:15,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:15,474 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 993 transitions. [2024-12-02 08:10:15,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:15,474 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 993 transitions. [2024-12-02 08:10:15,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2024-12-02 08:10:15,476 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:15,476 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:15,476 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 08:10:15,476 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:15,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:15,476 INFO L85 PathProgramCache]: Analyzing trace with hash -189619113, now seen corresponding path program 1 times [2024-12-02 08:10:15,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:15,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119031041] [2024-12-02 08:10:15,477 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:15,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:15,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:16,377 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:16,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:16,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119031041] [2024-12-02 08:10:16,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119031041] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:16,377 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:16,378 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:16,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064053317] [2024-12-02 08:10:16,378 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:16,378 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:16,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:16,379 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:16,379 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:16,379 INFO L87 Difference]: Start difference. First operand 711 states and 993 transitions. Second operand has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:16,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:16,482 INFO L93 Difference]: Finished difference Result 1165 states and 1633 transitions. [2024-12-02 08:10:16,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:16,482 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 451 [2024-12-02 08:10:16,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:16,484 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:16,484 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:16,484 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:16,485 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 700 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 703 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:16,485 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [703 Valid, 1451 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:16,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:16,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:16,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3940256045519204) internal successors, (980), 703 states have internal predecessors, (980), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:16,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 992 transitions. [2024-12-02 08:10:16,498 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 992 transitions. Word has length 451 [2024-12-02 08:10:16,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:16,499 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 992 transitions. [2024-12-02 08:10:16,499 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:16,499 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 992 transitions. [2024-12-02 08:10:16,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 453 [2024-12-02 08:10:16,501 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:16,501 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:16,501 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 08:10:16,501 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:16,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:16,502 INFO L85 PathProgramCache]: Analyzing trace with hash -353435452, now seen corresponding path program 1 times [2024-12-02 08:10:16,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:16,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142384735] [2024-12-02 08:10:16,502 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:16,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:16,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:17,178 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:17,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:17,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142384735] [2024-12-02 08:10:17,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142384735] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:17,179 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:17,179 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:17,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018747953] [2024-12-02 08:10:17,179 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:17,179 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:17,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:17,180 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:17,180 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:17,180 INFO L87 Difference]: Start difference. First operand 711 states and 992 transitions. Second operand has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:17,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:17,300 INFO L93 Difference]: Finished difference Result 1165 states and 1631 transitions. [2024-12-02 08:10:17,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:17,300 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 452 [2024-12-02 08:10:17,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:17,302 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:17,302 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:17,302 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:17,302 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1261 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1264 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:17,303 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1264 Valid, 1444 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:17,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:17,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:17,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3926031294452348) internal successors, (979), 703 states have internal predecessors, (979), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:17,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 991 transitions. [2024-12-02 08:10:17,312 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 991 transitions. Word has length 452 [2024-12-02 08:10:17,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:17,313 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 991 transitions. [2024-12-02 08:10:17,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:17,313 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 991 transitions. [2024-12-02 08:10:17,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 454 [2024-12-02 08:10:17,314 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:17,314 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:17,314 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 08:10:17,315 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:17,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:17,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1715196140, now seen corresponding path program 1 times [2024-12-02 08:10:17,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:17,315 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792432106] [2024-12-02 08:10:17,315 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:17,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:17,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:17,897 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:17,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:17,898 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792432106] [2024-12-02 08:10:17,898 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792432106] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:17,898 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:17,898 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:17,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323989132] [2024-12-02 08:10:17,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:17,898 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:17,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:17,899 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:17,899 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:17,899 INFO L87 Difference]: Start difference. First operand 711 states and 991 transitions. Second operand has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:17,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:17,998 INFO L93 Difference]: Finished difference Result 1165 states and 1629 transitions. [2024-12-02 08:10:17,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:17,998 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 453 [2024-12-02 08:10:17,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:18,000 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:18,000 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:18,001 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:18,001 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 684 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 687 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:18,001 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [687 Valid, 1451 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:18,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:18,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:18,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.391180654338549) internal successors, (978), 703 states have internal predecessors, (978), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:18,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 990 transitions. [2024-12-02 08:10:18,013 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 990 transitions. Word has length 453 [2024-12-02 08:10:18,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:18,014 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 990 transitions. [2024-12-02 08:10:18,014 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:18,014 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 990 transitions. [2024-12-02 08:10:18,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2024-12-02 08:10:18,016 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:18,017 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:18,017 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 08:10:18,017 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:18,017 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:18,018 INFO L85 PathProgramCache]: Analyzing trace with hash -1189986183, now seen corresponding path program 1 times [2024-12-02 08:10:18,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:18,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405508676] [2024-12-02 08:10:18,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:18,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:18,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:18,658 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:18,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:18,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405508676] [2024-12-02 08:10:18,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1405508676] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:18,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:18,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:18,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434285252] [2024-12-02 08:10:18,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:18,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:18,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:18,659 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:18,659 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:18,660 INFO L87 Difference]: Start difference. First operand 711 states and 990 transitions. Second operand has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:18,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:18,748 INFO L93 Difference]: Finished difference Result 1165 states and 1627 transitions. [2024-12-02 08:10:18,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:18,748 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 454 [2024-12-02 08:10:18,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:18,750 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:18,750 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:18,750 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:18,751 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 676 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 679 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:18,751 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [679 Valid, 1451 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:18,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:18,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:18,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3897581792318634) internal successors, (977), 703 states have internal predecessors, (977), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:18,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 989 transitions. [2024-12-02 08:10:18,761 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 989 transitions. Word has length 454 [2024-12-02 08:10:18,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:18,761 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 989 transitions. [2024-12-02 08:10:18,761 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:18,761 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 989 transitions. [2024-12-02 08:10:18,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 456 [2024-12-02 08:10:18,763 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:18,763 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:18,763 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 08:10:18,763 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:18,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:18,763 INFO L85 PathProgramCache]: Analyzing trace with hash 686713089, now seen corresponding path program 1 times [2024-12-02 08:10:18,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:18,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386413433] [2024-12-02 08:10:18,764 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:18,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:19,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:19,406 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:19,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:19,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386413433] [2024-12-02 08:10:19,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1386413433] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:19,406 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:19,406 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:19,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333766619] [2024-12-02 08:10:19,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:19,407 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:19,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:19,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:19,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:19,407 INFO L87 Difference]: Start difference. First operand 711 states and 989 transitions. Second operand has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:19,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:19,519 INFO L93 Difference]: Finished difference Result 1165 states and 1625 transitions. [2024-12-02 08:10:19,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:19,520 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 455 [2024-12-02 08:10:19,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:19,521 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:19,521 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:19,522 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:19,522 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1213 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1216 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:19,522 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1216 Valid, 1444 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:19,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:19,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:19,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3883357041251778) internal successors, (976), 703 states have internal predecessors, (976), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:19,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 988 transitions. [2024-12-02 08:10:19,532 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 988 transitions. Word has length 455 [2024-12-02 08:10:19,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:19,532 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 988 transitions. [2024-12-02 08:10:19,532 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:19,532 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 988 transitions. [2024-12-02 08:10:19,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 457 [2024-12-02 08:10:19,533 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:19,534 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:19,534 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 08:10:19,534 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:19,534 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:19,534 INFO L85 PathProgramCache]: Analyzing trace with hash -188533842, now seen corresponding path program 1 times [2024-12-02 08:10:19,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:19,534 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97244914] [2024-12-02 08:10:19,534 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:19,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:19,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:20,132 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:20,133 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:20,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97244914] [2024-12-02 08:10:20,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97244914] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:20,133 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:20,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:20,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285657710] [2024-12-02 08:10:20,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:20,133 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:20,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:20,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:20,134 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:20,134 INFO L87 Difference]: Start difference. First operand 711 states and 988 transitions. Second operand has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:20,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:20,206 INFO L93 Difference]: Finished difference Result 1165 states and 1623 transitions. [2024-12-02 08:10:20,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:20,207 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 456 [2024-12-02 08:10:20,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:20,209 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:20,209 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:20,209 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:20,210 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 645 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 648 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:20,210 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [648 Valid, 1499 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:20,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:20,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:20,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3869132290184922) internal successors, (975), 703 states have internal predecessors, (975), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:20,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 987 transitions. [2024-12-02 08:10:20,221 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 987 transitions. Word has length 456 [2024-12-02 08:10:20,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:20,221 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 987 transitions. [2024-12-02 08:10:20,221 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:20,221 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 987 transitions. [2024-12-02 08:10:20,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 458 [2024-12-02 08:10:20,223 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:20,223 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:20,223 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 08:10:20,223 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:20,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:20,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1644342422, now seen corresponding path program 1 times [2024-12-02 08:10:20,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:20,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582494053] [2024-12-02 08:10:20,224 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:20,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:20,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:20,799 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:20,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:20,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582494053] [2024-12-02 08:10:20,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1582494053] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:20,799 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:20,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:20,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894375433] [2024-12-02 08:10:20,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:20,800 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:20,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:20,800 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:20,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:20,801 INFO L87 Difference]: Start difference. First operand 711 states and 987 transitions. Second operand has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:20,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:20,876 INFO L93 Difference]: Finished difference Result 1165 states and 1621 transitions. [2024-12-02 08:10:20,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:20,876 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 457 [2024-12-02 08:10:20,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:20,878 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:20,878 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:20,878 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:20,878 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 637 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 640 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:20,879 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [640 Valid, 1499 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:20,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:20,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:20,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3854907539118066) internal successors, (974), 703 states have internal predecessors, (974), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:20,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 986 transitions. [2024-12-02 08:10:20,888 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 986 transitions. Word has length 457 [2024-12-02 08:10:20,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:20,889 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 986 transitions. [2024-12-02 08:10:20,889 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:20,889 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 986 transitions. [2024-12-02 08:10:20,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 459 [2024-12-02 08:10:20,891 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:20,891 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:20,891 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 08:10:20,891 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:20,892 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:20,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1436555875, now seen corresponding path program 1 times [2024-12-02 08:10:20,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:20,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505771755] [2024-12-02 08:10:20,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:20,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:21,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:21,546 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:21,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:21,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1505771755] [2024-12-02 08:10:21,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1505771755] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:21,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:21,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:21,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480590906] [2024-12-02 08:10:21,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:21,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:21,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:21,547 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:21,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:21,548 INFO L87 Difference]: Start difference. First operand 711 states and 986 transitions. Second operand has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:21,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:21,624 INFO L93 Difference]: Finished difference Result 1165 states and 1619 transitions. [2024-12-02 08:10:21,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:21,624 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 458 [2024-12-02 08:10:21,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:21,626 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:21,626 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:21,626 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:21,627 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 629 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 632 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:21,627 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [632 Valid, 1499 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:21,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:21,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:21,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3840682788051208) internal successors, (973), 703 states have internal predecessors, (973), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:21,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 985 transitions. [2024-12-02 08:10:21,636 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 985 transitions. Word has length 458 [2024-12-02 08:10:21,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:21,637 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 985 transitions. [2024-12-02 08:10:21,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:21,637 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 985 transitions. [2024-12-02 08:10:21,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2024-12-02 08:10:21,638 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:21,638 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:21,639 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 08:10:21,639 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:21,639 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:21,639 INFO L85 PathProgramCache]: Analyzing trace with hash -1605313621, now seen corresponding path program 1 times [2024-12-02 08:10:21,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:21,639 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500626910] [2024-12-02 08:10:21,639 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:21,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:21,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:22,397 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:22,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:22,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500626910] [2024-12-02 08:10:22,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500626910] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:22,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:22,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:22,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1225251010] [2024-12-02 08:10:22,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:22,399 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:22,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:22,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:22,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:22,400 INFO L87 Difference]: Start difference. First operand 711 states and 985 transitions. Second operand has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:22,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:22,470 INFO L93 Difference]: Finished difference Result 1165 states and 1617 transitions. [2024-12-02 08:10:22,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:22,470 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 459 [2024-12-02 08:10:22,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:22,472 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:22,472 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:22,473 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:22,473 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 621 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 624 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:22,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [624 Valid, 1499 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:22,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:22,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:22,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3826458036984353) internal successors, (972), 703 states have internal predecessors, (972), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:22,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 984 transitions. [2024-12-02 08:10:22,488 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 984 transitions. Word has length 459 [2024-12-02 08:10:22,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:22,488 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 984 transitions. [2024-12-02 08:10:22,489 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:22,489 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 984 transitions. [2024-12-02 08:10:22,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 461 [2024-12-02 08:10:22,491 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:22,491 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:22,492 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 08:10:22,492 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:22,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:22,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1083755368, now seen corresponding path program 1 times [2024-12-02 08:10:22,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:22,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250665956] [2024-12-02 08:10:22,492 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:22,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:22,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:23,162 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:23,162 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:23,162 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250665956] [2024-12-02 08:10:23,162 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1250665956] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:23,162 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:23,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:23,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746628307] [2024-12-02 08:10:23,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:23,163 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:23,163 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:23,164 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:23,164 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:23,164 INFO L87 Difference]: Start difference. First operand 711 states and 984 transitions. Second operand has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:23,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:23,211 INFO L93 Difference]: Finished difference Result 1165 states and 1615 transitions. [2024-12-02 08:10:23,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:23,212 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 460 [2024-12-02 08:10:23,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:23,214 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:23,214 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:23,214 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:23,214 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 606 mSDsluCounter, 766 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 609 SdHoareTripleChecker+Valid, 1523 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:23,214 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [609 Valid, 1523 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:23,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:23,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:23,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3812233285917497) internal successors, (971), 703 states have internal predecessors, (971), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:23,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 983 transitions. [2024-12-02 08:10:23,224 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 983 transitions. Word has length 460 [2024-12-02 08:10:23,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:23,224 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 983 transitions. [2024-12-02 08:10:23,224 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:23,224 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 983 transitions. [2024-12-02 08:10:23,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 462 [2024-12-02 08:10:23,226 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:23,226 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:23,226 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 08:10:23,226 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:23,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:23,227 INFO L85 PathProgramCache]: Analyzing trace with hash 2085697088, now seen corresponding path program 1 times [2024-12-02 08:10:23,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:23,227 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002451469] [2024-12-02 08:10:23,227 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:23,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:23,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:23,900 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:23,900 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:23,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002451469] [2024-12-02 08:10:23,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002451469] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:23,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:23,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:23,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392012339] [2024-12-02 08:10:23,901 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:23,901 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:23,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:23,902 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:23,902 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:23,902 INFO L87 Difference]: Start difference. First operand 711 states and 983 transitions. Second operand has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:23,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:23,954 INFO L93 Difference]: Finished difference Result 1165 states and 1613 transitions. [2024-12-02 08:10:23,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:23,955 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 461 [2024-12-02 08:10:23,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:23,956 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:23,956 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:23,957 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:23,957 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 598 mSDsluCounter, 766 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 601 SdHoareTripleChecker+Valid, 1523 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:23,957 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [601 Valid, 1523 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:23,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:23,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:23,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.379800853485064) internal successors, (970), 703 states have internal predecessors, (970), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:23,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 982 transitions. [2024-12-02 08:10:23,966 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 982 transitions. Word has length 461 [2024-12-02 08:10:23,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:23,967 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 982 transitions. [2024-12-02 08:10:23,967 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:23,967 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 982 transitions. [2024-12-02 08:10:23,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 463 [2024-12-02 08:10:23,969 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:23,969 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:23,969 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 08:10:23,969 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:23,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:23,969 INFO L85 PathProgramCache]: Analyzing trace with hash 1106690637, now seen corresponding path program 1 times [2024-12-02 08:10:23,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:23,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555737316] [2024-12-02 08:10:23,970 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:23,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:24,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:24,643 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:24,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:24,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555737316] [2024-12-02 08:10:24,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555737316] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:24,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:24,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:24,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820729107] [2024-12-02 08:10:24,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:24,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:24,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:24,644 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:24,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:24,645 INFO L87 Difference]: Start difference. First operand 711 states and 982 transitions. Second operand has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:24,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:24,896 INFO L93 Difference]: Finished difference Result 1165 states and 1611 transitions. [2024-12-02 08:10:24,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:24,896 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 462 [2024-12-02 08:10:24,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:24,897 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:24,897 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:24,898 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:24,898 INFO L435 NwaCegarLoop]: 578 mSDtfsCounter, 583 mSDsluCounter, 587 mSDsCounter, 0 mSdLazyCounter, 392 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 586 SdHoareTripleChecker+Valid, 1165 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 392 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:24,898 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [586 Valid, 1165 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 392 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:10:24,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:24,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:24,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3783783783783783) internal successors, (969), 703 states have internal predecessors, (969), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:24,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 981 transitions. [2024-12-02 08:10:24,910 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 981 transitions. Word has length 462 [2024-12-02 08:10:24,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:24,910 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 981 transitions. [2024-12-02 08:10:24,910 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:24,910 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 981 transitions. [2024-12-02 08:10:24,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 464 [2024-12-02 08:10:24,911 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:24,912 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:24,912 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 08:10:24,912 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:24,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:24,912 INFO L85 PathProgramCache]: Analyzing trace with hash 941358165, now seen corresponding path program 1 times [2024-12-02 08:10:24,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:24,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047545056] [2024-12-02 08:10:24,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:24,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:25,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:26,449 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:26,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:26,450 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047545056] [2024-12-02 08:10:26,450 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047545056] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:26,450 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:26,450 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:26,450 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189437522] [2024-12-02 08:10:26,450 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:26,451 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:26,451 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:26,451 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:26,451 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:26,451 INFO L87 Difference]: Start difference. First operand 711 states and 981 transitions. Second operand has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:26,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:26,500 INFO L93 Difference]: Finished difference Result 1165 states and 1609 transitions. [2024-12-02 08:10:26,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:26,501 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 463 [2024-12-02 08:10:26,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:26,502 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:26,502 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:26,502 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:26,503 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 496 mSDsluCounter, 758 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 496 SdHoareTripleChecker+Valid, 1514 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:26,503 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [496 Valid, 1514 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:26,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:26,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:26,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3769559032716927) internal successors, (968), 703 states have internal predecessors, (968), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:26,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 980 transitions. [2024-12-02 08:10:26,515 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 980 transitions. Word has length 463 [2024-12-02 08:10:26,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:26,516 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 980 transitions. [2024-12-02 08:10:26,516 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:26,516 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 980 transitions. [2024-12-02 08:10:26,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 465 [2024-12-02 08:10:26,517 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:26,518 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:26,518 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 08:10:26,518 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:26,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:26,519 INFO L85 PathProgramCache]: Analyzing trace with hash 2059983743, now seen corresponding path program 1 times [2024-12-02 08:10:26,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:26,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266987598] [2024-12-02 08:10:26,519 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:26,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:27,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:27,775 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:27,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:27,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266987598] [2024-12-02 08:10:27,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266987598] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:27,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:27,776 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:27,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233597018] [2024-12-02 08:10:27,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:27,776 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:27,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:27,777 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:27,777 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:27,777 INFO L87 Difference]: Start difference. First operand 711 states and 980 transitions. Second operand has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:27,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:27,864 INFO L93 Difference]: Finished difference Result 1165 states and 1607 transitions. [2024-12-02 08:10:27,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:27,865 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 464 [2024-12-02 08:10:27,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:27,866 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:27,866 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:27,867 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:27,867 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 1177 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1177 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:27,867 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1177 Valid, 1484 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:27,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:27,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:27,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3755334281650071) internal successors, (967), 703 states have internal predecessors, (967), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:27,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 979 transitions. [2024-12-02 08:10:27,878 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 979 transitions. Word has length 464 [2024-12-02 08:10:27,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:27,879 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 979 transitions. [2024-12-02 08:10:27,879 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:27,879 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 979 transitions. [2024-12-02 08:10:27,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 466 [2024-12-02 08:10:27,881 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:27,881 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:27,881 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 08:10:27,881 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:27,882 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:27,882 INFO L85 PathProgramCache]: Analyzing trace with hash 2072196053, now seen corresponding path program 1 times [2024-12-02 08:10:27,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:27,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873379444] [2024-12-02 08:10:27,882 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:27,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:28,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:29,260 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:29,260 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:29,260 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873379444] [2024-12-02 08:10:29,260 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1873379444] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:29,260 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:29,260 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:29,260 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82870111] [2024-12-02 08:10:29,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:29,260 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:29,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:29,261 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:29,261 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:29,261 INFO L87 Difference]: Start difference. First operand 711 states and 979 transitions. Second operand has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:29,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:29,341 INFO L93 Difference]: Finished difference Result 1165 states and 1605 transitions. [2024-12-02 08:10:29,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:29,341 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 465 [2024-12-02 08:10:29,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:29,343 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:29,343 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:29,343 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:29,344 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 1167 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1167 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:29,344 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1167 Valid, 1484 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:29,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:29,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:29,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3741109530583215) internal successors, (966), 703 states have internal predecessors, (966), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:29,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 978 transitions. [2024-12-02 08:10:29,355 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 978 transitions. Word has length 465 [2024-12-02 08:10:29,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:29,355 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 978 transitions. [2024-12-02 08:10:29,355 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:29,355 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 978 transitions. [2024-12-02 08:10:29,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 467 [2024-12-02 08:10:29,357 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:29,357 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:29,357 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 08:10:29,357 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:29,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:29,358 INFO L85 PathProgramCache]: Analyzing trace with hash 512722894, now seen corresponding path program 1 times [2024-12-02 08:10:29,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:29,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713321798] [2024-12-02 08:10:29,358 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:29,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:30,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:30,565 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:30,565 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:30,565 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713321798] [2024-12-02 08:10:30,566 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [713321798] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:30,566 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:30,566 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:30,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321752904] [2024-12-02 08:10:30,566 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:30,566 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:30,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:30,567 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:30,567 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:30,567 INFO L87 Difference]: Start difference. First operand 711 states and 978 transitions. Second operand has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:30,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:30,629 INFO L93 Difference]: Finished difference Result 1165 states and 1603 transitions. [2024-12-02 08:10:30,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:30,630 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 466 [2024-12-02 08:10:30,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:30,631 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:30,631 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:30,632 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:30,633 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 505 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:30,633 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 1484 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:30,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:30,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:30,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.372688477951636) internal successors, (965), 703 states have internal predecessors, (965), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:30,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 977 transitions. [2024-12-02 08:10:30,650 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 977 transitions. Word has length 466 [2024-12-02 08:10:30,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:30,650 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 977 transitions. [2024-12-02 08:10:30,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:30,650 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 977 transitions. [2024-12-02 08:10:30,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2024-12-02 08:10:30,653 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:30,653 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:30,653 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 08:10:30,653 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:30,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:30,654 INFO L85 PathProgramCache]: Analyzing trace with hash 861938758, now seen corresponding path program 1 times [2024-12-02 08:10:30,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:30,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348524913] [2024-12-02 08:10:30,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:30,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:31,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:32,292 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:32,292 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:32,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348524913] [2024-12-02 08:10:32,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1348524913] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:32,293 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:32,293 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:32,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902636334] [2024-12-02 08:10:32,293 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:32,293 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:32,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:32,294 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:32,294 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:32,295 INFO L87 Difference]: Start difference. First operand 711 states and 977 transitions. Second operand has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:32,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:32,447 INFO L93 Difference]: Finished difference Result 1165 states and 1601 transitions. [2024-12-02 08:10:32,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:32,448 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 467 [2024-12-02 08:10:32,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:32,449 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:32,449 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:32,449 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:32,450 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1212 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1212 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:32,450 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1212 Valid, 1422 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:32,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:32,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:32,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3712660028449501) internal successors, (964), 703 states have internal predecessors, (964), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:32,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 976 transitions. [2024-12-02 08:10:32,460 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 976 transitions. Word has length 467 [2024-12-02 08:10:32,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:32,460 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 976 transitions. [2024-12-02 08:10:32,460 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:32,461 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 976 transitions. [2024-12-02 08:10:32,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 469 [2024-12-02 08:10:32,462 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:32,462 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:32,462 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 08:10:32,463 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:32,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:32,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1901367216, now seen corresponding path program 1 times [2024-12-02 08:10:32,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:32,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [458198856] [2024-12-02 08:10:32,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:32,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:33,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:33,837 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:33,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:33,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [458198856] [2024-12-02 08:10:33,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [458198856] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:33,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:33,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:33,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168203311] [2024-12-02 08:10:33,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:33,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:33,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:33,839 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:33,839 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:33,839 INFO L87 Difference]: Start difference. First operand 711 states and 976 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:33,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:33,955 INFO L93 Difference]: Finished difference Result 1165 states and 1599 transitions. [2024-12-02 08:10:33,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:33,956 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 468 [2024-12-02 08:10:33,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:33,957 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:33,957 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:33,957 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:33,957 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 636 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 636 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:33,958 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [636 Valid, 1429 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:33,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:33,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:33,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3698435277382646) internal successors, (963), 703 states have internal predecessors, (963), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:33,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 975 transitions. [2024-12-02 08:10:33,966 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 975 transitions. Word has length 468 [2024-12-02 08:10:33,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:33,967 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 975 transitions. [2024-12-02 08:10:33,967 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:33,967 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 975 transitions. [2024-12-02 08:10:33,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2024-12-02 08:10:33,968 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:33,969 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:33,969 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 08:10:33,969 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:33,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:33,969 INFO L85 PathProgramCache]: Analyzing trace with hash 1536682647, now seen corresponding path program 1 times [2024-12-02 08:10:33,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:33,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385850745] [2024-12-02 08:10:33,969 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:33,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:34,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:35,248 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:35,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:35,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385850745] [2024-12-02 08:10:35,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [385850745] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:35,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:35,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:35,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601812843] [2024-12-02 08:10:35,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:35,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:35,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:35,250 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:35,250 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:35,250 INFO L87 Difference]: Start difference. First operand 711 states and 975 transitions. Second operand has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:35,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:35,350 INFO L93 Difference]: Finished difference Result 1165 states and 1597 transitions. [2024-12-02 08:10:35,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:35,350 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 469 [2024-12-02 08:10:35,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:35,352 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:35,352 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:35,352 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:35,353 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 558 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:35,353 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1422 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:35,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:35,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:35,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.368421052631579) internal successors, (962), 703 states have internal predecessors, (962), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:35,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 974 transitions. [2024-12-02 08:10:35,393 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 974 transitions. Word has length 469 [2024-12-02 08:10:35,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:35,393 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 974 transitions. [2024-12-02 08:10:35,393 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:35,393 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 974 transitions. [2024-12-02 08:10:35,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 471 [2024-12-02 08:10:35,395 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:35,395 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:35,395 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 08:10:35,395 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:35,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:35,396 INFO L85 PathProgramCache]: Analyzing trace with hash 1546007711, now seen corresponding path program 1 times [2024-12-02 08:10:35,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:35,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469850369] [2024-12-02 08:10:35,396 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:35,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:36,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:36,776 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:36,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:36,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469850369] [2024-12-02 08:10:36,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1469850369] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:36,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:36,776 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:36,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487862276] [2024-12-02 08:10:36,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:36,777 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:36,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:36,777 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:36,778 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:36,778 INFO L87 Difference]: Start difference. First operand 711 states and 974 transitions. Second operand has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:36,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:36,888 INFO L93 Difference]: Finished difference Result 1165 states and 1595 transitions. [2024-12-02 08:10:36,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:36,888 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 470 [2024-12-02 08:10:36,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:36,890 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:36,890 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:36,890 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:36,891 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 634 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 634 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:36,891 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [634 Valid, 1429 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:36,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:36,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:36,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3669985775248934) internal successors, (961), 703 states have internal predecessors, (961), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:36,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 973 transitions. [2024-12-02 08:10:36,900 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 973 transitions. Word has length 470 [2024-12-02 08:10:36,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:36,900 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 973 transitions. [2024-12-02 08:10:36,901 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:36,901 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 973 transitions. [2024-12-02 08:10:36,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 472 [2024-12-02 08:10:36,902 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:36,902 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:36,902 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 08:10:36,903 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:36,903 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:36,903 INFO L85 PathProgramCache]: Analyzing trace with hash 916407912, now seen corresponding path program 1 times [2024-12-02 08:10:36,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:36,903 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163010008] [2024-12-02 08:10:36,903 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:36,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:37,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:38,217 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:38,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:38,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163010008] [2024-12-02 08:10:38,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [163010008] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:38,218 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:38,218 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:38,218 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429409491] [2024-12-02 08:10:38,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:38,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:38,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:38,219 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:38,219 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:38,219 INFO L87 Difference]: Start difference. First operand 711 states and 973 transitions. Second operand has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:38,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:38,348 INFO L93 Difference]: Finished difference Result 1165 states and 1593 transitions. [2024-12-02 08:10:38,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:38,349 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 471 [2024-12-02 08:10:38,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:38,350 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:38,350 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:38,350 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:38,351 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 633 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 633 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:38,351 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [633 Valid, 1429 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:38,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:38,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:38,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3655761024182076) internal successors, (960), 703 states have internal predecessors, (960), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:38,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 972 transitions. [2024-12-02 08:10:38,361 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 972 transitions. Word has length 471 [2024-12-02 08:10:38,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:38,361 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 972 transitions. [2024-12-02 08:10:38,361 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:38,362 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 972 transitions. [2024-12-02 08:10:38,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 473 [2024-12-02 08:10:38,363 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:38,363 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:38,364 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 08:10:38,364 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:38,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:38,364 INFO L85 PathProgramCache]: Analyzing trace with hash -426939378, now seen corresponding path program 1 times [2024-12-02 08:10:38,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:38,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774862271] [2024-12-02 08:10:38,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:38,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:39,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:39,667 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:39,667 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:39,667 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774862271] [2024-12-02 08:10:39,667 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [774862271] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:39,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:39,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:39,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091076480] [2024-12-02 08:10:39,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:39,668 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:39,668 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:39,669 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:39,669 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:39,669 INFO L87 Difference]: Start difference. First operand 711 states and 972 transitions. Second operand has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:39,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:39,778 INFO L93 Difference]: Finished difference Result 1165 states and 1591 transitions. [2024-12-02 08:10:39,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:39,778 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 472 [2024-12-02 08:10:39,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:39,779 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:39,779 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:39,780 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:39,780 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 632 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 632 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:39,780 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [632 Valid, 1429 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:39,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:39,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:39,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.364153627311522) internal successors, (959), 703 states have internal predecessors, (959), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:39,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 971 transitions. [2024-12-02 08:10:39,790 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 971 transitions. Word has length 472 [2024-12-02 08:10:39,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:39,790 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 971 transitions. [2024-12-02 08:10:39,790 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:39,790 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 971 transitions. [2024-12-02 08:10:39,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 474 [2024-12-02 08:10:39,791 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:39,792 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:39,792 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 08:10:39,792 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:39,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:39,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1135077305, now seen corresponding path program 1 times [2024-12-02 08:10:39,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:39,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695586959] [2024-12-02 08:10:39,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:39,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:40,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:41,172 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:41,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:41,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695586959] [2024-12-02 08:10:41,172 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [695586959] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:41,172 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:41,173 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:10:41,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302152796] [2024-12-02 08:10:41,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:41,173 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:10:41,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:41,174 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:10:41,174 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:10:41,174 INFO L87 Difference]: Start difference. First operand 711 states and 971 transitions. Second operand has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:41,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:41,270 INFO L93 Difference]: Finished difference Result 1165 states and 1589 transitions. [2024-12-02 08:10:41,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:10:41,271 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 473 [2024-12-02 08:10:41,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:41,272 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 08:10:41,272 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 08:10:41,272 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:41,272 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 522 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 522 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:41,273 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [522 Valid, 1422 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:41,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 08:10:41,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 08:10:41,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3627311522048364) internal successors, (958), 703 states have internal predecessors, (958), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:10:41,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 970 transitions. [2024-12-02 08:10:41,283 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 970 transitions. Word has length 473 [2024-12-02 08:10:41,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:41,283 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 970 transitions. [2024-12-02 08:10:41,283 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:41,283 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 970 transitions. [2024-12-02 08:10:41,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 475 [2024-12-02 08:10:41,285 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:41,285 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:41,286 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 08:10:41,286 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:41,286 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:41,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1287685629, now seen corresponding path program 1 times [2024-12-02 08:10:41,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:41,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376841370] [2024-12-02 08:10:41,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:41,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:42,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:43,200 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:43,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:43,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376841370] [2024-12-02 08:10:43,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376841370] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:43,201 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:43,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:10:43,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695499631] [2024-12-02 08:10:43,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:43,202 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:10:43,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:43,202 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:10:43,202 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:43,202 INFO L87 Difference]: Start difference. First operand 711 states and 970 transitions. Second operand has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:43,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:43,567 INFO L93 Difference]: Finished difference Result 1683 states and 2299 transitions. [2024-12-02 08:10:43,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:10:43,567 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 474 [2024-12-02 08:10:43,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:43,569 INFO L225 Difference]: With dead ends: 1683 [2024-12-02 08:10:43,569 INFO L226 Difference]: Without dead ends: 1229 [2024-12-02 08:10:43,570 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:10:43,570 INFO L435 NwaCegarLoop]: 631 mSDtfsCounter, 725 mSDsluCounter, 2070 mSDsCounter, 0 mSdLazyCounter, 567 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 728 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 575 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 567 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:43,570 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [728 Valid, 2701 Invalid, 575 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 567 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:10:43,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1229 states. [2024-12-02 08:10:43,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1229 to 1121. [2024-12-02 08:10:43,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1121 states, 1110 states have (on average 1.3567567567567567) internal successors, (1506), 1110 states have internal predecessors, (1506), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:10:43,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1121 states to 1121 states and 1524 transitions. [2024-12-02 08:10:43,585 INFO L78 Accepts]: Start accepts. Automaton has 1121 states and 1524 transitions. Word has length 474 [2024-12-02 08:10:43,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:43,585 INFO L471 AbstractCegarLoop]: Abstraction has 1121 states and 1524 transitions. [2024-12-02 08:10:43,586 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:43,586 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 1524 transitions. [2024-12-02 08:10:43,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2024-12-02 08:10:43,587 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:43,588 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:43,588 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 08:10:43,588 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:43,588 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:43,588 INFO L85 PathProgramCache]: Analyzing trace with hash -642634531, now seen corresponding path program 1 times [2024-12-02 08:10:43,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:43,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031034268] [2024-12-02 08:10:43,589 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:43,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:44,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:45,883 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-02 08:10:45,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:45,883 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031034268] [2024-12-02 08:10:45,883 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031034268] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:45,883 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:45,883 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:10:45,883 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1868511663] [2024-12-02 08:10:45,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:45,884 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:10:45,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:45,884 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:10:45,884 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:45,885 INFO L87 Difference]: Start difference. First operand 1121 states and 1524 transitions. Second operand has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:45,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:45,936 INFO L93 Difference]: Finished difference Result 2050 states and 2737 transitions. [2024-12-02 08:10:45,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:10:45,937 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 475 [2024-12-02 08:10:45,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:45,939 INFO L225 Difference]: With dead ends: 2050 [2024-12-02 08:10:45,939 INFO L226 Difference]: Without dead ends: 1358 [2024-12-02 08:10:45,940 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:10:45,940 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 19 mSDsluCounter, 2259 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 3015 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:45,941 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 3015 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:10:45,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1358 states. [2024-12-02 08:10:45,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1358 to 1352. [2024-12-02 08:10:45,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1352 states, 1341 states have (on average 1.3154362416107384) internal successors, (1764), 1341 states have internal predecessors, (1764), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:10:45,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1352 states to 1352 states and 1782 transitions. [2024-12-02 08:10:45,960 INFO L78 Accepts]: Start accepts. Automaton has 1352 states and 1782 transitions. Word has length 475 [2024-12-02 08:10:45,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:45,960 INFO L471 AbstractCegarLoop]: Abstraction has 1352 states and 1782 transitions. [2024-12-02 08:10:45,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:45,961 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 1782 transitions. [2024-12-02 08:10:45,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-12-02 08:10:45,963 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:45,963 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:45,963 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 08:10:45,963 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:45,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:45,963 INFO L85 PathProgramCache]: Analyzing trace with hash 557524213, now seen corresponding path program 1 times [2024-12-02 08:10:45,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:45,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655647886] [2024-12-02 08:10:45,964 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:45,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:47,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:48,391 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:48,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:48,392 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655647886] [2024-12-02 08:10:48,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [655647886] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:48,392 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:48,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:10:48,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817133748] [2024-12-02 08:10:48,392 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:48,393 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:10:48,393 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:48,393 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:10:48,393 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:10:48,394 INFO L87 Difference]: Start difference. First operand 1352 states and 1782 transitions. Second operand has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:48,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:48,904 INFO L93 Difference]: Finished difference Result 1906 states and 2519 transitions. [2024-12-02 08:10:48,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:10:48,905 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-12-02 08:10:48,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:48,907 INFO L225 Difference]: With dead ends: 1906 [2024-12-02 08:10:48,907 INFO L226 Difference]: Without dead ends: 1375 [2024-12-02 08:10:48,908 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:10:48,908 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 1339 mSDsluCounter, 1681 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1342 SdHoareTripleChecker+Valid, 2249 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:48,908 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1342 Valid, 2249 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:10:48,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1375 states. [2024-12-02 08:10:48,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1375 to 1353. [2024-12-02 08:10:48,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1342 states have (on average 1.3152011922503726) internal successors, (1765), 1342 states have internal predecessors, (1765), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:10:48,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 1783 transitions. [2024-12-02 08:10:48,927 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 1783 transitions. Word has length 477 [2024-12-02 08:10:48,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:48,927 INFO L471 AbstractCegarLoop]: Abstraction has 1353 states and 1783 transitions. [2024-12-02 08:10:48,928 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:48,928 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 1783 transitions. [2024-12-02 08:10:48,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-12-02 08:10:48,930 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:48,930 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:48,930 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 08:10:48,931 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:48,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:48,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1156124924, now seen corresponding path program 1 times [2024-12-02 08:10:48,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:48,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31938698] [2024-12-02 08:10:48,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:48,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:50,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:51,190 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2024-12-02 08:10:51,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:51,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31938698] [2024-12-02 08:10:51,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [31938698] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:51,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:51,191 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:10:51,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955351596] [2024-12-02 08:10:51,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:51,191 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:10:51,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:51,192 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:10:51,192 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:10:51,192 INFO L87 Difference]: Start difference. First operand 1353 states and 1783 transitions. Second operand has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:51,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:51,334 INFO L93 Difference]: Finished difference Result 3074 states and 4032 transitions. [2024-12-02 08:10:51,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:10:51,335 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-12-02 08:10:51,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:51,339 INFO L225 Difference]: With dead ends: 3074 [2024-12-02 08:10:51,339 INFO L226 Difference]: Without dead ends: 2361 [2024-12-02 08:10:51,340 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:10:51,341 INFO L435 NwaCegarLoop]: 1801 mSDtfsCounter, 1158 mSDsluCounter, 7740 mSDsCounter, 0 mSdLazyCounter, 147 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1161 SdHoareTripleChecker+Valid, 9541 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:51,341 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1161 Valid, 9541 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 147 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:10:51,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2361 states. [2024-12-02 08:10:51,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2361 to 1420. [2024-12-02 08:10:51,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1420 states, 1406 states have (on average 1.3200568990042674) internal successors, (1856), 1406 states have internal predecessors, (1856), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:10:51,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1420 states to 1420 states and 1880 transitions. [2024-12-02 08:10:51,380 INFO L78 Accepts]: Start accepts. Automaton has 1420 states and 1880 transitions. Word has length 477 [2024-12-02 08:10:51,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:51,380 INFO L471 AbstractCegarLoop]: Abstraction has 1420 states and 1880 transitions. [2024-12-02 08:10:51,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:10:51,380 INFO L276 IsEmpty]: Start isEmpty. Operand 1420 states and 1880 transitions. [2024-12-02 08:10:51,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 479 [2024-12-02 08:10:51,384 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:51,384 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:51,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 08:10:51,384 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:51,385 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:51,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1031637214, now seen corresponding path program 1 times [2024-12-02 08:10:51,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:51,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056996708] [2024-12-02 08:10:51,385 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:51,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:52,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:53,341 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2024-12-02 08:10:53,341 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:53,341 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056996708] [2024-12-02 08:10:53,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056996708] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:53,341 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:53,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:10:53,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455915935] [2024-12-02 08:10:53,341 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:53,342 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:10:53,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:53,343 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:10:53,343 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:10:53,343 INFO L87 Difference]: Start difference. First operand 1420 states and 1880 transitions. Second operand has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:10:53,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:53,627 INFO L93 Difference]: Finished difference Result 2814 states and 3716 transitions. [2024-12-02 08:10:53,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:10:53,628 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 478 [2024-12-02 08:10:53,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:53,630 INFO L225 Difference]: With dead ends: 2814 [2024-12-02 08:10:53,630 INFO L226 Difference]: Without dead ends: 1436 [2024-12-02 08:10:53,632 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:10:53,632 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 771 mSDsluCounter, 2832 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 773 SdHoareTripleChecker+Valid, 3588 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:53,632 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [773 Valid, 3588 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:10:53,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2024-12-02 08:10:53,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 1428. [2024-12-02 08:10:53,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1428 states, 1414 states have (on average 1.3154172560113153) internal successors, (1860), 1414 states have internal predecessors, (1860), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:10:53,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 1884 transitions. [2024-12-02 08:10:53,652 INFO L78 Accepts]: Start accepts. Automaton has 1428 states and 1884 transitions. Word has length 478 [2024-12-02 08:10:53,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:53,652 INFO L471 AbstractCegarLoop]: Abstraction has 1428 states and 1884 transitions. [2024-12-02 08:10:53,652 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:10:53,652 INFO L276 IsEmpty]: Start isEmpty. Operand 1428 states and 1884 transitions. [2024-12-02 08:10:53,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 481 [2024-12-02 08:10:53,654 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:53,654 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:53,654 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 08:10:53,654 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:53,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:53,655 INFO L85 PathProgramCache]: Analyzing trace with hash 529696992, now seen corresponding path program 1 times [2024-12-02 08:10:53,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:53,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331985659] [2024-12-02 08:10:53,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:53,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:55,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:55,899 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-12-02 08:10:55,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:55,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331985659] [2024-12-02 08:10:55,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [331985659] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:55,899 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:55,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:10:55,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082095182] [2024-12-02 08:10:55,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:55,900 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:10:55,900 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:55,901 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:10:55,901 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:10:55,901 INFO L87 Difference]: Start difference. First operand 1428 states and 1884 transitions. Second operand has 8 states, 8 states have (on average 49.0) internal successors, (392), 8 states have internal predecessors, (392), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:10:56,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:56,647 INFO L93 Difference]: Finished difference Result 3648 states and 4744 transitions. [2024-12-02 08:10:56,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:10:56,647 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 49.0) internal successors, (392), 8 states have internal predecessors, (392), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 480 [2024-12-02 08:10:56,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:56,650 INFO L225 Difference]: With dead ends: 3648 [2024-12-02 08:10:56,650 INFO L226 Difference]: Without dead ends: 2624 [2024-12-02 08:10:56,651 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:10:56,652 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1278 mSDsluCounter, 4903 mSDsCounter, 0 mSdLazyCounter, 1395 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1281 SdHoareTripleChecker+Valid, 6047 SdHoareTripleChecker+Invalid, 1395 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1395 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:56,652 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1281 Valid, 6047 Invalid, 1395 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1395 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 08:10:56,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2624 states. [2024-12-02 08:10:56,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2624 to 2616. [2024-12-02 08:10:56,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2616 states, 2593 states have (on average 1.303895102198226) internal successors, (3381), 2593 states have internal predecessors, (3381), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:10:56,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2616 states to 2616 states and 3423 transitions. [2024-12-02 08:10:56,686 INFO L78 Accepts]: Start accepts. Automaton has 2616 states and 3423 transitions. Word has length 480 [2024-12-02 08:10:56,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:56,686 INFO L471 AbstractCegarLoop]: Abstraction has 2616 states and 3423 transitions. [2024-12-02 08:10:56,687 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 49.0) internal successors, (392), 8 states have internal predecessors, (392), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:10:56,687 INFO L276 IsEmpty]: Start isEmpty. Operand 2616 states and 3423 transitions. [2024-12-02 08:10:56,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 483 [2024-12-02 08:10:56,690 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:56,690 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:56,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 08:10:56,690 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:56,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:56,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1940933154, now seen corresponding path program 1 times [2024-12-02 08:10:56,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:56,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369643131] [2024-12-02 08:10:56,690 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:56,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:58,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:58,686 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-12-02 08:10:58,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:58,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369643131] [2024-12-02 08:10:58,687 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369643131] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:10:58,687 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:10:58,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:10:58,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745575620] [2024-12-02 08:10:58,687 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:10:58,687 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:10:58,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:58,688 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:10:58,688 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:10:58,688 INFO L87 Difference]: Start difference. First operand 2616 states and 3423 transitions. Second operand has 7 states, 7 states have (on average 52.714285714285715) internal successors, (369), 7 states have internal predecessors, (369), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:10:59,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:59,196 INFO L93 Difference]: Finished difference Result 4963 states and 6455 transitions. [2024-12-02 08:10:59,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:10:59,196 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 52.714285714285715) internal successors, (369), 7 states have internal predecessors, (369), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) Word has length 482 [2024-12-02 08:10:59,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:59,200 INFO L225 Difference]: With dead ends: 4963 [2024-12-02 08:10:59,200 INFO L226 Difference]: Without dead ends: 2648 [2024-12-02 08:10:59,201 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:10:59,202 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 753 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 755 SdHoareTripleChecker+Valid, 2240 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:59,202 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [755 Valid, 2240 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:10:59,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2648 states. [2024-12-02 08:10:59,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2648 to 2632. [2024-12-02 08:10:59,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2632 states, 2609 states have (on average 1.298965120735914) internal successors, (3389), 2609 states have internal predecessors, (3389), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:10:59,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2632 states to 2632 states and 3431 transitions. [2024-12-02 08:10:59,235 INFO L78 Accepts]: Start accepts. Automaton has 2632 states and 3431 transitions. Word has length 482 [2024-12-02 08:10:59,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:59,235 INFO L471 AbstractCegarLoop]: Abstraction has 2632 states and 3431 transitions. [2024-12-02 08:10:59,235 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 52.714285714285715) internal successors, (369), 7 states have internal predecessors, (369), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:10:59,236 INFO L276 IsEmpty]: Start isEmpty. Operand 2632 states and 3431 transitions. [2024-12-02 08:10:59,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-12-02 08:10:59,238 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:59,239 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:59,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 08:10:59,239 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:59,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:59,239 INFO L85 PathProgramCache]: Analyzing trace with hash -616963008, now seen corresponding path program 1 times [2024-12-02 08:10:59,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:59,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281276872] [2024-12-02 08:10:59,239 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:59,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:00,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:01,606 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-12-02 08:11:01,606 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:01,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281276872] [2024-12-02 08:11:01,606 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281276872] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:01,606 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:01,607 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:01,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396988073] [2024-12-02 08:11:01,607 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:01,608 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:01,608 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:01,608 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:01,608 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:01,608 INFO L87 Difference]: Start difference. First operand 2632 states and 3431 transitions. Second operand has 6 states, 6 states have (on average 61.833333333333336) internal successors, (371), 6 states have internal predecessors, (371), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:11:02,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:02,032 INFO L93 Difference]: Finished difference Result 4943 states and 6405 transitions. [2024-12-02 08:11:02,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:02,032 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 61.833333333333336) internal successors, (371), 6 states have internal predecessors, (371), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 484 [2024-12-02 08:11:02,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:02,036 INFO L225 Difference]: With dead ends: 4943 [2024-12-02 08:11:02,036 INFO L226 Difference]: Without dead ends: 2648 [2024-12-02 08:11:02,038 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:11:02,038 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 685 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 686 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:02,038 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [686 Valid, 2233 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:11:02,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2648 states. [2024-12-02 08:11:02,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2648 to 2640. [2024-12-02 08:11:02,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2640 states, 2617 states have (on average 1.2980512036683225) internal successors, (3397), 2617 states have internal predecessors, (3397), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 08:11:02,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2640 states to 2640 states and 3439 transitions. [2024-12-02 08:11:02,096 INFO L78 Accepts]: Start accepts. Automaton has 2640 states and 3439 transitions. Word has length 484 [2024-12-02 08:11:02,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:02,096 INFO L471 AbstractCegarLoop]: Abstraction has 2640 states and 3439 transitions. [2024-12-02 08:11:02,096 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 61.833333333333336) internal successors, (371), 6 states have internal predecessors, (371), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:11:02,096 INFO L276 IsEmpty]: Start isEmpty. Operand 2640 states and 3439 transitions. [2024-12-02 08:11:02,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2024-12-02 08:11:02,101 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:02,101 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:02,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 08:11:02,101 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:02,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:02,102 INFO L85 PathProgramCache]: Analyzing trace with hash 196482588, now seen corresponding path program 1 times [2024-12-02 08:11:02,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:02,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446548179] [2024-12-02 08:11:02,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:02,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:04,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:04,809 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-12-02 08:11:04,809 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:04,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446548179] [2024-12-02 08:11:04,809 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446548179] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:04,809 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:04,810 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:04,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381718541] [2024-12-02 08:11:04,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:04,810 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:04,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:04,810 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:04,810 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:04,810 INFO L87 Difference]: Start difference. First operand 2640 states and 3439 transitions. Second operand has 6 states, 6 states have (on average 60.666666666666664) internal successors, (364), 6 states have internal predecessors, (364), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:11:05,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:05,280 INFO L93 Difference]: Finished difference Result 2650 states and 3447 transitions. [2024-12-02 08:11:05,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:05,280 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 60.666666666666664) internal successors, (364), 6 states have internal predecessors, (364), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 486 [2024-12-02 08:11:05,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:05,282 INFO L225 Difference]: With dead ends: 2650 [2024-12-02 08:11:05,282 INFO L226 Difference]: Without dead ends: 1448 [2024-12-02 08:11:05,283 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:11:05,283 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 693 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:05,284 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 2233 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:11:05,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2024-12-02 08:11:05,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1444. [2024-12-02 08:11:05,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1444 states, 1430 states have (on average 1.309090909090909) internal successors, (1872), 1430 states have internal predecessors, (1872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:11:05,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 1896 transitions. [2024-12-02 08:11:05,313 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 1896 transitions. Word has length 486 [2024-12-02 08:11:05,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:05,313 INFO L471 AbstractCegarLoop]: Abstraction has 1444 states and 1896 transitions. [2024-12-02 08:11:05,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 60.666666666666664) internal successors, (364), 6 states have internal predecessors, (364), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:11:05,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 1896 transitions. [2024-12-02 08:11:05,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2024-12-02 08:11:05,317 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:05,317 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:05,317 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-02 08:11:05,317 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:05,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:05,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1224288658, now seen corresponding path program 1 times [2024-12-02 08:11:05,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:05,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400003964] [2024-12-02 08:11:05,318 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:05,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:07,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:09,465 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2024-12-02 08:11:09,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:09,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400003964] [2024-12-02 08:11:09,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [400003964] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:09,466 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:09,466 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 08:11:09,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285378222] [2024-12-02 08:11:09,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:09,466 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:11:09,466 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:09,467 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:11:09,467 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:11:09,467 INFO L87 Difference]: Start difference. First operand 1444 states and 1896 transitions. Second operand has 10 states, 10 states have (on average 38.1) internal successors, (381), 10 states have internal predecessors, (381), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:09,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:09,899 INFO L93 Difference]: Finished difference Result 2889 states and 3780 transitions. [2024-12-02 08:11:09,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-12-02 08:11:09,900 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 38.1) internal successors, (381), 10 states have internal predecessors, (381), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 486 [2024-12-02 08:11:09,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:09,903 INFO L225 Difference]: With dead ends: 2889 [2024-12-02 08:11:09,903 INFO L226 Difference]: Without dead ends: 1943 [2024-12-02 08:11:09,904 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:11:09,904 INFO L435 NwaCegarLoop]: 1176 mSDtfsCounter, 2402 mSDsluCounter, 7053 mSDsCounter, 0 mSdLazyCounter, 507 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2407 SdHoareTripleChecker+Valid, 8229 SdHoareTripleChecker+Invalid, 515 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 507 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:09,904 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2407 Valid, 8229 Invalid, 515 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 507 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:11:09,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1943 states. [2024-12-02 08:11:09,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1943 to 1486. [2024-12-02 08:11:09,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1486 states, 1470 states have (on average 1.3095238095238095) internal successors, (1925), 1470 states have internal predecessors, (1925), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-12-02 08:11:09,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1486 states to 1486 states and 1953 transitions. [2024-12-02 08:11:09,929 INFO L78 Accepts]: Start accepts. Automaton has 1486 states and 1953 transitions. Word has length 486 [2024-12-02 08:11:09,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:09,929 INFO L471 AbstractCegarLoop]: Abstraction has 1486 states and 1953 transitions. [2024-12-02 08:11:09,929 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 38.1) internal successors, (381), 10 states have internal predecessors, (381), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:09,929 INFO L276 IsEmpty]: Start isEmpty. Operand 1486 states and 1953 transitions. [2024-12-02 08:11:09,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2024-12-02 08:11:09,932 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:09,932 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:09,932 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 08:11:09,932 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:09,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:09,933 INFO L85 PathProgramCache]: Analyzing trace with hash 538858702, now seen corresponding path program 1 times [2024-12-02 08:11:09,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:09,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700630970] [2024-12-02 08:11:09,933 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:09,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:13,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:13,782 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2024-12-02 08:11:13,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:13,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700630970] [2024-12-02 08:11:13,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1700630970] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:13,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:13,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:11:13,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375938611] [2024-12-02 08:11:13,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:13,783 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:11:13,783 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:13,784 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:11:13,784 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:11:13,784 INFO L87 Difference]: Start difference. First operand 1486 states and 1953 transitions. Second operand has 7 states, 7 states have (on average 53.142857142857146) internal successors, (372), 7 states have internal predecessors, (372), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:11:14,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:14,031 INFO L93 Difference]: Finished difference Result 3116 states and 4082 transitions. [2024-12-02 08:11:14,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:11:14,031 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 53.142857142857146) internal successors, (372), 7 states have internal predecessors, (372), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 486 [2024-12-02 08:11:14,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:14,033 INFO L225 Difference]: With dead ends: 3116 [2024-12-02 08:11:14,033 INFO L226 Difference]: Without dead ends: 1502 [2024-12-02 08:11:14,034 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:11:14,035 INFO L435 NwaCegarLoop]: 737 mSDtfsCounter, 835 mSDsluCounter, 2771 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 838 SdHoareTripleChecker+Valid, 3508 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:14,035 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [838 Valid, 3508 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:11:14,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1502 states. [2024-12-02 08:11:14,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1502 to 1494. [2024-12-02 08:11:14,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1494 states, 1478 states have (on average 1.3051420838971584) internal successors, (1929), 1478 states have internal predecessors, (1929), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-12-02 08:11:14,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1494 states to 1494 states and 1957 transitions. [2024-12-02 08:11:14,055 INFO L78 Accepts]: Start accepts. Automaton has 1494 states and 1957 transitions. Word has length 486 [2024-12-02 08:11:14,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:14,055 INFO L471 AbstractCegarLoop]: Abstraction has 1494 states and 1957 transitions. [2024-12-02 08:11:14,055 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 53.142857142857146) internal successors, (372), 7 states have internal predecessors, (372), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:11:14,056 INFO L276 IsEmpty]: Start isEmpty. Operand 1494 states and 1957 transitions. [2024-12-02 08:11:14,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 489 [2024-12-02 08:11:14,057 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:14,058 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:14,058 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 08:11:14,058 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:14,058 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:14,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1555488832, now seen corresponding path program 1 times [2024-12-02 08:11:14,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:14,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529004598] [2024-12-02 08:11:14,058 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:14,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:16,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:17,892 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 85 proven. 17 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 08:11:17,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:17,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529004598] [2024-12-02 08:11:17,893 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529004598] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:17,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1616073956] [2024-12-02 08:11:17,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:17,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:17,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:17,895 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:17,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 08:11:19,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:19,763 INFO L256 TraceCheckSpWp]: Trace formula consists of 2974 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-12-02 08:11:19,778 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:11:20,019 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2024-12-02 08:11:20,019 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:11:20,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1616073956] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:20,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:11:20,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13 [2024-12-02 08:11:20,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012945026] [2024-12-02 08:11:20,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:20,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:20,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:20,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:20,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:11:20,021 INFO L87 Difference]: Start difference. First operand 1494 states and 1957 transitions. Second operand has 6 states, 6 states have (on average 59.666666666666664) internal successors, (358), 6 states have internal predecessors, (358), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:11:20,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:20,418 INFO L93 Difference]: Finished difference Result 2812 states and 3658 transitions. [2024-12-02 08:11:20,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:20,419 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 59.666666666666664) internal successors, (358), 6 states have internal predecessors, (358), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 488 [2024-12-02 08:11:20,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:20,420 INFO L225 Difference]: With dead ends: 2812 [2024-12-02 08:11:20,420 INFO L226 Difference]: Without dead ends: 1502 [2024-12-02 08:11:20,421 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 496 GetRequests, 485 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:11:20,422 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 699 mSDsluCounter, 1649 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 702 SdHoareTripleChecker+Valid, 2208 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:20,422 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [702 Valid, 2208 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:11:20,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1502 states. [2024-12-02 08:11:20,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1502 to 1498. [2024-12-02 08:11:20,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1498 states, 1482 states have (on average 1.3043184885290149) internal successors, (1933), 1482 states have internal predecessors, (1933), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-12-02 08:11:20,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1498 states to 1498 states and 1961 transitions. [2024-12-02 08:11:20,455 INFO L78 Accepts]: Start accepts. Automaton has 1498 states and 1961 transitions. Word has length 488 [2024-12-02 08:11:20,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:20,456 INFO L471 AbstractCegarLoop]: Abstraction has 1498 states and 1961 transitions. [2024-12-02 08:11:20,456 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 59.666666666666664) internal successors, (358), 6 states have internal predecessors, (358), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:11:20,456 INFO L276 IsEmpty]: Start isEmpty. Operand 1498 states and 1961 transitions. [2024-12-02 08:11:20,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2024-12-02 08:11:20,459 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:20,460 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:20,477 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 08:11:20,660 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:20,660 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:20,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:20,661 INFO L85 PathProgramCache]: Analyzing trace with hash 540170644, now seen corresponding path program 1 times [2024-12-02 08:11:20,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:20,661 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919186412] [2024-12-02 08:11:20,661 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:20,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:22,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:25,082 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2024-12-02 08:11:25,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:25,083 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919186412] [2024-12-02 08:11:25,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [919186412] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:25,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:25,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:11:25,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380251991] [2024-12-02 08:11:25,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:25,083 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:11:25,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:25,084 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:11:25,084 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:11:25,084 INFO L87 Difference]: Start difference. First operand 1498 states and 1961 transitions. Second operand has 9 states, 9 states have (on average 43.22222222222222) internal successors, (389), 9 states have internal predecessors, (389), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:26,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:26,397 INFO L93 Difference]: Finished difference Result 3719 states and 4791 transitions. [2024-12-02 08:11:26,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:11:26,398 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 43.22222222222222) internal successors, (389), 9 states have internal predecessors, (389), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 490 [2024-12-02 08:11:26,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:26,400 INFO L225 Difference]: With dead ends: 3719 [2024-12-02 08:11:26,400 INFO L226 Difference]: Without dead ends: 2612 [2024-12-02 08:11:26,401 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:11:26,401 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1900 mSDsluCounter, 4099 mSDsCounter, 0 mSdLazyCounter, 1987 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1901 SdHoareTripleChecker+Valid, 4996 SdHoareTripleChecker+Invalid, 1990 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1987 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:26,402 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1901 Valid, 4996 Invalid, 1990 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1987 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-12-02 08:11:26,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2612 states. [2024-12-02 08:11:26,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2612 to 1604. [2024-12-02 08:11:26,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1604 states, 1583 states have (on average 1.3057485786481364) internal successors, (2067), 1583 states have internal predecessors, (2067), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 08:11:26,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1604 states to 1604 states and 2105 transitions. [2024-12-02 08:11:26,442 INFO L78 Accepts]: Start accepts. Automaton has 1604 states and 2105 transitions. Word has length 490 [2024-12-02 08:11:26,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:26,442 INFO L471 AbstractCegarLoop]: Abstraction has 1604 states and 2105 transitions. [2024-12-02 08:11:26,442 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 43.22222222222222) internal successors, (389), 9 states have internal predecessors, (389), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:26,442 INFO L276 IsEmpty]: Start isEmpty. Operand 1604 states and 2105 transitions. [2024-12-02 08:11:26,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2024-12-02 08:11:26,445 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:26,445 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:26,445 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 08:11:26,445 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:26,445 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:26,446 INFO L85 PathProgramCache]: Analyzing trace with hash 1888656980, now seen corresponding path program 1 times [2024-12-02 08:11:26,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:26,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775040735] [2024-12-02 08:11:26,446 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:26,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:29,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:31,395 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 4 proven. 115 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:31,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:31,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775040735] [2024-12-02 08:11:31,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775040735] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:31,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1774594394] [2024-12-02 08:11:31,396 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:31,396 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:31,396 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:31,397 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:31,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:11:33,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:33,649 INFO L256 TraceCheckSpWp]: Trace formula consists of 2976 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:11:33,656 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:11:33,708 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-12-02 08:11:33,708 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:11:33,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1774594394] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:33,708 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:11:33,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-12-02 08:11:33,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278466314] [2024-12-02 08:11:33,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:33,709 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:33,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:33,710 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:33,710 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:11:33,710 INFO L87 Difference]: Start difference. First operand 1604 states and 2105 transitions. Second operand has 6 states, 5 states have (on average 77.0) internal successors, (385), 6 states have internal predecessors, (385), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:33,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:33,780 INFO L93 Difference]: Finished difference Result 2799 states and 3644 transitions. [2024-12-02 08:11:33,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:33,781 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 77.0) internal successors, (385), 6 states have internal predecessors, (385), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 490 [2024-12-02 08:11:33,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:33,782 INFO L225 Difference]: With dead ends: 2799 [2024-12-02 08:11:33,782 INFO L226 Difference]: Without dead ends: 1604 [2024-12-02 08:11:33,783 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 500 GetRequests, 487 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:11:33,783 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 0 mSDsluCounter, 3005 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3761 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:33,784 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3761 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:11:33,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1604 states. [2024-12-02 08:11:33,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1604 to 1604. [2024-12-02 08:11:33,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1604 states, 1583 states have (on average 1.3025900189513582) internal successors, (2062), 1583 states have internal predecessors, (2062), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 08:11:33,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1604 states to 1604 states and 2100 transitions. [2024-12-02 08:11:33,808 INFO L78 Accepts]: Start accepts. Automaton has 1604 states and 2100 transitions. Word has length 490 [2024-12-02 08:11:33,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:33,808 INFO L471 AbstractCegarLoop]: Abstraction has 1604 states and 2100 transitions. [2024-12-02 08:11:33,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 77.0) internal successors, (385), 6 states have internal predecessors, (385), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:33,808 INFO L276 IsEmpty]: Start isEmpty. Operand 1604 states and 2100 transitions. [2024-12-02 08:11:33,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 493 [2024-12-02 08:11:33,810 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:33,810 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:33,826 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:11:34,011 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:34,011 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:34,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:34,011 INFO L85 PathProgramCache]: Analyzing trace with hash 149817504, now seen corresponding path program 1 times [2024-12-02 08:11:34,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:34,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581845589] [2024-12-02 08:11:34,012 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:34,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:35,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:37,575 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 4 proven. 116 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:37,575 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:37,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581845589] [2024-12-02 08:11:37,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581845589] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:37,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [643201463] [2024-12-02 08:11:37,575 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:37,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:37,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:37,577 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:37,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:11:39,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:39,831 INFO L256 TraceCheckSpWp]: Trace formula consists of 2982 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:11:39,836 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:11:39,888 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 123 trivial. 0 not checked. [2024-12-02 08:11:39,889 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:11:39,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [643201463] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:39,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:11:39,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-12-02 08:11:39,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419973310] [2024-12-02 08:11:39,889 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:39,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:39,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:39,890 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:39,890 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:11:39,890 INFO L87 Difference]: Start difference. First operand 1604 states and 2100 transitions. Second operand has 6 states, 5 states have (on average 75.4) internal successors, (377), 6 states have internal predecessors, (377), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:11:39,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:39,951 INFO L93 Difference]: Finished difference Result 2947 states and 3834 transitions. [2024-12-02 08:11:39,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:39,952 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 75.4) internal successors, (377), 6 states have internal predecessors, (377), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 492 [2024-12-02 08:11:39,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:39,954 INFO L225 Difference]: With dead ends: 2947 [2024-12-02 08:11:39,954 INFO L226 Difference]: Without dead ends: 1604 [2024-12-02 08:11:39,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 489 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:11:39,955 INFO L435 NwaCegarLoop]: 755 mSDtfsCounter, 0 mSDsluCounter, 3001 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3756 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:39,955 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3756 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:11:39,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1604 states. [2024-12-02 08:11:39,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1604 to 1604. [2024-12-02 08:11:39,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1604 states, 1583 states have (on average 1.29943145925458) internal successors, (2057), 1583 states have internal predecessors, (2057), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 08:11:39,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1604 states to 1604 states and 2095 transitions. [2024-12-02 08:11:39,980 INFO L78 Accepts]: Start accepts. Automaton has 1604 states and 2095 transitions. Word has length 492 [2024-12-02 08:11:39,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:39,980 INFO L471 AbstractCegarLoop]: Abstraction has 1604 states and 2095 transitions. [2024-12-02 08:11:39,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 75.4) internal successors, (377), 6 states have internal predecessors, (377), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:11:39,980 INFO L276 IsEmpty]: Start isEmpty. Operand 1604 states and 2095 transitions. [2024-12-02 08:11:39,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 493 [2024-12-02 08:11:39,982 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:39,982 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:39,998 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 08:11:40,183 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:40,183 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:40,183 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:40,183 INFO L85 PathProgramCache]: Analyzing trace with hash 1492645889, now seen corresponding path program 1 times [2024-12-02 08:11:40,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:40,183 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65578570] [2024-12-02 08:11:40,183 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:40,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:41,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:42,262 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:42,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:42,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65578570] [2024-12-02 08:11:42,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [65578570] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:42,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:42,263 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:42,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427580539] [2024-12-02 08:11:42,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:42,264 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:42,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:42,264 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:42,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:42,264 INFO L87 Difference]: Start difference. First operand 1604 states and 2095 transitions. Second operand has 6 states, 6 states have (on average 77.5) internal successors, (465), 6 states have internal predecessors, (465), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:42,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:42,781 INFO L93 Difference]: Finished difference Result 2427 states and 3195 transitions. [2024-12-02 08:11:42,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:42,781 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 77.5) internal successors, (465), 6 states have internal predecessors, (465), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 492 [2024-12-02 08:11:42,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:42,783 INFO L225 Difference]: With dead ends: 2427 [2024-12-02 08:11:42,783 INFO L226 Difference]: Without dead ends: 1861 [2024-12-02 08:11:42,784 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:11:42,784 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 979 mSDsluCounter, 1652 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 982 SdHoareTripleChecker+Valid, 2217 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:42,784 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [982 Valid, 2217 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:11:42,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1861 states. [2024-12-02 08:11:42,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1861 to 1361. [2024-12-02 08:11:42,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1361 states, 1343 states have (on average 1.3164556962025316) internal successors, (1768), 1343 states have internal predecessors, (1768), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-12-02 08:11:42,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1361 states to 1361 states and 1800 transitions. [2024-12-02 08:11:42,804 INFO L78 Accepts]: Start accepts. Automaton has 1361 states and 1800 transitions. Word has length 492 [2024-12-02 08:11:42,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:42,804 INFO L471 AbstractCegarLoop]: Abstraction has 1361 states and 1800 transitions. [2024-12-02 08:11:42,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 77.5) internal successors, (465), 6 states have internal predecessors, (465), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:42,804 INFO L276 IsEmpty]: Start isEmpty. Operand 1361 states and 1800 transitions. [2024-12-02 08:11:42,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:11:42,806 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:42,806 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:42,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 08:11:42,806 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:42,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:42,807 INFO L85 PathProgramCache]: Analyzing trace with hash -540853783, now seen corresponding path program 1 times [2024-12-02 08:11:42,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:42,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816732870] [2024-12-02 08:11:42,807 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:42,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:43,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:43,728 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2024-12-02 08:11:43,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:43,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816732870] [2024-12-02 08:11:43,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [816732870] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:43,729 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:43,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:43,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467905124] [2024-12-02 08:11:43,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:43,729 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:43,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:43,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:43,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:43,730 INFO L87 Difference]: Start difference. First operand 1361 states and 1800 transitions. Second operand has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:44,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:44,122 INFO L93 Difference]: Finished difference Result 2350 states and 3088 transitions. [2024-12-02 08:11:44,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:44,122 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493 [2024-12-02 08:11:44,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:44,124 INFO L225 Difference]: With dead ends: 2350 [2024-12-02 08:11:44,124 INFO L226 Difference]: Without dead ends: 1377 [2024-12-02 08:11:44,124 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:44,125 INFO L435 NwaCegarLoop]: 569 mSDtfsCounter, 715 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 715 SdHoareTripleChecker+Valid, 2249 SdHoareTripleChecker+Invalid, 787 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:44,125 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [715 Valid, 2249 Invalid, 787 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:11:44,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1377 states. [2024-12-02 08:11:44,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1377 to 1369. [2024-12-02 08:11:44,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1351 states have (on average 1.3145817912657292) internal successors, (1776), 1351 states have internal predecessors, (1776), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-12-02 08:11:44,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 1808 transitions. [2024-12-02 08:11:44,145 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 1808 transitions. Word has length 493 [2024-12-02 08:11:44,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:44,145 INFO L471 AbstractCegarLoop]: Abstraction has 1369 states and 1808 transitions. [2024-12-02 08:11:44,145 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:44,145 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 1808 transitions. [2024-12-02 08:11:44,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:11:44,148 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:44,148 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:44,148 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 08:11:44,148 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:44,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:44,148 INFO L85 PathProgramCache]: Analyzing trace with hash -1811427721, now seen corresponding path program 1 times [2024-12-02 08:11:44,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:44,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840207625] [2024-12-02 08:11:44,149 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:44,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:47,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:48,437 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:48,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:48,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840207625] [2024-12-02 08:11:48,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840207625] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:48,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:48,437 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:11:48,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82093652] [2024-12-02 08:11:48,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:48,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:11:48,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:48,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:11:48,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:11:48,438 INFO L87 Difference]: Start difference. First operand 1369 states and 1808 transitions. Second operand has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:49,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:49,611 INFO L93 Difference]: Finished difference Result 3084 states and 4046 transitions. [2024-12-02 08:11:49,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:11:49,611 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 493 [2024-12-02 08:11:49,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:49,613 INFO L225 Difference]: With dead ends: 3084 [2024-12-02 08:11:49,613 INFO L226 Difference]: Without dead ends: 2311 [2024-12-02 08:11:49,614 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:11:49,614 INFO L435 NwaCegarLoop]: 776 mSDtfsCounter, 1297 mSDsluCounter, 3614 mSDsCounter, 0 mSdLazyCounter, 1808 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1298 SdHoareTripleChecker+Valid, 4390 SdHoareTripleChecker+Invalid, 1811 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1808 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:49,614 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1298 Valid, 4390 Invalid, 1811 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1808 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 08:11:49,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2311 states. [2024-12-02 08:11:49,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2311 to 1877. [2024-12-02 08:11:49,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1877 states, 1855 states have (on average 1.2878706199460916) internal successors, (2389), 1855 states have internal predecessors, (2389), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-12-02 08:11:49,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1877 states to 1877 states and 2429 transitions. [2024-12-02 08:11:49,642 INFO L78 Accepts]: Start accepts. Automaton has 1877 states and 2429 transitions. Word has length 493 [2024-12-02 08:11:49,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:49,642 INFO L471 AbstractCegarLoop]: Abstraction has 1877 states and 2429 transitions. [2024-12-02 08:11:49,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 51.77777777777778) internal successors, (466), 9 states have internal predecessors, (466), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:49,642 INFO L276 IsEmpty]: Start isEmpty. Operand 1877 states and 2429 transitions. [2024-12-02 08:11:49,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:11:49,645 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:49,645 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:49,645 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-02 08:11:49,645 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:49,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:49,645 INFO L85 PathProgramCache]: Analyzing trace with hash 189873430, now seen corresponding path program 1 times [2024-12-02 08:11:49,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:49,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634411995] [2024-12-02 08:11:49,645 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:49,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:52,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:54,092 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 4 proven. 115 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:54,092 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:54,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634411995] [2024-12-02 08:11:54,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1634411995] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:54,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1730518126] [2024-12-02 08:11:54,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:54,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:54,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:54,094 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:54,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:11:56,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:56,676 INFO L256 TraceCheckSpWp]: Trace formula consists of 2985 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 08:11:56,682 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:11:56,903 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 113 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:56,903 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:11:57,254 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:57,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1730518126] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:57,254 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:11:57,254 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22 [2024-12-02 08:11:57,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736979906] [2024-12-02 08:11:57,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:57,255 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:11:57,255 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:57,255 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:11:57,255 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2024-12-02 08:11:57,256 INFO L87 Difference]: Start difference. First operand 1877 states and 2429 transitions. Second operand has 7 states, 7 states have (on average 66.57142857142857) internal successors, (466), 7 states have internal predecessors, (466), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:57,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:57,404 INFO L93 Difference]: Finished difference Result 3498 states and 4515 transitions. [2024-12-02 08:11:57,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:11:57,404 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 66.57142857142857) internal successors, (466), 7 states have internal predecessors, (466), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493 [2024-12-02 08:11:57,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:57,408 INFO L225 Difference]: With dead ends: 3498 [2024-12-02 08:11:57,408 INFO L226 Difference]: Without dead ends: 2689 [2024-12-02 08:11:57,409 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 998 GetRequests, 976 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:11:57,409 INFO L435 NwaCegarLoop]: 1328 mSDtfsCounter, 482 mSDsluCounter, 6040 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 482 SdHoareTripleChecker+Valid, 7368 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:57,410 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [482 Valid, 7368 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:11:57,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2689 states. [2024-12-02 08:11:57,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2689 to 2340. [2024-12-02 08:11:57,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2340 states, 2313 states have (on average 1.2689148292261132) internal successors, (2935), 2313 states have internal predecessors, (2935), 25 states have call successors, (25), 1 states have call predecessors, (25), 1 states have return successors, (25), 25 states have call predecessors, (25), 25 states have call successors, (25) [2024-12-02 08:11:57,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2340 states to 2340 states and 2985 transitions. [2024-12-02 08:11:57,467 INFO L78 Accepts]: Start accepts. Automaton has 2340 states and 2985 transitions. Word has length 493 [2024-12-02 08:11:57,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:57,468 INFO L471 AbstractCegarLoop]: Abstraction has 2340 states and 2985 transitions. [2024-12-02 08:11:57,468 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 66.57142857142857) internal successors, (466), 7 states have internal predecessors, (466), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:57,468 INFO L276 IsEmpty]: Start isEmpty. Operand 2340 states and 2985 transitions. [2024-12-02 08:11:57,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-12-02 08:11:57,472 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:57,473 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:57,498 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:11:57,673 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable77 [2024-12-02 08:11:57,673 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:57,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:57,673 INFO L85 PathProgramCache]: Analyzing trace with hash -74270233, now seen corresponding path program 1 times [2024-12-02 08:11:57,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:57,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578623248] [2024-12-02 08:11:57,674 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:57,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:57,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:58,461 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-12-02 08:11:58,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:58,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578623248] [2024-12-02 08:11:58,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578623248] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:58,461 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:58,461 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:58,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449030554] [2024-12-02 08:11:58,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:58,462 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:58,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:58,462 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:58,462 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:58,462 INFO L87 Difference]: Start difference. First operand 2340 states and 2985 transitions. Second operand has 6 states, 6 states have (on average 73.0) internal successors, (438), 6 states have internal predecessors, (438), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:11:58,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:58,530 INFO L93 Difference]: Finished difference Result 4205 states and 5364 transitions. [2024-12-02 08:11:58,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:11:58,530 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 73.0) internal successors, (438), 6 states have internal predecessors, (438), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 493 [2024-12-02 08:11:58,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:58,533 INFO L225 Difference]: With dead ends: 4205 [2024-12-02 08:11:58,533 INFO L226 Difference]: Without dead ends: 2502 [2024-12-02 08:11:58,535 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:58,535 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 15 mSDsluCounter, 2998 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 3752 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:58,535 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 3752 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:11:58,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2502 states. [2024-12-02 08:11:58,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2502 to 2502. [2024-12-02 08:11:58,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2502 states, 2475 states have (on average 1.2755555555555556) internal successors, (3157), 2475 states have internal predecessors, (3157), 25 states have call successors, (25), 1 states have call predecessors, (25), 1 states have return successors, (25), 25 states have call predecessors, (25), 25 states have call successors, (25) [2024-12-02 08:11:58,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2502 states to 2502 states and 3207 transitions. [2024-12-02 08:11:58,595 INFO L78 Accepts]: Start accepts. Automaton has 2502 states and 3207 transitions. Word has length 493 [2024-12-02 08:11:58,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:58,596 INFO L471 AbstractCegarLoop]: Abstraction has 2502 states and 3207 transitions. [2024-12-02 08:11:58,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 73.0) internal successors, (438), 6 states have internal predecessors, (438), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:11:58,596 INFO L276 IsEmpty]: Start isEmpty. Operand 2502 states and 3207 transitions. [2024-12-02 08:11:58,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:11:58,598 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:58,599 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:58,599 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-02 08:11:58,599 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:58,599 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:58,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1589664243, now seen corresponding path program 1 times [2024-12-02 08:11:58,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:58,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903916394] [2024-12-02 08:11:58,599 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:58,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:12:00,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:12:02,374 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 4 proven. 115 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:02,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:12:02,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903916394] [2024-12-02 08:12:02,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1903916394] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:12:02,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1048909710] [2024-12-02 08:12:02,374 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:12:02,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:12:02,374 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:12:02,376 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:12:02,376 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:12:04,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:12:04,892 INFO L256 TraceCheckSpWp]: Trace formula consists of 2988 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:12:04,898 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:12:05,104 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 149 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 08:12:05,104 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:12:05,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1048909710] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:12:05,104 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:12:05,104 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2024-12-02 08:12:05,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122025072] [2024-12-02 08:12:05,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:12:05,105 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:12:05,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:12:05,105 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:12:05,106 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:12:05,106 INFO L87 Difference]: Start difference. First operand 2502 states and 3207 transitions. Second operand has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:12:05,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:12:05,667 INFO L93 Difference]: Finished difference Result 5212 states and 6689 transitions. [2024-12-02 08:12:05,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:12:05,667 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 494 [2024-12-02 08:12:05,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:12:05,670 INFO L225 Difference]: With dead ends: 5212 [2024-12-02 08:12:05,670 INFO L226 Difference]: Without dead ends: 3567 [2024-12-02 08:12:05,671 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 506 GetRequests, 489 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2024-12-02 08:12:05,671 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 1755 mSDsluCounter, 2105 mSDsCounter, 0 mSdLazyCounter, 950 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1761 SdHoareTripleChecker+Valid, 2670 SdHoareTripleChecker+Invalid, 950 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 950 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:12:05,671 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1761 Valid, 2670 Invalid, 950 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 950 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:12:05,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3567 states. [2024-12-02 08:12:05,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3567 to 3234. [2024-12-02 08:12:05,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3234 states, 3192 states have (on average 1.2647243107769424) internal successors, (4037), 3192 states have internal predecessors, (4037), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:12:05,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3234 states to 3234 states and 4117 transitions. [2024-12-02 08:12:05,719 INFO L78 Accepts]: Start accepts. Automaton has 3234 states and 4117 transitions. Word has length 494 [2024-12-02 08:12:05,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:12:05,719 INFO L471 AbstractCegarLoop]: Abstraction has 3234 states and 4117 transitions. [2024-12-02 08:12:05,719 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:12:05,719 INFO L276 IsEmpty]: Start isEmpty. Operand 3234 states and 4117 transitions. [2024-12-02 08:12:05,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2024-12-02 08:12:05,722 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:12:05,722 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:12:05,739 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:12:05,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable79 [2024-12-02 08:12:05,923 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:12:05,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:12:05,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1556336006, now seen corresponding path program 1 times [2024-12-02 08:12:05,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:12:05,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897510083] [2024-12-02 08:12:05,923 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:12:05,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:12:09,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:12:13,472 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 82 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:13,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:12:13,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897510083] [2024-12-02 08:12:13,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1897510083] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:12:13,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [778142333] [2024-12-02 08:12:13,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:12:13,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:12:13,472 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:12:13,474 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:12:13,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:12:16,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:12:16,687 INFO L256 TraceCheckSpWp]: Trace formula consists of 2991 conjuncts, 169 conjuncts are in the unsatisfiable core [2024-12-02 08:12:16,699 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:12:21,694 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 82 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:21,694 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:12:33,333 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 80 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:33,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [778142333] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:12:33,333 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:12:33,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 27, 28] total 69 [2024-12-02 08:12:33,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693496398] [2024-12-02 08:12:33,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:12:33,334 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 69 states [2024-12-02 08:12:33,334 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:12:33,334 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2024-12-02 08:12:33,335 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=428, Invalid=4264, Unknown=0, NotChecked=0, Total=4692 [2024-12-02 08:12:33,335 INFO L87 Difference]: Start difference. First operand 3234 states and 4117 transitions. Second operand has 69 states, 69 states have (on average 17.782608695652176) internal successors, (1227), 69 states have internal predecessors, (1227), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:13:25,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:13:25,062 INFO L93 Difference]: Finished difference Result 54514 states and 68654 transitions. [2024-12-02 08:13:25,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 301 states. [2024-12-02 08:13:25,063 INFO L78 Accepts]: Start accepts. Automaton has has 69 states, 69 states have (on average 17.782608695652176) internal successors, (1227), 69 states have internal predecessors, (1227), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 495 [2024-12-02 08:13:25,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:13:25,090 INFO L225 Difference]: With dead ends: 54514 [2024-12-02 08:13:25,091 INFO L226 Difference]: Without dead ends: 52003 [2024-12-02 08:13:25,100 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1294 GetRequests, 939 SyntacticMatches, 0 SemanticMatches, 355 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48678 ImplicationChecksByTransitivity, 24.4s TimeCoverageRelationStatistics Valid=13819, Invalid=113273, Unknown=0, NotChecked=0, Total=127092 [2024-12-02 08:13:25,101 INFO L435 NwaCegarLoop]: 1579 mSDtfsCounter, 38803 mSDsluCounter, 63027 mSDsCounter, 0 mSdLazyCounter, 38453 mSolverCounterSat, 260 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 21.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38808 SdHoareTripleChecker+Valid, 64606 SdHoareTripleChecker+Invalid, 38713 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 260 IncrementalHoareTripleChecker+Valid, 38453 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 24.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:13:25,101 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [38808 Valid, 64606 Invalid, 38713 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [260 Valid, 38453 Invalid, 0 Unknown, 0 Unchecked, 24.8s Time] [2024-12-02 08:13:25,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52003 states. [2024-12-02 08:13:25,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52003 to 19847. [2024-12-02 08:13:25,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19847 states, 19643 states have (on average 1.2565290434251388) internal successors, (24682), 19643 states have internal predecessors, (24682), 202 states have call successors, (202), 1 states have call predecessors, (202), 1 states have return successors, (202), 202 states have call predecessors, (202), 202 states have call successors, (202) [2024-12-02 08:13:25,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19847 states to 19847 states and 25086 transitions. [2024-12-02 08:13:25,551 INFO L78 Accepts]: Start accepts. Automaton has 19847 states and 25086 transitions. Word has length 495 [2024-12-02 08:13:25,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:13:25,552 INFO L471 AbstractCegarLoop]: Abstraction has 19847 states and 25086 transitions. [2024-12-02 08:13:25,552 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 69 states, 69 states have (on average 17.782608695652176) internal successors, (1227), 69 states have internal predecessors, (1227), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:13:25,552 INFO L276 IsEmpty]: Start isEmpty. Operand 19847 states and 25086 transitions. [2024-12-02 08:13:25,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:13:25,565 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:25,566 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:25,585 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-12-02 08:13:25,766 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:25,766 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:25,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:25,766 INFO L85 PathProgramCache]: Analyzing trace with hash 577744513, now seen corresponding path program 1 times [2024-12-02 08:13:25,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:13:25,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821476421] [2024-12-02 08:13:25,767 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:25,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:13:31,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:32,946 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 4 proven. 118 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:13:32,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:13:32,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821476421] [2024-12-02 08:13:32,946 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [821476421] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:32,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1825464509] [2024-12-02 08:13:32,946 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:32,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:32,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:32,948 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:32,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:13:37,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:37,144 INFO L256 TraceCheckSpWp]: Trace formula consists of 2994 conjuncts, 74 conjuncts are in the unsatisfiable core [2024-12-02 08:13:37,154 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:38,611 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 154 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:13:38,611 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:13:40,791 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:13:40,791 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1825464509] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:13:40,791 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:13:40,791 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 12] total 31 [2024-12-02 08:13:40,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711351350] [2024-12-02 08:13:40,791 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:13:40,792 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2024-12-02 08:13:40,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:13:40,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-12-02 08:13:40,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=805, Unknown=0, NotChecked=0, Total=930 [2024-12-02 08:13:40,793 INFO L87 Difference]: Start difference. First operand 19847 states and 25086 transitions. Second operand has 31 states, 31 states have (on average 41.16129032258065) internal successors, (1276), 31 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-12-02 08:13:43,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:13:43,177 INFO L93 Difference]: Finished difference Result 30717 states and 38834 transitions. [2024-12-02 08:13:43,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-12-02 08:13:43,177 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 41.16129032258065) internal successors, (1276), 31 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) Word has length 496 [2024-12-02 08:13:43,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:13:43,191 INFO L225 Difference]: With dead ends: 30717 [2024-12-02 08:13:43,191 INFO L226 Difference]: Without dead ends: 20093 [2024-12-02 08:13:43,201 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1018 GetRequests, 972 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 415 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=381, Invalid=1875, Unknown=0, NotChecked=0, Total=2256 [2024-12-02 08:13:43,201 INFO L435 NwaCegarLoop]: 694 mSDtfsCounter, 888 mSDsluCounter, 11690 mSDsCounter, 0 mSdLazyCounter, 4731 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 888 SdHoareTripleChecker+Valid, 12384 SdHoareTripleChecker+Invalid, 4736 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 4731 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:13:43,201 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [888 Valid, 12384 Invalid, 4736 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 4731 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-12-02 08:13:43,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20093 states. [2024-12-02 08:13:43,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20093 to 19895. [2024-12-02 08:13:43,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19895 states, 19691 states have (on average 1.2563099893352292) internal successors, (24738), 19691 states have internal predecessors, (24738), 202 states have call successors, (202), 1 states have call predecessors, (202), 1 states have return successors, (202), 202 states have call predecessors, (202), 202 states have call successors, (202) [2024-12-02 08:13:43,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19895 states to 19895 states and 25142 transitions. [2024-12-02 08:13:43,562 INFO L78 Accepts]: Start accepts. Automaton has 19895 states and 25142 transitions. Word has length 496 [2024-12-02 08:13:43,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:13:43,563 INFO L471 AbstractCegarLoop]: Abstraction has 19895 states and 25142 transitions. [2024-12-02 08:13:43,563 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 41.16129032258065) internal successors, (1276), 31 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-12-02 08:13:43,563 INFO L276 IsEmpty]: Start isEmpty. Operand 19895 states and 25142 transitions. [2024-12-02 08:13:43,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:13:43,576 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:43,576 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:43,606 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 08:13:43,777 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:43,777 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:43,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:43,777 INFO L85 PathProgramCache]: Analyzing trace with hash 790787429, now seen corresponding path program 1 times [2024-12-02 08:13:43,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:13:43,777 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276049971] [2024-12-02 08:13:43,777 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:43,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:13:45,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:48,746 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 2 proven. 117 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:13:48,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:13:48,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276049971] [2024-12-02 08:13:48,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [276049971] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:48,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [606373518] [2024-12-02 08:13:48,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:48,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:48,747 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:48,748 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:48,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:13:51,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:51,790 INFO L256 TraceCheckSpWp]: Trace formula consists of 2992 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:13:51,795 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:51,843 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 154 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 08:13:51,844 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:13:51,844 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [606373518] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:13:51,844 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:13:51,844 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-12-02 08:13:51,844 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1884936255] [2024-12-02 08:13:51,844 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:13:51,845 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:13:51,845 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:13:51,846 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:13:51,846 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:13:51,846 INFO L87 Difference]: Start difference. First operand 19895 states and 25142 transitions. Second operand has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:13:52,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:13:52,103 INFO L93 Difference]: Finished difference Result 39399 states and 49738 transitions. [2024-12-02 08:13:52,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:13:52,103 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 496 [2024-12-02 08:13:52,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:13:52,117 INFO L225 Difference]: With dead ends: 39399 [2024-12-02 08:13:52,117 INFO L226 Difference]: Without dead ends: 19895 [2024-12-02 08:13:52,128 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 495 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:13:52,129 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 2997 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3751 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:13:52,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3751 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:13:52,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19895 states. [2024-12-02 08:13:52,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19895 to 19895. [2024-12-02 08:13:52,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19895 states, 19691 states have (on average 1.2549895891524045) internal successors, (24712), 19691 states have internal predecessors, (24712), 202 states have call successors, (202), 1 states have call predecessors, (202), 1 states have return successors, (202), 202 states have call predecessors, (202), 202 states have call successors, (202) [2024-12-02 08:13:52,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19895 states to 19895 states and 25116 transitions. [2024-12-02 08:13:52,497 INFO L78 Accepts]: Start accepts. Automaton has 19895 states and 25116 transitions. Word has length 496 [2024-12-02 08:13:52,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:13:52,497 INFO L471 AbstractCegarLoop]: Abstraction has 19895 states and 25116 transitions. [2024-12-02 08:13:52,497 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:13:52,497 INFO L276 IsEmpty]: Start isEmpty. Operand 19895 states and 25116 transitions. [2024-12-02 08:13:52,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:13:52,519 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:52,519 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:52,539 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 08:13:52,719 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:52,720 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:52,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:52,720 INFO L85 PathProgramCache]: Analyzing trace with hash 768773700, now seen corresponding path program 1 times [2024-12-02 08:13:52,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:13:52,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366355002] [2024-12-02 08:13:52,720 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:52,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:13:55,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:58,151 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:13:58,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:13:58,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366355002] [2024-12-02 08:13:58,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [366355002] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:58,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1413504321] [2024-12-02 08:13:58,151 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:58,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:58,151 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:58,153 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:58,153 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 08:14:02,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:14:02,667 INFO L256 TraceCheckSpWp]: Trace formula consists of 2995 conjuncts, 242 conjuncts are in the unsatisfiable core [2024-12-02 08:14:02,677 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:14:06,210 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 8 proven. 128 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:14:06,210 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:14:14,087 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 8 proven. 128 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:14:14,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1413504321] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:14:14,088 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:14:14,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 50, 43] total 99 [2024-12-02 08:14:14,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55676019] [2024-12-02 08:14:14,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:14:14,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 99 states [2024-12-02 08:14:14,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:14:14,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2024-12-02 08:14:14,090 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1016, Invalid=8686, Unknown=0, NotChecked=0, Total=9702 [2024-12-02 08:14:14,090 INFO L87 Difference]: Start difference. First operand 19895 states and 25116 transitions. Second operand has 99 states, 96 states have (on average 14.5625) internal successors, (1398), 99 states have internal predecessors, (1398), 11 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 9 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:14:32,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:14:32,522 INFO L93 Difference]: Finished difference Result 92603 states and 116076 transitions. [2024-12-02 08:14:32,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2024-12-02 08:14:32,522 INFO L78 Accepts]: Start accepts. Automaton has has 99 states, 96 states have (on average 14.5625) internal successors, (1398), 99 states have internal predecessors, (1398), 11 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 9 states have call predecessors, (18), 11 states have call successors, (18) Word has length 497 [2024-12-02 08:14:32,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:14:32,568 INFO L225 Difference]: With dead ends: 92603 [2024-12-02 08:14:32,568 INFO L226 Difference]: Without dead ends: 77369 [2024-12-02 08:14:32,584 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1187 GetRequests, 910 SyntacticMatches, 1 SemanticMatches, 276 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24163 ImplicationChecksByTransitivity, 10.9s TimeCoverageRelationStatistics Valid=7814, Invalid=69192, Unknown=0, NotChecked=0, Total=77006 [2024-12-02 08:14:32,585 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 9492 mSDsluCounter, 48786 mSDsCounter, 0 mSdLazyCounter, 20504 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9500 SdHoareTripleChecker+Valid, 49957 SdHoareTripleChecker+Invalid, 20558 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 20504 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:14:32,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [9500 Valid, 49957 Invalid, 20558 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [54 Valid, 20504 Invalid, 0 Unknown, 0 Unchecked, 9.8s Time] [2024-12-02 08:14:32,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77369 states. [2024-12-02 08:14:33,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77369 to 20701. [2024-12-02 08:14:33,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20701 states, 20473 states have (on average 1.2507204610951008) internal successors, (25606), 20473 states have internal predecessors, (25606), 226 states have call successors, (226), 1 states have call predecessors, (226), 1 states have return successors, (226), 226 states have call predecessors, (226), 226 states have call successors, (226) [2024-12-02 08:14:33,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20701 states to 20701 states and 26058 transitions. [2024-12-02 08:14:33,161 INFO L78 Accepts]: Start accepts. Automaton has 20701 states and 26058 transitions. Word has length 497 [2024-12-02 08:14:33,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:14:33,161 INFO L471 AbstractCegarLoop]: Abstraction has 20701 states and 26058 transitions. [2024-12-02 08:14:33,161 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 99 states, 96 states have (on average 14.5625) internal successors, (1398), 99 states have internal predecessors, (1398), 11 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 9 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:14:33,161 INFO L276 IsEmpty]: Start isEmpty. Operand 20701 states and 26058 transitions. [2024-12-02 08:14:33,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:14:33,174 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:14:33,174 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:14:33,196 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 08:14:33,375 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:14:33,375 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:14:33,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:14:33,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1385373554, now seen corresponding path program 1 times [2024-12-02 08:14:33,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:14:33,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056368890] [2024-12-02 08:14:33,376 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:14:33,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:14:33,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:14:34,205 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-12-02 08:14:34,205 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:14:34,205 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056368890] [2024-12-02 08:14:34,205 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056368890] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:14:34,205 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:14:34,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:14:34,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985650046] [2024-12-02 08:14:34,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:14:34,206 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:14:34,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:14:34,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:14:34,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:14:34,207 INFO L87 Difference]: Start difference. First operand 20701 states and 26058 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:14:34,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:14:34,454 INFO L93 Difference]: Finished difference Result 37487 states and 47166 transitions. [2024-12-02 08:14:34,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:14:34,454 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 497 [2024-12-02 08:14:34,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:14:34,469 INFO L225 Difference]: With dead ends: 37487 [2024-12-02 08:14:34,469 INFO L226 Difference]: Without dead ends: 19405 [2024-12-02 08:14:34,479 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:14:34,479 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 1498 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2252 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:14:34,479 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2252 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:14:34,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19405 states. [2024-12-02 08:14:34,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19405 to 19405. [2024-12-02 08:14:34,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19405 states, 19177 states have (on average 1.2504562757469886) internal successors, (23980), 19177 states have internal predecessors, (23980), 226 states have call successors, (226), 1 states have call predecessors, (226), 1 states have return successors, (226), 226 states have call predecessors, (226), 226 states have call successors, (226) [2024-12-02 08:14:34,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19405 states to 19405 states and 24432 transitions. [2024-12-02 08:14:34,918 INFO L78 Accepts]: Start accepts. Automaton has 19405 states and 24432 transitions. Word has length 497 [2024-12-02 08:14:34,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:14:34,918 INFO L471 AbstractCegarLoop]: Abstraction has 19405 states and 24432 transitions. [2024-12-02 08:14:34,919 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:14:34,919 INFO L276 IsEmpty]: Start isEmpty. Operand 19405 states and 24432 transitions. [2024-12-02 08:14:34,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:14:34,930 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:14:34,930 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:14:34,930 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-02 08:14:34,930 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:14:34,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:14:34,931 INFO L85 PathProgramCache]: Analyzing trace with hash -415707967, now seen corresponding path program 1 times [2024-12-02 08:14:34,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:14:34,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320384009] [2024-12-02 08:14:34,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:14:34,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:14:35,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:14:36,390 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:14:36,390 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:14:36,390 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320384009] [2024-12-02 08:14:36,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [320384009] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:14:36,390 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:14:36,391 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:14:36,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218626172] [2024-12-02 08:14:36,391 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:14:36,391 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:14:36,391 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:14:36,392 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:14:36,392 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:14:36,392 INFO L87 Difference]: Start difference. First operand 19405 states and 24432 transitions. Second operand has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:14:36,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:14:36,785 INFO L93 Difference]: Finished difference Result 37963 states and 47866 transitions. [2024-12-02 08:14:36,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:14:36,785 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 498 [2024-12-02 08:14:36,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:14:36,813 INFO L225 Difference]: With dead ends: 37963 [2024-12-02 08:14:36,813 INFO L226 Difference]: Without dead ends: 27009 [2024-12-02 08:14:36,826 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:14:36,826 INFO L435 NwaCegarLoop]: 1310 mSDtfsCounter, 534 mSDsluCounter, 4670 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 534 SdHoareTripleChecker+Valid, 5980 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:14:36,827 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [534 Valid, 5980 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:14:36,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27009 states. [2024-12-02 08:14:37,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27009 to 21109. [2024-12-02 08:14:37,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21109 states, 20793 states have (on average 1.2511903044293753) internal successors, (26016), 20793 states have internal predecessors, (26016), 314 states have call successors, (314), 1 states have call predecessors, (314), 1 states have return successors, (314), 314 states have call predecessors, (314), 314 states have call successors, (314) [2024-12-02 08:14:37,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21109 states to 21109 states and 26644 transitions. [2024-12-02 08:14:37,346 INFO L78 Accepts]: Start accepts. Automaton has 21109 states and 26644 transitions. Word has length 498 [2024-12-02 08:14:37,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:14:37,346 INFO L471 AbstractCegarLoop]: Abstraction has 21109 states and 26644 transitions. [2024-12-02 08:14:37,346 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:14:37,347 INFO L276 IsEmpty]: Start isEmpty. Operand 21109 states and 26644 transitions. [2024-12-02 08:14:37,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:14:37,359 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:14:37,360 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:14:37,360 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 08:14:37,360 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:14:37,360 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:14:37,360 INFO L85 PathProgramCache]: Analyzing trace with hash -1936033725, now seen corresponding path program 1 times [2024-12-02 08:14:37,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:14:37,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719678491] [2024-12-02 08:14:37,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:14:37,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:14:40,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:14:44,685 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 39 proven. 82 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:14:44,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:14:44,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719678491] [2024-12-02 08:14:44,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719678491] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:14:44,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [529944166] [2024-12-02 08:14:44,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:14:44,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:14:44,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:14:44,687 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:14:44,688 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 08:14:49,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:14:49,021 INFO L256 TraceCheckSpWp]: Trace formula consists of 2996 conjuncts, 196 conjuncts are in the unsatisfiable core [2024-12-02 08:14:49,031 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:14:54,276 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:14:54,276 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:15:00,258 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 34 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:15:00,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [529944166] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:15:00,258 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:15:00,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 36, 21] total 65 [2024-12-02 08:15:00,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688553728] [2024-12-02 08:15:00,259 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:15:00,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 65 states [2024-12-02 08:15:00,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:15:00,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2024-12-02 08:15:00,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=564, Invalid=3596, Unknown=0, NotChecked=0, Total=4160 [2024-12-02 08:15:00,261 INFO L87 Difference]: Start difference. First operand 21109 states and 26644 transitions. Second operand has 65 states, 65 states have (on average 21.49230769230769) internal successors, (1397), 65 states have internal predecessors, (1397), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-12-02 08:15:24,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:15:24,494 INFO L93 Difference]: Finished difference Result 80811 states and 100283 transitions. [2024-12-02 08:15:24,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 163 states. [2024-12-02 08:15:24,495 INFO L78 Accepts]: Start accepts. Automaton has has 65 states, 65 states have (on average 21.49230769230769) internal successors, (1397), 65 states have internal predecessors, (1397), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 498 [2024-12-02 08:15:24,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:15:24,541 INFO L225 Difference]: With dead ends: 80811 [2024-12-02 08:15:24,541 INFO L226 Difference]: Without dead ends: 66553 [2024-12-02 08:15:24,558 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1168 GetRequests, 944 SyntacticMatches, 0 SemanticMatches, 224 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14961 ImplicationChecksByTransitivity, 9.6s TimeCoverageRelationStatistics Valid=5507, Invalid=45343, Unknown=0, NotChecked=0, Total=50850 [2024-12-02 08:15:24,558 INFO L435 NwaCegarLoop]: 864 mSDtfsCounter, 9956 mSDsluCounter, 33724 mSDsCounter, 0 mSdLazyCounter, 33569 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9956 SdHoareTripleChecker+Valid, 34588 SdHoareTripleChecker+Invalid, 33602 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 33569 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 14.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:15:24,558 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [9956 Valid, 34588 Invalid, 33602 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [33 Valid, 33569 Invalid, 0 Unknown, 0 Unchecked, 14.8s Time] [2024-12-02 08:15:24,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66553 states. [2024-12-02 08:15:25,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66553 to 24320. [2024-12-02 08:15:25,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24320 states, 24004 states have (on average 1.265830694884186) internal successors, (30385), 24004 states have internal predecessors, (30385), 314 states have call successors, (314), 1 states have call predecessors, (314), 1 states have return successors, (314), 314 states have call predecessors, (314), 314 states have call successors, (314) [2024-12-02 08:15:25,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24320 states to 24320 states and 31013 transitions. [2024-12-02 08:15:25,215 INFO L78 Accepts]: Start accepts. Automaton has 24320 states and 31013 transitions. Word has length 498 [2024-12-02 08:15:25,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:15:25,215 INFO L471 AbstractCegarLoop]: Abstraction has 24320 states and 31013 transitions. [2024-12-02 08:15:25,215 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 65 states, 65 states have (on average 21.49230769230769) internal successors, (1397), 65 states have internal predecessors, (1397), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-12-02 08:15:25,215 INFO L276 IsEmpty]: Start isEmpty. Operand 24320 states and 31013 transitions. [2024-12-02 08:15:25,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:15:25,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:15:25,229 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:15:25,254 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 08:15:25,429 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:25,430 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:15:25,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:15:25,430 INFO L85 PathProgramCache]: Analyzing trace with hash -373273150, now seen corresponding path program 1 times [2024-12-02 08:15:25,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:15:25,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499745799] [2024-12-02 08:15:25,430 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:15:25,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:15:32,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:15:32,367 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:15:40,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:15:40,546 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:15:40,546 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:15:40,547 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:15:40,548 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-02 08:15:40,551 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:15:40,848 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:15:40,851 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:15:40 BoogieIcfgContainer [2024-12-02 08:15:40,851 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:15:40,852 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:15:40,852 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:15:40,852 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:15:40,852 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:09:51" (3/4) ... [2024-12-02 08:15:40,855 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 08:15:40,856 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:15:40,856 INFO L158 Benchmark]: Toolchain (without parser) took 352457.13ms. Allocated memory was 142.6MB in the beginning and 2.8GB in the end (delta: 2.7GB). Free memory was 116.8MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 554.8MB. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: CDTParser took 0.35ms. Allocated memory is still 142.6MB. Free memory is still 83.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: CACSL2BoogieTranslator took 477.64ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 78.3MB in the end (delta: 38.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: Boogie Procedure Inliner took 219.38ms. Allocated memory is still 142.6MB. Free memory was 78.3MB in the beginning and 77.1MB in the end (delta: 1.2MB). Peak memory consumption was 30.8MB. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: Boogie Preprocessor took 243.04ms. Allocated memory is still 142.6MB. Free memory was 77.1MB in the beginning and 51.4MB in the end (delta: 25.7MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: RCFGBuilder took 2487.90ms. Allocated memory was 142.6MB in the beginning and 427.8MB in the end (delta: 285.2MB). Free memory was 51.4MB in the beginning and 137.0MB in the end (delta: -85.6MB). Peak memory consumption was 202.7MB. Max. memory is 16.1GB. [2024-12-02 08:15:40,857 INFO L158 Benchmark]: TraceAbstraction took 349018.46ms. Allocated memory was 427.8MB in the beginning and 2.8GB in the end (delta: 2.4GB). Free memory was 136.4MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 1.7GB. Max. memory is 16.1GB. [2024-12-02 08:15:40,858 INFO L158 Benchmark]: Witness Printer took 4.38ms. Allocated memory is still 2.8GB. Free memory was 2.2GB in the beginning and 2.2GB in the end (delta: 157.0kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:15:40,858 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35ms. Allocated memory is still 142.6MB. Free memory is still 83.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 477.64ms. Allocated memory is still 142.6MB. Free memory was 116.7MB in the beginning and 78.3MB in the end (delta: 38.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 219.38ms. Allocated memory is still 142.6MB. Free memory was 78.3MB in the beginning and 77.1MB in the end (delta: 1.2MB). Peak memory consumption was 30.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 243.04ms. Allocated memory is still 142.6MB. Free memory was 77.1MB in the beginning and 51.4MB in the end (delta: 25.7MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * RCFGBuilder took 2487.90ms. Allocated memory was 142.6MB in the beginning and 427.8MB in the end (delta: 285.2MB). Free memory was 51.4MB in the beginning and 137.0MB in the end (delta: -85.6MB). Peak memory consumption was 202.7MB. Max. memory is 16.1GB. * TraceAbstraction took 349018.46ms. Allocated memory was 427.8MB in the beginning and 2.8GB in the end (delta: 2.4GB). Free memory was 136.4MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 1.7GB. Max. memory is 16.1GB. * Witness Printer took 4.38ms. Allocated memory is still 2.8GB. Free memory was 2.2GB in the beginning and 2.2GB in the end (delta: 157.0kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 164, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 389, overapproximation of bitwiseAnd at line 283, overapproximation of bitwiseAnd at line 578, overapproximation of bitwiseAnd at line 289, overapproximation of bitwiseAnd at line 271, overapproximation of bitwiseAnd at line 654, overapproximation of bitwiseAnd at line 692, overapproximation of bitwiseAnd at line 125, overapproximation of bitwiseAnd at line 559, overapproximation of bitwiseAnd at line 295, overapproximation of bitwiseAnd at line 502, overapproximation of bitwiseAnd at line 635, overapproximation of bitwiseAnd at line 247, overapproximation of bitwiseAnd at line 253, overapproximation of bitwiseAnd at line 221, overapproximation of bitwiseAnd at line 540, overapproximation of bitwiseAnd at line 464, overapproximation of bitwiseAnd at line 241, overapproximation of bitwiseAnd at line 483, overapproximation of bitwiseAnd at line 398, overapproximation of bitwiseAnd at line 129, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 521, overapproximation of bitwiseAnd at line 229, overapproximation of bitwiseAnd at line 277, overapproximation of bitwiseAnd at line 301, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 766, overapproximation of bitwiseAnd at line 616. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 6); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (6 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 5); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (5 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 4); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (4 - 1); [L41] const SORT_60 mask_SORT_60 = (SORT_60)-1 >> (sizeof(SORT_60) * 8 - 3); [L42] const SORT_60 msb_SORT_60 = (SORT_60)1 << (3 - 1); [L44] const SORT_81 mask_SORT_81 = (SORT_81)-1 >> (sizeof(SORT_81) * 8 - 2); [L45] const SORT_81 msb_SORT_81 = (SORT_81)1 << (2 - 1); [L47] const SORT_13 var_15 = 16; [L48] const SORT_19 var_20 = 15; [L49] const SORT_19 var_25 = 14; [L50] const SORT_19 var_30 = 13; [L51] const SORT_19 var_35 = 12; [L52] const SORT_19 var_40 = 11; [L53] const SORT_19 var_45 = 10; [L54] const SORT_19 var_50 = 9; [L55] const SORT_19 var_55 = 8; [L56] const SORT_60 var_61 = 7; [L57] const SORT_60 var_66 = 6; [L58] const SORT_60 var_71 = 5; [L59] const SORT_60 var_76 = 4; [L60] const SORT_81 var_82 = 3; [L61] const SORT_81 var_87 = 2; [L62] const SORT_1 var_92 = 1; [L63] const SORT_13 var_105 = 17; [L64] const SORT_11 var_122 = 0; [L65] const SORT_1 var_152 = 0; [L66] const SORT_3 var_373 = 0; [L68] SORT_1 input_2; [L69] SORT_3 input_4; [L70] SORT_1 input_5; [L71] SORT_1 input_6; [L72] SORT_1 input_7; [L73] SORT_1 input_8; [L74] SORT_3 input_9; [L75] SORT_1 input_150; [L77] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L77] SORT_3 state_10 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L78] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L79] SORT_3 state_18 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L80] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L80] SORT_3 state_24 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L81] SORT_3 state_29 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L82] SORT_3 state_34 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L83] SORT_3 state_39 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L84] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L84] SORT_3 state_44 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L85] SORT_3 state_49 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L86] SORT_3 state_54 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L87] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L87] SORT_3 state_59 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L88] SORT_3 state_65 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L89] SORT_3 state_70 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L90] SORT_3 state_75 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L91] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L91] SORT_3 state_80 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L92] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L92] SORT_3 state_86 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L93] SORT_3 state_91 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L94] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L94] SORT_3 state_96 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L95] SORT_11 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L96] SORT_1 state_109 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L97] SORT_1 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L98] SORT_11 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L99] SORT_3 state_128 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L100] SORT_1 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L101] SORT_11 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L103] SORT_1 init_133_arg_1 = var_92; [L104] state_132 = init_133_arg_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ushort() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ushort() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=0] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=0] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=0] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=0] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=65535] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=0, var_155_arg_1=-256, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND FALSE !(!(cond)) [L401] RET __VERIFIER_assert(!(bad_156_arg_0)) [L403] SORT_11 var_186_arg_0 = state_185; [L404] SORT_13 var_186 = var_186_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] EXPR var_186 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] var_186 = var_186 & mask_SORT_13 [L406] SORT_13 var_236_arg_0 = var_186; [L407] SORT_13 var_236_arg_1 = var_15; [L408] SORT_1 var_236 = var_236_arg_0 == var_236_arg_1; [L409] SORT_1 var_237_arg_0 = input_6; [L410] SORT_1 var_237_arg_1 = var_236; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_237_arg_0=0, var_237_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] EXPR var_237_arg_0 & var_237_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] SORT_1 var_237 = var_237_arg_0 & var_237_arg_1; [L412] EXPR var_237 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L412] var_237 = var_237 & mask_SORT_1 [L413] SORT_1 var_372_arg_0 = var_237; [L414] SORT_3 var_372_arg_1 = input_4; [L415] SORT_3 var_372_arg_2 = state_10; [L416] SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2; [L417] SORT_1 var_374_arg_0 = input_7; [L418] SORT_3 var_374_arg_1 = var_373; [L419] SORT_3 var_374_arg_2 = var_372; [L420] SORT_3 var_374 = var_374_arg_0 ? var_374_arg_1 : var_374_arg_2; [L421] SORT_3 next_375_arg_1 = var_374; [L422] SORT_1 var_160_arg_0 = input_6; [L423] SORT_1 var_160_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_160_arg_0=0, var_160_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] EXPR var_160_arg_0 | var_160_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] SORT_1 var_160 = var_160_arg_0 | var_160_arg_1; [L425] SORT_1 var_161_arg_0 = var_160; [L426] SORT_1 var_161_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161_arg_0=0, var_161_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] EXPR var_161_arg_0 | var_161_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] SORT_1 var_161 = var_161_arg_0 | var_161_arg_1; [L428] EXPR var_161 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L428] var_161 = var_161 & mask_SORT_1 [L429] SORT_1 var_303_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_303_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] EXPR var_303_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L431] SORT_11 var_303 = var_303_arg_0; [L432] SORT_11 var_304_arg_0 = state_12; [L433] SORT_11 var_304_arg_1 = var_303; [L434] SORT_11 var_304 = var_304_arg_0 + var_304_arg_1; [L435] SORT_1 var_376_arg_0 = var_161; [L436] SORT_11 var_376_arg_1 = var_304; [L437] SORT_11 var_376_arg_2 = state_12; [L438] SORT_11 var_376 = var_376_arg_0 ? var_376_arg_1 : var_376_arg_2; [L439] SORT_1 var_377_arg_0 = input_7; [L440] SORT_11 var_377_arg_1 = var_122; [L441] SORT_11 var_377_arg_2 = var_376; [L442] SORT_11 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2; [L443] SORT_11 next_378_arg_1 = var_377; [L444] SORT_19 var_229_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_229_arg_0=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] EXPR var_229_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] var_229_arg_0 = var_229_arg_0 & mask_SORT_19 [L446] SORT_13 var_229 = var_229_arg_0; [L447] SORT_13 var_230_arg_0 = var_186; [L448] SORT_13 var_230_arg_1 = var_229; [L449] SORT_1 var_230 = var_230_arg_0 == var_230_arg_1; [L450] SORT_1 var_231_arg_0 = input_6; [L451] SORT_1 var_231_arg_1 = var_230; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_231_arg_0=0, var_231_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] EXPR var_231_arg_0 & var_231_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L453] EXPR var_231 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L453] var_231 = var_231 & mask_SORT_1 [L454] SORT_1 var_379_arg_0 = var_231; [L455] SORT_3 var_379_arg_1 = input_4; [L456] SORT_3 var_379_arg_2 = state_18; [L457] SORT_3 var_379 = var_379_arg_0 ? var_379_arg_1 : var_379_arg_2; [L458] SORT_1 var_380_arg_0 = input_7; [L459] SORT_3 var_380_arg_1 = var_373; [L460] SORT_3 var_380_arg_2 = var_379; [L461] SORT_3 var_380 = var_380_arg_0 ? var_380_arg_1 : var_380_arg_2; [L462] SORT_3 next_381_arg_1 = var_380; [L463] SORT_19 var_222_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_222_arg_0=14, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] EXPR var_222_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] var_222_arg_0 = var_222_arg_0 & mask_SORT_19 [L465] SORT_13 var_222 = var_222_arg_0; [L466] SORT_13 var_223_arg_0 = var_186; [L467] SORT_13 var_223_arg_1 = var_222; [L468] SORT_1 var_223 = var_223_arg_0 == var_223_arg_1; [L469] SORT_1 var_224_arg_0 = input_6; [L470] SORT_1 var_224_arg_1 = var_223; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_224_arg_0=0, var_224_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L472] EXPR var_224 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L472] var_224 = var_224 & mask_SORT_1 [L473] SORT_1 var_382_arg_0 = var_224; [L474] SORT_3 var_382_arg_1 = input_4; [L475] SORT_3 var_382_arg_2 = state_24; [L476] SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2; [L477] SORT_1 var_383_arg_0 = input_7; [L478] SORT_3 var_383_arg_1 = var_373; [L479] SORT_3 var_383_arg_2 = var_382; [L480] SORT_3 var_383 = var_383_arg_0 ? var_383_arg_1 : var_383_arg_2; [L481] SORT_3 next_384_arg_1 = var_383; [L482] SORT_19 var_215_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_215_arg_0=13, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] EXPR var_215_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] var_215_arg_0 = var_215_arg_0 & mask_SORT_19 [L484] SORT_13 var_215 = var_215_arg_0; [L485] SORT_13 var_216_arg_0 = var_186; [L486] SORT_13 var_216_arg_1 = var_215; [L487] SORT_1 var_216 = var_216_arg_0 == var_216_arg_1; [L488] SORT_1 var_217_arg_0 = input_6; [L489] SORT_1 var_217_arg_1 = var_216; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_217_arg_0=0, var_217_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] EXPR var_217_arg_0 & var_217_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L491] EXPR var_217 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L491] var_217 = var_217 & mask_SORT_1 [L492] SORT_1 var_385_arg_0 = var_217; [L493] SORT_3 var_385_arg_1 = input_4; [L494] SORT_3 var_385_arg_2 = state_29; [L495] SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2; [L496] SORT_1 var_386_arg_0 = input_7; [L497] SORT_3 var_386_arg_1 = var_373; [L498] SORT_3 var_386_arg_2 = var_385; [L499] SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; [L500] SORT_3 next_387_arg_1 = var_386; [L501] SORT_19 var_208_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_208_arg_0=12, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] EXPR var_208_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] var_208_arg_0 = var_208_arg_0 & mask_SORT_19 [L503] SORT_13 var_208 = var_208_arg_0; [L504] SORT_13 var_209_arg_0 = var_186; [L505] SORT_13 var_209_arg_1 = var_208; [L506] SORT_1 var_209 = var_209_arg_0 == var_209_arg_1; [L507] SORT_1 var_210_arg_0 = input_6; [L508] SORT_1 var_210_arg_1 = var_209; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_210_arg_0=0, var_210_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] EXPR var_210_arg_0 & var_210_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L510] EXPR var_210 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L510] var_210 = var_210 & mask_SORT_1 [L511] SORT_1 var_388_arg_0 = var_210; [L512] SORT_3 var_388_arg_1 = input_4; [L513] SORT_3 var_388_arg_2 = state_34; [L514] SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; [L515] SORT_1 var_389_arg_0 = input_7; [L516] SORT_3 var_389_arg_1 = var_373; [L517] SORT_3 var_389_arg_2 = var_388; [L518] SORT_3 var_389 = var_389_arg_0 ? var_389_arg_1 : var_389_arg_2; [L519] SORT_3 next_390_arg_1 = var_389; [L520] SORT_19 var_201_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_201_arg_0=11, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] EXPR var_201_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] var_201_arg_0 = var_201_arg_0 & mask_SORT_19 [L522] SORT_13 var_201 = var_201_arg_0; [L523] SORT_13 var_202_arg_0 = var_186; [L524] SORT_13 var_202_arg_1 = var_201; [L525] SORT_1 var_202 = var_202_arg_0 == var_202_arg_1; [L526] SORT_1 var_203_arg_0 = input_6; [L527] SORT_1 var_203_arg_1 = var_202; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_203_arg_0=0, var_203_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] EXPR var_203_arg_0 & var_203_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L529] EXPR var_203 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L529] var_203 = var_203 & mask_SORT_1 [L530] SORT_1 var_391_arg_0 = var_203; [L531] SORT_3 var_391_arg_1 = input_4; [L532] SORT_3 var_391_arg_2 = state_39; [L533] SORT_3 var_391 = var_391_arg_0 ? var_391_arg_1 : var_391_arg_2; [L534] SORT_1 var_392_arg_0 = input_7; [L535] SORT_3 var_392_arg_1 = var_373; [L536] SORT_3 var_392_arg_2 = var_391; [L537] SORT_3 var_392 = var_392_arg_0 ? var_392_arg_1 : var_392_arg_2; [L538] SORT_3 next_393_arg_1 = var_392; [L539] SORT_19 var_194_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_194_arg_0=10, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] EXPR var_194_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] var_194_arg_0 = var_194_arg_0 & mask_SORT_19 [L541] SORT_13 var_194 = var_194_arg_0; [L542] SORT_13 var_195_arg_0 = var_186; [L543] SORT_13 var_195_arg_1 = var_194; [L544] SORT_1 var_195 = var_195_arg_0 == var_195_arg_1; [L545] SORT_1 var_196_arg_0 = input_6; [L546] SORT_1 var_196_arg_1 = var_195; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_196_arg_0=0, var_196_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L548] EXPR var_196 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L548] var_196 = var_196 & mask_SORT_1 [L549] SORT_1 var_394_arg_0 = var_196; [L550] SORT_3 var_394_arg_1 = input_4; [L551] SORT_3 var_394_arg_2 = state_44; [L552] SORT_3 var_394 = var_394_arg_0 ? var_394_arg_1 : var_394_arg_2; [L553] SORT_1 var_395_arg_0 = input_7; [L554] SORT_3 var_395_arg_1 = var_373; [L555] SORT_3 var_395_arg_2 = var_394; [L556] SORT_3 var_395 = var_395_arg_0 ? var_395_arg_1 : var_395_arg_2; [L557] SORT_3 next_396_arg_1 = var_395; [L558] SORT_19 var_298_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_298_arg_0=9, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] EXPR var_298_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] var_298_arg_0 = var_298_arg_0 & mask_SORT_19 [L560] SORT_13 var_298 = var_298_arg_0; [L561] SORT_13 var_299_arg_0 = var_186; [L562] SORT_13 var_299_arg_1 = var_298; [L563] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L564] SORT_1 var_300_arg_0 = input_6; [L565] SORT_1 var_300_arg_1 = var_299; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_300_arg_0=0, var_300_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L567] EXPR var_300 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L567] var_300 = var_300 & mask_SORT_1 [L568] SORT_1 var_397_arg_0 = var_300; [L569] SORT_3 var_397_arg_1 = input_4; [L570] SORT_3 var_397_arg_2 = state_49; [L571] SORT_3 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2; [L572] SORT_1 var_398_arg_0 = input_7; [L573] SORT_3 var_398_arg_1 = var_373; [L574] SORT_3 var_398_arg_2 = var_397; [L575] SORT_3 var_398 = var_398_arg_0 ? var_398_arg_1 : var_398_arg_2; [L576] SORT_3 next_399_arg_1 = var_398; [L577] SORT_19 var_291_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_291_arg_0=8, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] EXPR var_291_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] var_291_arg_0 = var_291_arg_0 & mask_SORT_19 [L579] SORT_13 var_291 = var_291_arg_0; [L580] SORT_13 var_292_arg_0 = var_186; [L581] SORT_13 var_292_arg_1 = var_291; [L582] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L583] SORT_1 var_293_arg_0 = input_6; [L584] SORT_1 var_293_arg_1 = var_292; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_293_arg_0=0, var_293_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L586] EXPR var_293 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L586] var_293 = var_293 & mask_SORT_1 [L587] SORT_1 var_400_arg_0 = var_293; [L588] SORT_3 var_400_arg_1 = input_4; [L589] SORT_3 var_400_arg_2 = state_54; [L590] SORT_3 var_400 = var_400_arg_0 ? var_400_arg_1 : var_400_arg_2; [L591] SORT_1 var_401_arg_0 = input_7; [L592] SORT_3 var_401_arg_1 = var_373; [L593] SORT_3 var_401_arg_2 = var_400; [L594] SORT_3 var_401 = var_401_arg_0 ? var_401_arg_1 : var_401_arg_2; [L595] SORT_3 next_402_arg_1 = var_401; [L596] SORT_60 var_284_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_284_arg_0=7, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] EXPR var_284_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] var_284_arg_0 = var_284_arg_0 & mask_SORT_60 [L598] SORT_13 var_284 = var_284_arg_0; [L599] SORT_13 var_285_arg_0 = var_186; [L600] SORT_13 var_285_arg_1 = var_284; [L601] SORT_1 var_285 = var_285_arg_0 == var_285_arg_1; [L602] SORT_1 var_286_arg_0 = input_6; [L603] SORT_1 var_286_arg_1 = var_285; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_286_arg_0=0, var_286_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L605] EXPR var_286 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L605] var_286 = var_286 & mask_SORT_1 [L606] SORT_1 var_403_arg_0 = var_286; [L607] SORT_3 var_403_arg_1 = input_4; [L608] SORT_3 var_403_arg_2 = state_59; [L609] SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2; [L610] SORT_1 var_404_arg_0 = input_7; [L611] SORT_3 var_404_arg_1 = var_373; [L612] SORT_3 var_404_arg_2 = var_403; [L613] SORT_3 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2; [L614] SORT_3 next_405_arg_1 = var_404; [L615] SORT_60 var_277_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_277_arg_0=6, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] EXPR var_277_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] var_277_arg_0 = var_277_arg_0 & mask_SORT_60 [L617] SORT_13 var_277 = var_277_arg_0; [L618] SORT_13 var_278_arg_0 = var_186; [L619] SORT_13 var_278_arg_1 = var_277; [L620] SORT_1 var_278 = var_278_arg_0 == var_278_arg_1; [L621] SORT_1 var_279_arg_0 = input_6; [L622] SORT_1 var_279_arg_1 = var_278; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_279_arg_0=0, var_279_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] EXPR var_279_arg_0 & var_279_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L624] EXPR var_279 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L624] var_279 = var_279 & mask_SORT_1 [L625] SORT_1 var_406_arg_0 = var_279; [L626] SORT_3 var_406_arg_1 = input_4; [L627] SORT_3 var_406_arg_2 = state_65; [L628] SORT_3 var_406 = var_406_arg_0 ? var_406_arg_1 : var_406_arg_2; [L629] SORT_1 var_407_arg_0 = input_7; [L630] SORT_3 var_407_arg_1 = var_373; [L631] SORT_3 var_407_arg_2 = var_406; [L632] SORT_3 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2; [L633] SORT_3 next_408_arg_1 = var_407; [L634] SORT_60 var_270_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_270_arg_0=5, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] EXPR var_270_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] var_270_arg_0 = var_270_arg_0 & mask_SORT_60 [L636] SORT_13 var_270 = var_270_arg_0; [L637] SORT_13 var_271_arg_0 = var_186; [L638] SORT_13 var_271_arg_1 = var_270; [L639] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L640] SORT_1 var_272_arg_0 = input_6; [L641] SORT_1 var_272_arg_1 = var_271; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_272_arg_0=0, var_272_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] EXPR var_272_arg_0 & var_272_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] SORT_1 var_272 = var_272_arg_0 & var_272_arg_1; [L643] EXPR var_272 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L643] var_272 = var_272 & mask_SORT_1 [L644] SORT_1 var_409_arg_0 = var_272; [L645] SORT_3 var_409_arg_1 = input_4; [L646] SORT_3 var_409_arg_2 = state_70; [L647] SORT_3 var_409 = var_409_arg_0 ? var_409_arg_1 : var_409_arg_2; [L648] SORT_1 var_410_arg_0 = input_7; [L649] SORT_3 var_410_arg_1 = var_373; [L650] SORT_3 var_410_arg_2 = var_409; [L651] SORT_3 var_410 = var_410_arg_0 ? var_410_arg_1 : var_410_arg_2; [L652] SORT_3 next_411_arg_1 = var_410; [L653] SORT_60 var_263_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_263_arg_0=4, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] EXPR var_263_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] var_263_arg_0 = var_263_arg_0 & mask_SORT_60 [L655] SORT_13 var_263 = var_263_arg_0; [L656] SORT_13 var_264_arg_0 = var_186; [L657] SORT_13 var_264_arg_1 = var_263; [L658] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L659] SORT_1 var_265_arg_0 = input_6; [L660] SORT_1 var_265_arg_1 = var_264; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_265_arg_0=0, var_265_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] EXPR var_265_arg_0 & var_265_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L662] EXPR var_265 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L662] var_265 = var_265 & mask_SORT_1 [L663] SORT_1 var_412_arg_0 = var_265; [L664] SORT_3 var_412_arg_1 = input_4; [L665] SORT_3 var_412_arg_2 = state_75; [L666] SORT_3 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2; [L667] SORT_1 var_413_arg_0 = input_7; [L668] SORT_3 var_413_arg_1 = var_373; [L669] SORT_3 var_413_arg_2 = var_412; [L670] SORT_3 var_413 = var_413_arg_0 ? var_413_arg_1 : var_413_arg_2; [L671] SORT_3 next_414_arg_1 = var_413; [L672] SORT_81 var_256_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_256_arg_0=3, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] EXPR var_256_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] var_256_arg_0 = var_256_arg_0 & mask_SORT_81 [L674] SORT_13 var_256 = var_256_arg_0; [L675] SORT_13 var_257_arg_0 = var_186; [L676] SORT_13 var_257_arg_1 = var_256; [L677] SORT_1 var_257 = var_257_arg_0 == var_257_arg_1; [L678] SORT_1 var_258_arg_0 = input_6; [L679] SORT_1 var_258_arg_1 = var_257; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_258_arg_0=0, var_258_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] EXPR var_258_arg_0 & var_258_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L681] EXPR var_258 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L681] var_258 = var_258 & mask_SORT_1 [L682] SORT_1 var_415_arg_0 = var_258; [L683] SORT_3 var_415_arg_1 = input_4; [L684] SORT_3 var_415_arg_2 = state_80; [L685] SORT_3 var_415 = var_415_arg_0 ? var_415_arg_1 : var_415_arg_2; [L686] SORT_1 var_416_arg_0 = input_7; [L687] SORT_3 var_416_arg_1 = var_373; [L688] SORT_3 var_416_arg_2 = var_415; [L689] SORT_3 var_416 = var_416_arg_0 ? var_416_arg_1 : var_416_arg_2; [L690] SORT_3 next_417_arg_1 = var_416; [L691] SORT_81 var_249_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_249_arg_0=2, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] EXPR var_249_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] var_249_arg_0 = var_249_arg_0 & mask_SORT_81 [L693] SORT_13 var_249 = var_249_arg_0; [L694] SORT_13 var_250_arg_0 = var_186; [L695] SORT_13 var_250_arg_1 = var_249; [L696] SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; [L697] SORT_1 var_251_arg_0 = input_6; [L698] SORT_1 var_251_arg_1 = var_250; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_251_arg_0=0, var_251_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] EXPR var_251_arg_0 & var_251_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L700] EXPR var_251 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L700] var_251 = var_251 & mask_SORT_1 [L701] SORT_1 var_418_arg_0 = var_251; [L702] SORT_3 var_418_arg_1 = input_4; [L703] SORT_3 var_418_arg_2 = state_86; [L704] SORT_3 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L705] SORT_1 var_419_arg_0 = input_7; [L706] SORT_3 var_419_arg_1 = var_373; [L707] SORT_3 var_419_arg_2 = var_418; [L708] SORT_3 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2; [L709] SORT_3 next_420_arg_1 = var_419; [L710] SORT_1 var_242_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_242_arg_0=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] EXPR var_242_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] var_242_arg_0 = var_242_arg_0 & mask_SORT_1 [L712] SORT_13 var_242 = var_242_arg_0; [L713] SORT_13 var_243_arg_0 = var_186; [L714] SORT_13 var_243_arg_1 = var_242; [L715] SORT_1 var_243 = var_243_arg_0 == var_243_arg_1; [L716] SORT_1 var_244_arg_0 = input_6; [L717] SORT_1 var_244_arg_1 = var_243; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_244_arg_0=0, var_244_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] EXPR var_244_arg_0 & var_244_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L719] EXPR var_244 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L719] var_244 = var_244 & mask_SORT_1 [L720] SORT_1 var_421_arg_0 = var_244; [L721] SORT_3 var_421_arg_1 = input_4; [L722] SORT_3 var_421_arg_2 = state_91; [L723] SORT_3 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; [L724] SORT_1 var_422_arg_0 = input_7; [L725] SORT_3 var_422_arg_1 = var_373; [L726] SORT_3 var_422_arg_2 = var_421; [L727] SORT_3 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2; [L728] SORT_3 next_423_arg_1 = var_422; [L729] SORT_13 var_187_arg_0 = var_186; [L730] SORT_1 var_187 = var_187_arg_0 != 0; [L731] SORT_1 var_188_arg_0 = var_187; [L732] SORT_1 var_188 = ~var_188_arg_0; [L733] SORT_1 var_189_arg_0 = input_6; [L734] SORT_1 var_189_arg_1 = var_188; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_189_arg_0=0, var_189_arg_1=-1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L736] EXPR var_189 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L736] var_189 = var_189 & mask_SORT_1 [L737] SORT_1 var_424_arg_0 = var_189; [L738] SORT_3 var_424_arg_1 = input_4; [L739] SORT_3 var_424_arg_2 = state_96; [L740] SORT_3 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2; [L741] SORT_1 var_425_arg_0 = input_7; [L742] SORT_3 var_425_arg_1 = var_373; [L743] SORT_3 var_425_arg_2 = var_424; [L744] SORT_3 var_425 = var_425_arg_0 ? var_425_arg_1 : var_425_arg_2; [L745] SORT_3 next_426_arg_1 = var_425; [L746] SORT_1 var_427_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_427_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] EXPR var_427_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] var_427_arg_0 = var_427_arg_0 & mask_SORT_1 [L748] SORT_11 var_427 = var_427_arg_0; [L749] SORT_11 var_428_arg_0 = state_101; [L750] SORT_11 var_428_arg_1 = var_427; [L751] SORT_11 var_428 = var_428_arg_0 + var_428_arg_1; [L752] SORT_1 var_429_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_429_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] EXPR var_429_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] var_429_arg_0 = var_429_arg_0 & mask_SORT_1 [L754] SORT_11 var_429 = var_429_arg_0; [L755] SORT_11 var_430_arg_0 = var_428; [L756] SORT_11 var_430_arg_1 = var_429; [L757] SORT_11 var_430 = var_430_arg_0 - var_430_arg_1; [L758] SORT_1 var_431_arg_0 = input_7; [L759] SORT_11 var_431_arg_1 = var_122; [L760] SORT_11 var_431_arg_2 = var_430; [L761] SORT_11 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_431=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] EXPR var_431 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] var_431 = var_431 & mask_SORT_11 [L763] SORT_11 next_432_arg_1 = var_431; [L764] SORT_1 var_333_arg_0 = state_109; [L765] SORT_1 var_333 = ~var_333_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=-1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] EXPR var_333 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] var_333 = var_333 & mask_SORT_1 [L767] SORT_1 var_329_arg_0 = input_8; [L768] SORT_1 var_329_arg_1 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329_arg_0=0, var_329_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] EXPR var_329_arg_0 & var_329_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] SORT_1 var_329 = var_329_arg_0 & var_329_arg_1; [L770] SORT_1 var_330_arg_0 = state_109; [L771] SORT_1 var_330_arg_1 = var_329; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_330_arg_0=0, var_330_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] EXPR var_330_arg_0 | var_330_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] SORT_1 var_330 = var_330_arg_0 | var_330_arg_1; [L773] SORT_1 var_433_arg_0 = var_333; [L774] SORT_1 var_433_arg_1 = var_330; [L775] SORT_1 var_433_arg_2 = state_109; [L776] SORT_1 var_433 = var_433_arg_0 ? var_433_arg_1 : var_433_arg_2; [L777] SORT_1 var_434_arg_0 = input_7; [L778] SORT_1 var_434_arg_1 = var_152; [L779] SORT_1 var_434_arg_2 = var_433; [L780] SORT_1 var_434 = var_434_arg_0 ? var_434_arg_1 : var_434_arg_2; [L781] SORT_1 next_435_arg_1 = var_434; [L782] SORT_1 var_341_arg_0 = var_126; [L783] SORT_1 var_341_arg_1 = state_110; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_341_arg_0=0, var_341_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] EXPR var_341_arg_0 | var_341_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; [L785] SORT_1 var_436_arg_0 = var_92; [L786] SORT_1 var_436_arg_1 = var_341; [L787] SORT_1 var_436_arg_2 = state_110; [L788] SORT_1 var_436 = var_436_arg_0 ? var_436_arg_1 : var_436_arg_2; [L789] SORT_1 var_437_arg_0 = input_7; [L790] SORT_1 var_437_arg_1 = var_152; [L791] SORT_1 var_437_arg_2 = var_436; [L792] SORT_1 var_437 = var_437_arg_0 ? var_437_arg_1 : var_437_arg_2; [L793] SORT_1 next_438_arg_1 = var_437; [L794] SORT_1 var_353_arg_0 = input_6; [L795] SORT_1 var_353_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_353_arg_0=0, var_353_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] EXPR var_353_arg_0 | var_353_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L797] SORT_1 var_354_arg_0 = var_353; [L798] SORT_1 var_354_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_354_arg_0=0, var_354_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] EXPR var_354_arg_0 | var_354_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L800] SORT_1 var_355_arg_0 = var_354; [L801] SORT_1 var_355_arg_1 = state_109; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_355_arg_0=0, var_355_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] EXPR var_355_arg_0 | var_355_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L803] EXPR var_355 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L803] var_355 = var_355 & mask_SORT_1 [L804] SORT_1 var_439_arg_0 = var_355; [L805] SORT_11 var_439_arg_1 = var_123; [L806] SORT_11 var_439_arg_2 = state_113; [L807] SORT_11 var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2; [L808] SORT_1 var_440_arg_0 = input_7; [L809] SORT_11 var_440_arg_1 = var_122; [L810] SORT_11 var_440_arg_2 = var_439; [L811] SORT_11 var_440 = var_440_arg_0 ? var_440_arg_1 : var_440_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_440=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] EXPR var_440 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] var_440 = var_440 & mask_SORT_11 [L813] SORT_11 next_441_arg_1 = var_440; [L814] SORT_1 var_338_arg_0 = var_329; [L815] SORT_1 var_338_arg_1 = var_333; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_338_arg_0=0, var_338_arg_1=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] EXPR var_338_arg_0 & var_338_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L817] EXPR var_338 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L817] var_338 = var_338 & mask_SORT_1 [L818] SORT_1 var_442_arg_0 = var_338; [L819] SORT_3 var_442_arg_1 = input_4; [L820] SORT_3 var_442_arg_2 = state_128; [L821] SORT_3 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2; [L822] SORT_1 var_443_arg_0 = input_7; [L823] SORT_3 var_443_arg_1 = var_373; [L824] SORT_3 var_443_arg_2 = var_442; [L825] SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_443=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] EXPR var_443 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] var_443 = var_443 & mask_SORT_3 [L827] SORT_3 next_444_arg_1 = var_443; [L828] SORT_1 next_445_arg_1 = var_152; [L829] SORT_1 var_309_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_309_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] EXPR var_309_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L831] SORT_11 var_309 = var_309_arg_0; [L832] SORT_11 var_310_arg_0 = state_185; [L833] SORT_11 var_310_arg_1 = var_309; [L834] SORT_11 var_310 = var_310_arg_0 + var_310_arg_1; [L835] SORT_1 var_446_arg_0 = var_161; [L836] SORT_11 var_446_arg_1 = var_310; [L837] SORT_11 var_446_arg_2 = state_185; [L838] SORT_11 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2; [L839] SORT_1 var_447_arg_0 = input_7; [L840] SORT_11 var_447_arg_1 = var_122; [L841] SORT_11 var_447_arg_2 = var_446; [L842] SORT_11 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2; [L843] SORT_11 next_448_arg_1 = var_447; [L845] state_10 = next_375_arg_1 [L846] state_12 = next_378_arg_1 [L847] state_18 = next_381_arg_1 [L848] state_24 = next_384_arg_1 [L849] state_29 = next_387_arg_1 [L850] state_34 = next_390_arg_1 [L851] state_39 = next_393_arg_1 [L852] state_44 = next_396_arg_1 [L853] state_49 = next_399_arg_1 [L854] state_54 = next_402_arg_1 [L855] state_59 = next_405_arg_1 [L856] state_65 = next_408_arg_1 [L857] state_70 = next_411_arg_1 [L858] state_75 = next_414_arg_1 [L859] state_80 = next_417_arg_1 [L860] state_86 = next_420_arg_1 [L861] state_91 = next_423_arg_1 [L862] state_96 = next_426_arg_1 [L863] state_101 = next_432_arg_1 [L864] state_109 = next_435_arg_1 [L865] state_110 = next_438_arg_1 [L866] state_113 = next_441_arg_1 [L867] state_128 = next_444_arg_1 [L868] state_132 = next_445_arg_1 [L869] state_185 = next_448_arg_1 [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ushort() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ushort() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=254, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=257, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=0, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_27=0, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=1, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=1, var_155_arg_1=-1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=65535, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 552 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 348.7s, OverallIterations: 88, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 114.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 122349 SdHoareTripleChecker+Valid, 64.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 122216 mSDsluCounter, 349999 SdHoareTripleChecker+Invalid, 55.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 282326 mSDsCounter, 466 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 117865 IncrementalHoareTripleChecker+Invalid, 118331 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 466 mSolverCounterUnsat, 67673 mSDtfsCounter, 117865 mSolverCounterSat, 1.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 8876 GetRequests, 7536 SyntacticMatches, 2 SemanticMatches, 1338 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88573 ImplicationChecksByTransitivity, 48.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24320occurred in iteration=87, InterpolantAutomatonStates: 1096, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.8s AutomataMinimizationTime, 87 MinimizatonAttempts, 141378 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.8s SsaConstructionTime, 83.4s SatisfiabilityAnalysisTime, 108.6s InterpolantComputationTime, 36668 NumberOfCodeBlocks, 36668 NumberOfCodeBlocksAsserted, 99 NumberOfCheckSat, 38546 ConstructedInterpolants, 0 QuantifiedInterpolants, 236116 SizeOfPredicates, 86 NumberOfNonLiveVariables, 30802 ConjunctsInSsa, 792 ConjunctsInUnsatCore, 103 InterpolantComputations, 83 PerfectInterpolantSequences, 11121/12631 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 08:15:40,909 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 222be94abfdbb514b1917b4bfb3a2a13389b64e1e049c782003790d790f6753f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:15:42,953 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:15:43,029 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 08:15:43,035 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:15:43,035 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:15:43,057 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:15:43,058 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:15:43,058 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:15:43,059 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:15:43,059 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:15:43,059 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:15:43,059 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:15:43,059 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:15:43,059 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:15:43,059 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:15:43,060 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:15:43,060 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:15:43,061 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:15:43,061 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:15:43,061 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:15:43,061 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:15:43,061 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:15:43,061 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:15:43,061 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:15:43,062 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:15:43,062 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:15:43,063 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 222be94abfdbb514b1917b4bfb3a2a13389b64e1e049c782003790d790f6753f [2024-12-02 08:15:43,300 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:15:43,307 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:15:43,310 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:15:43,311 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:15:43,312 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:15:43,313 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:15:46,043 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/fb8bb37fa/4c0bfa9ae849442b8c8f19ff832aa8d4/FLAG49cb2cabc [2024-12-02 08:15:46,240 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:15:46,241 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:15:46,254 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/fb8bb37fa/4c0bfa9ae849442b8c8f19ff832aa8d4/FLAG49cb2cabc [2024-12-02 08:15:46,269 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/data/fb8bb37fa/4c0bfa9ae849442b8c8f19ff832aa8d4 [2024-12-02 08:15:46,271 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:15:46,272 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:15:46,273 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:15:46,273 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:15:46,278 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:15:46,278 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,279 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f0582e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46, skipping insertion in model container [2024-12-02 08:15:46,279 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,309 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:15:46,466 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c[1280,1293] [2024-12-02 08:15:46,647 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:15:46,658 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:15:46,669 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c[1280,1293] [2024-12-02 08:15:46,751 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:15:46,764 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:15:46,765 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46 WrapperNode [2024-12-02 08:15:46,765 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:15:46,766 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:15:46,766 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:15:46,766 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:15:46,772 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,790 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,833 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 912 [2024-12-02 08:15:46,834 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:15:46,834 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:15:46,834 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:15:46,834 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:15:46,843 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,843 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,851 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,872 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:15:46,872 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,873 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,893 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,896 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,899 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,903 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,907 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,914 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:15:46,915 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:15:46,915 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:15:46,915 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:15:46,916 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (1/1) ... [2024-12-02 08:15:46,922 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:15:46,935 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:15:46,946 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:15:46,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:15:46,973 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:15:46,973 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 08:15:46,973 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:15:46,973 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:15:46,973 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:15:46,973 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:15:47,166 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:15:47,168 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:15:47,852 INFO L? ?]: Removed 271 outVars from TransFormulas that were not future-live. [2024-12-02 08:15:47,852 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:15:47,861 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:15:47,861 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:15:47,861 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:15:47 BoogieIcfgContainer [2024-12-02 08:15:47,862 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:15:47,864 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:15:47,864 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:15:47,869 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:15:47,869 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:15:46" (1/3) ... [2024-12-02 08:15:47,870 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@746ef1f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:15:47, skipping insertion in model container [2024-12-02 08:15:47,870 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:15:46" (2/3) ... [2024-12-02 08:15:47,870 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@746ef1f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:15:47, skipping insertion in model container [2024-12-02 08:15:47,870 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:15:47" (3/3) ... [2024-12-02 08:15:47,871 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c [2024-12-02 08:15:47,883 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:15:47,885 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w16_d16_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:15:47,921 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:15:47,929 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@23de5d12, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:15:47,929 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:15:47,933 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:15:47,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 08:15:47,940 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:15:47,940 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:15:47,941 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:15:47,945 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:15:47,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 08:15:47,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:15:47,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1268017448] [2024-12-02 08:15:47,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:15:47,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:47,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:15:47,960 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:15:47,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:15:48,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:15:48,317 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:15:48,327 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:15:48,583 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 08:15:48,583 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:15:48,727 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:15:48,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1268017448] [2024-12-02 08:15:48,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1268017448] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:15:48,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1473130321] [2024-12-02 08:15:48,728 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:15:48,728 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:15:48,728 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:15:48,730 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:15:48,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 08:15:49,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:15:49,290 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 08:15:49,296 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:15:49,387 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:15:49,387 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:15:49,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1473130321] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:15:49,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:15:49,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 08:15:49,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653582126] [2024-12-02 08:15:49,390 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:15:49,393 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:15:49,393 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:15:49,406 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:15:49,406 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:15:49,408 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:15:49,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:15:49,506 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 08:15:49,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:15:49,508 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 08:15:49,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:15:49,513 INFO L225 Difference]: With dead ends: 43 [2024-12-02 08:15:49,513 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 08:15:49,516 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:15:49,518 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:15:49,519 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:15:49,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 08:15:49,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 08:15:49,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:15:49,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 08:15:49,552 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 08:15:49,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:15:49,553 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 08:15:49,553 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:15:49,553 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 08:15:49,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 08:15:49,555 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:15:49,555 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 08:15:49,560 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 08:15:49,761 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:15:49,955 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:49,956 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:15:49,956 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:15:49,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 08:15:49,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:15:49,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [288339891] [2024-12-02 08:15:49,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:15:49,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:49,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:15:49,959 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:15:49,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:15:50,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:15:50,417 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 08:15:50,429 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:15:50,863 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:15:50,863 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:15:51,006 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:15:51,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [288339891] [2024-12-02 08:15:51,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [288339891] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:15:51,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [910720023] [2024-12-02 08:15:51,006 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:15:51,006 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:15:51,007 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:15:51,008 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:15:51,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 08:15:51,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:15:51,865 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 08:15:51,875 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:15:52,129 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:15:52,129 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:15:52,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [910720023] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:15:52,245 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:15:52,245 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 08:15:52,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179045654] [2024-12-02 08:15:52,245 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:15:52,246 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:15:52,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:15:52,246 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:15:52,247 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:15:52,247 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:15:52,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:15:52,574 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 08:15:52,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:15:52,574 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 08:15:52,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:15:52,575 INFO L225 Difference]: With dead ends: 36 [2024-12-02 08:15:52,575 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 08:15:52,576 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:15:52,576 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:15:52,577 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:15:52,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 08:15:52,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 08:15:52,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:15:52,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 08:15:52,585 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 08:15:52,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:15:52,586 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 08:15:52,586 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:15:52,586 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 08:15:52,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 08:15:52,588 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:15:52,588 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 08:15:52,595 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 08:15:52,796 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:15:52,989 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:52,989 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:15:52,990 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:15:52,990 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 08:15:52,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:15:52,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2098089180] [2024-12-02 08:15:52,991 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:15:52,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:15:52,992 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:15:52,993 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:15:52,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:15:53,532 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:15:53,532 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:15:53,539 INFO L256 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-02 08:15:53,551 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:15:56,847 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:15:56,848 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:16:01,249 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse7 (forall ((|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_151_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_151_arg_1~0#1_17|)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|)))) .cse0))))) (.cse8 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_132~0#1|))) (let ((.cse12 (or .cse7 .cse8)) (.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_109~0#1|)) (.cse11 (not .cse8))) (let ((.cse4 (and .cse12 (or (forall ((|v_ULTIMATE.start_main_~var_115_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_17|) .cse10)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|)))))))) .cse11))) (.cse6 ((_ zero_extend 16) |c_ULTIMATE.start_main_~state_128~0#1|)) (.cse5 ((_ zero_extend 16) |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (let ((.cse2 (let ((.cse9 (= .cse6 ((_ zero_extend 16) ((_ extract 15 0) (bvand ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) |c_ULTIMATE.start_main_~state_96~0#1|))) .cse5)))))) (and (or .cse4 .cse9) (or (not .cse9) (and (or (forall ((|v_ULTIMATE.start_main_~var_115_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_17|) .cse10)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_17|)))))))))))))))))) .cse0)))) .cse11) .cse12))))) (.cse1 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32)))) (not .cse1) .cse2) (or (let ((.cse3 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8)))) (and (or .cse3 .cse2) (or (not .cse3) (and (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_15| (_ BitVec 16))) (= ((_ zero_extend 16) ((_ extract 15 0) (bvand ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) |v_ULTIMATE.start_main_~var_99_arg_2~0#1_15|))) .cse5))) .cse6))) (or .cse7 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_15| (_ BitVec 16))) (not (= ((_ zero_extend 16) ((_ extract 15 0) (bvand ((_ zero_extend 16) ((_ extract 15 0) ((_ zero_extend 16) |v_ULTIMATE.start_main_~var_99_arg_2~0#1_15|))) .cse5))) .cse6))) .cse8))))) .cse1))))))) is different from false [2024-12-02 08:16:01,413 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:16:01,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2098089180] [2024-12-02 08:16:01,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2098089180] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:16:01,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1215916006] [2024-12-02 08:16:01,414 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:16:01,414 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:16:01,414 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:16:01,415 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:16:01,416 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 08:16:02,606 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:16:02,606 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:16:02,638 INFO L256 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 08:16:02,649 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:16:17,424 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:16:17,424 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:16:21,150 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-12-02 08:16:21,150 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-12-02 08:16:21,151 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-12-02 08:16:21,159 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:16:21,358 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-12-02 08:16:21,551 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 08:16:21,552 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:842) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 46 more [2024-12-02 08:16:21,556 INFO L158 Benchmark]: Toolchain (without parser) took 35284.33ms. Allocated memory was 92.3MB in the beginning and 604.0MB in the end (delta: 511.7MB). Free memory was 68.1MB in the beginning and 257.4MB in the end (delta: -189.3MB). Peak memory consumption was 318.2MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,556 INFO L158 Benchmark]: CDTParser took 0.44ms. Allocated memory is still 83.9MB. Free memory is still 48.2MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:16:21,557 INFO L158 Benchmark]: CACSL2BoogieTranslator took 492.16ms. Allocated memory is still 92.3MB. Free memory was 67.9MB in the beginning and 62.8MB in the end (delta: 5.2MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,557 INFO L158 Benchmark]: Boogie Procedure Inliner took 68.09ms. Allocated memory is still 92.3MB. Free memory was 62.8MB in the beginning and 56.0MB in the end (delta: 6.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,557 INFO L158 Benchmark]: Boogie Preprocessor took 80.10ms. Allocated memory is still 92.3MB. Free memory was 56.0MB in the beginning and 47.9MB in the end (delta: 8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,558 INFO L158 Benchmark]: RCFGBuilder took 946.88ms. Allocated memory was 92.3MB in the beginning and 134.2MB in the end (delta: 41.9MB). Free memory was 47.9MB in the beginning and 86.6MB in the end (delta: -38.7MB). Peak memory consumption was 56.0MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,558 INFO L158 Benchmark]: TraceAbstraction took 33691.72ms. Allocated memory was 134.2MB in the beginning and 604.0MB in the end (delta: 469.8MB). Free memory was 85.6MB in the beginning and 257.4MB in the end (delta: -171.8MB). Peak memory consumption was 297.9MB. Max. memory is 16.1GB. [2024-12-02 08:16:21,560 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.44ms. Allocated memory is still 83.9MB. Free memory is still 48.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 492.16ms. Allocated memory is still 92.3MB. Free memory was 67.9MB in the beginning and 62.8MB in the end (delta: 5.2MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 68.09ms. Allocated memory is still 92.3MB. Free memory was 62.8MB in the beginning and 56.0MB in the end (delta: 6.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 80.10ms. Allocated memory is still 92.3MB. Free memory was 56.0MB in the beginning and 47.9MB in the end (delta: 8.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 946.88ms. Allocated memory was 92.3MB in the beginning and 134.2MB in the end (delta: 41.9MB). Free memory was 47.9MB in the beginning and 86.6MB in the end (delta: -38.7MB). Peak memory consumption was 56.0MB. Max. memory is 16.1GB. * TraceAbstraction took 33691.72ms. Allocated memory was 134.2MB in the beginning and 604.0MB in the end (delta: 469.8MB). Free memory was 85.6MB in the beginning and 257.4MB in the end (delta: -171.8MB). Peak memory consumption was 297.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_07938bfd-4c5e-4d5a-ad1e-29a5beeef8b1/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")