./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 61bc671f3649b1d9d6fbe9f0597d430b8b23b87e2a7d2106b41de545f5b7b012 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:01:24,954 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:01:25,015 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 08:01:25,020 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:01:25,020 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:01:25,044 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:01:25,044 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:01:25,044 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:01:25,045 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:01:25,045 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:01:25,045 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:01:25,045 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:01:25,045 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:01:25,046 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:01:25,046 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:01:25,047 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:01:25,047 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:01:25,047 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:01:25,048 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 08:01:25,048 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:01:25,049 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:01:25,049 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:01:25,049 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:01:25,049 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 61bc671f3649b1d9d6fbe9f0597d430b8b23b87e2a7d2106b41de545f5b7b012 [2024-12-02 08:01:25,276 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:01:25,284 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:01:25,286 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:01:25,288 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:01:25,288 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:01:25,289 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:01:27,957 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/17f650b91/3fd6eedc4dce4baebf79839006f711cd/FLAG2eddacdeb [2024-12-02 08:01:28,261 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:01:28,262 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:01:28,273 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/17f650b91/3fd6eedc4dce4baebf79839006f711cd/FLAG2eddacdeb [2024-12-02 08:01:28,286 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/17f650b91/3fd6eedc4dce4baebf79839006f711cd [2024-12-02 08:01:28,288 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:01:28,289 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:01:28,291 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:01:28,291 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:01:28,294 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:01:28,295 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:28,295 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@692dabf8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28, skipping insertion in model container [2024-12-02 08:01:28,296 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:28,329 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:01:28,458 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c[1280,1293] [2024-12-02 08:01:28,710 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:01:28,717 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:01:28,724 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c[1280,1293] [2024-12-02 08:01:28,844 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:01:28,855 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:01:28,855 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28 WrapperNode [2024-12-02 08:01:28,856 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:01:28,856 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:01:28,856 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:01:28,856 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:01:28,861 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:28,891 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,152 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-12-02 08:01:29,152 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:01:29,153 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:01:29,153 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:01:29,153 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:01:29,162 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,162 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,241 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,327 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:01:29,327 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,328 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,416 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,429 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,445 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,471 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,482 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,570 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:01:29,571 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:01:29,571 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:01:29,571 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:01:29,572 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (1/1) ... [2024-12-02 08:01:29,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:01:29,584 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:01:29,594 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:01:29,599 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:01:29,617 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:01:29,617 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:01:29,618 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:01:29,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 08:01:29,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:01:29,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:01:29,905 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:01:29,906 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:01:33,229 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-12-02 08:01:33,230 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:01:33,255 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:01:33,256 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:01:33,256 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:01:33 BoogieIcfgContainer [2024-12-02 08:01:33,256 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:01:33,259 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:01:33,259 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:01:33,264 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:01:33,264 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:01:28" (1/3) ... [2024-12-02 08:01:33,264 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a3dd1ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:01:33, skipping insertion in model container [2024-12-02 08:01:33,264 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:01:28" (2/3) ... [2024-12-02 08:01:33,265 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a3dd1ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:01:33, skipping insertion in model container [2024-12-02 08:01:33,265 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:01:33" (3/3) ... [2024-12-02 08:01:33,266 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:01:33,280 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:01:33,282 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c that has 2 procedures, 872 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:01:33,355 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:01:33,367 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@12171d8f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:01:33,367 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:01:33,373 INFO L276 IsEmpty]: Start isEmpty. Operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:33,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 08:01:33,389 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:33,390 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:33,391 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:33,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:33,396 INFO L85 PathProgramCache]: Analyzing trace with hash -684669181, now seen corresponding path program 1 times [2024-12-02 08:01:33,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:33,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168619871] [2024-12-02 08:01:33,405 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:33,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:33,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:01:33,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:33,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168619871] [2024-12-02 08:01:33,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [168619871] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:01:33,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [433152354] [2024-12-02 08:01:33,940 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:33,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:01:33,940 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:01:33,944 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:01:33,945 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:01:34,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:34,590 INFO L256 TraceCheckSpWp]: Trace formula consists of 1413 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 08:01:34,604 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:01:34,635 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:01:34,635 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:01:34,635 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [433152354] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:34,635 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:01:34,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 08:01:34,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699192486] [2024-12-02 08:01:34,638 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:34,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 08:01:34,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:34,663 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 08:01:34,664 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:01:34,668 INFO L87 Difference]: Start difference. First operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:34,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:34,741 INFO L93 Difference]: Finished difference Result 1575 states and 2357 transitions. [2024-12-02 08:01:34,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 08:01:34,744 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 213 [2024-12-02 08:01:34,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:34,756 INFO L225 Difference]: With dead ends: 1575 [2024-12-02 08:01:34,756 INFO L226 Difference]: Without dead ends: 869 [2024-12-02 08:01:34,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:01:34,764 INFO L435 NwaCegarLoop]: 1297 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:34,764 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:34,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-02 08:01:34,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 869. [2024-12-02 08:01:34,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 869 states, 864 states have (on average 1.494212962962963) internal successors, (1291), 864 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:34,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 869 states to 869 states and 1297 transitions. [2024-12-02 08:01:34,830 INFO L78 Accepts]: Start accepts. Automaton has 869 states and 1297 transitions. Word has length 213 [2024-12-02 08:01:34,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:34,831 INFO L471 AbstractCegarLoop]: Abstraction has 869 states and 1297 transitions. [2024-12-02 08:01:34,831 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:34,831 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 1297 transitions. [2024-12-02 08:01:34,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 08:01:34,836 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:34,836 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:34,847 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:01:35,036 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-12-02 08:01:35,037 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:35,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:35,038 INFO L85 PathProgramCache]: Analyzing trace with hash 275406397, now seen corresponding path program 1 times [2024-12-02 08:01:35,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:35,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777420196] [2024-12-02 08:01:35,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:35,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:35,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:36,195 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:36,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:36,195 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1777420196] [2024-12-02 08:01:36,195 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1777420196] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:36,195 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:36,195 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:36,196 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577683120] [2024-12-02 08:01:36,196 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:36,196 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:36,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:36,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:36,197 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:36,198 INFO L87 Difference]: Start difference. First operand 869 states and 1297 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:36,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:36,240 INFO L93 Difference]: Finished difference Result 873 states and 1301 transitions. [2024-12-02 08:01:36,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:36,241 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 213 [2024-12-02 08:01:36,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:36,244 INFO L225 Difference]: With dead ends: 873 [2024-12-02 08:01:36,244 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 08:01:36,245 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:36,246 INFO L435 NwaCegarLoop]: 1295 mSDtfsCounter, 0 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3879 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:36,246 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3879 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:36,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 08:01:36,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 08:01:36,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.4930715935334873) internal successors, (1293), 866 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:36,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1299 transitions. [2024-12-02 08:01:36,261 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1299 transitions. Word has length 213 [2024-12-02 08:01:36,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:36,262 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1299 transitions. [2024-12-02 08:01:36,263 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:36,263 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1299 transitions. [2024-12-02 08:01:36,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-12-02 08:01:36,265 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:36,265 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:36,265 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 08:01:36,265 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:36,266 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:36,266 INFO L85 PathProgramCache]: Analyzing trace with hash -50639891, now seen corresponding path program 1 times [2024-12-02 08:01:36,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:36,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008604709] [2024-12-02 08:01:36,266 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:36,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:36,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:37,048 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:37,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:37,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008604709] [2024-12-02 08:01:37,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008604709] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:37,049 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:37,049 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:37,049 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316670942] [2024-12-02 08:01:37,049 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:37,050 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:37,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:37,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:37,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:37,051 INFO L87 Difference]: Start difference. First operand 871 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:37,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:37,702 INFO L93 Difference]: Finished difference Result 2171 states and 3241 transitions. [2024-12-02 08:01:37,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:01:37,702 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 214 [2024-12-02 08:01:37,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:37,705 INFO L225 Difference]: With dead ends: 2171 [2024-12-02 08:01:37,705 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 08:01:37,706 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:01:37,707 INFO L435 NwaCegarLoop]: 1325 mSDtfsCounter, 2674 mSDsluCounter, 2354 mSDsCounter, 0 mSdLazyCounter, 414 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2674 SdHoareTripleChecker+Valid, 3679 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:37,707 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2674 Valid, 3679 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 414 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:01:37,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 08:01:37,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 08:01:37,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.491916859122402) internal successors, (1292), 866 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:37,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1298 transitions. [2024-12-02 08:01:37,723 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1298 transitions. Word has length 214 [2024-12-02 08:01:37,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:37,723 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1298 transitions. [2024-12-02 08:01:37,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:37,724 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1298 transitions. [2024-12-02 08:01:37,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-02 08:01:37,726 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:37,726 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:37,726 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 08:01:37,726 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:37,727 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:37,727 INFO L85 PathProgramCache]: Analyzing trace with hash -125930801, now seen corresponding path program 1 times [2024-12-02 08:01:37,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:37,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607326583] [2024-12-02 08:01:37,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:37,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:37,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:38,355 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:38,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:38,356 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607326583] [2024-12-02 08:01:38,356 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607326583] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:38,356 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:38,356 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:38,356 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649248215] [2024-12-02 08:01:38,356 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:38,357 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:38,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:38,357 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:38,357 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:38,358 INFO L87 Difference]: Start difference. First operand 871 states and 1298 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:38,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:38,409 INFO L93 Difference]: Finished difference Result 1578 states and 2351 transitions. [2024-12-02 08:01:38,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:38,410 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 215 [2024-12-02 08:01:38,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:38,413 INFO L225 Difference]: With dead ends: 1578 [2024-12-02 08:01:38,413 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:38,414 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:38,415 INFO L435 NwaCegarLoop]: 1294 mSDtfsCounter, 0 mSDsluCounter, 2578 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3872 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:38,415 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3872 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:38,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:38,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:38,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4907834101382489) internal successors, (1294), 868 states have internal predecessors, (1294), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:38,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1300 transitions. [2024-12-02 08:01:38,436 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1300 transitions. Word has length 215 [2024-12-02 08:01:38,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:38,436 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1300 transitions. [2024-12-02 08:01:38,436 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:38,437 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1300 transitions. [2024-12-02 08:01:38,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-12-02 08:01:38,439 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:38,439 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:38,439 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 08:01:38,439 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:38,440 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:38,440 INFO L85 PathProgramCache]: Analyzing trace with hash -706852236, now seen corresponding path program 1 times [2024-12-02 08:01:38,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:38,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032620790] [2024-12-02 08:01:38,440 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:38,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:38,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:39,331 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:39,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:39,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032620790] [2024-12-02 08:01:39,331 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2032620790] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:39,332 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:39,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:39,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934708938] [2024-12-02 08:01:39,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:39,332 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:39,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:39,333 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:39,333 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:39,333 INFO L87 Difference]: Start difference. First operand 873 states and 1300 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:39,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:39,667 INFO L93 Difference]: Finished difference Result 1580 states and 2352 transitions. [2024-12-02 08:01:39,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:39,668 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 216 [2024-12-02 08:01:39,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:39,671 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:39,671 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:39,672 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:39,673 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1102 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1102 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:39,673 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1102 Valid, 2270 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:01:39,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:39,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:39,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.48963133640553) internal successors, (1293), 868 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:39,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1299 transitions. [2024-12-02 08:01:39,696 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1299 transitions. Word has length 216 [2024-12-02 08:01:39,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:39,696 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1299 transitions. [2024-12-02 08:01:39,696 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:39,696 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1299 transitions. [2024-12-02 08:01:39,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-12-02 08:01:39,699 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:39,699 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:39,699 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 08:01:39,699 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:39,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:39,700 INFO L85 PathProgramCache]: Analyzing trace with hash -1608961084, now seen corresponding path program 1 times [2024-12-02 08:01:39,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:39,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471230616] [2024-12-02 08:01:39,700 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:39,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:39,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:40,366 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:40,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:40,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471230616] [2024-12-02 08:01:40,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [471230616] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:40,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:40,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:40,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877738795] [2024-12-02 08:01:40,367 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:40,368 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:40,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:40,368 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:40,368 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:40,369 INFO L87 Difference]: Start difference. First operand 873 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:40,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:40,688 INFO L93 Difference]: Finished difference Result 1610 states and 2394 transitions. [2024-12-02 08:01:40,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:01:40,689 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 217 [2024-12-02 08:01:40,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:40,693 INFO L225 Difference]: With dead ends: 1610 [2024-12-02 08:01:40,693 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:40,694 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:01:40,695 INFO L435 NwaCegarLoop]: 1274 mSDtfsCounter, 1161 mSDsluCounter, 2412 mSDsCounter, 0 mSdLazyCounter, 202 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1161 SdHoareTripleChecker+Valid, 3686 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:40,695 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1161 Valid, 3686 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 202 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:40,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:40,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:40,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4884792626728112) internal successors, (1292), 868 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:40,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1298 transitions. [2024-12-02 08:01:40,724 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1298 transitions. Word has length 217 [2024-12-02 08:01:40,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:40,724 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1298 transitions. [2024-12-02 08:01:40,725 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:40,725 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1298 transitions. [2024-12-02 08:01:40,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-02 08:01:40,728 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:40,728 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:40,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 08:01:40,729 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:40,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:40,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1576324139, now seen corresponding path program 1 times [2024-12-02 08:01:40,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:40,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098620251] [2024-12-02 08:01:40,730 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:40,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:40,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:41,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:41,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:41,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098620251] [2024-12-02 08:01:41,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098620251] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:41,248 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:41,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:41,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585033880] [2024-12-02 08:01:41,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:41,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:41,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:41,250 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:41,250 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:41,250 INFO L87 Difference]: Start difference. First operand 873 states and 1298 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:41,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:41,574 INFO L93 Difference]: Finished difference Result 1580 states and 2348 transitions. [2024-12-02 08:01:41,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:41,575 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 218 [2024-12-02 08:01:41,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:41,579 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:41,579 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:41,580 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:41,580 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1282 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1285 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:41,581 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1285 Valid, 2277 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:01:41,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:41,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:41,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.487327188940092) internal successors, (1291), 868 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:41,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1297 transitions. [2024-12-02 08:01:41,603 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1297 transitions. Word has length 218 [2024-12-02 08:01:41,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:41,603 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1297 transitions. [2024-12-02 08:01:41,603 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:41,604 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1297 transitions. [2024-12-02 08:01:41,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-02 08:01:41,606 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:41,606 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:41,606 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 08:01:41,606 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:41,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:41,607 INFO L85 PathProgramCache]: Analyzing trace with hash 916859531, now seen corresponding path program 1 times [2024-12-02 08:01:41,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:41,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290498756] [2024-12-02 08:01:41,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:41,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:41,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:42,092 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:42,093 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:42,093 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290498756] [2024-12-02 08:01:42,093 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [290498756] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:42,093 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:42,093 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:42,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [764868583] [2024-12-02 08:01:42,093 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:42,094 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:42,094 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:42,094 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:42,094 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:42,094 INFO L87 Difference]: Start difference. First operand 873 states and 1297 transitions. Second operand has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:42,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:42,404 INFO L93 Difference]: Finished difference Result 1580 states and 2346 transitions. [2024-12-02 08:01:42,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:42,405 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 219 [2024-12-02 08:01:42,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:42,408 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:42,408 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:42,409 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:42,410 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2399 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2402 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:42,410 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2402 Valid, 2270 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:01:42,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:42,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:42,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4861751152073732) internal successors, (1290), 868 states have internal predecessors, (1290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:42,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1296 transitions. [2024-12-02 08:01:42,430 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1296 transitions. Word has length 219 [2024-12-02 08:01:42,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:42,431 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1296 transitions. [2024-12-02 08:01:42,431 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:42,431 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1296 transitions. [2024-12-02 08:01:42,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-12-02 08:01:42,433 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:42,433 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:42,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 08:01:42,434 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:42,434 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:42,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1286197202, now seen corresponding path program 1 times [2024-12-02 08:01:42,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:42,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080210286] [2024-12-02 08:01:42,434 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:42,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:42,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:42,881 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:42,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:42,882 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080210286] [2024-12-02 08:01:42,882 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1080210286] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:42,882 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:42,882 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:42,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186862833] [2024-12-02 08:01:42,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:42,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:42,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:42,883 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:42,883 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:42,883 INFO L87 Difference]: Start difference. First operand 873 states and 1296 transitions. Second operand has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:43,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:43,195 INFO L93 Difference]: Finished difference Result 1580 states and 2344 transitions. [2024-12-02 08:01:43,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:43,196 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 220 [2024-12-02 08:01:43,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:43,199 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:43,199 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:43,200 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:43,200 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2391 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 316 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2394 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 316 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:43,200 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2394 Valid, 2270 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 316 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:01:43,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:43,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:43,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4850230414746544) internal successors, (1289), 868 states have internal predecessors, (1289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:43,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1295 transitions. [2024-12-02 08:01:43,220 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1295 transitions. Word has length 220 [2024-12-02 08:01:43,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:43,220 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1295 transitions. [2024-12-02 08:01:43,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:43,220 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1295 transitions. [2024-12-02 08:01:43,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-02 08:01:43,223 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:43,223 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:43,223 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 08:01:43,223 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:43,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:43,224 INFO L85 PathProgramCache]: Analyzing trace with hash 1208731858, now seen corresponding path program 1 times [2024-12-02 08:01:43,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:43,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356226244] [2024-12-02 08:01:43,224 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:43,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:43,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:43,661 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:43,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:43,662 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356226244] [2024-12-02 08:01:43,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356226244] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:43,662 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:43,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:43,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328761823] [2024-12-02 08:01:43,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:43,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:43,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:43,663 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:43,663 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:43,663 INFO L87 Difference]: Start difference. First operand 873 states and 1295 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:43,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:43,946 INFO L93 Difference]: Finished difference Result 1580 states and 2342 transitions. [2024-12-02 08:01:43,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:43,946 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 221 [2024-12-02 08:01:43,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:43,949 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:43,950 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:43,951 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:43,951 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2383 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2386 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:43,951 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2386 Valid, 2270 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:43,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:43,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:43,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4838709677419355) internal successors, (1288), 868 states have internal predecessors, (1288), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:43,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1294 transitions. [2024-12-02 08:01:43,969 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1294 transitions. Word has length 221 [2024-12-02 08:01:43,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:43,970 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1294 transitions. [2024-12-02 08:01:43,970 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:43,970 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1294 transitions. [2024-12-02 08:01:43,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-02 08:01:43,971 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:43,971 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:43,972 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 08:01:43,972 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:43,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:43,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1083577081, now seen corresponding path program 1 times [2024-12-02 08:01:43,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:43,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787493403] [2024-12-02 08:01:43,972 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:43,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:44,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:44,450 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:44,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:44,450 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787493403] [2024-12-02 08:01:44,450 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1787493403] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:44,450 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:44,450 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:44,450 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144210824] [2024-12-02 08:01:44,450 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:44,451 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:44,451 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:44,451 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:44,451 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:44,452 INFO L87 Difference]: Start difference. First operand 873 states and 1294 transitions. Second operand has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:44,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:44,742 INFO L93 Difference]: Finished difference Result 1580 states and 2340 transitions. [2024-12-02 08:01:44,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:44,743 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 222 [2024-12-02 08:01:44,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:44,746 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:44,746 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:44,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:44,747 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2375 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2378 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:44,748 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2378 Valid, 2270 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:01:44,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:44,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:44,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4827188940092166) internal successors, (1287), 868 states have internal predecessors, (1287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:44,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1293 transitions. [2024-12-02 08:01:44,765 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1293 transitions. Word has length 222 [2024-12-02 08:01:44,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:44,765 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1293 transitions. [2024-12-02 08:01:44,765 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:44,766 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1293 transitions. [2024-12-02 08:01:44,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-12-02 08:01:44,767 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:44,767 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:44,767 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 08:01:44,767 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:44,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:44,768 INFO L85 PathProgramCache]: Analyzing trace with hash 1081003673, now seen corresponding path program 1 times [2024-12-02 08:01:44,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:44,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873030433] [2024-12-02 08:01:44,768 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:44,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:44,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:45,210 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:45,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:45,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873030433] [2024-12-02 08:01:45,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1873030433] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:45,211 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:45,211 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:45,211 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255790633] [2024-12-02 08:01:45,211 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:45,211 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:45,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:45,212 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:45,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:45,212 INFO L87 Difference]: Start difference. First operand 873 states and 1293 transitions. Second operand has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:45,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:45,485 INFO L93 Difference]: Finished difference Result 1580 states and 2338 transitions. [2024-12-02 08:01:45,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:45,486 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 223 [2024-12-02 08:01:45,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:45,490 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:45,490 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:45,491 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:45,491 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2367 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2370 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:45,491 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2370 Valid, 2270 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:45,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:45,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:45,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4815668202764978) internal successors, (1286), 868 states have internal predecessors, (1286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:45,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1292 transitions. [2024-12-02 08:01:45,502 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1292 transitions. Word has length 223 [2024-12-02 08:01:45,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:45,502 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1292 transitions. [2024-12-02 08:01:45,502 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:45,502 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1292 transitions. [2024-12-02 08:01:45,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-02 08:01:45,503 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:45,503 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:45,503 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 08:01:45,503 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:45,504 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:45,504 INFO L85 PathProgramCache]: Analyzing trace with hash -62892640, now seen corresponding path program 1 times [2024-12-02 08:01:45,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:45,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802051576] [2024-12-02 08:01:45,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:45,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:45,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:45,893 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:45,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:45,894 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802051576] [2024-12-02 08:01:45,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802051576] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:45,894 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:45,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:45,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477384463] [2024-12-02 08:01:45,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:45,894 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:45,894 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:45,895 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:45,895 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:45,895 INFO L87 Difference]: Start difference. First operand 873 states and 1292 transitions. Second operand has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:46,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:46,151 INFO L93 Difference]: Finished difference Result 1580 states and 2336 transitions. [2024-12-02 08:01:46,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:46,151 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 224 [2024-12-02 08:01:46,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:46,153 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:46,153 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:46,154 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:46,155 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1258 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1261 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:46,155 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1261 Valid, 2277 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:46,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:46,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:46,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4804147465437787) internal successors, (1285), 868 states have internal predecessors, (1285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:46,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1291 transitions. [2024-12-02 08:01:46,177 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1291 transitions. Word has length 224 [2024-12-02 08:01:46,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:46,178 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1291 transitions. [2024-12-02 08:01:46,178 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:46,178 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1291 transitions. [2024-12-02 08:01:46,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-12-02 08:01:46,180 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:46,181 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:46,181 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 08:01:46,181 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:46,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:46,181 INFO L85 PathProgramCache]: Analyzing trace with hash -954991648, now seen corresponding path program 1 times [2024-12-02 08:01:46,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:46,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653247461] [2024-12-02 08:01:46,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:46,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:46,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:46,620 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:46,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:46,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653247461] [2024-12-02 08:01:46,620 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [653247461] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:46,620 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:46,620 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:46,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934190696] [2024-12-02 08:01:46,620 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:46,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:46,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:46,621 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:46,621 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:46,621 INFO L87 Difference]: Start difference. First operand 873 states and 1291 transitions. Second operand has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:46,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:46,871 INFO L93 Difference]: Finished difference Result 1580 states and 2334 transitions. [2024-12-02 08:01:46,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:46,872 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 225 [2024-12-02 08:01:46,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:46,875 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:46,875 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:46,876 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:46,876 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2351 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2354 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:46,877 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2354 Valid, 2270 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:46,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:46,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:46,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4792626728110598) internal successors, (1284), 868 states have internal predecessors, (1284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:46,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1290 transitions. [2024-12-02 08:01:46,893 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1290 transitions. Word has length 225 [2024-12-02 08:01:46,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:46,894 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1290 transitions. [2024-12-02 08:01:46,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:46,894 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1290 transitions. [2024-12-02 08:01:46,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-02 08:01:46,895 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:46,896 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:46,896 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 08:01:46,896 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:46,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:46,896 INFO L85 PathProgramCache]: Analyzing trace with hash -2133895225, now seen corresponding path program 1 times [2024-12-02 08:01:46,896 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:46,896 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926285834] [2024-12-02 08:01:46,896 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:46,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:47,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:47,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:47,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:47,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926285834] [2024-12-02 08:01:47,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [926285834] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:47,265 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:47,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:47,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619430238] [2024-12-02 08:01:47,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:47,265 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:47,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:47,266 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:47,266 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:47,266 INFO L87 Difference]: Start difference. First operand 873 states and 1290 transitions. Second operand has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:47,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:47,474 INFO L93 Difference]: Finished difference Result 1580 states and 2332 transitions. [2024-12-02 08:01:47,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:47,475 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 226 [2024-12-02 08:01:47,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:47,476 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:47,476 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:47,477 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:47,477 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1250 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1253 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:47,477 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1253 Valid, 2277 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:47,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:47,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:47,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.478110599078341) internal successors, (1283), 868 states have internal predecessors, (1283), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:47,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1289 transitions. [2024-12-02 08:01:47,491 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1289 transitions. Word has length 226 [2024-12-02 08:01:47,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:47,491 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1289 transitions. [2024-12-02 08:01:47,491 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:47,491 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1289 transitions. [2024-12-02 08:01:47,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-02 08:01:47,493 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:47,493 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:47,493 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 08:01:47,493 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:47,493 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:47,494 INFO L85 PathProgramCache]: Analyzing trace with hash -1637871449, now seen corresponding path program 1 times [2024-12-02 08:01:47,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:47,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418180069] [2024-12-02 08:01:47,494 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:47,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:47,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:47,834 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:47,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:47,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418180069] [2024-12-02 08:01:47,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1418180069] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:47,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:47,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:47,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405844538] [2024-12-02 08:01:47,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:47,835 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:47,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:47,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:47,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:47,835 INFO L87 Difference]: Start difference. First operand 873 states and 1289 transitions. Second operand has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:48,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:48,048 INFO L93 Difference]: Finished difference Result 1580 states and 2330 transitions. [2024-12-02 08:01:48,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:48,048 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 227 [2024-12-02 08:01:48,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:48,050 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:48,050 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:48,051 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:48,051 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2335 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2338 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:48,051 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2338 Valid, 2270 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:48,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:48,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:48,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.476958525345622) internal successors, (1282), 868 states have internal predecessors, (1282), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:48,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1288 transitions. [2024-12-02 08:01:48,060 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1288 transitions. Word has length 227 [2024-12-02 08:01:48,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:48,061 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1288 transitions. [2024-12-02 08:01:48,061 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:48,061 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1288 transitions. [2024-12-02 08:01:48,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-02 08:01:48,062 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:48,062 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:48,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 08:01:48,062 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:48,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:48,062 INFO L85 PathProgramCache]: Analyzing trace with hash 235526510, now seen corresponding path program 1 times [2024-12-02 08:01:48,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:48,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830935565] [2024-12-02 08:01:48,063 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:48,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:48,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:48,373 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:48,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:48,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830935565] [2024-12-02 08:01:48,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830935565] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:48,373 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:48,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:48,373 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [101167315] [2024-12-02 08:01:48,373 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:48,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:48,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:48,374 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:48,374 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:48,375 INFO L87 Difference]: Start difference. First operand 873 states and 1288 transitions. Second operand has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:48,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:48,571 INFO L93 Difference]: Finished difference Result 1580 states and 2328 transitions. [2024-12-02 08:01:48,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:48,571 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 228 [2024-12-02 08:01:48,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:48,573 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:48,573 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:48,574 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:48,574 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1242 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1245 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:48,574 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1245 Valid, 2277 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:48,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:48,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:48,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4758064516129032) internal successors, (1281), 868 states have internal predecessors, (1281), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:48,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1287 transitions. [2024-12-02 08:01:48,583 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1287 transitions. Word has length 228 [2024-12-02 08:01:48,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:48,583 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1287 transitions. [2024-12-02 08:01:48,584 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:48,584 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1287 transitions. [2024-12-02 08:01:48,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-02 08:01:48,585 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:48,585 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:48,585 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 08:01:48,585 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:48,586 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:48,586 INFO L85 PathProgramCache]: Analyzing trace with hash -2083009298, now seen corresponding path program 1 times [2024-12-02 08:01:48,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:48,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582621635] [2024-12-02 08:01:48,586 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:48,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:48,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:48,877 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:48,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:48,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582621635] [2024-12-02 08:01:48,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1582621635] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:48,877 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:48,877 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:48,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940341655] [2024-12-02 08:01:48,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:48,878 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:48,878 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:48,878 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:48,878 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:48,878 INFO L87 Difference]: Start difference. First operand 873 states and 1287 transitions. Second operand has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:49,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:49,086 INFO L93 Difference]: Finished difference Result 1580 states and 2326 transitions. [2024-12-02 08:01:49,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:49,086 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 229 [2024-12-02 08:01:49,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:49,088 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:49,088 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:49,089 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:49,089 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2319 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2322 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:49,089 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2322 Valid, 2270 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:49,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:49,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:49,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4746543778801844) internal successors, (1280), 868 states have internal predecessors, (1280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:49,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1286 transitions. [2024-12-02 08:01:49,100 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1286 transitions. Word has length 229 [2024-12-02 08:01:49,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:49,100 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1286 transitions. [2024-12-02 08:01:49,100 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:49,100 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1286 transitions. [2024-12-02 08:01:49,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-12-02 08:01:49,102 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:49,102 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:49,102 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 08:01:49,102 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:49,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:49,102 INFO L85 PathProgramCache]: Analyzing trace with hash 576101013, now seen corresponding path program 1 times [2024-12-02 08:01:49,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:49,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281746764] [2024-12-02 08:01:49,103 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:49,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:49,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:49,486 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:49,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:49,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281746764] [2024-12-02 08:01:49,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281746764] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:49,487 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:49,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:49,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416876928] [2024-12-02 08:01:49,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:49,487 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:49,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:49,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:49,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:49,488 INFO L87 Difference]: Start difference. First operand 873 states and 1286 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:49,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:49,699 INFO L93 Difference]: Finished difference Result 1580 states and 2324 transitions. [2024-12-02 08:01:49,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:49,699 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 230 [2024-12-02 08:01:49,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:49,701 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:49,701 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:49,702 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:49,702 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2311 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2314 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:49,702 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2314 Valid, 2270 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:49,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:49,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:49,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4735023041474655) internal successors, (1279), 868 states have internal predecessors, (1279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:49,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1285 transitions. [2024-12-02 08:01:49,710 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1285 transitions. Word has length 230 [2024-12-02 08:01:49,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:49,711 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1285 transitions. [2024-12-02 08:01:49,711 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:49,711 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1285 transitions. [2024-12-02 08:01:49,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-02 08:01:49,712 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:49,712 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:49,712 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 08:01:49,712 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:49,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:49,713 INFO L85 PathProgramCache]: Analyzing trace with hash 270528693, now seen corresponding path program 1 times [2024-12-02 08:01:49,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:49,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429351194] [2024-12-02 08:01:49,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:49,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:49,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:50,001 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:50,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:50,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429351194] [2024-12-02 08:01:50,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1429351194] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:50,001 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:50,001 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:50,001 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293764396] [2024-12-02 08:01:50,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:50,002 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:50,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:50,002 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:50,002 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:50,002 INFO L87 Difference]: Start difference. First operand 873 states and 1285 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:50,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:50,213 INFO L93 Difference]: Finished difference Result 1580 states and 2322 transitions. [2024-12-02 08:01:50,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:50,214 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 231 [2024-12-02 08:01:50,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:50,215 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:50,215 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:50,216 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:50,216 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1230 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1233 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:50,216 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1233 Valid, 2277 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:01:50,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:50,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:50,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4723502304147464) internal successors, (1278), 868 states have internal predecessors, (1278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:50,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1284 transitions. [2024-12-02 08:01:50,228 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1284 transitions. Word has length 231 [2024-12-02 08:01:50,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:50,228 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1284 transitions. [2024-12-02 08:01:50,229 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:50,229 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1284 transitions. [2024-12-02 08:01:50,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-02 08:01:50,230 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:50,230 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:50,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 08:01:50,230 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:50,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:50,231 INFO L85 PathProgramCache]: Analyzing trace with hash 2059164476, now seen corresponding path program 1 times [2024-12-02 08:01:50,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:50,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814909576] [2024-12-02 08:01:50,231 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:50,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:50,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:50,745 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:50,745 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:50,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814909576] [2024-12-02 08:01:50,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1814909576] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:50,745 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:50,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:50,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306093104] [2024-12-02 08:01:50,746 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:50,746 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:50,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:50,747 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:50,747 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:50,747 INFO L87 Difference]: Start difference. First operand 873 states and 1284 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:50,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:50,917 INFO L93 Difference]: Finished difference Result 1580 states and 2320 transitions. [2024-12-02 08:01:50,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:50,918 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 232 [2024-12-02 08:01:50,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:50,920 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:50,920 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:50,921 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:50,921 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1126 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:50,922 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2398 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:50,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:50,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:50,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4711981566820276) internal successors, (1277), 868 states have internal predecessors, (1277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:50,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1283 transitions. [2024-12-02 08:01:50,937 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1283 transitions. Word has length 232 [2024-12-02 08:01:50,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:50,937 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1283 transitions. [2024-12-02 08:01:50,938 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:50,938 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1283 transitions. [2024-12-02 08:01:50,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-12-02 08:01:50,940 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:50,940 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:50,940 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 08:01:50,940 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:50,940 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:50,941 INFO L85 PathProgramCache]: Analyzing trace with hash 150776216, now seen corresponding path program 1 times [2024-12-02 08:01:50,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:50,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941931288] [2024-12-02 08:01:50,941 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:50,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:51,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:51,266 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:51,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:51,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941931288] [2024-12-02 08:01:51,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941931288] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:51,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:51,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:51,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856312663] [2024-12-02 08:01:51,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:51,267 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:51,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:51,267 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:51,268 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:51,268 INFO L87 Difference]: Start difference. First operand 873 states and 1283 transitions. Second operand has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:51,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:51,395 INFO L93 Difference]: Finished difference Result 1586 states and 2326 transitions. [2024-12-02 08:01:51,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:01:51,395 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 233 [2024-12-02 08:01:51,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:51,398 INFO L225 Difference]: With dead ends: 1586 [2024-12-02 08:01:51,398 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:51,399 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:01:51,400 INFO L435 NwaCegarLoop]: 1270 mSDtfsCounter, 1137 mSDsluCounter, 2472 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 3742 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:51,400 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 3742 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:51,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:51,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:51,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4700460829493087) internal successors, (1276), 868 states have internal predecessors, (1276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:51,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1282 transitions. [2024-12-02 08:01:51,413 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1282 transitions. Word has length 233 [2024-12-02 08:01:51,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:51,413 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1282 transitions. [2024-12-02 08:01:51,414 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:51,414 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1282 transitions. [2024-12-02 08:01:51,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-02 08:01:51,415 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:51,415 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:51,415 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 08:01:51,415 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:51,415 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:51,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1802296377, now seen corresponding path program 1 times [2024-12-02 08:01:51,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:51,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105920518] [2024-12-02 08:01:51,416 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:51,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:51,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:51,723 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:51,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:51,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105920518] [2024-12-02 08:01:51,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105920518] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:51,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:51,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:51,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99248181] [2024-12-02 08:01:51,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:51,724 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:51,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:51,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:51,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:51,725 INFO L87 Difference]: Start difference. First operand 873 states and 1282 transitions. Second operand has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:51,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:51,868 INFO L93 Difference]: Finished difference Result 1580 states and 2316 transitions. [2024-12-02 08:01:51,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:51,869 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 234 [2024-12-02 08:01:51,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:51,870 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:51,870 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:51,871 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:51,871 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1266 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1269 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:51,871 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1269 Valid, 2405 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:51,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:51,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:51,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4688940092165899) internal successors, (1275), 868 states have internal predecessors, (1275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:51,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1281 transitions. [2024-12-02 08:01:51,882 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1281 transitions. Word has length 234 [2024-12-02 08:01:51,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:51,882 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1281 transitions. [2024-12-02 08:01:51,882 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:51,882 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1281 transitions. [2024-12-02 08:01:51,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-12-02 08:01:51,883 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:51,883 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:51,884 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 08:01:51,884 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:51,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:51,884 INFO L85 PathProgramCache]: Analyzing trace with hash -1699971745, now seen corresponding path program 1 times [2024-12-02 08:01:51,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:51,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607714170] [2024-12-02 08:01:51,884 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:51,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:52,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:52,219 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:52,219 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:52,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607714170] [2024-12-02 08:01:52,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [607714170] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:52,219 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:52,219 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:52,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496796805] [2024-12-02 08:01:52,219 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:52,220 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:52,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:52,220 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:52,220 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:52,220 INFO L87 Difference]: Start difference. First operand 873 states and 1281 transitions. Second operand has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:52,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:52,329 INFO L93 Difference]: Finished difference Result 1580 states and 2314 transitions. [2024-12-02 08:01:52,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:52,330 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 235 [2024-12-02 08:01:52,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:52,331 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:52,331 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:52,332 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:52,332 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1262 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1265 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:52,332 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1265 Valid, 2405 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:52,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:52,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:52,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.467741935483871) internal successors, (1274), 868 states have internal predecessors, (1274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:52,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1280 transitions. [2024-12-02 08:01:52,340 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1280 transitions. Word has length 235 [2024-12-02 08:01:52,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:52,341 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1280 transitions. [2024-12-02 08:01:52,341 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:52,341 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1280 transitions. [2024-12-02 08:01:52,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2024-12-02 08:01:52,342 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:52,342 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:52,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 08:01:52,342 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:52,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:52,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1030173294, now seen corresponding path program 1 times [2024-12-02 08:01:52,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:52,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651813480] [2024-12-02 08:01:52,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:52,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:52,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:52,716 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:52,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:52,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651813480] [2024-12-02 08:01:52,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651813480] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:52,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:52,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:52,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963681382] [2024-12-02 08:01:52,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:52,716 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:52,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:52,716 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:52,717 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:52,717 INFO L87 Difference]: Start difference. First operand 873 states and 1280 transitions. Second operand has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:52,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:52,835 INFO L93 Difference]: Finished difference Result 1580 states and 2312 transitions. [2024-12-02 08:01:52,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:52,835 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 236 [2024-12-02 08:01:52,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:52,837 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:52,837 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:52,837 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:52,838 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2369 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2372 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:52,838 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2372 Valid, 2398 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:52,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:52,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:52,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4665898617511521) internal successors, (1273), 868 states have internal predecessors, (1273), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:52,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1279 transitions. [2024-12-02 08:01:52,846 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1279 transitions. Word has length 236 [2024-12-02 08:01:52,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:52,846 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1279 transitions. [2024-12-02 08:01:52,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:52,846 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1279 transitions. [2024-12-02 08:01:52,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-02 08:01:52,847 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:52,848 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:52,848 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 08:01:52,848 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:52,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:52,848 INFO L85 PathProgramCache]: Analyzing trace with hash -1233850209, now seen corresponding path program 1 times [2024-12-02 08:01:52,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:52,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460393998] [2024-12-02 08:01:52,848 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:52,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:52,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:53,169 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:53,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:53,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460393998] [2024-12-02 08:01:53,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460393998] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:53,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:53,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:53,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723323110] [2024-12-02 08:01:53,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:53,170 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:53,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:53,171 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:53,171 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:53,171 INFO L87 Difference]: Start difference. First operand 873 states and 1279 transitions. Second operand has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:53,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:53,342 INFO L93 Difference]: Finished difference Result 1580 states and 2310 transitions. [2024-12-02 08:01:53,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:53,343 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 237 [2024-12-02 08:01:53,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:53,346 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:53,346 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:53,346 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:53,347 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2361 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:53,347 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 2398 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:53,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:53,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:53,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4654377880184333) internal successors, (1272), 868 states have internal predecessors, (1272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:53,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1278 transitions. [2024-12-02 08:01:53,356 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1278 transitions. Word has length 237 [2024-12-02 08:01:53,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:53,357 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1278 transitions. [2024-12-02 08:01:53,357 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:53,357 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1278 transitions. [2024-12-02 08:01:53,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-02 08:01:53,358 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:53,358 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:53,358 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 08:01:53,358 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:53,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:53,358 INFO L85 PathProgramCache]: Analyzing trace with hash -396961081, now seen corresponding path program 1 times [2024-12-02 08:01:53,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:53,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689105278] [2024-12-02 08:01:53,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:53,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:53,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:53,685 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:53,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:53,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689105278] [2024-12-02 08:01:53,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689105278] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:53,685 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:53,686 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:53,686 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725036195] [2024-12-02 08:01:53,686 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:53,686 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:53,686 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:53,686 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:53,687 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:53,687 INFO L87 Difference]: Start difference. First operand 873 states and 1278 transitions. Second operand has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:53,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:53,832 INFO L93 Difference]: Finished difference Result 1580 states and 2308 transitions. [2024-12-02 08:01:53,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:53,832 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 238 [2024-12-02 08:01:53,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:53,835 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:53,835 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:53,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:53,837 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2353 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2356 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:53,837 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2356 Valid, 2398 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:53,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:53,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:53,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4642857142857142) internal successors, (1271), 868 states have internal predecessors, (1271), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:53,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1277 transitions. [2024-12-02 08:01:53,845 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1277 transitions. Word has length 238 [2024-12-02 08:01:53,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:53,846 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1277 transitions. [2024-12-02 08:01:53,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:53,846 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1277 transitions. [2024-12-02 08:01:53,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-02 08:01:53,846 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:53,847 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:53,847 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 08:01:53,847 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:53,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:53,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1254052376, now seen corresponding path program 1 times [2024-12-02 08:01:53,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:53,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803836134] [2024-12-02 08:01:53,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:53,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:53,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:54,228 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:54,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:54,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803836134] [2024-12-02 08:01:54,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803836134] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:54,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:54,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:54,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [991654608] [2024-12-02 08:01:54,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:54,229 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:54,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:54,229 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:54,229 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:54,229 INFO L87 Difference]: Start difference. First operand 873 states and 1277 transitions. Second operand has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:54,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:54,360 INFO L93 Difference]: Finished difference Result 1580 states and 2306 transitions. [2024-12-02 08:01:54,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:54,361 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 239 [2024-12-02 08:01:54,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:54,362 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:54,362 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:54,363 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:54,363 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1243 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:54,364 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2405 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:54,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:54,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:54,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4631336405529953) internal successors, (1270), 868 states have internal predecessors, (1270), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:54,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1276 transitions. [2024-12-02 08:01:54,373 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1276 transitions. Word has length 239 [2024-12-02 08:01:54,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:54,373 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1276 transitions. [2024-12-02 08:01:54,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:54,373 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1276 transitions. [2024-12-02 08:01:54,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-02 08:01:54,374 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:54,374 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:54,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 08:01:54,374 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:54,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:54,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1194218592, now seen corresponding path program 1 times [2024-12-02 08:01:54,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:54,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017178538] [2024-12-02 08:01:54,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:54,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:54,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:54,745 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:54,745 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:54,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017178538] [2024-12-02 08:01:54,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1017178538] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:54,745 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:54,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:54,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980343622] [2024-12-02 08:01:54,745 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:54,745 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:54,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:54,746 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:54,746 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:54,746 INFO L87 Difference]: Start difference. First operand 873 states and 1276 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:54,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:54,796 INFO L93 Difference]: Finished difference Result 1580 states and 2304 transitions. [2024-12-02 08:01:54,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:54,796 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 240 [2024-12-02 08:01:54,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:54,799 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:54,799 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:54,800 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:54,800 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1135 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:54,800 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2502 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:54,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:54,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:54,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4608294930875576) internal successors, (1268), 868 states have internal predecessors, (1268), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:54,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1274 transitions. [2024-12-02 08:01:54,812 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1274 transitions. Word has length 240 [2024-12-02 08:01:54,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:54,812 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1274 transitions. [2024-12-02 08:01:54,812 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:54,812 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1274 transitions. [2024-12-02 08:01:54,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-02 08:01:54,813 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:54,813 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:54,813 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 08:01:54,813 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:54,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:54,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1191452317, now seen corresponding path program 1 times [2024-12-02 08:01:54,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:54,813 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255675657] [2024-12-02 08:01:54,813 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:54,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:54,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:55,268 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:55,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:55,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [255675657] [2024-12-02 08:01:55,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [255675657] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:55,268 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:55,268 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:55,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289761962] [2024-12-02 08:01:55,268 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:55,269 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:55,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:55,269 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:55,269 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:55,270 INFO L87 Difference]: Start difference. First operand 873 states and 1274 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:55,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:55,341 INFO L93 Difference]: Finished difference Result 1580 states and 2300 transitions. [2024-12-02 08:01:55,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:55,342 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 242 [2024-12-02 08:01:55,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:55,345 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:55,345 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:55,346 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:55,346 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1257 mSDsluCounter, 1259 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1260 SdHoareTripleChecker+Valid, 2509 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:55,346 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1260 Valid, 2509 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:55,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:55,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:55,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4596774193548387) internal successors, (1267), 868 states have internal predecessors, (1267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:55,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1273 transitions. [2024-12-02 08:01:55,363 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1273 transitions. Word has length 242 [2024-12-02 08:01:55,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:55,363 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1273 transitions. [2024-12-02 08:01:55,364 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:55,364 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1273 transitions. [2024-12-02 08:01:55,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-02 08:01:55,365 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:55,365 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:55,365 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 08:01:55,365 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:55,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:55,366 INFO L85 PathProgramCache]: Analyzing trace with hash 864928727, now seen corresponding path program 1 times [2024-12-02 08:01:55,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:55,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185100031] [2024-12-02 08:01:55,366 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:55,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:55,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:55,909 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:55,909 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:55,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185100031] [2024-12-02 08:01:55,909 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185100031] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:55,909 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:55,909 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:55,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603021885] [2024-12-02 08:01:55,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:55,910 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:55,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:55,910 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:55,910 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:55,910 INFO L87 Difference]: Start difference. First operand 873 states and 1273 transitions. Second operand has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:55,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:55,993 INFO L93 Difference]: Finished difference Result 1580 states and 2298 transitions. [2024-12-02 08:01:55,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:55,993 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 243 [2024-12-02 08:01:55,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:55,995 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:55,995 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:55,996 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:55,996 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1124 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1124 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:55,997 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1124 Valid, 2456 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:55,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:56,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:56,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4585253456221199) internal successors, (1266), 868 states have internal predecessors, (1266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:56,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1272 transitions. [2024-12-02 08:01:56,005 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1272 transitions. Word has length 243 [2024-12-02 08:01:56,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:56,005 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1272 transitions. [2024-12-02 08:01:56,005 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:56,005 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1272 transitions. [2024-12-02 08:01:56,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-02 08:01:56,006 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:56,007 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:56,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 08:01:56,007 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:56,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:56,007 INFO L85 PathProgramCache]: Analyzing trace with hash 897182223, now seen corresponding path program 1 times [2024-12-02 08:01:56,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:56,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850511657] [2024-12-02 08:01:56,007 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:56,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:56,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:56,299 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:56,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:56,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850511657] [2024-12-02 08:01:56,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [850511657] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:56,300 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:56,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:56,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966315883] [2024-12-02 08:01:56,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:56,300 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:56,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:56,301 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:56,301 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:56,301 INFO L87 Difference]: Start difference. First operand 873 states and 1272 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:56,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:56,387 INFO L93 Difference]: Finished difference Result 1582 states and 2298 transitions. [2024-12-02 08:01:56,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:01:56,387 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 244 [2024-12-02 08:01:56,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:56,389 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 08:01:56,389 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:56,390 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:01:56,390 INFO L435 NwaCegarLoop]: 1261 mSDtfsCounter, 1127 mSDsluCounter, 2492 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1127 SdHoareTripleChecker+Valid, 3753 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:56,390 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1127 Valid, 3753 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:56,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:56,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:56,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.457373271889401) internal successors, (1265), 868 states have internal predecessors, (1265), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:56,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1271 transitions. [2024-12-02 08:01:56,403 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1271 transitions. Word has length 244 [2024-12-02 08:01:56,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:56,404 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1271 transitions. [2024-12-02 08:01:56,404 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:56,404 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1271 transitions. [2024-12-02 08:01:56,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-02 08:01:56,405 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:56,405 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:56,405 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 08:01:56,405 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:56,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:56,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1180390672, now seen corresponding path program 1 times [2024-12-02 08:01:56,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:56,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520194358] [2024-12-02 08:01:56,406 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:56,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:56,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:56,725 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:56,725 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:56,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520194358] [2024-12-02 08:01:56,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1520194358] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:56,726 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:56,726 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:56,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699954216] [2024-12-02 08:01:56,726 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:56,726 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:56,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:56,727 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:56,727 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:56,727 INFO L87 Difference]: Start difference. First operand 873 states and 1271 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:56,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:56,800 INFO L93 Difference]: Finished difference Result 1580 states and 2294 transitions. [2024-12-02 08:01:56,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:56,800 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 245 [2024-12-02 08:01:56,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:56,802 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:56,802 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:56,802 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:56,803 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1252 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1255 SdHoareTripleChecker+Valid, 2463 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:56,803 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1255 Valid, 2463 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:56,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:56,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:56,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.456221198156682) internal successors, (1264), 868 states have internal predecessors, (1264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:56,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1270 transitions. [2024-12-02 08:01:56,811 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1270 transitions. Word has length 245 [2024-12-02 08:01:56,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:56,811 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1270 transitions. [2024-12-02 08:01:56,812 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:56,812 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1270 transitions. [2024-12-02 08:01:56,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-02 08:01:56,812 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:56,812 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:56,812 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 08:01:56,812 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:56,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:56,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1988978575, now seen corresponding path program 1 times [2024-12-02 08:01:56,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:56,813 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076729816] [2024-12-02 08:01:56,813 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:56,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:56,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:57,100 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:57,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:57,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076729816] [2024-12-02 08:01:57,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076729816] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:57,100 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:57,100 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:57,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279749208] [2024-12-02 08:01:57,100 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:57,101 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:57,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:57,101 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:57,101 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:57,101 INFO L87 Difference]: Start difference. First operand 873 states and 1270 transitions. Second operand has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:57,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:57,190 INFO L93 Difference]: Finished difference Result 1580 states and 2292 transitions. [2024-12-02 08:01:57,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:57,191 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 246 [2024-12-02 08:01:57,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:57,192 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:57,192 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:57,192 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:57,193 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2360 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2363 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:57,193 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2363 Valid, 2456 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:57,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:57,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:57,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.455069124423963) internal successors, (1263), 868 states have internal predecessors, (1263), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:57,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1269 transitions. [2024-12-02 08:01:57,202 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1269 transitions. Word has length 246 [2024-12-02 08:01:57,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:57,202 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1269 transitions. [2024-12-02 08:01:57,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:57,202 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1269 transitions. [2024-12-02 08:01:57,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-02 08:01:57,203 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:57,203 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:57,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 08:01:57,203 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:57,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:57,203 INFO L85 PathProgramCache]: Analyzing trace with hash -180499831, now seen corresponding path program 1 times [2024-12-02 08:01:57,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:57,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207962518] [2024-12-02 08:01:57,204 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:57,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:57,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:57,735 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:57,735 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:57,735 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207962518] [2024-12-02 08:01:57,735 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207962518] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:57,735 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:57,735 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:57,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [754669531] [2024-12-02 08:01:57,735 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:57,736 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:57,736 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:57,736 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:57,736 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:57,736 INFO L87 Difference]: Start difference. First operand 873 states and 1269 transitions. Second operand has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:57,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:57,784 INFO L93 Difference]: Finished difference Result 1580 states and 2290 transitions. [2024-12-02 08:01:57,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:57,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 247 [2024-12-02 08:01:57,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:57,785 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:57,785 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:57,786 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:57,786 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1166 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1168 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:57,786 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1168 Valid, 2500 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:57,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:57,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:57,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4539170506912442) internal successors, (1262), 868 states have internal predecessors, (1262), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:57,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1268 transitions. [2024-12-02 08:01:57,795 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1268 transitions. Word has length 247 [2024-12-02 08:01:57,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:57,796 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1268 transitions. [2024-12-02 08:01:57,796 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:57,796 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1268 transitions. [2024-12-02 08:01:57,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-02 08:01:57,796 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:57,796 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:57,796 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 08:01:57,797 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:57,797 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:57,797 INFO L85 PathProgramCache]: Analyzing trace with hash 51167845, now seen corresponding path program 1 times [2024-12-02 08:01:57,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:57,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810893324] [2024-12-02 08:01:57,797 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:57,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:57,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:58,259 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:58,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:58,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810893324] [2024-12-02 08:01:58,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1810893324] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:58,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:58,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:01:58,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297485631] [2024-12-02 08:01:58,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:58,260 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:01:58,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:58,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:01:58,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:01:58,260 INFO L87 Difference]: Start difference. First operand 873 states and 1268 transitions. Second operand has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:58,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:58,313 INFO L93 Difference]: Finished difference Result 1580 states and 2288 transitions. [2024-12-02 08:01:58,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:58,313 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 248 [2024-12-02 08:01:58,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:58,314 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:58,314 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:58,315 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:58,315 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1164 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:58,315 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 2500 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:01:58,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:58,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:58,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4527649769585254) internal successors, (1261), 868 states have internal predecessors, (1261), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:58,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1267 transitions. [2024-12-02 08:01:58,324 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1267 transitions. Word has length 248 [2024-12-02 08:01:58,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:58,324 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1267 transitions. [2024-12-02 08:01:58,324 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:01:58,324 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1267 transitions. [2024-12-02 08:01:58,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-12-02 08:01:58,325 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:58,325 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:58,325 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 08:01:58,325 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:58,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:58,325 INFO L85 PathProgramCache]: Analyzing trace with hash -594336282, now seen corresponding path program 1 times [2024-12-02 08:01:58,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:58,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432354579] [2024-12-02 08:01:58,325 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:58,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:58,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:58,818 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:58,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:58,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432354579] [2024-12-02 08:01:58,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432354579] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:58,818 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:58,819 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:58,819 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630476466] [2024-12-02 08:01:58,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:58,819 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:58,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:58,819 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:58,819 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:58,820 INFO L87 Difference]: Start difference. First operand 873 states and 1267 transitions. Second operand has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:58,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:58,955 INFO L93 Difference]: Finished difference Result 1580 states and 2286 transitions. [2024-12-02 08:01:58,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:58,956 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 249 [2024-12-02 08:01:58,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:58,958 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:58,958 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:58,958 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:58,959 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1118 mSDsluCounter, 2447 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1118 SdHoareTripleChecker+Valid, 3672 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:58,959 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1118 Valid, 3672 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:58,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:58,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:58,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4516129032258065) internal successors, (1260), 868 states have internal predecessors, (1260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:58,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1266 transitions. [2024-12-02 08:01:58,974 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1266 transitions. Word has length 249 [2024-12-02 08:01:58,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:58,974 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1266 transitions. [2024-12-02 08:01:58,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:58,975 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1266 transitions. [2024-12-02 08:01:58,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2024-12-02 08:01:58,976 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:58,976 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:58,976 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 08:01:58,976 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:58,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:58,977 INFO L85 PathProgramCache]: Analyzing trace with hash -592829682, now seen corresponding path program 1 times [2024-12-02 08:01:58,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:58,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955225397] [2024-12-02 08:01:58,977 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:58,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:01:59,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:59,697 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:01:59,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:59,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955225397] [2024-12-02 08:01:59,698 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955225397] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:01:59,698 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:01:59,698 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:01:59,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059987727] [2024-12-02 08:01:59,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:01:59,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:01:59,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:59,698 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:01:59,698 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:01:59,698 INFO L87 Difference]: Start difference. First operand 873 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:59,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:01:59,794 INFO L93 Difference]: Finished difference Result 1580 states and 2284 transitions. [2024-12-02 08:01:59,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:01:59,794 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 250 [2024-12-02 08:01:59,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:01:59,796 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:01:59,796 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:01:59,796 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:01:59,796 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 2226 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2226 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:01:59,797 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2226 Valid, 2452 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:01:59,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:01:59,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:01:59,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4504608294930876) internal successors, (1259), 868 states have internal predecessors, (1259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:01:59,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1265 transitions. [2024-12-02 08:01:59,805 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1265 transitions. Word has length 250 [2024-12-02 08:01:59,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:01:59,805 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1265 transitions. [2024-12-02 08:01:59,805 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:01:59,806 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1265 transitions. [2024-12-02 08:01:59,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2024-12-02 08:01:59,806 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:01:59,806 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:01:59,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 08:01:59,806 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:01:59,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:01:59,807 INFO L85 PathProgramCache]: Analyzing trace with hash -142001561, now seen corresponding path program 1 times [2024-12-02 08:01:59,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:01:59,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950576804] [2024-12-02 08:01:59,807 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:59,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:00,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:00,325 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:00,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:00,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950576804] [2024-12-02 08:02:00,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1950576804] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:00,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:00,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:00,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640976291] [2024-12-02 08:02:00,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:00,325 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:00,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:00,326 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:00,326 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:00,326 INFO L87 Difference]: Start difference. First operand 873 states and 1265 transitions. Second operand has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:00,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:00,425 INFO L93 Difference]: Finished difference Result 1580 states and 2282 transitions. [2024-12-02 08:02:00,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:00,426 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 251 [2024-12-02 08:02:00,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:00,427 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:00,427 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:00,427 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:00,428 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1114 mSDsluCounter, 1234 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1114 SdHoareTripleChecker+Valid, 2459 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:00,428 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1114 Valid, 2459 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:00,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:00,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:00,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4493087557603688) internal successors, (1258), 868 states have internal predecessors, (1258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:00,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1264 transitions. [2024-12-02 08:02:00,437 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1264 transitions. Word has length 251 [2024-12-02 08:02:00,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:00,437 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1264 transitions. [2024-12-02 08:02:00,437 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:00,437 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1264 transitions. [2024-12-02 08:02:00,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-02 08:02:00,438 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:00,438 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:00,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 08:02:00,438 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:00,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:00,439 INFO L85 PathProgramCache]: Analyzing trace with hash 488879693, now seen corresponding path program 1 times [2024-12-02 08:02:00,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:00,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612557362] [2024-12-02 08:02:00,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:00,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:00,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:00,934 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:00,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:00,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612557362] [2024-12-02 08:02:00,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612557362] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:00,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:00,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:00,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905866794] [2024-12-02 08:02:00,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:00,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:00,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:00,935 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:00,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:00,936 INFO L87 Difference]: Start difference. First operand 873 states and 1264 transitions. Second operand has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:01,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:01,068 INFO L93 Difference]: Finished difference Result 1580 states and 2280 transitions. [2024-12-02 08:02:01,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:01,069 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 252 [2024-12-02 08:02:01,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:01,070 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:01,070 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:01,071 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:01,071 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1101 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1101 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:01,071 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1101 Valid, 2374 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:01,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:01,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:01,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4481566820276497) internal successors, (1257), 868 states have internal predecessors, (1257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:01,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1263 transitions. [2024-12-02 08:02:01,080 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1263 transitions. Word has length 252 [2024-12-02 08:02:01,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:01,081 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1263 transitions. [2024-12-02 08:02:01,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:01,081 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1263 transitions. [2024-12-02 08:02:01,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2024-12-02 08:02:01,081 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:01,082 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:01,082 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 08:02:01,082 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:01,082 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:01,082 INFO L85 PathProgramCache]: Analyzing trace with hash -1768421689, now seen corresponding path program 1 times [2024-12-02 08:02:01,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:01,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785653399] [2024-12-02 08:02:01,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:01,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:01,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:01,705 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:01,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:01,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785653399] [2024-12-02 08:02:01,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1785653399] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:01,705 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:01,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:01,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145064285] [2024-12-02 08:02:01,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:01,706 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:01,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:01,706 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:01,706 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:01,706 INFO L87 Difference]: Start difference. First operand 873 states and 1263 transitions. Second operand has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:01,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:01,888 INFO L93 Difference]: Finished difference Result 1580 states and 2278 transitions. [2024-12-02 08:02:01,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:01,889 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 253 [2024-12-02 08:02:01,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:01,891 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:01,891 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:01,892 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:01,892 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1097 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1097 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:01,893 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1097 Valid, 2381 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:01,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:01,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:01,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4470046082949308) internal successors, (1256), 868 states have internal predecessors, (1256), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:01,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1262 transitions. [2024-12-02 08:02:01,903 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1262 transitions. Word has length 253 [2024-12-02 08:02:01,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:01,903 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1262 transitions. [2024-12-02 08:02:01,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:01,903 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1262 transitions. [2024-12-02 08:02:01,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-02 08:02:01,904 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:01,904 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:01,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 08:02:01,904 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:01,904 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:01,905 INFO L85 PathProgramCache]: Analyzing trace with hash -262754674, now seen corresponding path program 1 times [2024-12-02 08:02:01,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:01,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663400261] [2024-12-02 08:02:01,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:01,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:02,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:02,429 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:02,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:02,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663400261] [2024-12-02 08:02:02,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [663400261] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:02,429 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:02,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:02,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200081202] [2024-12-02 08:02:02,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:02,430 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:02,430 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:02,430 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:02,430 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:02,430 INFO L87 Difference]: Start difference. First operand 873 states and 1262 transitions. Second operand has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:02,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:02,589 INFO L93 Difference]: Finished difference Result 1580 states and 2276 transitions. [2024-12-02 08:02:02,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:02,590 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 254 [2024-12-02 08:02:02,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:02,591 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:02,591 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:02,592 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:02,592 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1096 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1096 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:02,593 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1096 Valid, 2381 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:02,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:02,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:02,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.445852534562212) internal successors, (1255), 868 states have internal predecessors, (1255), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:02,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1261 transitions. [2024-12-02 08:02:02,603 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1261 transitions. Word has length 254 [2024-12-02 08:02:02,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:02,604 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1261 transitions. [2024-12-02 08:02:02,604 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:02,604 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1261 transitions. [2024-12-02 08:02:02,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-02 08:02:02,604 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:02,605 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:02,605 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 08:02:02,605 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:02,605 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:02,605 INFO L85 PathProgramCache]: Analyzing trace with hash 1822400070, now seen corresponding path program 1 times [2024-12-02 08:02:02,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:02,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146897439] [2024-12-02 08:02:02,606 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:02,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:02,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:03,079 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:03,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:03,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146897439] [2024-12-02 08:02:03,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146897439] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:03,079 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:03,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:03,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493974362] [2024-12-02 08:02:03,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:03,079 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:03,079 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:03,080 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:03,080 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:03,080 INFO L87 Difference]: Start difference. First operand 873 states and 1261 transitions. Second operand has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:03,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:03,213 INFO L93 Difference]: Finished difference Result 1580 states and 2274 transitions. [2024-12-02 08:02:03,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:03,213 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 255 [2024-12-02 08:02:03,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:03,215 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:03,215 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:03,215 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:03,216 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2178 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:03,216 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2178 Valid, 2374 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:03,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:03,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:03,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.444700460829493) internal successors, (1254), 868 states have internal predecessors, (1254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:03,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1260 transitions. [2024-12-02 08:02:03,228 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1260 transitions. Word has length 255 [2024-12-02 08:02:03,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:03,228 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1260 transitions. [2024-12-02 08:02:03,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:03,228 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1260 transitions. [2024-12-02 08:02:03,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2024-12-02 08:02:03,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:03,229 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:03,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 08:02:03,230 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:03,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:03,230 INFO L85 PathProgramCache]: Analyzing trace with hash -449010865, now seen corresponding path program 1 times [2024-12-02 08:02:03,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:03,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999348878] [2024-12-02 08:02:03,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:03,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:03,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:03,739 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:03,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:03,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999348878] [2024-12-02 08:02:03,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [999348878] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:03,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:03,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:02:03,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547969977] [2024-12-02 08:02:03,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:03,740 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:02:03,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:03,740 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:02:03,740 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:02:03,741 INFO L87 Difference]: Start difference. First operand 873 states and 1260 transitions. Second operand has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:03,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:03,864 INFO L93 Difference]: Finished difference Result 1580 states and 2272 transitions. [2024-12-02 08:02:03,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:03,864 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 256 [2024-12-02 08:02:03,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:03,866 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:03,866 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:03,866 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:03,866 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1079 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:03,867 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2374 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:03,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:03,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:03,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4435483870967742) internal successors, (1253), 868 states have internal predecessors, (1253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:03,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1259 transitions. [2024-12-02 08:02:03,876 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1259 transitions. Word has length 256 [2024-12-02 08:02:03,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:03,876 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1259 transitions. [2024-12-02 08:02:03,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:03,877 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1259 transitions. [2024-12-02 08:02:03,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2024-12-02 08:02:03,877 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:03,877 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:03,878 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 08:02:03,878 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:03,878 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:03,878 INFO L85 PathProgramCache]: Analyzing trace with hash 1710883141, now seen corresponding path program 1 times [2024-12-02 08:02:03,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:03,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288711282] [2024-12-02 08:02:03,878 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:03,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:04,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:04,360 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:04,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:04,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288711282] [2024-12-02 08:02:04,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1288711282] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:04,360 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:04,360 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:04,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100727947] [2024-12-02 08:02:04,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:04,361 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:04,361 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:04,361 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:04,361 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:04,361 INFO L87 Difference]: Start difference. First operand 873 states and 1259 transitions. Second operand has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:04,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:04,504 INFO L93 Difference]: Finished difference Result 1580 states and 2270 transitions. [2024-12-02 08:02:04,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:04,504 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 257 [2024-12-02 08:02:04,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:04,506 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:04,506 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:04,507 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:04,507 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2166 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2166 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:04,507 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2166 Valid, 2374 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:04,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:04,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:04,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4423963133640554) internal successors, (1252), 868 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:04,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1258 transitions. [2024-12-02 08:02:04,519 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1258 transitions. Word has length 257 [2024-12-02 08:02:04,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:04,519 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1258 transitions. [2024-12-02 08:02:04,519 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:04,519 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1258 transitions. [2024-12-02 08:02:04,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2024-12-02 08:02:04,520 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:04,520 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:04,521 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 08:02:04,521 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:04,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:04,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1726874768, now seen corresponding path program 1 times [2024-12-02 08:02:04,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:04,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319791491] [2024-12-02 08:02:04,521 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:04,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:04,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:05,010 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:05,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:05,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319791491] [2024-12-02 08:02:05,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319791491] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:05,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:05,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:05,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245865705] [2024-12-02 08:02:05,010 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:05,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:05,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:05,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:05,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:05,011 INFO L87 Difference]: Start difference. First operand 873 states and 1258 transitions. Second operand has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:05,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:05,156 INFO L93 Difference]: Finished difference Result 1580 states and 2268 transitions. [2024-12-02 08:02:05,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:05,157 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 258 [2024-12-02 08:02:05,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:05,158 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:05,158 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:05,159 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:05,159 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1092 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1092 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:05,159 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1092 Valid, 2381 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:05,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:05,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:05,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4412442396313363) internal successors, (1251), 868 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:05,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1257 transitions. [2024-12-02 08:02:05,168 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1257 transitions. Word has length 258 [2024-12-02 08:02:05,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:05,168 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1257 transitions. [2024-12-02 08:02:05,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:05,168 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1257 transitions. [2024-12-02 08:02:05,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2024-12-02 08:02:05,169 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:05,169 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:05,169 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 08:02:05,169 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:05,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:05,170 INFO L85 PathProgramCache]: Analyzing trace with hash 564576196, now seen corresponding path program 1 times [2024-12-02 08:02:05,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:05,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230334421] [2024-12-02 08:02:05,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:05,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:05,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:05,619 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:05,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:05,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230334421] [2024-12-02 08:02:05,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [230334421] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:05,619 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:05,619 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:02:05,619 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037832651] [2024-12-02 08:02:05,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:05,619 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:02:05,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:05,619 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:02:05,619 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:02:05,620 INFO L87 Difference]: Start difference. First operand 873 states and 1257 transitions. Second operand has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:05,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:05,859 INFO L93 Difference]: Finished difference Result 1580 states and 2266 transitions. [2024-12-02 08:02:05,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:05,860 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 259 [2024-12-02 08:02:05,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:05,861 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:05,861 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:05,862 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:05,862 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1061 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1061 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:05,862 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1061 Valid, 2216 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:05,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:05,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:05,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4400921658986174) internal successors, (1250), 868 states have internal predecessors, (1250), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:05,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1256 transitions. [2024-12-02 08:02:05,871 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1256 transitions. Word has length 259 [2024-12-02 08:02:05,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:05,871 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1256 transitions. [2024-12-02 08:02:05,871 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:05,871 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1256 transitions. [2024-12-02 08:02:05,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2024-12-02 08:02:05,872 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:05,872 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:05,872 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 08:02:05,872 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:05,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:05,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1317954896, now seen corresponding path program 1 times [2024-12-02 08:02:05,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:05,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544075888] [2024-12-02 08:02:05,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:05,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:06,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:06,391 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:06,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:06,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544075888] [2024-12-02 08:02:06,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [544075888] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:06,392 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:06,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:06,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323133545] [2024-12-02 08:02:06,392 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:06,392 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:06,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:06,393 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:06,393 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:06,393 INFO L87 Difference]: Start difference. First operand 873 states and 1256 transitions. Second operand has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:06,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:06,639 INFO L93 Difference]: Finished difference Result 1580 states and 2264 transitions. [2024-12-02 08:02:06,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:06,640 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 260 [2024-12-02 08:02:06,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:06,641 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:06,641 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:06,642 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:06,642 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1059 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1059 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:06,642 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1059 Valid, 2223 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:06,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:06,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:06,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4389400921658986) internal successors, (1249), 868 states have internal predecessors, (1249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:06,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1255 transitions. [2024-12-02 08:02:06,653 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1255 transitions. Word has length 260 [2024-12-02 08:02:06,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:06,653 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1255 transitions. [2024-12-02 08:02:06,653 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:06,653 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1255 transitions. [2024-12-02 08:02:06,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2024-12-02 08:02:06,654 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:06,654 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:06,654 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 08:02:06,654 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:06,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:06,654 INFO L85 PathProgramCache]: Analyzing trace with hash -1332823739, now seen corresponding path program 1 times [2024-12-02 08:02:06,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:06,654 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631913169] [2024-12-02 08:02:06,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:06,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:06,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:07,163 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:07,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:07,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631913169] [2024-12-02 08:02:07,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1631913169] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:07,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:07,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:07,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186158637] [2024-12-02 08:02:07,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:07,163 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:07,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:07,164 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:07,164 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:07,164 INFO L87 Difference]: Start difference. First operand 873 states and 1255 transitions. Second operand has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:07,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:07,403 INFO L93 Difference]: Finished difference Result 1580 states and 2262 transitions. [2024-12-02 08:02:07,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:07,404 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 261 [2024-12-02 08:02:07,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:07,405 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:07,405 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:07,406 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:07,406 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2108 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 288 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2108 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 288 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:07,406 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2108 Valid, 2216 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 288 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:07,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:07,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:07,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4377880184331797) internal successors, (1248), 868 states have internal predecessors, (1248), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:07,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1254 transitions. [2024-12-02 08:02:07,415 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1254 transitions. Word has length 261 [2024-12-02 08:02:07,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:07,415 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1254 transitions. [2024-12-02 08:02:07,415 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:07,415 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1254 transitions. [2024-12-02 08:02:07,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2024-12-02 08:02:07,416 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:07,416 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:07,416 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 08:02:07,416 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:07,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:07,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1161378031, now seen corresponding path program 1 times [2024-12-02 08:02:07,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:07,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52050275] [2024-12-02 08:02:07,416 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:07,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:07,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:08,096 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:08,096 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:08,096 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52050275] [2024-12-02 08:02:08,096 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [52050275] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:08,096 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:08,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:08,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689470697] [2024-12-02 08:02:08,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:08,097 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:08,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:08,097 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:08,097 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:08,097 INFO L87 Difference]: Start difference. First operand 873 states and 1254 transitions. Second operand has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:08,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:08,350 INFO L93 Difference]: Finished difference Result 1580 states and 2260 transitions. [2024-12-02 08:02:08,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:08,350 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 262 [2024-12-02 08:02:08,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:08,352 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:08,352 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:08,352 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:08,353 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2102 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2102 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:08,353 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2102 Valid, 2216 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:08,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:08,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:08,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4366359447004609) internal successors, (1247), 868 states have internal predecessors, (1247), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:08,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1253 transitions. [2024-12-02 08:02:08,363 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1253 transitions. Word has length 262 [2024-12-02 08:02:08,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:08,363 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1253 transitions. [2024-12-02 08:02:08,363 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:08,363 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1253 transitions. [2024-12-02 08:02:08,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2024-12-02 08:02:08,364 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:08,364 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:08,364 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 08:02:08,364 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:08,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:08,365 INFO L85 PathProgramCache]: Analyzing trace with hash 940351302, now seen corresponding path program 1 times [2024-12-02 08:02:08,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:08,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329669677] [2024-12-02 08:02:08,365 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:08,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:08,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:08,838 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:08,838 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:08,838 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329669677] [2024-12-02 08:02:08,838 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1329669677] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:08,838 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:08,839 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:08,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104701786] [2024-12-02 08:02:08,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:08,839 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:08,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:08,839 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:08,839 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:08,839 INFO L87 Difference]: Start difference. First operand 873 states and 1253 transitions. Second operand has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:09,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:09,082 INFO L93 Difference]: Finished difference Result 1580 states and 2258 transitions. [2024-12-02 08:02:09,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:09,083 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 263 [2024-12-02 08:02:09,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:09,085 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:09,085 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:09,085 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:09,086 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1056 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:09,086 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2223 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:09,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:09,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:09,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.435483870967742) internal successors, (1246), 868 states have internal predecessors, (1246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:09,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1252 transitions. [2024-12-02 08:02:09,101 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1252 transitions. Word has length 263 [2024-12-02 08:02:09,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:09,102 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1252 transitions. [2024-12-02 08:02:09,102 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:09,102 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1252 transitions. [2024-12-02 08:02:09,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2024-12-02 08:02:09,103 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:09,103 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:09,103 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 08:02:09,103 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:09,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:09,104 INFO L85 PathProgramCache]: Analyzing trace with hash 2062987950, now seen corresponding path program 1 times [2024-12-02 08:02:09,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:09,104 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156998861] [2024-12-02 08:02:09,104 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:09,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:09,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:09,648 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:09,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:09,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156998861] [2024-12-02 08:02:09,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156998861] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:09,648 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:09,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:09,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1020215289] [2024-12-02 08:02:09,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:09,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:09,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:09,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:09,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:09,650 INFO L87 Difference]: Start difference. First operand 873 states and 1252 transitions. Second operand has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:09,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:09,908 INFO L93 Difference]: Finished difference Result 1580 states and 2256 transitions. [2024-12-02 08:02:09,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:09,909 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 264 [2024-12-02 08:02:09,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:09,910 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:09,910 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:09,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:09,911 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1055 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 282 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1055 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 282 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:09,911 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1055 Valid, 2223 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 282 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:09,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:09,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:09,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4343317972350231) internal successors, (1245), 868 states have internal predecessors, (1245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:09,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1251 transitions. [2024-12-02 08:02:09,920 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1251 transitions. Word has length 264 [2024-12-02 08:02:09,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:09,921 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1251 transitions. [2024-12-02 08:02:09,921 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:09,921 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1251 transitions. [2024-12-02 08:02:09,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2024-12-02 08:02:09,922 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:09,922 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:09,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 08:02:09,922 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:09,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:09,922 INFO L85 PathProgramCache]: Analyzing trace with hash -101916217, now seen corresponding path program 1 times [2024-12-02 08:02:09,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:09,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724647813] [2024-12-02 08:02:09,923 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:09,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:10,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:10,413 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:10,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:10,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724647813] [2024-12-02 08:02:10,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724647813] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:10,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:10,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:10,414 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92971636] [2024-12-02 08:02:10,414 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:10,414 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:10,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:10,415 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:10,415 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:10,415 INFO L87 Difference]: Start difference. First operand 873 states and 1251 transitions. Second operand has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:10,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:10,614 INFO L93 Difference]: Finished difference Result 1580 states and 2254 transitions. [2024-12-02 08:02:10,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:10,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 265 [2024-12-02 08:02:10,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:10,616 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:10,616 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:10,616 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:10,617 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2084 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 280 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2084 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 280 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:10,617 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2084 Valid, 2216 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 280 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:10,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:10,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:10,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.433179723502304) internal successors, (1244), 868 states have internal predecessors, (1244), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:10,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1250 transitions. [2024-12-02 08:02:10,627 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1250 transitions. Word has length 265 [2024-12-02 08:02:10,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:10,627 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1250 transitions. [2024-12-02 08:02:10,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:10,627 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1250 transitions. [2024-12-02 08:02:10,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2024-12-02 08:02:10,628 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:10,628 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:10,628 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 08:02:10,628 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:10,628 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:10,629 INFO L85 PathProgramCache]: Analyzing trace with hash -277506067, now seen corresponding path program 1 times [2024-12-02 08:02:10,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:10,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565802505] [2024-12-02 08:02:10,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:10,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:10,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:11,128 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:11,128 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:11,128 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565802505] [2024-12-02 08:02:11,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565802505] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:11,128 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:11,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:11,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512554133] [2024-12-02 08:02:11,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:11,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:11,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:11,129 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:11,129 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:11,129 INFO L87 Difference]: Start difference. First operand 873 states and 1250 transitions. Second operand has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:11,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:11,380 INFO L93 Difference]: Finished difference Result 1580 states and 2252 transitions. [2024-12-02 08:02:11,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:11,380 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 266 [2024-12-02 08:02:11,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:11,381 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:11,381 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:11,382 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:11,382 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1053 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1053 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:11,382 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1053 Valid, 2223 Invalid, 278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:11,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:11,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:11,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4320276497695852) internal successors, (1243), 868 states have internal predecessors, (1243), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:11,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1249 transitions. [2024-12-02 08:02:11,391 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1249 transitions. Word has length 266 [2024-12-02 08:02:11,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:11,392 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1249 transitions. [2024-12-02 08:02:11,392 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:11,392 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1249 transitions. [2024-12-02 08:02:11,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2024-12-02 08:02:11,393 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:11,393 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:11,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 08:02:11,393 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:11,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:11,394 INFO L85 PathProgramCache]: Analyzing trace with hash 2047602888, now seen corresponding path program 1 times [2024-12-02 08:02:11,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:11,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954535226] [2024-12-02 08:02:11,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:11,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:11,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:11,892 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:11,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:11,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954535226] [2024-12-02 08:02:11,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1954535226] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:11,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:11,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:11,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041014117] [2024-12-02 08:02:11,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:11,893 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:11,893 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:11,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:11,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:11,893 INFO L87 Difference]: Start difference. First operand 873 states and 1249 transitions. Second operand has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:12,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:12,143 INFO L93 Difference]: Finished difference Result 1580 states and 2250 transitions. [2024-12-02 08:02:12,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:12,143 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 267 [2024-12-02 08:02:12,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:12,144 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:12,144 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:12,145 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:12,145 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2072 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2072 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:12,145 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2072 Valid, 2216 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 276 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:12,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:12,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:12,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4308755760368663) internal successors, (1242), 868 states have internal predecessors, (1242), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:12,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1248 transitions. [2024-12-02 08:02:12,155 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1248 transitions. Word has length 267 [2024-12-02 08:02:12,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:12,155 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1248 transitions. [2024-12-02 08:02:12,155 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:12,156 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1248 transitions. [2024-12-02 08:02:12,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2024-12-02 08:02:12,156 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:12,157 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:12,157 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 08:02:12,157 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:12,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:12,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1324447916, now seen corresponding path program 1 times [2024-12-02 08:02:12,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:12,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764529161] [2024-12-02 08:02:12,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:12,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:12,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:12,648 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:12,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:12,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764529161] [2024-12-02 08:02:12,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764529161] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:12,648 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:12,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:12,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400899118] [2024-12-02 08:02:12,648 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:12,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:12,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:12,649 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:12,649 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:12,650 INFO L87 Difference]: Start difference. First operand 873 states and 1248 transitions. Second operand has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:12,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:12,899 INFO L93 Difference]: Finished difference Result 1580 states and 2248 transitions. [2024-12-02 08:02:12,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:12,900 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 268 [2024-12-02 08:02:12,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:12,901 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:12,901 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:12,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:12,902 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1051 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1051 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:12,902 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1051 Valid, 2223 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:12,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:12,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:12,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4297235023041475) internal successors, (1241), 868 states have internal predecessors, (1241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:12,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1247 transitions. [2024-12-02 08:02:12,913 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1247 transitions. Word has length 268 [2024-12-02 08:02:12,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:12,913 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1247 transitions. [2024-12-02 08:02:12,913 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:12,913 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1247 transitions. [2024-12-02 08:02:12,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2024-12-02 08:02:12,914 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:12,914 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:12,914 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 08:02:12,914 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:12,914 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:12,915 INFO L85 PathProgramCache]: Analyzing trace with hash 995507273, now seen corresponding path program 1 times [2024-12-02 08:02:12,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:12,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235686724] [2024-12-02 08:02:12,915 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:12,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:13,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:13,455 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:13,455 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:13,455 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235686724] [2024-12-02 08:02:13,455 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235686724] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:13,455 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:13,456 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:13,456 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2023032130] [2024-12-02 08:02:13,456 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:13,456 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:13,456 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:13,456 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:13,457 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:13,457 INFO L87 Difference]: Start difference. First operand 873 states and 1247 transitions. Second operand has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:13,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:13,697 INFO L93 Difference]: Finished difference Result 1580 states and 2246 transitions. [2024-12-02 08:02:13,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:13,697 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 269 [2024-12-02 08:02:13,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:13,698 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:13,698 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:13,699 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:13,699 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2060 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 272 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2060 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:13,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2060 Valid, 2216 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 272 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:13,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:13,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:13,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4285714285714286) internal successors, (1240), 868 states have internal predecessors, (1240), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:13,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1246 transitions. [2024-12-02 08:02:13,709 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1246 transitions. Word has length 269 [2024-12-02 08:02:13,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:13,709 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1246 transitions. [2024-12-02 08:02:13,709 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:13,709 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1246 transitions. [2024-12-02 08:02:13,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-12-02 08:02:13,710 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:13,710 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:13,710 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 08:02:13,710 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:13,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:13,710 INFO L85 PathProgramCache]: Analyzing trace with hash -669653781, now seen corresponding path program 1 times [2024-12-02 08:02:13,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:13,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1192481294] [2024-12-02 08:02:13,711 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:13,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:13,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:14,180 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:14,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:14,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1192481294] [2024-12-02 08:02:14,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1192481294] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:14,180 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:14,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:14,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966579932] [2024-12-02 08:02:14,180 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:14,181 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:14,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:14,181 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:14,181 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:14,181 INFO L87 Difference]: Start difference. First operand 873 states and 1246 transitions. Second operand has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:14,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:14,423 INFO L93 Difference]: Finished difference Result 1580 states and 2244 transitions. [2024-12-02 08:02:14,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:14,424 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 270 [2024-12-02 08:02:14,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:14,425 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:14,425 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:14,426 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:14,426 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1049 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1049 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:14,426 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1049 Valid, 2223 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:14,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:14,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:14,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4274193548387097) internal successors, (1239), 868 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:14,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1245 transitions. [2024-12-02 08:02:14,436 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1245 transitions. Word has length 270 [2024-12-02 08:02:14,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:14,437 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1245 transitions. [2024-12-02 08:02:14,437 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:14,437 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1245 transitions. [2024-12-02 08:02:14,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2024-12-02 08:02:14,438 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:14,438 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:14,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 08:02:14,438 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:14,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:14,438 INFO L85 PathProgramCache]: Analyzing trace with hash -53988278, now seen corresponding path program 1 times [2024-12-02 08:02:14,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:14,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151655127] [2024-12-02 08:02:14,438 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:14,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:14,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:14,958 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:14,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:14,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151655127] [2024-12-02 08:02:14,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1151655127] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:14,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:14,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:14,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211523525] [2024-12-02 08:02:14,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:14,959 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:14,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:14,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:14,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:14,960 INFO L87 Difference]: Start difference. First operand 873 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:15,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:15,187 INFO L93 Difference]: Finished difference Result 1580 states and 2242 transitions. [2024-12-02 08:02:15,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:15,188 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 271 [2024-12-02 08:02:15,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:15,189 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:15,189 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:15,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:15,190 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2048 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 268 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2048 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:15,191 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2048 Valid, 2216 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 268 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:15,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:15,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:15,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4262672811059909) internal successors, (1238), 868 states have internal predecessors, (1238), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:15,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1244 transitions. [2024-12-02 08:02:15,207 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1244 transitions. Word has length 271 [2024-12-02 08:02:15,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:15,208 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1244 transitions. [2024-12-02 08:02:15,208 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:15,208 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1244 transitions. [2024-12-02 08:02:15,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-12-02 08:02:15,209 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:15,209 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:15,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 08:02:15,209 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:15,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:15,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1593732266, now seen corresponding path program 1 times [2024-12-02 08:02:15,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:15,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696613319] [2024-12-02 08:02:15,210 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:15,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:15,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:15,705 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:15,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:15,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696613319] [2024-12-02 08:02:15,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696613319] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:15,705 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:15,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:15,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045559981] [2024-12-02 08:02:15,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:15,705 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:15,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:15,706 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:15,706 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:15,706 INFO L87 Difference]: Start difference. First operand 873 states and 1244 transitions. Second operand has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:15,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:15,932 INFO L93 Difference]: Finished difference Result 1580 states and 2240 transitions. [2024-12-02 08:02:15,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:15,933 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 272 [2024-12-02 08:02:15,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:15,934 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:15,934 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:15,934 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:15,934 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1047 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:15,935 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 2223 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:15,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:15,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:15,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4251152073732718) internal successors, (1237), 868 states have internal predecessors, (1237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:15,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1243 transitions. [2024-12-02 08:02:15,945 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1243 transitions. Word has length 272 [2024-12-02 08:02:15,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:15,945 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1243 transitions. [2024-12-02 08:02:15,945 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:15,945 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1243 transitions. [2024-12-02 08:02:15,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-12-02 08:02:15,946 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:15,946 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:15,946 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 08:02:15,946 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:15,946 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:15,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1986939083, now seen corresponding path program 1 times [2024-12-02 08:02:15,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:15,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400287344] [2024-12-02 08:02:15,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:15,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:16,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:16,442 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:16,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:16,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400287344] [2024-12-02 08:02:16,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1400287344] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:16,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:16,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:16,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533610833] [2024-12-02 08:02:16,443 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:16,443 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:16,443 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:16,444 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:16,444 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:16,444 INFO L87 Difference]: Start difference. First operand 873 states and 1243 transitions. Second operand has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:16,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:16,644 INFO L93 Difference]: Finished difference Result 1580 states and 2238 transitions. [2024-12-02 08:02:16,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:16,645 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 273 [2024-12-02 08:02:16,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:16,646 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:02:16,646 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:16,647 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:16,647 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1046 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1046 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:16,647 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1046 Valid, 2223 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:16,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:16,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:16,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.423963133640553) internal successors, (1236), 868 states have internal predecessors, (1236), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:16,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1242 transitions. [2024-12-02 08:02:16,657 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1242 transitions. Word has length 273 [2024-12-02 08:02:16,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:16,658 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1242 transitions. [2024-12-02 08:02:16,658 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:16,658 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1242 transitions. [2024-12-02 08:02:16,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2024-12-02 08:02:16,659 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:16,659 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:16,659 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 08:02:16,659 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:16,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:16,659 INFO L85 PathProgramCache]: Analyzing trace with hash -801726487, now seen corresponding path program 1 times [2024-12-02 08:02:16,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:16,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095770704] [2024-12-02 08:02:16,660 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:16,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:16,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:17,166 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:17,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:17,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095770704] [2024-12-02 08:02:17,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095770704] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:17,166 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:17,167 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:02:17,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665769947] [2024-12-02 08:02:17,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:17,167 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:02:17,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:17,168 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:02:17,168 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:02:17,168 INFO L87 Difference]: Start difference. First operand 873 states and 1242 transitions. Second operand has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:17,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:17,438 INFO L93 Difference]: Finished difference Result 1582 states and 2238 transitions. [2024-12-02 08:02:17,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:17,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 274 [2024-12-02 08:02:17,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:17,439 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 08:02:17,440 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:02:17,440 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:02:17,440 INFO L435 NwaCegarLoop]: 1233 mSDtfsCounter, 2 mSDsluCounter, 2196 mSDsCounter, 0 mSdLazyCounter, 281 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 3429 SdHoareTripleChecker+Invalid, 281 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 281 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:17,440 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 3429 Invalid, 281 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 281 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:02:17,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:02:17,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:02:17,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.422811059907834) internal successors, (1235), 868 states have internal predecessors, (1235), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:17,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1241 transitions. [2024-12-02 08:02:17,450 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1241 transitions. Word has length 274 [2024-12-02 08:02:17,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:17,451 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1241 transitions. [2024-12-02 08:02:17,451 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:17,451 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1241 transitions. [2024-12-02 08:02:17,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2024-12-02 08:02:17,452 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:17,452 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:17,452 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 08:02:17,452 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:17,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:17,452 INFO L85 PathProgramCache]: Analyzing trace with hash -98183874, now seen corresponding path program 1 times [2024-12-02 08:02:17,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:17,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713801561] [2024-12-02 08:02:17,452 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:17,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:17,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:18,598 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:18,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:18,598 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713801561] [2024-12-02 08:02:18,598 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [713801561] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:18,598 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:18,598 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:18,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513242010] [2024-12-02 08:02:18,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:18,598 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:18,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:18,599 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:18,599 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:18,599 INFO L87 Difference]: Start difference. First operand 873 states and 1241 transitions. Second operand has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:18,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:18,654 INFO L93 Difference]: Finished difference Result 1720 states and 2386 transitions. [2024-12-02 08:02:18,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:02:18,655 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 275 [2024-12-02 08:02:18,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:18,657 INFO L225 Difference]: With dead ends: 1720 [2024-12-02 08:02:18,657 INFO L226 Difference]: Without dead ends: 1013 [2024-12-02 08:02:18,658 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:18,659 INFO L435 NwaCegarLoop]: 1231 mSDtfsCounter, 22 mSDsluCounter, 3684 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 4915 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:18,659 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 4915 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:02:18,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1013 states. [2024-12-02 08:02:18,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1013 to 1011. [2024-12-02 08:02:18,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 1006 states have (on average 1.374751491053678) internal successors, (1383), 1006 states have internal predecessors, (1383), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:02:18,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1389 transitions. [2024-12-02 08:02:18,681 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1389 transitions. Word has length 275 [2024-12-02 08:02:18,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:18,681 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1389 transitions. [2024-12-02 08:02:18,682 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:18,682 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1389 transitions. [2024-12-02 08:02:18,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2024-12-02 08:02:18,683 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:18,683 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:18,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 08:02:18,683 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:18,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:18,684 INFO L85 PathProgramCache]: Analyzing trace with hash -2134812052, now seen corresponding path program 1 times [2024-12-02 08:02:18,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:18,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748230510] [2024-12-02 08:02:18,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:18,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:18,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:19,849 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:02:19,850 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:19,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748230510] [2024-12-02 08:02:19,850 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748230510] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:19,850 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:19,850 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:02:19,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143440096] [2024-12-02 08:02:19,850 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:19,851 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:02:19,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:19,851 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:02:19,851 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:02:19,851 INFO L87 Difference]: Start difference. First operand 1011 states and 1389 transitions. Second operand has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:20,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:20,001 INFO L93 Difference]: Finished difference Result 2210 states and 2942 transitions. [2024-12-02 08:02:20,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:02:20,001 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 276 [2024-12-02 08:02:20,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:20,002 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:20,002 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:20,003 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:02:20,004 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1683 mSDsluCounter, 4888 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1686 SdHoareTripleChecker+Valid, 6113 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:20,004 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1686 Valid, 6113 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:20,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:20,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:20,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3176123802505526) internal successors, (1788), 1357 states have internal predecessors, (1788), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:20,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1800 transitions. [2024-12-02 08:02:20,027 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1800 transitions. Word has length 276 [2024-12-02 08:02:20,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:20,027 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1800 transitions. [2024-12-02 08:02:20,027 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:02:20,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1800 transitions. [2024-12-02 08:02:20,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 703 [2024-12-02 08:02:20,031 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:20,031 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:20,031 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 08:02:20,031 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:20,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:20,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1200623010, now seen corresponding path program 1 times [2024-12-02 08:02:20,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:20,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635361205] [2024-12-02 08:02:20,032 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:20,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:20,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:21,357 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:21,358 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:21,358 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [635361205] [2024-12-02 08:02:21,358 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [635361205] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:21,358 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:21,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:21,358 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885597432] [2024-12-02 08:02:21,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:21,359 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:21,359 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:21,376 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:21,377 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:21,377 INFO L87 Difference]: Start difference. First operand 1365 states and 1800 transitions. Second operand has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:21,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:21,568 INFO L93 Difference]: Finished difference Result 2210 states and 2941 transitions. [2024-12-02 08:02:21,568 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:21,569 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 702 [2024-12-02 08:02:21,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:21,570 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:21,570 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:21,571 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:21,571 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1140 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:21,572 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 2221 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:21,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:21,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:21,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3168754605747974) internal successors, (1787), 1357 states have internal predecessors, (1787), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:21,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1799 transitions. [2024-12-02 08:02:21,590 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1799 transitions. Word has length 702 [2024-12-02 08:02:21,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:21,591 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1799 transitions. [2024-12-02 08:02:21,591 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:21,591 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1799 transitions. [2024-12-02 08:02:21,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 704 [2024-12-02 08:02:21,594 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:21,594 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:21,594 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 08:02:21,594 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:21,594 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:21,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1043857648, now seen corresponding path program 1 times [2024-12-02 08:02:21,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:21,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710955399] [2024-12-02 08:02:21,595 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:21,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:21,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:22,871 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:22,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:22,871 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710955399] [2024-12-02 08:02:22,871 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [710955399] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:22,871 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:22,872 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:22,872 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646383823] [2024-12-02 08:02:22,872 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:22,872 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:22,873 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:22,873 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:22,873 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:22,874 INFO L87 Difference]: Start difference. First operand 1365 states and 1799 transitions. Second operand has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:23,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:23,067 INFO L93 Difference]: Finished difference Result 2210 states and 2939 transitions. [2024-12-02 08:02:23,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:23,068 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 703 [2024-12-02 08:02:23,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:23,069 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:23,069 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:23,069 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:23,070 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1132 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:23,070 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2221 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:23,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:23,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:23,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.316138540899042) internal successors, (1786), 1357 states have internal predecessors, (1786), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:23,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1798 transitions. [2024-12-02 08:02:23,089 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1798 transitions. Word has length 703 [2024-12-02 08:02:23,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:23,089 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1798 transitions. [2024-12-02 08:02:23,089 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:23,089 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1798 transitions. [2024-12-02 08:02:23,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 705 [2024-12-02 08:02:23,092 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:23,092 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:23,092 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 08:02:23,092 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:23,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:23,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1924280905, now seen corresponding path program 1 times [2024-12-02 08:02:23,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:23,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501841071] [2024-12-02 08:02:23,093 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:23,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:23,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:24,179 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:24,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:24,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501841071] [2024-12-02 08:02:24,179 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501841071] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:24,179 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:24,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:24,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457572246] [2024-12-02 08:02:24,180 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:24,180 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:24,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:24,181 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:24,181 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:24,182 INFO L87 Difference]: Start difference. First operand 1365 states and 1798 transitions. Second operand has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:24,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:24,392 INFO L93 Difference]: Finished difference Result 2210 states and 2937 transitions. [2024-12-02 08:02:24,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:24,392 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 704 [2024-12-02 08:02:24,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:24,394 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:24,394 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:24,394 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:24,395 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2063 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 258 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2066 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 258 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:24,395 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2066 Valid, 2214 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 258 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:24,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:24,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:24,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3154016212232866) internal successors, (1785), 1357 states have internal predecessors, (1785), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:24,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1797 transitions. [2024-12-02 08:02:24,413 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1797 transitions. Word has length 704 [2024-12-02 08:02:24,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:24,414 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1797 transitions. [2024-12-02 08:02:24,414 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:24,414 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1797 transitions. [2024-12-02 08:02:24,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 706 [2024-12-02 08:02:24,417 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:24,417 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:24,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 08:02:24,417 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:24,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:24,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1402931717, now seen corresponding path program 1 times [2024-12-02 08:02:24,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:24,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732339766] [2024-12-02 08:02:24,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:24,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:24,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:25,640 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:25,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:25,640 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732339766] [2024-12-02 08:02:25,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732339766] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:25,640 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:25,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:25,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002642406] [2024-12-02 08:02:25,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:25,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:25,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:25,643 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:25,643 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:25,643 INFO L87 Difference]: Start difference. First operand 1365 states and 1797 transitions. Second operand has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:25,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:25,864 INFO L93 Difference]: Finished difference Result 2210 states and 2935 transitions. [2024-12-02 08:02:25,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:25,865 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 705 [2024-12-02 08:02:25,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:25,866 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:25,866 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:25,867 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:25,867 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1116 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1119 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:25,867 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1119 Valid, 2221 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:25,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:25,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:25,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3146647015475312) internal successors, (1784), 1357 states have internal predecessors, (1784), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:25,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1796 transitions. [2024-12-02 08:02:25,897 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1796 transitions. Word has length 705 [2024-12-02 08:02:25,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:25,897 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1796 transitions. [2024-12-02 08:02:25,898 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:25,898 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1796 transitions. [2024-12-02 08:02:25,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 707 [2024-12-02 08:02:25,905 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:25,905 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:25,906 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-02 08:02:25,906 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:25,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:25,906 INFO L85 PathProgramCache]: Analyzing trace with hash 1947860660, now seen corresponding path program 1 times [2024-12-02 08:02:25,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:25,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253197767] [2024-12-02 08:02:25,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:25,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:26,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:27,158 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:27,158 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:27,158 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253197767] [2024-12-02 08:02:27,158 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [253197767] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:27,158 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:27,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:27,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018994394] [2024-12-02 08:02:27,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:27,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:27,159 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:27,159 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:27,159 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:27,159 INFO L87 Difference]: Start difference. First operand 1365 states and 1796 transitions. Second operand has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:27,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:27,352 INFO L93 Difference]: Finished difference Result 2210 states and 2933 transitions. [2024-12-02 08:02:27,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:27,353 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 706 [2024-12-02 08:02:27,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:27,354 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:27,354 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:27,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:27,355 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1108 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1111 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:27,355 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1111 Valid, 2221 Invalid, 255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:27,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:27,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:27,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.313927781871776) internal successors, (1783), 1357 states have internal predecessors, (1783), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:27,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1795 transitions. [2024-12-02 08:02:27,372 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1795 transitions. Word has length 706 [2024-12-02 08:02:27,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:27,372 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1795 transitions. [2024-12-02 08:02:27,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:27,373 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1795 transitions. [2024-12-02 08:02:27,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-12-02 08:02:27,375 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:27,376 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:27,376 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 08:02:27,376 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:27,376 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:27,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1244405638, now seen corresponding path program 1 times [2024-12-02 08:02:27,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:27,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130214132] [2024-12-02 08:02:27,377 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:27,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:27,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:28,386 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:28,387 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:28,387 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130214132] [2024-12-02 08:02:28,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1130214132] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:28,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:28,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:28,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205818039] [2024-12-02 08:02:28,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:28,388 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:28,388 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:28,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:28,389 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:28,389 INFO L87 Difference]: Start difference. First operand 1365 states and 1795 transitions. Second operand has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:28,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:28,596 INFO L93 Difference]: Finished difference Result 2210 states and 2931 transitions. [2024-12-02 08:02:28,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:28,597 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 707 [2024-12-02 08:02:28,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:28,598 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:28,598 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:28,598 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:28,599 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1100 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1103 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:28,599 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1103 Valid, 2221 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:28,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:28,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:28,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3131908621960207) internal successors, (1782), 1357 states have internal predecessors, (1782), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:28,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1794 transitions. [2024-12-02 08:02:28,616 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1794 transitions. Word has length 707 [2024-12-02 08:02:28,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:28,616 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1794 transitions. [2024-12-02 08:02:28,616 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:28,616 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1794 transitions. [2024-12-02 08:02:28,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-12-02 08:02:28,619 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:28,619 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:28,620 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 08:02:28,620 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:28,620 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:28,620 INFO L85 PathProgramCache]: Analyzing trace with hash -520808545, now seen corresponding path program 1 times [2024-12-02 08:02:28,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:28,620 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920550273] [2024-12-02 08:02:28,620 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:28,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:28,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:29,638 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:29,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:29,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920550273] [2024-12-02 08:02:29,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [920550273] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:29,638 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:29,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:29,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474659429] [2024-12-02 08:02:29,639 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:29,639 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:29,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:29,640 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:29,640 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:29,640 INFO L87 Difference]: Start difference. First operand 1365 states and 1794 transitions. Second operand has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:29,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:29,846 INFO L93 Difference]: Finished difference Result 2210 states and 2929 transitions. [2024-12-02 08:02:29,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:29,847 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 708 [2024-12-02 08:02:29,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:29,848 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:29,848 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:29,849 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:29,849 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1092 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1095 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:29,849 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1095 Valid, 2221 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:29,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:29,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:29,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3124539425202653) internal successors, (1781), 1357 states have internal predecessors, (1781), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:29,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1793 transitions. [2024-12-02 08:02:29,867 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1793 transitions. Word has length 708 [2024-12-02 08:02:29,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:29,867 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1793 transitions. [2024-12-02 08:02:29,867 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:29,867 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1793 transitions. [2024-12-02 08:02:29,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 710 [2024-12-02 08:02:29,870 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:29,871 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:29,871 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 08:02:29,871 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:29,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:29,871 INFO L85 PathProgramCache]: Analyzing trace with hash -804962927, now seen corresponding path program 1 times [2024-12-02 08:02:29,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:29,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640719976] [2024-12-02 08:02:29,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:29,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:30,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:31,114 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:31,114 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:31,114 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640719976] [2024-12-02 08:02:31,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1640719976] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:31,114 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:31,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:31,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1589134636] [2024-12-02 08:02:31,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:31,115 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:31,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:31,115 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:31,115 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:31,115 INFO L87 Difference]: Start difference. First operand 1365 states and 1793 transitions. Second operand has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:31,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:31,294 INFO L93 Difference]: Finished difference Result 2210 states and 2927 transitions. [2024-12-02 08:02:31,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:31,294 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 709 [2024-12-02 08:02:31,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:31,296 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:31,296 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:31,296 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:31,297 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1084 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 248 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1087 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 248 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:31,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1087 Valid, 2221 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 248 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:31,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:31,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:31,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3117170228445099) internal successors, (1780), 1357 states have internal predecessors, (1780), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:31,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1792 transitions. [2024-12-02 08:02:31,323 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1792 transitions. Word has length 709 [2024-12-02 08:02:31,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:31,323 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1792 transitions. [2024-12-02 08:02:31,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:31,324 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1792 transitions. [2024-12-02 08:02:31,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 711 [2024-12-02 08:02:31,328 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:31,329 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:31,329 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 08:02:31,329 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:31,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:31,330 INFO L85 PathProgramCache]: Analyzing trace with hash 544292106, now seen corresponding path program 1 times [2024-12-02 08:02:31,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:31,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210547578] [2024-12-02 08:02:31,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:31,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:31,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:32,399 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:32,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:32,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210547578] [2024-12-02 08:02:32,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1210547578] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:32,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:32,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:32,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123352135] [2024-12-02 08:02:32,400 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:32,400 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:32,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:32,401 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:32,401 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:32,401 INFO L87 Difference]: Start difference. First operand 1365 states and 1792 transitions. Second operand has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:32,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:32,593 INFO L93 Difference]: Finished difference Result 2210 states and 2925 transitions. [2024-12-02 08:02:32,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:32,594 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 710 [2024-12-02 08:02:32,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:32,595 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:32,595 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:32,596 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:32,596 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1076 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:32,596 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2221 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:32,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:32,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:32,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3109801031687547) internal successors, (1779), 1357 states have internal predecessors, (1779), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:32,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1791 transitions. [2024-12-02 08:02:32,624 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1791 transitions. Word has length 710 [2024-12-02 08:02:32,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:32,624 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1791 transitions. [2024-12-02 08:02:32,624 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:32,624 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1791 transitions. [2024-12-02 08:02:32,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 712 [2024-12-02 08:02:32,629 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:32,630 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:32,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 08:02:32,630 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:32,630 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:32,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1706561564, now seen corresponding path program 1 times [2024-12-02 08:02:32,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:32,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100375152] [2024-12-02 08:02:32,631 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:32,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:33,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:33,638 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:33,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:33,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100375152] [2024-12-02 08:02:33,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1100375152] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:33,638 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:33,638 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:33,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791336380] [2024-12-02 08:02:33,638 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:33,639 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:33,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:33,640 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:33,640 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:33,640 INFO L87 Difference]: Start difference. First operand 1365 states and 1791 transitions. Second operand has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:33,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:33,835 INFO L93 Difference]: Finished difference Result 2210 states and 2923 transitions. [2024-12-02 08:02:33,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:33,836 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 711 [2024-12-02 08:02:33,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:33,837 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:33,838 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:33,838 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:33,838 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1068 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1071 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 245 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:33,838 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1071 Valid, 2221 Invalid, 245 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:33,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:33,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:33,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3102431834929993) internal successors, (1778), 1357 states have internal predecessors, (1778), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:33,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1790 transitions. [2024-12-02 08:02:33,855 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1790 transitions. Word has length 711 [2024-12-02 08:02:33,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:33,855 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1790 transitions. [2024-12-02 08:02:33,856 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:33,856 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1790 transitions. [2024-12-02 08:02:33,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 713 [2024-12-02 08:02:33,859 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:33,859 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:33,859 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 08:02:33,859 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:33,859 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:33,859 INFO L85 PathProgramCache]: Analyzing trace with hash 479997685, now seen corresponding path program 1 times [2024-12-02 08:02:33,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:33,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241643917] [2024-12-02 08:02:33,860 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:33,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:34,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:34,879 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:34,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:34,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241643917] [2024-12-02 08:02:34,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241643917] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:34,879 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:34,879 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:34,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104750929] [2024-12-02 08:02:34,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:34,880 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:34,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:34,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:34,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:34,882 INFO L87 Difference]: Start difference. First operand 1365 states and 1790 transitions. Second operand has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:35,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:35,063 INFO L93 Difference]: Finished difference Result 2210 states and 2921 transitions. [2024-12-02 08:02:35,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:35,064 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 712 [2024-12-02 08:02:35,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:35,065 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:35,065 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:35,066 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:35,066 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1935 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1938 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:35,066 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1938 Valid, 2214 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:35,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:35,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:35,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3095062638172439) internal successors, (1777), 1357 states have internal predecessors, (1777), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:35,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1789 transitions. [2024-12-02 08:02:35,093 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1789 transitions. Word has length 712 [2024-12-02 08:02:35,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:35,093 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1789 transitions. [2024-12-02 08:02:35,093 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:35,093 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1789 transitions. [2024-12-02 08:02:35,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 714 [2024-12-02 08:02:35,098 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:35,099 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:35,099 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 08:02:35,099 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:35,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:35,099 INFO L85 PathProgramCache]: Analyzing trace with hash -1032825049, now seen corresponding path program 1 times [2024-12-02 08:02:35,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:35,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086728722] [2024-12-02 08:02:35,100 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:35,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:35,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:36,124 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:36,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:36,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1086728722] [2024-12-02 08:02:36,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1086728722] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:36,124 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:36,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:36,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194062369] [2024-12-02 08:02:36,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:36,125 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:36,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:36,125 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:36,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:36,126 INFO L87 Difference]: Start difference. First operand 1365 states and 1789 transitions. Second operand has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:36,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:36,298 INFO L93 Difference]: Finished difference Result 2210 states and 2919 transitions. [2024-12-02 08:02:36,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:36,299 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 713 [2024-12-02 08:02:36,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:36,300 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:36,300 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:36,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:36,301 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1919 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1922 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:36,301 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1922 Valid, 2214 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:36,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:36,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:36,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3087693441414885) internal successors, (1776), 1357 states have internal predecessors, (1776), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:36,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1788 transitions. [2024-12-02 08:02:36,317 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1788 transitions. Word has length 713 [2024-12-02 08:02:36,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:36,317 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1788 transitions. [2024-12-02 08:02:36,318 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:36,318 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1788 transitions. [2024-12-02 08:02:36,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-12-02 08:02:36,321 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:36,321 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:36,321 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 08:02:36,321 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:36,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:36,321 INFO L85 PathProgramCache]: Analyzing trace with hash -2107396768, now seen corresponding path program 1 times [2024-12-02 08:02:36,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:36,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045055098] [2024-12-02 08:02:36,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:36,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:36,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:37,419 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:37,419 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:37,419 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045055098] [2024-12-02 08:02:37,419 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2045055098] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:37,419 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:37,419 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:37,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679912924] [2024-12-02 08:02:37,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:37,420 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:37,420 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:37,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:37,421 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:37,421 INFO L87 Difference]: Start difference. First operand 1365 states and 1788 transitions. Second operand has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:37,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:37,607 INFO L93 Difference]: Finished difference Result 2210 states and 2917 transitions. [2024-12-02 08:02:37,607 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:37,607 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 714 [2024-12-02 08:02:37,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:37,609 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:37,609 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:37,609 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:37,610 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1903 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1906 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:37,610 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1906 Valid, 2214 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:37,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:37,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:37,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3080324244657333) internal successors, (1775), 1357 states have internal predecessors, (1775), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:37,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1787 transitions. [2024-12-02 08:02:37,626 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1787 transitions. Word has length 714 [2024-12-02 08:02:37,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:37,626 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1787 transitions. [2024-12-02 08:02:37,626 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:37,626 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1787 transitions. [2024-12-02 08:02:37,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-12-02 08:02:37,629 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:37,629 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:37,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-02 08:02:37,630 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:37,630 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:37,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1287246514, now seen corresponding path program 1 times [2024-12-02 08:02:37,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:37,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68156945] [2024-12-02 08:02:37,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:37,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:38,786 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:38,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:38,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68156945] [2024-12-02 08:02:38,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68156945] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:38,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:38,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:38,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238861750] [2024-12-02 08:02:38,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:38,787 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:38,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:38,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:38,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:38,789 INFO L87 Difference]: Start difference. First operand 1365 states and 1787 transitions. Second operand has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:39,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:39,011 INFO L93 Difference]: Finished difference Result 2210 states and 2915 transitions. [2024-12-02 08:02:39,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:39,011 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 715 [2024-12-02 08:02:39,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:39,013 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:39,013 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:39,014 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:39,014 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1036 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 236 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1039 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 236 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:39,014 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1039 Valid, 2221 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 236 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:02:39,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:39,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:39,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.307295504789978) internal successors, (1774), 1357 states have internal predecessors, (1774), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:39,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1786 transitions. [2024-12-02 08:02:39,042 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1786 transitions. Word has length 715 [2024-12-02 08:02:39,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:39,042 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1786 transitions. [2024-12-02 08:02:39,042 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:39,042 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1786 transitions. [2024-12-02 08:02:39,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 717 [2024-12-02 08:02:39,049 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:39,049 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:39,049 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 08:02:39,049 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:39,050 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:39,050 INFO L85 PathProgramCache]: Analyzing trace with hash 26572875, now seen corresponding path program 1 times [2024-12-02 08:02:39,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:39,050 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462271818] [2024-12-02 08:02:39,050 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:39,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:39,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:40,169 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:40,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:40,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1462271818] [2024-12-02 08:02:40,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1462271818] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:40,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:40,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:40,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1981487478] [2024-12-02 08:02:40,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:40,170 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:40,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:40,171 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:40,171 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:40,171 INFO L87 Difference]: Start difference. First operand 1365 states and 1786 transitions. Second operand has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:40,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:40,349 INFO L93 Difference]: Finished difference Result 2210 states and 2913 transitions. [2024-12-02 08:02:40,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:40,350 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 716 [2024-12-02 08:02:40,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:40,351 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:40,351 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:40,352 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:40,352 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1028 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 234 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1031 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 234 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:40,352 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1031 Valid, 2221 Invalid, 235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 234 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:40,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:40,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:40,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3065585851142225) internal successors, (1773), 1357 states have internal predecessors, (1773), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:40,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1785 transitions. [2024-12-02 08:02:40,368 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1785 transitions. Word has length 716 [2024-12-02 08:02:40,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:40,368 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1785 transitions. [2024-12-02 08:02:40,368 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:40,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1785 transitions. [2024-12-02 08:02:40,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 718 [2024-12-02 08:02:40,371 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:40,371 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:40,371 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-02 08:02:40,371 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:40,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:40,372 INFO L85 PathProgramCache]: Analyzing trace with hash 981484221, now seen corresponding path program 1 times [2024-12-02 08:02:40,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:40,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432398026] [2024-12-02 08:02:40,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:40,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:40,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:41,394 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:41,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:41,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432398026] [2024-12-02 08:02:41,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1432398026] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:41,394 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:41,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:41,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806085015] [2024-12-02 08:02:41,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:41,395 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:41,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:41,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:41,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:41,396 INFO L87 Difference]: Start difference. First operand 1365 states and 1785 transitions. Second operand has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:41,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:41,570 INFO L93 Difference]: Finished difference Result 2210 states and 2911 transitions. [2024-12-02 08:02:41,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:41,571 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 717 [2024-12-02 08:02:41,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:41,572 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:41,572 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:41,573 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:41,573 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1855 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1858 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:41,573 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1858 Valid, 2214 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:41,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:41,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:41,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3058216654384671) internal successors, (1772), 1357 states have internal predecessors, (1772), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:41,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1784 transitions. [2024-12-02 08:02:41,588 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1784 transitions. Word has length 717 [2024-12-02 08:02:41,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:41,588 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1784 transitions. [2024-12-02 08:02:41,588 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:41,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1784 transitions. [2024-12-02 08:02:41,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 719 [2024-12-02 08:02:41,591 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:41,591 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:41,591 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-02 08:02:41,591 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:41,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:41,592 INFO L85 PathProgramCache]: Analyzing trace with hash -1931522122, now seen corresponding path program 1 times [2024-12-02 08:02:41,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:41,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238283887] [2024-12-02 08:02:41,592 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:41,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:41,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:42,648 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:42,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:42,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238283887] [2024-12-02 08:02:42,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [238283887] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:42,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:42,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:42,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974762790] [2024-12-02 08:02:42,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:42,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:42,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:42,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:42,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:42,650 INFO L87 Difference]: Start difference. First operand 1365 states and 1784 transitions. Second operand has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:42,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:42,765 INFO L93 Difference]: Finished difference Result 2210 states and 2909 transitions. [2024-12-02 08:02:42,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:42,766 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 718 [2024-12-02 08:02:42,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:42,767 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:42,767 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:42,768 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:42,768 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1808 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1811 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:42,768 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1811 Valid, 2310 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:42,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:42,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:42,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.305084745762712) internal successors, (1771), 1357 states have internal predecessors, (1771), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:42,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1783 transitions. [2024-12-02 08:02:42,783 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1783 transitions. Word has length 718 [2024-12-02 08:02:42,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:42,783 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1783 transitions. [2024-12-02 08:02:42,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:42,784 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1783 transitions. [2024-12-02 08:02:42,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 720 [2024-12-02 08:02:42,786 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:42,787 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:42,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 08:02:42,787 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:42,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:42,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1324390584, now seen corresponding path program 1 times [2024-12-02 08:02:42,787 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:42,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676806964] [2024-12-02 08:02:42,787 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:42,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:43,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:43,839 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:43,839 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:43,839 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676806964] [2024-12-02 08:02:43,839 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676806964] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:43,839 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:43,839 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:43,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449889687] [2024-12-02 08:02:43,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:43,840 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:43,840 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:43,841 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:43,841 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:43,841 INFO L87 Difference]: Start difference. First operand 1365 states and 1783 transitions. Second operand has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:43,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:43,963 INFO L93 Difference]: Finished difference Result 2210 states and 2907 transitions. [2024-12-02 08:02:43,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:43,964 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 719 [2024-12-02 08:02:43,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:43,966 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:43,966 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:43,967 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:43,967 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 973 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 976 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:43,967 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [976 Valid, 2317 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:43,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:43,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:43,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3043478260869565) internal successors, (1770), 1357 states have internal predecessors, (1770), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:43,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1782 transitions. [2024-12-02 08:02:43,983 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1782 transitions. Word has length 719 [2024-12-02 08:02:43,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:43,983 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1782 transitions. [2024-12-02 08:02:43,983 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:43,983 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1782 transitions. [2024-12-02 08:02:43,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 721 [2024-12-02 08:02:43,986 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:43,986 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:43,986 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 08:02:43,986 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:43,987 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:43,987 INFO L85 PathProgramCache]: Analyzing trace with hash -1714490463, now seen corresponding path program 1 times [2024-12-02 08:02:43,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:43,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1510908458] [2024-12-02 08:02:43,987 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:43,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:44,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:45,051 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:45,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:45,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1510908458] [2024-12-02 08:02:45,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1510908458] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:45,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:45,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:45,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115247844] [2024-12-02 08:02:45,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:45,052 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:45,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:45,053 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:45,053 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:45,053 INFO L87 Difference]: Start difference. First operand 1365 states and 1782 transitions. Second operand has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:45,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:45,175 INFO L93 Difference]: Finished difference Result 2210 states and 2905 transitions. [2024-12-02 08:02:45,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:45,176 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 720 [2024-12-02 08:02:45,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:45,177 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:45,177 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:45,178 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:45,178 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1776 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1779 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:45,178 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1779 Valid, 2310 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:45,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:45,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:45,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3036109064112011) internal successors, (1769), 1357 states have internal predecessors, (1769), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:45,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1781 transitions. [2024-12-02 08:02:45,194 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1781 transitions. Word has length 720 [2024-12-02 08:02:45,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:45,194 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1781 transitions. [2024-12-02 08:02:45,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:45,194 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1781 transitions. [2024-12-02 08:02:45,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 722 [2024-12-02 08:02:45,197 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:45,197 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:45,197 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-02 08:02:45,197 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:45,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:45,198 INFO L85 PathProgramCache]: Analyzing trace with hash -451739565, now seen corresponding path program 1 times [2024-12-02 08:02:45,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:45,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [59607702] [2024-12-02 08:02:45,198 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:45,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:46,395 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:46,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:46,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [59607702] [2024-12-02 08:02:46,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [59607702] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:46,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:46,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:46,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [987815119] [2024-12-02 08:02:46,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:46,395 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:46,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:46,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:46,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:46,396 INFO L87 Difference]: Start difference. First operand 1365 states and 1781 transitions. Second operand has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:46,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:46,517 INFO L93 Difference]: Finished difference Result 2210 states and 2903 transitions. [2024-12-02 08:02:46,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:46,518 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 721 [2024-12-02 08:02:46,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:46,519 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:46,519 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:46,520 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:46,520 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 957 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 960 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:46,520 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [960 Valid, 2317 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:46,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:46,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:46,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3028739867354457) internal successors, (1768), 1357 states have internal predecessors, (1768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:46,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1780 transitions. [2024-12-02 08:02:46,536 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1780 transitions. Word has length 721 [2024-12-02 08:02:46,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:46,536 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1780 transitions. [2024-12-02 08:02:46,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:46,537 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1780 transitions. [2024-12-02 08:02:46,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 723 [2024-12-02 08:02:46,540 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:46,540 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:46,540 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-12-02 08:02:46,540 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:46,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:46,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1624384524, now seen corresponding path program 1 times [2024-12-02 08:02:46,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:46,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807028304] [2024-12-02 08:02:46,541 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:46,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:46,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:47,645 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:47,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:47,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807028304] [2024-12-02 08:02:47,645 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807028304] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:47,645 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:47,646 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:47,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486300002] [2024-12-02 08:02:47,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:47,646 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:47,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:47,647 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:47,647 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:47,647 INFO L87 Difference]: Start difference. First operand 1365 states and 1780 transitions. Second operand has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:47,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:47,770 INFO L93 Difference]: Finished difference Result 2210 states and 2901 transitions. [2024-12-02 08:02:47,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:47,771 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 722 [2024-12-02 08:02:47,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:47,772 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:47,772 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:47,773 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:47,773 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 949 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 952 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:47,773 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [952 Valid, 2317 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:47,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:47,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:47,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3021370670596906) internal successors, (1767), 1357 states have internal predecessors, (1767), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:47,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1779 transitions. [2024-12-02 08:02:47,789 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1779 transitions. Word has length 722 [2024-12-02 08:02:47,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:47,789 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1779 transitions. [2024-12-02 08:02:47,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:47,789 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1779 transitions. [2024-12-02 08:02:47,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-12-02 08:02:47,792 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:47,792 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:47,792 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-02 08:02:47,792 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:47,793 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:47,793 INFO L85 PathProgramCache]: Analyzing trace with hash 982961630, now seen corresponding path program 1 times [2024-12-02 08:02:47,793 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:47,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422415693] [2024-12-02 08:02:47,793 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:47,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:48,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:48,844 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:48,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:48,844 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422415693] [2024-12-02 08:02:48,844 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422415693] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:48,844 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:48,844 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:48,844 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280242327] [2024-12-02 08:02:48,844 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:48,845 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:48,845 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:48,846 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:48,846 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:48,846 INFO L87 Difference]: Start difference. First operand 1365 states and 1779 transitions. Second operand has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:48,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:48,965 INFO L93 Difference]: Finished difference Result 2210 states and 2899 transitions. [2024-12-02 08:02:48,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:48,966 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 723 [2024-12-02 08:02:48,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:48,967 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:48,967 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:48,968 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:48,968 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1728 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1731 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:48,968 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1731 Valid, 2310 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:48,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:48,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:48,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3014001473839352) internal successors, (1766), 1357 states have internal predecessors, (1766), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:48,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1778 transitions. [2024-12-02 08:02:48,987 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1778 transitions. Word has length 723 [2024-12-02 08:02:48,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:48,988 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1778 transitions. [2024-12-02 08:02:48,988 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:48,988 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1778 transitions. [2024-12-02 08:02:48,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 725 [2024-12-02 08:02:48,991 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:48,991 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:48,991 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 08:02:48,991 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:48,991 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:48,991 INFO L85 PathProgramCache]: Analyzing trace with hash 490119415, now seen corresponding path program 1 times [2024-12-02 08:02:48,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:48,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724098832] [2024-12-02 08:02:48,992 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:48,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:49,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:50,446 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:50,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:50,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724098832] [2024-12-02 08:02:50,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724098832] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:50,447 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:50,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:50,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863886825] [2024-12-02 08:02:50,447 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:50,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:50,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:50,448 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:50,448 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:50,448 INFO L87 Difference]: Start difference. First operand 1365 states and 1778 transitions. Second operand has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:50,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:50,564 INFO L93 Difference]: Finished difference Result 2210 states and 2897 transitions. [2024-12-02 08:02:50,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:50,565 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 724 [2024-12-02 08:02:50,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:50,566 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:50,566 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:50,566 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:50,567 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1712 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1715 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:50,567 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1715 Valid, 2310 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:50,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:50,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:50,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3006632277081798) internal successors, (1765), 1357 states have internal predecessors, (1765), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:50,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1777 transitions. [2024-12-02 08:02:50,583 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1777 transitions. Word has length 724 [2024-12-02 08:02:50,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:50,584 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1777 transitions. [2024-12-02 08:02:50,584 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:50,584 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1777 transitions. [2024-12-02 08:02:50,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-12-02 08:02:50,587 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:50,587 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:50,587 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 08:02:50,587 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:50,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:50,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1694928873, now seen corresponding path program 1 times [2024-12-02 08:02:50,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:50,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083941337] [2024-12-02 08:02:50,588 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:50,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:50,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:51,714 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:51,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:51,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1083941337] [2024-12-02 08:02:51,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1083941337] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:51,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:51,715 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:51,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805464393] [2024-12-02 08:02:51,715 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:51,715 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:51,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:51,716 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:51,716 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:51,716 INFO L87 Difference]: Start difference. First operand 1365 states and 1777 transitions. Second operand has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:51,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:51,816 INFO L93 Difference]: Finished difference Result 2210 states and 2895 transitions. [2024-12-02 08:02:51,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:51,816 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 725 [2024-12-02 08:02:51,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:51,818 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:51,818 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:51,819 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:51,819 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1696 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1699 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:51,819 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1699 Valid, 2310 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:51,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:51,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:51,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2999263080324244) internal successors, (1764), 1357 states have internal predecessors, (1764), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:51,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1776 transitions. [2024-12-02 08:02:51,834 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1776 transitions. Word has length 725 [2024-12-02 08:02:51,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:51,835 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1776 transitions. [2024-12-02 08:02:51,835 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:51,835 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1776 transitions. [2024-12-02 08:02:51,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 727 [2024-12-02 08:02:51,838 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:51,838 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:51,838 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-02 08:02:51,838 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:51,839 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:51,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1294608994, now seen corresponding path program 1 times [2024-12-02 08:02:51,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:51,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757402169] [2024-12-02 08:02:51,839 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:51,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:52,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:52,939 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:52,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:52,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757402169] [2024-12-02 08:02:52,939 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1757402169] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:52,939 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:52,939 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:52,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249182356] [2024-12-02 08:02:52,940 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:52,940 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:52,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:52,941 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:52,941 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:52,941 INFO L87 Difference]: Start difference. First operand 1365 states and 1776 transitions. Second operand has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:53,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:53,028 INFO L93 Difference]: Finished difference Result 2210 states and 2893 transitions. [2024-12-02 08:02:53,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:53,029 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 726 [2024-12-02 08:02:53,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:53,030 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:53,030 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:53,030 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:53,031 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 902 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 905 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:53,031 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [905 Valid, 2365 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:53,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:53,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:53,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2991893883566692) internal successors, (1763), 1357 states have internal predecessors, (1763), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:53,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1775 transitions. [2024-12-02 08:02:53,046 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1775 transitions. Word has length 726 [2024-12-02 08:02:53,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:53,047 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1775 transitions. [2024-12-02 08:02:53,047 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:53,047 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1775 transitions. [2024-12-02 08:02:53,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 728 [2024-12-02 08:02:53,050 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:53,050 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:53,050 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 08:02:53,050 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:53,051 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:53,051 INFO L85 PathProgramCache]: Analyzing trace with hash -2027026828, now seen corresponding path program 1 times [2024-12-02 08:02:53,051 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:53,051 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3899652] [2024-12-02 08:02:53,051 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:53,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:53,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:54,239 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:54,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:54,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3899652] [2024-12-02 08:02:54,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [3899652] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:54,240 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:54,240 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:54,240 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881110751] [2024-12-02 08:02:54,240 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:54,241 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:54,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:54,241 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:54,242 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:54,242 INFO L87 Difference]: Start difference. First operand 1365 states and 1775 transitions. Second operand has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:54,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:54,317 INFO L93 Difference]: Finished difference Result 2210 states and 2891 transitions. [2024-12-02 08:02:54,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:54,318 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 727 [2024-12-02 08:02:54,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:54,319 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:54,319 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:54,319 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:54,320 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1649 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1652 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:54,320 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1652 Valid, 2358 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:54,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:54,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:54,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2984524686809138) internal successors, (1762), 1357 states have internal predecessors, (1762), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:54,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1774 transitions. [2024-12-02 08:02:54,336 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1774 transitions. Word has length 727 [2024-12-02 08:02:54,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:54,336 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1774 transitions. [2024-12-02 08:02:54,336 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:54,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1774 transitions. [2024-12-02 08:02:54,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 729 [2024-12-02 08:02:54,339 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:54,340 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:54,340 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-02 08:02:54,340 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:54,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:54,340 INFO L85 PathProgramCache]: Analyzing trace with hash -239435699, now seen corresponding path program 1 times [2024-12-02 08:02:54,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:54,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282683668] [2024-12-02 08:02:54,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:54,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:54,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:55,453 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:55,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:55,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1282683668] [2024-12-02 08:02:55,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1282683668] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:55,453 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:55,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:55,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511223854] [2024-12-02 08:02:55,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:55,454 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:55,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:55,454 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:55,455 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:55,455 INFO L87 Difference]: Start difference. First operand 1365 states and 1774 transitions. Second operand has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:55,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:55,536 INFO L93 Difference]: Finished difference Result 2210 states and 2889 transitions. [2024-12-02 08:02:55,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:55,536 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 728 [2024-12-02 08:02:55,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:55,538 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:55,538 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:55,538 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:55,538 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1633 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1636 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:55,539 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1636 Valid, 2358 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:55,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:55,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:55,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2977155490051584) internal successors, (1761), 1357 states have internal predecessors, (1761), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:55,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1773 transitions. [2024-12-02 08:02:55,555 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1773 transitions. Word has length 728 [2024-12-02 08:02:55,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:55,555 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1773 transitions. [2024-12-02 08:02:55,555 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:55,555 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1773 transitions. [2024-12-02 08:02:55,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2024-12-02 08:02:55,558 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:55,558 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:55,558 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90 [2024-12-02 08:02:55,558 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:55,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:55,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1396240767, now seen corresponding path program 1 times [2024-12-02 08:02:55,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:55,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911047856] [2024-12-02 08:02:55,559 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:55,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:55,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:56,658 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:56,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:56,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911047856] [2024-12-02 08:02:56,659 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1911047856] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:56,659 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:56,659 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:56,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664355619] [2024-12-02 08:02:56,659 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:56,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:56,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:56,660 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:56,660 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:56,660 INFO L87 Difference]: Start difference. First operand 1365 states and 1773 transitions. Second operand has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:56,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:56,744 INFO L93 Difference]: Finished difference Result 2210 states and 2887 transitions. [2024-12-02 08:02:56,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:56,744 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 729 [2024-12-02 08:02:56,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:56,746 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:56,746 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:56,746 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:56,746 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 878 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 881 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:56,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [881 Valid, 2365 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:02:56,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:56,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:56,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.296978629329403) internal successors, (1760), 1357 states have internal predecessors, (1760), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:56,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1772 transitions. [2024-12-02 08:02:56,762 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1772 transitions. Word has length 729 [2024-12-02 08:02:56,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:56,762 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1772 transitions. [2024-12-02 08:02:56,762 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:56,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1772 transitions. [2024-12-02 08:02:56,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 731 [2024-12-02 08:02:56,765 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:56,765 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:56,766 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-12-02 08:02:56,766 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:56,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:56,766 INFO L85 PathProgramCache]: Analyzing trace with hash -824876360, now seen corresponding path program 1 times [2024-12-02 08:02:56,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:56,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924717347] [2024-12-02 08:02:56,766 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:56,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:57,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:58,000 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:58,000 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:58,000 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924717347] [2024-12-02 08:02:58,000 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924717347] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:58,000 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:58,000 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:58,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443056324] [2024-12-02 08:02:58,000 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:58,001 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:58,001 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:58,001 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:58,001 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:58,001 INFO L87 Difference]: Start difference. First operand 1365 states and 1772 transitions. Second operand has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:58,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:58,064 INFO L93 Difference]: Finished difference Result 2210 states and 2885 transitions. [2024-12-02 08:02:58,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:58,064 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 730 [2024-12-02 08:02:58,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:58,066 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:58,066 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:58,066 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:58,066 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 863 mSDsluCounter, 1199 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 866 SdHoareTripleChecker+Valid, 2389 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:58,067 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [866 Valid, 2389 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:02:58,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:58,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:58,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2962417096536478) internal successors, (1759), 1357 states have internal predecessors, (1759), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:58,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1771 transitions. [2024-12-02 08:02:58,082 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1771 transitions. Word has length 730 [2024-12-02 08:02:58,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:58,082 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1771 transitions. [2024-12-02 08:02:58,082 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:58,082 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1771 transitions. [2024-12-02 08:02:58,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2024-12-02 08:02:58,085 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:58,085 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:58,085 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-12-02 08:02:58,085 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:58,086 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:58,086 INFO L85 PathProgramCache]: Analyzing trace with hash 716378378, now seen corresponding path program 1 times [2024-12-02 08:02:58,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:58,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136758900] [2024-12-02 08:02:58,086 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:58,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:58,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:02:59,298 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:02:59,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:02:59,298 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136758900] [2024-12-02 08:02:59,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1136758900] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:02:59,298 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:02:59,299 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:02:59,299 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372505647] [2024-12-02 08:02:59,299 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:02:59,300 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:02:59,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:02:59,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:02:59,300 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:02:59,301 INFO L87 Difference]: Start difference. First operand 1365 states and 1771 transitions. Second operand has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:59,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:02:59,361 INFO L93 Difference]: Finished difference Result 2210 states and 2883 transitions. [2024-12-02 08:02:59,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:02:59,361 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 731 [2024-12-02 08:02:59,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:02:59,363 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:02:59,363 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:02:59,363 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:02:59,363 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 855 mSDsluCounter, 1199 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 858 SdHoareTripleChecker+Valid, 2389 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:02:59,363 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [858 Valid, 2389 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:02:59,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:02:59,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:02:59,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2955047899778924) internal successors, (1758), 1357 states have internal predecessors, (1758), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:02:59,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1770 transitions. [2024-12-02 08:02:59,378 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1770 transitions. Word has length 731 [2024-12-02 08:02:59,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:02:59,379 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1770 transitions. [2024-12-02 08:02:59,379 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:02:59,379 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1770 transitions. [2024-12-02 08:02:59,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 733 [2024-12-02 08:02:59,381 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:02:59,382 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:02:59,382 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-12-02 08:02:59,382 INFO L396 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:02:59,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:02:59,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1421307485, now seen corresponding path program 1 times [2024-12-02 08:02:59,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:02:59,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1902565451] [2024-12-02 08:02:59,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:02:59,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:02:59,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:00,567 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:00,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:00,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1902565451] [2024-12-02 08:03:00,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1902565451] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:00,567 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:00,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:00,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303028669] [2024-12-02 08:03:00,567 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:00,568 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:00,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:00,569 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:00,569 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:00,569 INFO L87 Difference]: Start difference. First operand 1365 states and 1770 transitions. Second operand has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:00,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:00,926 INFO L93 Difference]: Finished difference Result 2210 states and 2881 transitions. [2024-12-02 08:03:00,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:00,926 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 732 [2024-12-02 08:03:00,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:00,928 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:00,928 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:00,929 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:00,929 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 1556 mSDsluCounter, 933 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1559 SdHoareTripleChecker+Valid, 1864 SdHoareTripleChecker+Invalid, 553 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:00,929 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1559 Valid, 1864 Invalid, 553 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 552 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:03:00,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:00,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:00,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.294767870302137) internal successors, (1757), 1357 states have internal predecessors, (1757), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:00,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1769 transitions. [2024-12-02 08:03:00,956 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1769 transitions. Word has length 732 [2024-12-02 08:03:00,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:00,956 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1769 transitions. [2024-12-02 08:03:00,956 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:00,956 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1769 transitions. [2024-12-02 08:03:00,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-12-02 08:03:00,961 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:00,962 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:00,962 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94 [2024-12-02 08:03:00,962 INFO L396 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:00,962 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:00,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1049109781, now seen corresponding path program 1 times [2024-12-02 08:03:00,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:00,962 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764890002] [2024-12-02 08:03:00,963 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:00,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:02,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:03,476 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:03,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:03,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764890002] [2024-12-02 08:03:03,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764890002] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:03,476 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:03,476 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:03:03,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574384989] [2024-12-02 08:03:03,476 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:03,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:03:03,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:03,477 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:03:03,477 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:03:03,477 INFO L87 Difference]: Start difference. First operand 1365 states and 1769 transitions. Second operand has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:03,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:03,528 INFO L93 Difference]: Finished difference Result 2210 states and 2879 transitions. [2024-12-02 08:03:03,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:03,528 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 733 [2024-12-02 08:03:03,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:03,530 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:03,530 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:03,531 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:03,531 INFO L435 NwaCegarLoop]: 1189 mSDtfsCounter, 722 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 722 SdHoareTripleChecker+Valid, 2380 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:03,531 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [722 Valid, 2380 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:03:03,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:03,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:03,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2940309506263816) internal successors, (1756), 1357 states have internal predecessors, (1756), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:03,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1768 transitions. [2024-12-02 08:03:03,547 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1768 transitions. Word has length 733 [2024-12-02 08:03:03,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:03,547 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1768 transitions. [2024-12-02 08:03:03,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:03,547 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1768 transitions. [2024-12-02 08:03:03,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-12-02 08:03:03,550 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:03,550 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:03,550 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95 [2024-12-02 08:03:03,550 INFO L396 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:03,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:03,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1275586929, now seen corresponding path program 1 times [2024-12-02 08:03:03,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:03,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368840160] [2024-12-02 08:03:03,551 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:03,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:05,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:05,915 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:05,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:05,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368840160] [2024-12-02 08:03:05,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1368840160] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:05,915 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:05,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:05,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917444114] [2024-12-02 08:03:05,916 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:05,916 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:05,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:05,916 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:05,916 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:05,916 INFO L87 Difference]: Start difference. First operand 1365 states and 1768 transitions. Second operand has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:05,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:05,998 INFO L93 Difference]: Finished difference Result 2210 states and 2877 transitions. [2024-12-02 08:03:05,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:05,999 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 734 [2024-12-02 08:03:05,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:06,000 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:06,000 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:06,001 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:06,001 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1805 mSDsluCounter, 1176 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1805 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:06,001 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1805 Valid, 2350 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:03:06,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:06,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:06,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2932940309506264) internal successors, (1755), 1357 states have internal predecessors, (1755), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:06,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1767 transitions. [2024-12-02 08:03:06,017 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1767 transitions. Word has length 734 [2024-12-02 08:03:06,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:06,017 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1767 transitions. [2024-12-02 08:03:06,017 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:06,017 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1767 transitions. [2024-12-02 08:03:06,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2024-12-02 08:03:06,020 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:06,020 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:06,020 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96 [2024-12-02 08:03:06,021 INFO L396 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:06,021 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:06,021 INFO L85 PathProgramCache]: Analyzing trace with hash 517215829, now seen corresponding path program 1 times [2024-12-02 08:03:06,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:06,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715943790] [2024-12-02 08:03:06,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:06,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:07,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:08,507 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:08,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:08,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715943790] [2024-12-02 08:03:08,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1715943790] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:08,508 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:08,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:08,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037562982] [2024-12-02 08:03:08,508 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:08,509 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:08,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:08,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:08,509 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:08,510 INFO L87 Difference]: Start difference. First operand 1365 states and 1767 transitions. Second operand has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:08,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:08,599 INFO L93 Difference]: Finished difference Result 2210 states and 2875 transitions. [2024-12-02 08:03:08,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:08,599 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 735 [2024-12-02 08:03:08,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:08,601 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:08,601 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:08,601 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:08,602 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1056 mSDsluCounter, 1183 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2357 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:08,602 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2357 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:08,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:08,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:08,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.292557111274871) internal successors, (1754), 1357 states have internal predecessors, (1754), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:08,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1766 transitions. [2024-12-02 08:03:08,617 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1766 transitions. Word has length 735 [2024-12-02 08:03:08,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:08,618 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1766 transitions. [2024-12-02 08:03:08,618 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:08,618 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1766 transitions. [2024-12-02 08:03:08,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 737 [2024-12-02 08:03:08,621 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:08,621 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:08,621 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable97 [2024-12-02 08:03:08,621 INFO L396 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:08,621 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:08,622 INFO L85 PathProgramCache]: Analyzing trace with hash 290647682, now seen corresponding path program 1 times [2024-12-02 08:03:08,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:08,622 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52022282] [2024-12-02 08:03:08,622 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:08,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:10,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:10,875 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:10,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:10,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52022282] [2024-12-02 08:03:10,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [52022282] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:10,875 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:10,875 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:03:10,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598803301] [2024-12-02 08:03:10,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:10,875 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:03:10,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:10,876 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:03:10,876 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:03:10,876 INFO L87 Difference]: Start difference. First operand 1365 states and 1766 transitions. Second operand has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:10,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:10,957 INFO L93 Difference]: Finished difference Result 2210 states and 2873 transitions. [2024-12-02 08:03:10,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:10,957 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 736 [2024-12-02 08:03:10,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:10,959 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:10,959 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:10,959 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:10,959 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 731 mSDsluCounter, 1176 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 731 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:10,959 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [731 Valid, 2350 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:10,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:10,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:10,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2918201915991157) internal successors, (1753), 1357 states have internal predecessors, (1753), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:10,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1765 transitions. [2024-12-02 08:03:10,974 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1765 transitions. Word has length 736 [2024-12-02 08:03:10,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:10,975 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1765 transitions. [2024-12-02 08:03:10,975 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:10,975 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1765 transitions. [2024-12-02 08:03:10,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 738 [2024-12-02 08:03:10,978 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:10,978 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:10,978 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable98 [2024-12-02 08:03:10,978 INFO L396 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:10,978 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:10,978 INFO L85 PathProgramCache]: Analyzing trace with hash 1703199876, now seen corresponding path program 1 times [2024-12-02 08:03:10,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:10,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875360952] [2024-12-02 08:03:10,978 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:10,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:12,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:13,343 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:13,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:13,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875360952] [2024-12-02 08:03:13,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1875360952] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:13,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:13,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:13,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437400645] [2024-12-02 08:03:13,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:13,344 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:13,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:13,344 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:13,344 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:13,344 INFO L87 Difference]: Start difference. First operand 1365 states and 1765 transitions. Second operand has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:13,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:13,482 INFO L93 Difference]: Finished difference Result 2210 states and 2871 transitions. [2024-12-02 08:03:13,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:13,483 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 737 [2024-12-02 08:03:13,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:13,484 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:13,484 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:13,485 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:13,485 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1840 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1840 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:13,485 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1840 Valid, 2288 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:13,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:13,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:13,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2910832719233603) internal successors, (1752), 1357 states have internal predecessors, (1752), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:13,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1764 transitions. [2024-12-02 08:03:13,501 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1764 transitions. Word has length 737 [2024-12-02 08:03:13,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:13,501 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1764 transitions. [2024-12-02 08:03:13,502 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:13,502 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1764 transitions. [2024-12-02 08:03:13,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-12-02 08:03:13,505 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:13,505 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:13,505 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable99 [2024-12-02 08:03:13,506 INFO L396 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:13,506 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:13,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1741512288, now seen corresponding path program 1 times [2024-12-02 08:03:13,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:13,506 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835720549] [2024-12-02 08:03:13,506 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:13,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:14,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:15,963 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:15,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:15,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835720549] [2024-12-02 08:03:15,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1835720549] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:15,963 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:15,963 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:15,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501902306] [2024-12-02 08:03:15,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:15,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:15,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:15,964 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:15,964 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:15,964 INFO L87 Difference]: Start difference. First operand 1365 states and 1764 transitions. Second operand has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:16,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:16,097 INFO L93 Difference]: Finished difference Result 2210 states and 2869 transitions. [2024-12-02 08:03:16,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:16,098 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 738 [2024-12-02 08:03:16,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:16,099 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:16,099 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:16,099 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:16,099 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1830 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1830 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:16,100 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1830 Valid, 2288 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:16,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:16,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:16,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.290346352247605) internal successors, (1751), 1357 states have internal predecessors, (1751), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:16,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1763 transitions. [2024-12-02 08:03:16,122 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1763 transitions. Word has length 738 [2024-12-02 08:03:16,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:16,122 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1763 transitions. [2024-12-02 08:03:16,122 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:16,122 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1763 transitions. [2024-12-02 08:03:16,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2024-12-02 08:03:16,127 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:16,127 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:16,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100 [2024-12-02 08:03:16,128 INFO L396 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:16,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:16,128 INFO L85 PathProgramCache]: Analyzing trace with hash -484429613, now seen corresponding path program 1 times [2024-12-02 08:03:16,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:16,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285551480] [2024-12-02 08:03:16,128 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:16,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:17,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:18,738 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:18,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:18,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285551480] [2024-12-02 08:03:18,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285551480] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:18,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:18,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:03:18,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554471932] [2024-12-02 08:03:18,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:18,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:03:18,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:18,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:03:18,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:03:18,739 INFO L87 Difference]: Start difference. First operand 1365 states and 1763 transitions. Second operand has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:18,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:18,850 INFO L93 Difference]: Finished difference Result 2210 states and 2867 transitions. [2024-12-02 08:03:18,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:18,851 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 739 [2024-12-02 08:03:18,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:18,852 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:18,852 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:18,853 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:18,853 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 784 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 784 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:18,853 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [784 Valid, 2288 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:18,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:18,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:18,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2896094325718497) internal successors, (1750), 1357 states have internal predecessors, (1750), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:18,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1762 transitions. [2024-12-02 08:03:18,869 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1762 transitions. Word has length 739 [2024-12-02 08:03:18,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:18,869 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1762 transitions. [2024-12-02 08:03:18,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:18,870 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1762 transitions. [2024-12-02 08:03:18,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 741 [2024-12-02 08:03:18,872 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:18,873 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:18,873 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable101 [2024-12-02 08:03:18,873 INFO L396 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:18,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:18,873 INFO L85 PathProgramCache]: Analyzing trace with hash 1334082065, now seen corresponding path program 1 times [2024-12-02 08:03:18,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:18,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002607888] [2024-12-02 08:03:18,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:18,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:20,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:21,512 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:21,512 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:21,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002607888] [2024-12-02 08:03:21,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002607888] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:21,512 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:21,512 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:21,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731607308] [2024-12-02 08:03:21,512 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:21,513 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:21,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:21,513 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:21,513 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:21,514 INFO L87 Difference]: Start difference. First operand 1365 states and 1762 transitions. Second operand has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:21,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:21,633 INFO L93 Difference]: Finished difference Result 2210 states and 2865 transitions. [2024-12-02 08:03:21,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:21,633 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 740 [2024-12-02 08:03:21,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:21,635 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:21,635 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:21,636 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:21,636 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1810 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1810 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:21,636 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1810 Valid, 2288 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:21,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:21,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:21,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2888725128960943) internal successors, (1749), 1357 states have internal predecessors, (1749), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:21,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1761 transitions. [2024-12-02 08:03:21,656 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1761 transitions. Word has length 740 [2024-12-02 08:03:21,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:21,657 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1761 transitions. [2024-12-02 08:03:21,657 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:21,657 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1761 transitions. [2024-12-02 08:03:21,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-12-02 08:03:21,662 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:21,662 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:21,662 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102 [2024-12-02 08:03:21,662 INFO L396 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:21,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:21,663 INFO L85 PathProgramCache]: Analyzing trace with hash 2118395810, now seen corresponding path program 1 times [2024-12-02 08:03:21,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:21,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061310689] [2024-12-02 08:03:21,663 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:21,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:23,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:24,334 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:24,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:24,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061310689] [2024-12-02 08:03:24,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2061310689] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:24,334 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:24,334 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:24,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896126966] [2024-12-02 08:03:24,334 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:24,335 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:24,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:24,335 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:24,335 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:24,335 INFO L87 Difference]: Start difference. First operand 1365 states and 1761 transitions. Second operand has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:24,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:24,471 INFO L93 Difference]: Finished difference Result 2210 states and 2863 transitions. [2024-12-02 08:03:24,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:24,472 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 741 [2024-12-02 08:03:24,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:24,473 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:24,473 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:24,473 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:24,474 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1035 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1035 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:24,474 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1035 Valid, 2295 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:24,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:24,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:24,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2881355932203389) internal successors, (1748), 1357 states have internal predecessors, (1748), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:24,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1760 transitions. [2024-12-02 08:03:24,494 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1760 transitions. Word has length 741 [2024-12-02 08:03:24,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:24,494 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1760 transitions. [2024-12-02 08:03:24,494 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:24,494 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1760 transitions. [2024-12-02 08:03:24,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 743 [2024-12-02 08:03:24,497 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:24,497 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:24,497 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable103 [2024-12-02 08:03:24,497 INFO L396 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:24,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:24,498 INFO L85 PathProgramCache]: Analyzing trace with hash -713187326, now seen corresponding path program 1 times [2024-12-02 08:03:24,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:24,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360876321] [2024-12-02 08:03:24,498 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:24,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:26,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:27,299 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:27,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:27,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360876321] [2024-12-02 08:03:27,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1360876321] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:27,299 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:27,299 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:27,299 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029189704] [2024-12-02 08:03:27,299 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:27,299 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:27,299 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:27,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:27,300 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:27,300 INFO L87 Difference]: Start difference. First operand 1365 states and 1760 transitions. Second operand has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:27,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:27,413 INFO L93 Difference]: Finished difference Result 2210 states and 2861 transitions. [2024-12-02 08:03:27,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:27,413 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 742 [2024-12-02 08:03:27,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:27,414 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:27,415 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:27,415 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:27,415 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1034 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1034 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:27,415 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1034 Valid, 2295 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:27,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:27,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:27,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2873986735445837) internal successors, (1747), 1357 states have internal predecessors, (1747), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:27,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1759 transitions. [2024-12-02 08:03:27,431 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1759 transitions. Word has length 742 [2024-12-02 08:03:27,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:27,431 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1759 transitions. [2024-12-02 08:03:27,431 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:27,431 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1759 transitions. [2024-12-02 08:03:27,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 744 [2024-12-02 08:03:27,436 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:27,436 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:27,437 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104 [2024-12-02 08:03:27,437 INFO L396 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:27,437 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:27,437 INFO L85 PathProgramCache]: Analyzing trace with hash 2119497969, now seen corresponding path program 1 times [2024-12-02 08:03:27,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:27,437 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221327349] [2024-12-02 08:03:27,437 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:27,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:29,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:30,140 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:30,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:30,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221327349] [2024-12-02 08:03:30,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [221327349] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:30,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:30,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:03:30,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258997491] [2024-12-02 08:03:30,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:30,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:03:30,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:30,141 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:03:30,141 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:03:30,141 INFO L87 Difference]: Start difference. First operand 1365 states and 1759 transitions. Second operand has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:30,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:30,248 INFO L93 Difference]: Finished difference Result 2210 states and 2859 transitions. [2024-12-02 08:03:30,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:30,249 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 743 [2024-12-02 08:03:30,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:30,250 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:30,250 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:30,251 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:30,251 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 748 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 748 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:30,251 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [748 Valid, 2288 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:30,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:30,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:30,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2866617538688283) internal successors, (1746), 1357 states have internal predecessors, (1746), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:30,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1758 transitions. [2024-12-02 08:03:30,267 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1758 transitions. Word has length 743 [2024-12-02 08:03:30,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:30,267 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1758 transitions. [2024-12-02 08:03:30,267 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:30,267 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1758 transitions. [2024-12-02 08:03:30,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 745 [2024-12-02 08:03:30,270 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:30,270 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:30,270 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable105 [2024-12-02 08:03:30,270 INFO L396 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:30,270 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:30,270 INFO L85 PathProgramCache]: Analyzing trace with hash 466731891, now seen corresponding path program 1 times [2024-12-02 08:03:30,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:30,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576464869] [2024-12-02 08:03:30,271 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:30,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:32,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:33,273 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:33,273 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:33,273 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576464869] [2024-12-02 08:03:33,273 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [576464869] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:33,273 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:33,273 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:33,273 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1009136690] [2024-12-02 08:03:33,273 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:33,274 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:33,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:33,274 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:33,274 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:33,274 INFO L87 Difference]: Start difference. First operand 1365 states and 1758 transitions. Second operand has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:33,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:33,498 INFO L93 Difference]: Finished difference Result 2210 states and 2857 transitions. [2024-12-02 08:03:33,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:33,498 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 744 [2024-12-02 08:03:33,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:33,499 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:33,499 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:33,500 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:33,500 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1001 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1001 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:33,500 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1001 Valid, 2169 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:33,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:33,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:33,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.285924834193073) internal successors, (1745), 1357 states have internal predecessors, (1745), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:33,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1757 transitions. [2024-12-02 08:03:33,519 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1757 transitions. Word has length 744 [2024-12-02 08:03:33,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:33,519 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1757 transitions. [2024-12-02 08:03:33,519 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:33,519 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1757 transitions. [2024-12-02 08:03:33,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 746 [2024-12-02 08:03:33,522 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:33,522 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:33,522 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106 [2024-12-02 08:03:33,522 INFO L396 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:33,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:33,522 INFO L85 PathProgramCache]: Analyzing trace with hash -313473577, now seen corresponding path program 1 times [2024-12-02 08:03:33,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:33,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737480144] [2024-12-02 08:03:33,522 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:33,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:35,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:36,271 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:36,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:36,271 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737480144] [2024-12-02 08:03:36,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737480144] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:36,271 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:36,271 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:36,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23048673] [2024-12-02 08:03:36,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:36,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:36,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:36,273 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:36,273 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:36,273 INFO L87 Difference]: Start difference. First operand 1365 states and 1757 transitions. Second operand has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:36,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:36,464 INFO L93 Difference]: Finished difference Result 2210 states and 2855 transitions. [2024-12-02 08:03:36,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:36,464 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 745 [2024-12-02 08:03:36,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:36,465 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:36,465 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:36,466 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:36,466 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1897 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1897 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:36,466 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1897 Valid, 2162 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:36,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:36,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:36,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2851879145173175) internal successors, (1744), 1357 states have internal predecessors, (1744), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:36,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1756 transitions. [2024-12-02 08:03:36,482 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1756 transitions. Word has length 745 [2024-12-02 08:03:36,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:36,482 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1756 transitions. [2024-12-02 08:03:36,482 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:36,482 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1756 transitions. [2024-12-02 08:03:36,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2024-12-02 08:03:36,485 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:36,485 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:36,485 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107 [2024-12-02 08:03:36,485 INFO L396 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:36,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:36,485 INFO L85 PathProgramCache]: Analyzing trace with hash 2070102596, now seen corresponding path program 1 times [2024-12-02 08:03:36,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:36,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360318169] [2024-12-02 08:03:36,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:36,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:38,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:39,299 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:39,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:39,299 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [360318169] [2024-12-02 08:03:39,299 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [360318169] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:39,299 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:39,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:39,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057329800] [2024-12-02 08:03:39,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:39,300 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:39,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:39,300 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:39,300 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:39,300 INFO L87 Difference]: Start difference. First operand 1365 states and 1756 transitions. Second operand has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:39,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:39,481 INFO L93 Difference]: Finished difference Result 2210 states and 2853 transitions. [2024-12-02 08:03:39,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:39,481 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 746 [2024-12-02 08:03:39,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:39,483 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:39,483 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:39,483 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:39,483 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1887 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1887 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:39,483 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1887 Valid, 2162 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:03:39,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:39,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:39,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2844509948415623) internal successors, (1743), 1357 states have internal predecessors, (1743), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:39,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1755 transitions. [2024-12-02 08:03:39,499 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1755 transitions. Word has length 746 [2024-12-02 08:03:39,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:39,499 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1755 transitions. [2024-12-02 08:03:39,499 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:39,499 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1755 transitions. [2024-12-02 08:03:39,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2024-12-02 08:03:39,502 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:39,502 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:39,502 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable108 [2024-12-02 08:03:39,502 INFO L396 AbstractCegarLoop]: === Iteration 110 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:39,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:39,503 INFO L85 PathProgramCache]: Analyzing trace with hash 980789830, now seen corresponding path program 1 times [2024-12-02 08:03:39,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:39,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073236016] [2024-12-02 08:03:39,503 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:39,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:41,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:42,181 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:42,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:42,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073236016] [2024-12-02 08:03:42,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073236016] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:42,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:42,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:42,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245693579] [2024-12-02 08:03:42,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:42,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:42,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:42,182 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:42,182 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:42,183 INFO L87 Difference]: Start difference. First operand 1365 states and 1755 transitions. Second operand has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:42,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:42,400 INFO L93 Difference]: Finished difference Result 2210 states and 2851 transitions. [2024-12-02 08:03:42,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:42,401 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 747 [2024-12-02 08:03:42,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:42,402 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:42,402 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:42,403 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:42,403 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1877 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1877 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:42,403 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1877 Valid, 2162 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 224 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:42,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:42,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:42,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.283714075165807) internal successors, (1742), 1357 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:42,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1754 transitions. [2024-12-02 08:03:42,419 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1754 transitions. Word has length 747 [2024-12-02 08:03:42,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:42,419 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1754 transitions. [2024-12-02 08:03:42,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:42,419 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1754 transitions. [2024-12-02 08:03:42,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 749 [2024-12-02 08:03:42,422 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:42,422 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:42,422 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable109 [2024-12-02 08:03:42,422 INFO L396 AbstractCegarLoop]: === Iteration 111 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:42,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:42,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1130260117, now seen corresponding path program 1 times [2024-12-02 08:03:42,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:42,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599688688] [2024-12-02 08:03:42,422 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:42,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:44,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:45,394 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:45,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:45,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599688688] [2024-12-02 08:03:45,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599688688] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:45,394 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:45,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:45,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262433652] [2024-12-02 08:03:45,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:45,395 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:45,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:45,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:45,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:45,395 INFO L87 Difference]: Start difference. First operand 1365 states and 1754 transitions. Second operand has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:45,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:45,616 INFO L93 Difference]: Finished difference Result 2210 states and 2849 transitions. [2024-12-02 08:03:45,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:45,617 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 748 [2024-12-02 08:03:45,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:45,618 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:45,618 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:45,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:45,619 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1867 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 222 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1867 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:45,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1867 Valid, 2162 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 222 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:45,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:45,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:45,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2829771554900515) internal successors, (1741), 1357 states have internal predecessors, (1741), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:45,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1753 transitions. [2024-12-02 08:03:45,635 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1753 transitions. Word has length 748 [2024-12-02 08:03:45,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:45,635 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1753 transitions. [2024-12-02 08:03:45,635 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:45,635 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1753 transitions. [2024-12-02 08:03:45,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-12-02 08:03:45,638 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:45,638 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:45,638 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110 [2024-12-02 08:03:45,638 INFO L396 AbstractCegarLoop]: === Iteration 112 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:45,638 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:45,638 INFO L85 PathProgramCache]: Analyzing trace with hash -1546776267, now seen corresponding path program 1 times [2024-12-02 08:03:45,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:45,638 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747029950] [2024-12-02 08:03:45,639 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:45,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:47,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:48,482 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:48,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:48,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747029950] [2024-12-02 08:03:48,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1747029950] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:48,482 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:48,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:48,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [541051173] [2024-12-02 08:03:48,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:48,483 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:48,483 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:48,483 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:48,483 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:48,483 INFO L87 Difference]: Start difference. First operand 1365 states and 1753 transitions. Second operand has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:48,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:48,699 INFO L93 Difference]: Finished difference Result 2210 states and 2847 transitions. [2024-12-02 08:03:48,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:48,700 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 749 [2024-12-02 08:03:48,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:48,701 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:48,701 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:48,701 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:48,702 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 996 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 220 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 996 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 220 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:48,702 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [996 Valid, 2169 Invalid, 220 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 220 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:48,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:48,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:48,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2822402358142961) internal successors, (1740), 1357 states have internal predecessors, (1740), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:48,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1752 transitions. [2024-12-02 08:03:48,717 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1752 transitions. Word has length 749 [2024-12-02 08:03:48,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:48,717 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1752 transitions. [2024-12-02 08:03:48,717 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:48,717 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1752 transitions. [2024-12-02 08:03:48,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 751 [2024-12-02 08:03:48,720 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:48,720 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:48,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable111 [2024-12-02 08:03:48,721 INFO L396 AbstractCegarLoop]: === Iteration 113 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:48,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:48,721 INFO L85 PathProgramCache]: Analyzing trace with hash 507830374, now seen corresponding path program 1 times [2024-12-02 08:03:48,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:48,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076839155] [2024-12-02 08:03:48,721 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:48,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:50,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:51,256 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:51,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:51,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076839155] [2024-12-02 08:03:51,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1076839155] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:51,256 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:51,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:51,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019189653] [2024-12-02 08:03:51,257 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:51,257 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:51,257 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:51,257 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:51,257 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:51,258 INFO L87 Difference]: Start difference. First operand 1365 states and 1752 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:51,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:51,465 INFO L93 Difference]: Finished difference Result 2210 states and 2845 transitions. [2024-12-02 08:03:51,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:51,466 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 750 [2024-12-02 08:03:51,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:51,467 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:51,467 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 08:03:51,468 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:03:51,468 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 995 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 995 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:03:51,468 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [995 Valid, 2169 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:03:51,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 08:03:51,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 08:03:51,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.281503316138541) internal successors, (1739), 1357 states have internal predecessors, (1739), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:03:51,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1751 transitions. [2024-12-02 08:03:51,484 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1751 transitions. Word has length 750 [2024-12-02 08:03:51,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:03:51,485 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1751 transitions. [2024-12-02 08:03:51,485 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:51,485 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1751 transitions. [2024-12-02 08:03:51,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 752 [2024-12-02 08:03:51,488 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:03:51,488 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:03:51,488 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable112 [2024-12-02 08:03:51,488 INFO L396 AbstractCegarLoop]: === Iteration 114 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:03:51,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:03:51,489 INFO L85 PathProgramCache]: Analyzing trace with hash 1790986916, now seen corresponding path program 1 times [2024-12-02 08:03:51,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:03:51,489 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919448261] [2024-12-02 08:03:51,489 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:03:51,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:03:53,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:03:54,157 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:03:54,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:03:54,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919448261] [2024-12-02 08:03:54,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1919448261] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:03:54,157 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:03:54,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:03:54,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919085071] [2024-12-02 08:03:54,157 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:03:54,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:03:54,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:03:54,158 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:03:54,159 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:03:54,159 INFO L87 Difference]: Start difference. First operand 1365 states and 1751 transitions. Second operand has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:03:54,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:03:54,383 INFO L93 Difference]: Finished difference Result 2210 states and 2843 transitions. [2024-12-02 08:03:54,384 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:03:54,384 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 751 [2024-12-02 08:03:54,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:03:54,385 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 08:03:54,385 INFO L226 Difference]: Without dead ends: 1365 WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-02 08:04:52,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:04:52,148 INFO L225 Difference]: With dead ends: 8245 [2024-12-02 08:04:52,148 INFO L226 Difference]: Without dead ends: 4334 [2024-12-02 08:04:52,150 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:04:52,151 INFO L435 NwaCegarLoop]: 902 mSDtfsCounter, 1167 mSDsluCounter, 4485 mSDsCounter, 0 mSdLazyCounter, 1682 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1169 SdHoareTripleChecker+Valid, 5387 SdHoareTripleChecker+Invalid, 1685 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1682 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:04:52,151 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1169 Valid, 5387 Invalid, 1685 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1682 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:04:52,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4334 states. [2024-12-02 08:04:52,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4334 to 4310. [2024-12-02 08:04:52,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4310 states, 4284 states have (on average 1.2628384687208216) internal successors, (5410), 4284 states have internal predecessors, (5410), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-12-02 08:04:52,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4310 states to 4310 states and 5458 transitions. [2024-12-02 08:04:52,208 INFO L78 Accepts]: Start accepts. Automaton has 4310 states and 5458 transitions. Word has length 767 [2024-12-02 08:04:52,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:04:52,209 INFO L471 AbstractCegarLoop]: Abstraction has 4310 states and 5458 transitions. [2024-12-02 08:04:52,209 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 73.0) internal successors, (584), 8 states have internal predecessors, (584), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:04:52,209 INFO L276 IsEmpty]: Start isEmpty. Operand 4310 states and 5458 transitions. [2024-12-02 08:04:52,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 770 [2024-12-02 08:04:52,213 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:04:52,213 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:04:52,213 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable127 [2024-12-02 08:04:52,213 INFO L396 AbstractCegarLoop]: === Iteration 129 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:04:52,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:04:52,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1460333981, now seen corresponding path program 1 times [2024-12-02 08:04:52,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:04:52,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079151001] [2024-12-02 08:04:52,214 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:04:52,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:04:55,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:04:56,864 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 213 trivial. 0 not checked. [2024-12-02 08:04:56,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:04:56,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079151001] [2024-12-02 08:04:56,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2079151001] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:04:56,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:04:56,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:04:56,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398526077] [2024-12-02 08:04:56,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:04:56,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:04:56,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:04:56,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:04:56,866 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:04:56,866 INFO L87 Difference]: Start difference. First operand 4310 states and 5458 transitions. Second operand has 7 states, 7 states have (on average 84.71428571428571) internal successors, (593), 7 states have internal predecessors, (593), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:04:57,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:04:57,560 INFO L93 Difference]: Finished difference Result 8203 states and 10312 transitions. [2024-12-02 08:04:57,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:04:57,561 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 84.71428571428571) internal successors, (593), 7 states have internal predecessors, (593), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 769 [2024-12-02 08:04:57,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:04:57,563 INFO L225 Difference]: With dead ends: 8203 [2024-12-02 08:04:57,563 INFO L226 Difference]: Without dead ends: 4342 [2024-12-02 08:04:57,566 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:04:57,566 INFO L435 NwaCegarLoop]: 898 mSDtfsCounter, 2227 mSDsluCounter, 2687 mSDsCounter, 0 mSdLazyCounter, 1130 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2228 SdHoareTripleChecker+Valid, 3585 SdHoareTripleChecker+Invalid, 1133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:04:57,566 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2228 Valid, 3585 Invalid, 1133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1130 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 08:04:57,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4342 states. [2024-12-02 08:04:57,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4342 to 4326. [2024-12-02 08:04:57,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4326 states, 4300 states have (on average 1.26) internal successors, (5418), 4300 states have internal predecessors, (5418), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-12-02 08:04:57,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4326 states to 4326 states and 5466 transitions. [2024-12-02 08:04:57,660 INFO L78 Accepts]: Start accepts. Automaton has 4326 states and 5466 transitions. Word has length 769 [2024-12-02 08:04:57,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:04:57,661 INFO L471 AbstractCegarLoop]: Abstraction has 4326 states and 5466 transitions. [2024-12-02 08:04:57,661 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 84.71428571428571) internal successors, (593), 7 states have internal predecessors, (593), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:04:57,661 INFO L276 IsEmpty]: Start isEmpty. Operand 4326 states and 5466 transitions. [2024-12-02 08:04:57,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-12-02 08:04:57,665 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:04:57,665 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:04:57,665 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable128 [2024-12-02 08:04:57,666 INFO L396 AbstractCegarLoop]: === Iteration 130 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:04:57,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:04:57,666 INFO L85 PathProgramCache]: Analyzing trace with hash -457307227, now seen corresponding path program 1 times [2024-12-02 08:04:57,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:04:57,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1883312491] [2024-12-02 08:04:57,666 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:04:57,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:02,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:03,643 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 153 proven. 4 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2024-12-02 08:05:03,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:03,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1883312491] [2024-12-02 08:05:03,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1883312491] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:05:03,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1916677582] [2024-12-02 08:05:03,644 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:03,644 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:05:03,644 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:05:03,645 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:05:03,646 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 08:05:08,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:08,183 INFO L256 TraceCheckSpWp]: Trace formula consists of 4797 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-12-02 08:05:08,201 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:05:08,559 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2024-12-02 08:05:08,559 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:05:08,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1916677582] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:08,559 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:05:08,559 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-12-02 08:05:08,559 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261560624] [2024-12-02 08:05:08,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:08,560 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:05:08,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:08,560 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:05:08,560 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:05:08,560 INFO L87 Difference]: Start difference. First operand 4326 states and 5466 transitions. Second operand has 4 states, 4 states have (on average 155.5) internal successors, (622), 4 states have internal predecessors, (622), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:08,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:08,979 INFO L93 Difference]: Finished difference Result 6221 states and 7818 transitions. [2024-12-02 08:05:08,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:05:08,980 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 155.5) internal successors, (622), 4 states have internal predecessors, (622), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 771 [2024-12-02 08:05:08,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:08,981 INFO L225 Difference]: With dead ends: 6221 [2024-12-02 08:05:08,982 INFO L226 Difference]: Without dead ends: 2286 [2024-12-02 08:05:08,983 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 780 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:05:08,983 INFO L435 NwaCegarLoop]: 903 mSDtfsCounter, 1035 mSDsluCounter, 905 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1035 SdHoareTripleChecker+Valid, 1808 SdHoareTripleChecker+Invalid, 549 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:08,983 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1035 Valid, 1808 Invalid, 549 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:05:08,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2286 states. [2024-12-02 08:05:09,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2286 to 2286. [2024-12-02 08:05:09,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2286 states, 2272 states have (on average 1.2693661971830985) internal successors, (2884), 2272 states have internal predecessors, (2884), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:05:09,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2286 states to 2286 states and 2908 transitions. [2024-12-02 08:05:09,015 INFO L78 Accepts]: Start accepts. Automaton has 2286 states and 2908 transitions. Word has length 771 [2024-12-02 08:05:09,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:09,016 INFO L471 AbstractCegarLoop]: Abstraction has 2286 states and 2908 transitions. [2024-12-02 08:05:09,016 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 155.5) internal successors, (622), 4 states have internal predecessors, (622), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:09,016 INFO L276 IsEmpty]: Start isEmpty. Operand 2286 states and 2908 transitions. [2024-12-02 08:05:09,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-12-02 08:05:09,021 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:09,022 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:09,057 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 08:05:09,222 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable129 [2024-12-02 08:05:09,222 INFO L396 AbstractCegarLoop]: === Iteration 131 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:09,222 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:09,223 INFO L85 PathProgramCache]: Analyzing trace with hash -783060021, now seen corresponding path program 1 times [2024-12-02 08:05:09,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:09,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704362935] [2024-12-02 08:05:09,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:09,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:13,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:14,566 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 221 trivial. 0 not checked. [2024-12-02 08:05:14,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:14,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704362935] [2024-12-02 08:05:14,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704362935] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:14,567 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:14,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:05:14,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [987782237] [2024-12-02 08:05:14,567 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:14,568 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:05:14,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:14,568 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:05:14,568 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:05:14,568 INFO L87 Difference]: Start difference. First operand 2286 states and 2908 transitions. Second operand has 6 states, 6 states have (on average 98.0) internal successors, (588), 6 states have internal predecessors, (588), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:05:15,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:15,198 INFO L93 Difference]: Finished difference Result 4286 states and 5401 transitions. [2024-12-02 08:05:15,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:05:15,199 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 98.0) internal successors, (588), 6 states have internal predecessors, (588), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 771 [2024-12-02 08:05:15,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:15,200 INFO L225 Difference]: With dead ends: 4286 [2024-12-02 08:05:15,200 INFO L226 Difference]: Without dead ends: 2302 [2024-12-02 08:05:15,201 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:05:15,201 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1074 mSDsluCounter, 2684 mSDsCounter, 0 mSdLazyCounter, 1122 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1076 SdHoareTripleChecker+Valid, 3581 SdHoareTripleChecker+Invalid, 1124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:15,202 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1076 Valid, 3581 Invalid, 1124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1122 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 08:05:15,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2302 states. [2024-12-02 08:05:15,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2302 to 2278. [2024-12-02 08:05:15,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2278 states, 2264 states have (on average 1.265017667844523) internal successors, (2864), 2264 states have internal predecessors, (2864), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:05:15,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2278 states to 2278 states and 2888 transitions. [2024-12-02 08:05:15,233 INFO L78 Accepts]: Start accepts. Automaton has 2278 states and 2888 transitions. Word has length 771 [2024-12-02 08:05:15,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:15,234 INFO L471 AbstractCegarLoop]: Abstraction has 2278 states and 2888 transitions. [2024-12-02 08:05:15,234 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 98.0) internal successors, (588), 6 states have internal predecessors, (588), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:05:15,234 INFO L276 IsEmpty]: Start isEmpty. Operand 2278 states and 2888 transitions. [2024-12-02 08:05:15,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 774 [2024-12-02 08:05:15,239 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:15,240 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:15,240 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable130 [2024-12-02 08:05:15,240 INFO L396 AbstractCegarLoop]: === Iteration 132 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:15,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:15,240 INFO L85 PathProgramCache]: Analyzing trace with hash -197642435, now seen corresponding path program 1 times [2024-12-02 08:05:15,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:15,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732034123] [2024-12-02 08:05:15,241 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:15,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:19,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:20,647 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2024-12-02 08:05:20,647 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:20,647 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732034123] [2024-12-02 08:05:20,647 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732034123] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:20,647 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:20,647 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:05:20,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231733485] [2024-12-02 08:05:20,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:20,648 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:05:20,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:20,648 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:05:20,648 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:05:20,649 INFO L87 Difference]: Start difference. First operand 2278 states and 2888 transitions. Second operand has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:21,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:21,060 INFO L93 Difference]: Finished difference Result 4260 states and 5353 transitions. [2024-12-02 08:05:21,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:05:21,061 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 773 [2024-12-02 08:05:21,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:21,063 INFO L225 Difference]: With dead ends: 4260 [2024-12-02 08:05:21,063 INFO L226 Difference]: Without dead ends: 2286 [2024-12-02 08:05:21,063 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:05:21,064 INFO L435 NwaCegarLoop]: 1197 mSDtfsCounter, 1096 mSDsluCounter, 5378 mSDsCounter, 0 mSdLazyCounter, 728 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1097 SdHoareTripleChecker+Valid, 6575 SdHoareTripleChecker+Invalid, 728 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 728 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:21,064 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1097 Valid, 6575 Invalid, 728 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 728 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:05:21,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2286 states. [2024-12-02 08:05:21,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2286 to 2282. [2024-12-02 08:05:21,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2282 states, 2268 states have (on average 1.2645502645502646) internal successors, (2868), 2268 states have internal predecessors, (2868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:05:21,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2282 states to 2282 states and 2892 transitions. [2024-12-02 08:05:21,094 INFO L78 Accepts]: Start accepts. Automaton has 2282 states and 2892 transitions. Word has length 773 [2024-12-02 08:05:21,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:21,094 INFO L471 AbstractCegarLoop]: Abstraction has 2282 states and 2892 transitions. [2024-12-02 08:05:21,094 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:21,094 INFO L276 IsEmpty]: Start isEmpty. Operand 2282 states and 2892 transitions. [2024-12-02 08:05:21,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:05:21,098 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:21,098 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:21,098 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable131 [2024-12-02 08:05:21,098 INFO L396 AbstractCegarLoop]: === Iteration 133 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:21,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:21,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1784286067, now seen corresponding path program 1 times [2024-12-02 08:05:21,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:21,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792663088] [2024-12-02 08:05:21,098 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:21,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:25,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:29,020 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2024-12-02 08:05:29,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:29,020 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792663088] [2024-12-02 08:05:29,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [792663088] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:29,020 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:29,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:05:29,020 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457880123] [2024-12-02 08:05:29,020 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:29,021 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:05:29,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:29,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:05:29,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:05:29,022 INFO L87 Difference]: Start difference. First operand 2282 states and 2892 transitions. Second operand has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:30,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:30,755 INFO L93 Difference]: Finished difference Result 6035 states and 7520 transitions. [2024-12-02 08:05:30,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:05:30,756 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-02 08:05:30,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:30,758 INFO L225 Difference]: With dead ends: 6035 [2024-12-02 08:05:30,758 INFO L226 Difference]: Without dead ends: 4166 [2024-12-02 08:05:30,760 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:05:30,760 INFO L435 NwaCegarLoop]: 1481 mSDtfsCounter, 3039 mSDsluCounter, 6755 mSDsCounter, 0 mSdLazyCounter, 2860 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3040 SdHoareTripleChecker+Valid, 8236 SdHoareTripleChecker+Invalid, 2864 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 2860 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:30,760 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3040 Valid, 8236 Invalid, 2864 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 2860 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:05:30,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4166 states. [2024-12-02 08:05:30,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4166 to 2398. [2024-12-02 08:05:30,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2398 states, 2380 states have (on average 1.26890756302521) internal successors, (3020), 2380 states have internal predecessors, (3020), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-12-02 08:05:30,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2398 states to 2398 states and 3052 transitions. [2024-12-02 08:05:30,801 INFO L78 Accepts]: Start accepts. Automaton has 2398 states and 3052 transitions. Word has length 775 [2024-12-02 08:05:30,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:30,801 INFO L471 AbstractCegarLoop]: Abstraction has 2398 states and 3052 transitions. [2024-12-02 08:05:30,801 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:30,801 INFO L276 IsEmpty]: Start isEmpty. Operand 2398 states and 3052 transitions. [2024-12-02 08:05:30,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:05:30,805 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:30,805 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:30,805 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable132 [2024-12-02 08:05:30,805 INFO L396 AbstractCegarLoop]: === Iteration 134 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:30,805 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:30,805 INFO L85 PathProgramCache]: Analyzing trace with hash -708444211, now seen corresponding path program 1 times [2024-12-02 08:05:30,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:30,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808261001] [2024-12-02 08:05:30,806 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:30,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:39,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:41,660 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 4 proven. 180 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:41,660 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:41,660 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808261001] [2024-12-02 08:05:41,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808261001] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:05:41,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1363168595] [2024-12-02 08:05:41,661 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:41,661 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:05:41,661 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:05:41,662 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:05:41,663 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:05:47,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:47,264 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 08:05:47,278 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:05:47,573 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 178 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:47,573 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:05:47,985 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:47,985 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1363168595] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 08:05:47,985 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:05:47,986 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10, 8] total 21 [2024-12-02 08:05:47,986 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189632846] [2024-12-02 08:05:47,986 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:47,986 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:05:47,986 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:47,986 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:05:47,987 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=370, Unknown=0, NotChecked=0, Total=420 [2024-12-02 08:05:47,987 INFO L87 Difference]: Start difference. First operand 2398 states and 3052 transitions. Second operand has 7 states, 7 states have (on average 106.85714285714286) internal successors, (748), 7 states have internal predecessors, (748), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:48,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:48,133 INFO L93 Difference]: Finished difference Result 4178 states and 5327 transitions. [2024-12-02 08:05:48,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:05:48,134 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 106.85714285714286) internal successors, (748), 7 states have internal predecessors, (748), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 775 [2024-12-02 08:05:48,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:48,137 INFO L225 Difference]: With dead ends: 4178 [2024-12-02 08:05:48,137 INFO L226 Difference]: Without dead ends: 3287 [2024-12-02 08:05:48,138 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1562 GetRequests, 1541 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:05:48,138 INFO L435 NwaCegarLoop]: 2068 mSDtfsCounter, 742 mSDsluCounter, 9418 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 742 SdHoareTripleChecker+Valid, 11486 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:48,138 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [742 Valid, 11486 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:05:48,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3287 states. [2024-12-02 08:05:48,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3287 to 2796. [2024-12-02 08:05:48,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2796 states, 2774 states have (on average 1.2523431867339583) internal successors, (3474), 2774 states have internal predecessors, (3474), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-12-02 08:05:48,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2796 states to 2796 states and 3514 transitions. [2024-12-02 08:05:48,188 INFO L78 Accepts]: Start accepts. Automaton has 2796 states and 3514 transitions. Word has length 775 [2024-12-02 08:05:48,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:48,189 INFO L471 AbstractCegarLoop]: Abstraction has 2796 states and 3514 transitions. [2024-12-02 08:05:48,189 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 106.85714285714286) internal successors, (748), 7 states have internal predecessors, (748), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:48,189 INFO L276 IsEmpty]: Start isEmpty. Operand 2796 states and 3514 transitions. [2024-12-02 08:05:48,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:05:48,193 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:48,193 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:48,236 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:05:48,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable133 [2024-12-02 08:05:48,394 INFO L396 AbstractCegarLoop]: === Iteration 135 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:48,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:48,394 INFO L85 PathProgramCache]: Analyzing trace with hash -761641086, now seen corresponding path program 1 times [2024-12-02 08:05:48,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:48,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231612789] [2024-12-02 08:05:48,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:48,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:48,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:49,772 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-12-02 08:05:49,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:49,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231612789] [2024-12-02 08:05:49,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231612789] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:49,772 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:49,773 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:05:49,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471134887] [2024-12-02 08:05:49,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:49,773 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:05:49,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:49,773 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:05:49,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:05:49,773 INFO L87 Difference]: Start difference. First operand 2796 states and 3514 transitions. Second operand has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:05:49,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:49,841 INFO L93 Difference]: Finished difference Result 4916 states and 6174 transitions. [2024-12-02 08:05:49,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:05:49,841 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 775 [2024-12-02 08:05:49,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:49,844 INFO L225 Difference]: With dead ends: 4916 [2024-12-02 08:05:49,844 INFO L226 Difference]: Without dead ends: 2908 [2024-12-02 08:05:49,845 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:05:49,845 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 16 mSDsluCounter, 3504 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 4676 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:49,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 4676 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:05:49,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2908 states. [2024-12-02 08:05:49,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2908 to 2908. [2024-12-02 08:05:49,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2908 states, 2886 states have (on average 1.2591822591822592) internal successors, (3634), 2886 states have internal predecessors, (3634), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-12-02 08:05:49,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2908 states to 2908 states and 3674 transitions. [2024-12-02 08:05:49,931 INFO L78 Accepts]: Start accepts. Automaton has 2908 states and 3674 transitions. Word has length 775 [2024-12-02 08:05:49,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:49,932 INFO L471 AbstractCegarLoop]: Abstraction has 2908 states and 3674 transitions. [2024-12-02 08:05:49,932 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:05:49,932 INFO L276 IsEmpty]: Start isEmpty. Operand 2908 states and 3674 transitions. [2024-12-02 08:05:49,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:05:49,938 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:49,938 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:49,939 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable134 [2024-12-02 08:05:49,939 INFO L396 AbstractCegarLoop]: === Iteration 136 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:49,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:49,939 INFO L85 PathProgramCache]: Analyzing trace with hash 627260374, now seen corresponding path program 1 times [2024-12-02 08:05:49,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:49,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479462632] [2024-12-02 08:05:49,939 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:49,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:55,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:59,086 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-12-02 08:05:59,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:59,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479462632] [2024-12-02 08:05:59,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1479462632] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:59,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:59,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 08:05:59,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56671129] [2024-12-02 08:05:59,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:59,087 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:05:59,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:59,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:05:59,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:05:59,088 INFO L87 Difference]: Start difference. First operand 2908 states and 3674 transitions. Second operand has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:59,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:59,615 INFO L93 Difference]: Finished difference Result 5877 states and 7409 transitions. [2024-12-02 08:05:59,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 08:05:59,616 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-02 08:05:59,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:59,619 INFO L225 Difference]: With dead ends: 5877 [2024-12-02 08:05:59,619 INFO L226 Difference]: Without dead ends: 3779 [2024-12-02 08:05:59,620 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:05:59,620 INFO L435 NwaCegarLoop]: 1928 mSDtfsCounter, 3663 mSDsluCounter, 11729 mSDsCounter, 0 mSdLazyCounter, 675 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3668 SdHoareTripleChecker+Valid, 13657 SdHoareTripleChecker+Invalid, 677 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 675 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:59,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3668 Valid, 13657 Invalid, 677 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 675 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:05:59,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3779 states. [2024-12-02 08:05:59,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3779 to 2972. [2024-12-02 08:05:59,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2972 states, 2947 states have (on average 1.2599253478113335) internal successors, (3713), 2947 states have internal predecessors, (3713), 23 states have call successors, (23), 1 states have call predecessors, (23), 1 states have return successors, (23), 23 states have call predecessors, (23), 23 states have call successors, (23) [2024-12-02 08:05:59,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2972 states to 2972 states and 3759 transitions. [2024-12-02 08:05:59,669 INFO L78 Accepts]: Start accepts. Automaton has 2972 states and 3759 transitions. Word has length 776 [2024-12-02 08:05:59,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:59,669 INFO L471 AbstractCegarLoop]: Abstraction has 2972 states and 3759 transitions. [2024-12-02 08:05:59,670 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:59,670 INFO L276 IsEmpty]: Start isEmpty. Operand 2972 states and 3759 transitions. [2024-12-02 08:05:59,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:05:59,673 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:59,674 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:59,674 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable135 [2024-12-02 08:05:59,674 INFO L396 AbstractCegarLoop]: === Iteration 137 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:59,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:59,674 INFO L85 PathProgramCache]: Analyzing trace with hash -772883914, now seen corresponding path program 1 times [2024-12-02 08:05:59,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:59,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666550877] [2024-12-02 08:05:59,674 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:59,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:06:11,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:19,346 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 144 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-12-02 08:06:19,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:06:19,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666550877] [2024-12-02 08:06:19,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1666550877] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:06:19,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1532771993] [2024-12-02 08:06:19,347 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:19,347 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:19,347 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:19,349 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:06:19,349 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:06:24,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:24,849 INFO L256 TraceCheckSpWp]: Trace formula consists of 4804 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:06:24,859 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:24,938 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2024-12-02 08:06:24,938 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:06:24,938 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1532771993] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:06:24,939 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:06:24,939 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [19] total 23 [2024-12-02 08:06:24,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044418340] [2024-12-02 08:06:24,939 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:06:24,939 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:06:24,939 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:06:24,940 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:06:24,940 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=444, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:06:24,940 INFO L87 Difference]: Start difference. First operand 2972 states and 3759 transitions. Second operand has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:25,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:25,044 INFO L93 Difference]: Finished difference Result 5512 states and 6915 transitions. [2024-12-02 08:06:25,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:06:25,045 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-02 08:06:25,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:25,048 INFO L225 Difference]: With dead ends: 5512 [2024-12-02 08:06:25,048 INFO L226 Difference]: Without dead ends: 2972 [2024-12-02 08:06:25,049 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 795 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=444, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:06:25,050 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 0 mSDsluCounter, 4669 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5841 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:25,050 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5841 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:06:25,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2972 states. [2024-12-02 08:06:25,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2972 to 2972. [2024-12-02 08:06:25,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2972 states, 2947 states have (on average 1.2558534102477095) internal successors, (3701), 2947 states have internal predecessors, (3701), 23 states have call successors, (23), 1 states have call predecessors, (23), 1 states have return successors, (23), 23 states have call predecessors, (23), 23 states have call successors, (23) [2024-12-02 08:06:25,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2972 states to 2972 states and 3747 transitions. [2024-12-02 08:06:25,131 INFO L78 Accepts]: Start accepts. Automaton has 2972 states and 3747 transitions. Word has length 776 [2024-12-02 08:06:25,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:25,131 INFO L471 AbstractCegarLoop]: Abstraction has 2972 states and 3747 transitions. [2024-12-02 08:06:25,132 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:25,132 INFO L276 IsEmpty]: Start isEmpty. Operand 2972 states and 3747 transitions. [2024-12-02 08:06:25,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-02 08:06:25,135 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:25,136 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:25,182 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 08:06:25,336 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable136 [2024-12-02 08:06:25,336 INFO L396 AbstractCegarLoop]: === Iteration 138 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:25,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:25,338 INFO L85 PathProgramCache]: Analyzing trace with hash -1088025850, now seen corresponding path program 1 times [2024-12-02 08:06:25,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:06:25,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751898193] [2024-12-02 08:06:25,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:25,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:06:30,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:34,127 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:06:34,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:06:34,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751898193] [2024-12-02 08:06:34,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1751898193] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:06:34,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:06:34,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 08:06:34,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965002777] [2024-12-02 08:06:34,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:06:34,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:06:34,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:06:34,128 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:06:34,128 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:06:34,129 INFO L87 Difference]: Start difference. First operand 2972 states and 3747 transitions. Second operand has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:36,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:36,453 INFO L93 Difference]: Finished difference Result 8866 states and 10957 transitions. [2024-12-02 08:06:36,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-12-02 08:06:36,453 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 778 [2024-12-02 08:06:36,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:36,458 INFO L225 Difference]: With dead ends: 8866 [2024-12-02 08:06:36,458 INFO L226 Difference]: Without dead ends: 7126 [2024-12-02 08:06:36,460 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=237, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:06:36,460 INFO L435 NwaCegarLoop]: 1478 mSDtfsCounter, 3135 mSDsluCounter, 8809 mSDsCounter, 0 mSdLazyCounter, 3529 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3136 SdHoareTripleChecker+Valid, 10287 SdHoareTripleChecker+Invalid, 3532 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 3529 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:36,460 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3136 Valid, 10287 Invalid, 3532 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 3529 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-12-02 08:06:36,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7126 states. [2024-12-02 08:06:36,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7126 to 4241. [2024-12-02 08:06:36,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4241 states, 4216 states have (on average 1.21157495256167) internal successors, (5108), 4216 states have internal predecessors, (5108), 23 states have call successors, (23), 1 states have call predecessors, (23), 1 states have return successors, (23), 23 states have call predecessors, (23), 23 states have call successors, (23) [2024-12-02 08:06:36,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4241 states to 4241 states and 5154 transitions. [2024-12-02 08:06:36,557 INFO L78 Accepts]: Start accepts. Automaton has 4241 states and 5154 transitions. Word has length 778 [2024-12-02 08:06:36,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:36,557 INFO L471 AbstractCegarLoop]: Abstraction has 4241 states and 5154 transitions. [2024-12-02 08:06:36,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 75.1) internal successors, (751), 10 states have internal predecessors, (751), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:36,557 INFO L276 IsEmpty]: Start isEmpty. Operand 4241 states and 5154 transitions. [2024-12-02 08:06:36,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-02 08:06:36,561 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:36,561 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:36,562 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable137 [2024-12-02 08:06:36,562 INFO L396 AbstractCegarLoop]: === Iteration 139 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:36,562 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:36,562 INFO L85 PathProgramCache]: Analyzing trace with hash -1587321115, now seen corresponding path program 1 times [2024-12-02 08:06:36,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:06:36,562 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61505333] [2024-12-02 08:06:36,562 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:36,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:06:48,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:51,453 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 4 proven. 177 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:06:51,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:06:51,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61505333] [2024-12-02 08:06:51,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [61505333] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:06:51,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [910543253] [2024-12-02 08:06:51,453 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:51,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:51,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:51,454 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:06:51,455 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:06:58,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:58,203 INFO L256 TraceCheckSpWp]: Trace formula consists of 4810 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:06:58,214 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:58,507 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 211 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 08:06:58,508 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:06:58,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [910543253] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:06:58,508 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:06:58,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 16 [2024-12-02 08:06:58,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771365400] [2024-12-02 08:06:58,508 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:06:58,508 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:06:58,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:06:58,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:06:58,509 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:06:58,509 INFO L87 Difference]: Start difference. First operand 4241 states and 5154 transitions. Second operand has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:06:59,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:59,459 INFO L93 Difference]: Finished difference Result 9291 states and 11388 transitions. [2024-12-02 08:06:59,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:06:59,459 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 778 [2024-12-02 08:06:59,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:59,463 INFO L225 Difference]: With dead ends: 9291 [2024-12-02 08:06:59,463 INFO L226 Difference]: Without dead ends: 6846 [2024-12-02 08:06:59,465 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 790 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2024-12-02 08:06:59,466 INFO L435 NwaCegarLoop]: 903 mSDtfsCounter, 1990 mSDsluCounter, 4505 mSDsCounter, 0 mSdLazyCounter, 1650 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1996 SdHoareTripleChecker+Valid, 5408 SdHoareTripleChecker+Invalid, 1650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:59,466 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1996 Valid, 5408 Invalid, 1650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1650 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:06:59,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6846 states. [2024-12-02 08:06:59,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6846 to 5838. [2024-12-02 08:06:59,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5838 states, 5798 states have (on average 1.1936874784408418) internal successors, (6921), 5798 states have internal predecessors, (6921), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:06:59,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5838 states to 5838 states and 6997 transitions. [2024-12-02 08:06:59,551 INFO L78 Accepts]: Start accepts. Automaton has 5838 states and 6997 transitions. Word has length 778 [2024-12-02 08:06:59,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:59,551 INFO L471 AbstractCegarLoop]: Abstraction has 5838 states and 6997 transitions. [2024-12-02 08:06:59,551 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:06:59,551 INFO L276 IsEmpty]: Start isEmpty. Operand 5838 states and 6997 transitions. [2024-12-02 08:06:59,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 08:06:59,556 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:59,556 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:59,597 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:06:59,757 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable138 [2024-12-02 08:06:59,757 INFO L396 AbstractCegarLoop]: === Iteration 140 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:59,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:59,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1837918254, now seen corresponding path program 1 times [2024-12-02 08:06:59,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:06:59,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108045376] [2024-12-02 08:06:59,757 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:59,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:07:10,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:21,091 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 147 proven. 35 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:07:21,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:07:21,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108045376] [2024-12-02 08:07:21,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [108045376] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:07:21,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [122912188] [2024-12-02 08:07:21,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:21,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:07:21,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:07:21,093 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:07:21,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:07:30,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:30,959 INFO L256 TraceCheckSpWp]: Trace formula consists of 4813 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:07:30,968 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:07:31,043 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-12-02 08:07:31,043 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:07:31,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [122912188] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:07:31,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:07:31,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [20] total 24 [2024-12-02 08:07:31,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199126386] [2024-12-02 08:07:31,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:07:31,044 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:07:31,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:07:31,044 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:07:31,044 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:07:31,044 INFO L87 Difference]: Start difference. First operand 5838 states and 6997 transitions. Second operand has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:07:31,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:07:31,164 INFO L93 Difference]: Finished difference Result 11103 states and 13206 transitions. [2024-12-02 08:07:31,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:07:31,165 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 779 [2024-12-02 08:07:31,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:07:31,169 INFO L225 Difference]: With dead ends: 11103 [2024-12-02 08:07:31,169 INFO L226 Difference]: Without dead ends: 5838 [2024-12-02 08:07:31,171 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 798 GetRequests, 776 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:07:31,171 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 0 mSDsluCounter, 4665 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5836 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:07:31,172 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5836 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:07:31,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5838 states. [2024-12-02 08:07:31,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5838 to 5838. [2024-12-02 08:07:31,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5838 states, 5798 states have (on average 1.1923076923076923) internal successors, (6913), 5798 states have internal predecessors, (6913), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:07:31,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5838 states to 5838 states and 6989 transitions. [2024-12-02 08:07:31,254 INFO L78 Accepts]: Start accepts. Automaton has 5838 states and 6989 transitions. Word has length 779 [2024-12-02 08:07:31,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:07:31,254 INFO L471 AbstractCegarLoop]: Abstraction has 5838 states and 6989 transitions. [2024-12-02 08:07:31,255 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:07:31,255 INFO L276 IsEmpty]: Start isEmpty. Operand 5838 states and 6989 transitions. [2024-12-02 08:07:31,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 08:07:31,260 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:07:31,260 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:07:31,302 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:07:31,460 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable139 [2024-12-02 08:07:31,461 INFO L396 AbstractCegarLoop]: === Iteration 141 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:07:31,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:07:31,461 INFO L85 PathProgramCache]: Analyzing trace with hash -1253514579, now seen corresponding path program 1 times [2024-12-02 08:07:31,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:07:31,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627743275] [2024-12-02 08:07:31,461 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:31,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:07:36,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:37,737 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:07:37,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:07:37,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627743275] [2024-12-02 08:07:37,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627743275] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:07:37,737 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:07:37,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:07:37,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2144190877] [2024-12-02 08:07:37,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:07:37,738 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:07:37,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:07:37,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:07:37,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:07:37,739 INFO L87 Difference]: Start difference. First operand 5838 states and 6989 transitions. Second operand has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:38,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:07:38,754 INFO L93 Difference]: Finished difference Result 9771 states and 11709 transitions. [2024-12-02 08:07:38,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:07:38,754 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 779 [2024-12-02 08:07:38,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:07:38,760 INFO L225 Difference]: With dead ends: 9771 [2024-12-02 08:07:38,760 INFO L226 Difference]: Without dead ends: 7791 [2024-12-02 08:07:38,762 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:07:38,762 INFO L435 NwaCegarLoop]: 1565 mSDtfsCounter, 1522 mSDsluCounter, 4020 mSDsCounter, 0 mSdLazyCounter, 1814 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1525 SdHoareTripleChecker+Valid, 5585 SdHoareTripleChecker+Invalid, 1815 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1814 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:07:38,762 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1525 Valid, 5585 Invalid, 1815 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1814 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:07:38,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7791 states. [2024-12-02 08:07:38,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7791 to 5912. [2024-12-02 08:07:38,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5912 states, 5870 states have (on average 1.1942078364565587) internal successors, (7010), 5870 states have internal predecessors, (7010), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:07:38,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5912 states to 5912 states and 7090 transitions. [2024-12-02 08:07:38,854 INFO L78 Accepts]: Start accepts. Automaton has 5912 states and 7090 transitions. Word has length 779 [2024-12-02 08:07:38,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:07:38,854 INFO L471 AbstractCegarLoop]: Abstraction has 5912 states and 7090 transitions. [2024-12-02 08:07:38,854 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:38,854 INFO L276 IsEmpty]: Start isEmpty. Operand 5912 states and 7090 transitions. [2024-12-02 08:07:38,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 08:07:38,859 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:07:38,859 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:07:38,860 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable140 [2024-12-02 08:07:38,860 INFO L396 AbstractCegarLoop]: === Iteration 142 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:07:38,860 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:07:38,860 INFO L85 PathProgramCache]: Analyzing trace with hash 655750382, now seen corresponding path program 1 times [2024-12-02 08:07:38,860 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:07:38,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058259005] [2024-12-02 08:07:38,860 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:38,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:07:44,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:47,253 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 4 proven. 180 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:07:47,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:07:47,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058259005] [2024-12-02 08:07:47,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1058259005] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:07:47,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1717014210] [2024-12-02 08:07:47,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:47,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:07:47,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:07:47,256 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:07:47,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:07:52,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:52,974 INFO L256 TraceCheckSpWp]: Trace formula consists of 4813 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-12-02 08:07:52,989 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:07:53,863 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 220 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:07:53,863 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:07:53,863 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1717014210] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:07:53,863 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:07:53,863 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 16 [2024-12-02 08:07:53,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593177329] [2024-12-02 08:07:53,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:07:53,864 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:07:53,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:07:53,865 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:07:53,865 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:07:53,865 INFO L87 Difference]: Start difference. First operand 5912 states and 7090 transitions. Second operand has 8 states, 8 states have (on average 94.375) internal successors, (755), 8 states have internal predecessors, (755), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:54,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:07:54,740 INFO L93 Difference]: Finished difference Result 7920 states and 9511 transitions. [2024-12-02 08:07:54,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:07:54,741 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 94.375) internal successors, (755), 8 states have internal predecessors, (755), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 779 [2024-12-02 08:07:54,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:07:54,745 INFO L225 Difference]: With dead ends: 7920 [2024-12-02 08:07:54,745 INFO L226 Difference]: Without dead ends: 5940 [2024-12-02 08:07:54,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 789 GetRequests, 775 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:07:54,747 INFO L435 NwaCegarLoop]: 938 mSDtfsCounter, 722 mSDsluCounter, 4610 mSDsCounter, 0 mSdLazyCounter, 1689 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 722 SdHoareTripleChecker+Valid, 5548 SdHoareTripleChecker+Invalid, 1691 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1689 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:07:54,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [722 Valid, 5548 Invalid, 1691 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1689 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:07:54,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5940 states. [2024-12-02 08:07:54,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5940 to 5937. [2024-12-02 08:07:54,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5937 states, 5895 states have (on average 1.195250212044105) internal successors, (7046), 5895 states have internal predecessors, (7046), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:07:54,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5937 states to 5937 states and 7126 transitions. [2024-12-02 08:07:54,837 INFO L78 Accepts]: Start accepts. Automaton has 5937 states and 7126 transitions. Word has length 779 [2024-12-02 08:07:54,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:07:54,837 INFO L471 AbstractCegarLoop]: Abstraction has 5937 states and 7126 transitions. [2024-12-02 08:07:54,837 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 94.375) internal successors, (755), 8 states have internal predecessors, (755), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:54,837 INFO L276 IsEmpty]: Start isEmpty. Operand 5937 states and 7126 transitions. [2024-12-02 08:07:54,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 08:07:54,843 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:07:54,843 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:07:54,885 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 08:07:55,043 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable141,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:07:55,043 INFO L396 AbstractCegarLoop]: === Iteration 143 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:07:55,043 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:07:55,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1836771703, now seen corresponding path program 1 times [2024-12-02 08:07:55,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:07:55,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553595284] [2024-12-02 08:07:55,044 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:55,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:07:55,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:07:56,586 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2024-12-02 08:07:56,586 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:07:56,586 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553595284] [2024-12-02 08:07:56,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1553595284] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:07:56,587 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:07:56,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:07:56,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2100091588] [2024-12-02 08:07:56,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:07:56,587 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:07:56,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:07:56,588 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:07:56,588 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:07:56,588 INFO L87 Difference]: Start difference. First operand 5937 states and 7126 transitions. Second operand has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:57,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:07:57,210 INFO L93 Difference]: Finished difference Result 10915 states and 12947 transitions. [2024-12-02 08:07:57,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:07:57,210 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 780 [2024-12-02 08:07:57,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:07:57,214 INFO L225 Difference]: With dead ends: 10915 [2024-12-02 08:07:57,214 INFO L226 Difference]: Without dead ends: 6033 [2024-12-02 08:07:57,217 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:07:57,217 INFO L435 NwaCegarLoop]: 907 mSDtfsCounter, 1130 mSDsluCounter, 2694 mSDsCounter, 0 mSdLazyCounter, 1098 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 3601 SdHoareTripleChecker+Invalid, 1099 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1098 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:07:57,217 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 3601 Invalid, 1099 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1098 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:07:57,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6033 states. [2024-12-02 08:07:57,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6033 to 5985. [2024-12-02 08:07:57,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5985 states, 5943 states have (on average 1.193673229008918) internal successors, (7094), 5943 states have internal predecessors, (7094), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:07:57,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5985 states to 5985 states and 7174 transitions. [2024-12-02 08:07:57,307 INFO L78 Accepts]: Start accepts. Automaton has 5985 states and 7174 transitions. Word has length 780 [2024-12-02 08:07:57,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:07:57,308 INFO L471 AbstractCegarLoop]: Abstraction has 5985 states and 7174 transitions. [2024-12-02 08:07:57,308 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:07:57,308 INFO L276 IsEmpty]: Start isEmpty. Operand 5985 states and 7174 transitions. [2024-12-02 08:07:57,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 08:07:57,313 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:07:57,313 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:07:57,313 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable142 [2024-12-02 08:07:57,313 INFO L396 AbstractCegarLoop]: === Iteration 144 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:07:57,314 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:07:57,314 INFO L85 PathProgramCache]: Analyzing trace with hash 1279464039, now seen corresponding path program 1 times [2024-12-02 08:07:57,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:07:57,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478666316] [2024-12-02 08:07:57,314 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:07:57,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:08:02,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:08:04,926 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 4 proven. 179 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:08:04,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:08:04,926 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478666316] [2024-12-02 08:08:04,926 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478666316] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:08:04,926 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [639090597] [2024-12-02 08:08:04,926 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:08:04,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:08:04,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:08:04,928 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:08:04,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:08:12,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:08:12,940 INFO L256 TraceCheckSpWp]: Trace formula consists of 4816 conjuncts, 167 conjuncts are in the unsatisfiable core [2024-12-02 08:08:12,958 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:08:20,199 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 145 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:08:20,200 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:08:39,013 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 143 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:08:39,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [639090597] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:08:39,014 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:08:39,014 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 30, 30] total 66 [2024-12-02 08:08:39,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1627041481] [2024-12-02 08:08:39,014 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:08:39,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 66 states [2024-12-02 08:08:39,016 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:08:39,017 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2024-12-02 08:08:39,017 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=479, Invalid=3811, Unknown=0, NotChecked=0, Total=4290 [2024-12-02 08:08:39,018 INFO L87 Difference]: Start difference. First operand 5985 states and 7174 transitions. Second operand has 66 states, 66 states have (on average 31.78787878787879) internal successors, (2098), 66 states have internal predecessors, (2098), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:09:22,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:09:22,037 INFO L93 Difference]: Finished difference Result 60201 states and 70959 transitions. [2024-12-02 08:09:22,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 209 states. [2024-12-02 08:09:22,037 INFO L78 Accepts]: Start accepts. Automaton has has 66 states, 66 states have (on average 31.78787878787879) internal successors, (2098), 66 states have internal predecessors, (2098), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 780 [2024-12-02 08:09:22,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:09:22,066 INFO L225 Difference]: With dead ends: 60201 [2024-12-02 08:09:22,066 INFO L226 Difference]: Without dead ends: 55207 [2024-12-02 08:09:22,079 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1770 GetRequests, 1505 SyntacticMatches, 0 SemanticMatches, 265 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22527 ImplicationChecksByTransitivity, 15.0s TimeCoverageRelationStatistics Valid=8991, Invalid=62031, Unknown=0, NotChecked=0, Total=71022 [2024-12-02 08:09:22,079 INFO L435 NwaCegarLoop]: 3330 mSDtfsCounter, 39324 mSDsluCounter, 112918 mSDsCounter, 0 mSdLazyCounter, 50194 mSolverCounterSat, 131 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 23.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39327 SdHoareTripleChecker+Valid, 116248 SdHoareTripleChecker+Invalid, 50325 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 131 IncrementalHoareTripleChecker+Valid, 50194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 27.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:09:22,079 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [39327 Valid, 116248 Invalid, 50325 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [131 Valid, 50194 Invalid, 0 Unknown, 0 Unchecked, 27.1s Time] [2024-12-02 08:09:22,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55207 states. [2024-12-02 08:09:22,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55207 to 20303. [2024-12-02 08:09:22,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20303 states, 20181 states have (on average 1.194787176056687) internal successors, (24112), 20181 states have internal predecessors, (24112), 120 states have call successors, (120), 1 states have call predecessors, (120), 1 states have return successors, (120), 120 states have call predecessors, (120), 120 states have call successors, (120) [2024-12-02 08:09:22,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20303 states to 20303 states and 24352 transitions. [2024-12-02 08:09:22,582 INFO L78 Accepts]: Start accepts. Automaton has 20303 states and 24352 transitions. Word has length 780 [2024-12-02 08:09:22,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:09:22,583 INFO L471 AbstractCegarLoop]: Abstraction has 20303 states and 24352 transitions. [2024-12-02 08:09:22,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 66 states, 66 states have (on average 31.78787878787879) internal successors, (2098), 66 states have internal predecessors, (2098), 11 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2024-12-02 08:09:22,583 INFO L276 IsEmpty]: Start isEmpty. Operand 20303 states and 24352 transitions. [2024-12-02 08:09:22,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:09:22,597 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:09:22,597 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:09:22,642 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-12-02 08:09:22,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable143,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:09:22,798 INFO L396 AbstractCegarLoop]: === Iteration 145 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:09:22,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:09:22,798 INFO L85 PathProgramCache]: Analyzing trace with hash 1808848188, now seen corresponding path program 1 times [2024-12-02 08:09:22,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:09:22,798 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253728035] [2024-12-02 08:09:22,798 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:22,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:09:35,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:09:44,876 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 144 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:09:44,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:09:44,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253728035] [2024-12-02 08:09:44,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253728035] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:09:44,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [14394542] [2024-12-02 08:09:44,876 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:09:44,876 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:09:44,877 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:09:44,878 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:09:44,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:10:00,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:00,325 INFO L256 TraceCheckSpWp]: Trace formula consists of 4817 conjuncts, 67 conjuncts are in the unsatisfiable core [2024-12-02 08:10:00,336 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:10:03,589 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:03,589 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:10:09,851 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:09,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [14394542] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:10:09,851 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:10:09,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 16] total 50 [2024-12-02 08:10:09,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757410130] [2024-12-02 08:10:09,852 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:10:09,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2024-12-02 08:10:09,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:09,853 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2024-12-02 08:10:09,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=287, Invalid=2163, Unknown=0, NotChecked=0, Total=2450 [2024-12-02 08:10:09,854 INFO L87 Difference]: Start difference. First operand 20303 states and 24352 transitions. Second operand has 50 states, 50 states have (on average 39.02) internal successors, (1951), 50 states have internal predecessors, (1951), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-12-02 08:10:33,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:10:33,296 INFO L93 Difference]: Finished difference Result 98606 states and 118952 transitions. [2024-12-02 08:10:33,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 145 states. [2024-12-02 08:10:33,297 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 39.02) internal successors, (1951), 50 states have internal predecessors, (1951), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 781 [2024-12-02 08:10:33,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:10:33,352 INFO L225 Difference]: With dead ends: 98606 [2024-12-02 08:10:33,352 INFO L226 Difference]: Without dead ends: 84110 [2024-12-02 08:10:33,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1723 GetRequests, 1532 SyntacticMatches, 0 SemanticMatches, 191 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11759 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=5022, Invalid=32034, Unknown=0, NotChecked=0, Total=37056 [2024-12-02 08:10:33,375 INFO L435 NwaCegarLoop]: 2460 mSDtfsCounter, 31065 mSDsluCounter, 65455 mSDsCounter, 0 mSdLazyCounter, 33764 mSolverCounterSat, 79 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 14.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31065 SdHoareTripleChecker+Valid, 67915 SdHoareTripleChecker+Invalid, 33843 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 79 IncrementalHoareTripleChecker+Valid, 33764 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 16.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:10:33,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [31065 Valid, 67915 Invalid, 33843 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [79 Valid, 33764 Invalid, 0 Unknown, 0 Unchecked, 16.3s Time] [2024-12-02 08:10:33,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84110 states. [2024-12-02 08:10:34,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84110 to 39333. [2024-12-02 08:10:34,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39333 states, 39069 states have (on average 1.2015408636002969) internal successors, (46943), 39069 states have internal predecessors, (46943), 262 states have call successors, (262), 1 states have call predecessors, (262), 1 states have return successors, (262), 262 states have call predecessors, (262), 262 states have call successors, (262) [2024-12-02 08:10:34,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39333 states to 39333 states and 47467 transitions. [2024-12-02 08:10:34,273 INFO L78 Accepts]: Start accepts. Automaton has 39333 states and 47467 transitions. Word has length 781 [2024-12-02 08:10:34,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:10:34,274 INFO L471 AbstractCegarLoop]: Abstraction has 39333 states and 47467 transitions. [2024-12-02 08:10:34,274 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 39.02) internal successors, (1951), 50 states have internal predecessors, (1951), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-12-02 08:10:34,274 INFO L276 IsEmpty]: Start isEmpty. Operand 39333 states and 47467 transitions. [2024-12-02 08:10:34,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:10:34,301 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:10:34,301 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:10:34,351 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-12-02 08:10:34,501 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable144,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:10:34,502 INFO L396 AbstractCegarLoop]: === Iteration 146 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:10:34,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:10:34,502 INFO L85 PathProgramCache]: Analyzing trace with hash -2038550880, now seen corresponding path program 1 times [2024-12-02 08:10:34,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:10:34,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225632410] [2024-12-02 08:10:34,502 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:34,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:10:40,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:44,568 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:44,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:10:44,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225632410] [2024-12-02 08:10:44,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225632410] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:10:44,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [668848048] [2024-12-02 08:10:44,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:10:44,569 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:10:44,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:10:44,570 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:10:44,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 08:10:52,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:10:52,906 INFO L256 TraceCheckSpWp]: Trace formula consists of 4817 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-12-02 08:10:52,916 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:10:54,552 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 216 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:10:54,552 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:10:57,718 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 180 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:10:57,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [668848048] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:10:57,718 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:10:57,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10, 11] total 30 [2024-12-02 08:10:57,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263868667] [2024-12-02 08:10:57,719 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:10:57,720 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2024-12-02 08:10:57,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:10:57,721 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-12-02 08:10:57,721 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=773, Unknown=0, NotChecked=0, Total=870 [2024-12-02 08:10:57,721 INFO L87 Difference]: Start difference. First operand 39333 states and 47467 transitions. Second operand has 30 states, 30 states have (on average 69.03333333333333) internal successors, (2071), 30 states have internal predecessors, (2071), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:11:00,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:00,705 INFO L93 Difference]: Finished difference Result 57853 states and 70017 transitions. [2024-12-02 08:11:00,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-12-02 08:11:00,705 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 69.03333333333333) internal successors, (2071), 30 states have internal predecessors, (2071), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 781 [2024-12-02 08:11:00,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:00,732 INFO L225 Difference]: With dead ends: 57853 [2024-12-02 08:11:00,732 INFO L226 Difference]: Without dead ends: 39511 [2024-12-02 08:11:00,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1594 GetRequests, 1548 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=347, Invalid=1909, Unknown=0, NotChecked=0, Total=2256 [2024-12-02 08:11:00,747 INFO L435 NwaCegarLoop]: 1085 mSDtfsCounter, 3570 mSDsluCounter, 14222 mSDsCounter, 0 mSdLazyCounter, 4955 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3573 SdHoareTripleChecker+Valid, 15307 SdHoareTripleChecker+Invalid, 4961 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 4955 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:00,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3573 Valid, 15307 Invalid, 4961 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 4955 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2024-12-02 08:11:00,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39511 states. [2024-12-02 08:11:01,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39511 to 39447. [2024-12-02 08:11:01,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39447 states, 39183 states have (on average 1.2014138784677029) internal successors, (47075), 39183 states have internal predecessors, (47075), 262 states have call successors, (262), 1 states have call predecessors, (262), 1 states have return successors, (262), 262 states have call predecessors, (262), 262 states have call successors, (262) [2024-12-02 08:11:01,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39447 states to 39447 states and 47599 transitions. [2024-12-02 08:11:01,473 INFO L78 Accepts]: Start accepts. Automaton has 39447 states and 47599 transitions. Word has length 781 [2024-12-02 08:11:01,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:01,473 INFO L471 AbstractCegarLoop]: Abstraction has 39447 states and 47599 transitions. [2024-12-02 08:11:01,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 69.03333333333333) internal successors, (2071), 30 states have internal predecessors, (2071), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:11:01,474 INFO L276 IsEmpty]: Start isEmpty. Operand 39447 states and 47599 transitions. [2024-12-02 08:11:01,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:11:01,504 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:01,504 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:01,556 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 08:11:01,704 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable145 [2024-12-02 08:11:01,704 INFO L396 AbstractCegarLoop]: === Iteration 147 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:01,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:01,705 INFO L85 PathProgramCache]: Analyzing trace with hash -348844068, now seen corresponding path program 1 times [2024-12-02 08:11:01,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:01,705 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408883389] [2024-12-02 08:11:01,705 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:01,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:02,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:04,380 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:04,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:04,380 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [408883389] [2024-12-02 08:11:04,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [408883389] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:04,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:11:04,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:11:04,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [497452118] [2024-12-02 08:11:04,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:04,381 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:04,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:04,382 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:04,382 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:11:04,382 INFO L87 Difference]: Start difference. First operand 39447 states and 47599 transitions. Second operand has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:05,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:05,142 INFO L93 Difference]: Finished difference Result 69845 states and 84827 transitions. [2024-12-02 08:11:05,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:05,143 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 781 [2024-12-02 08:11:05,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:05,174 INFO L225 Difference]: With dead ends: 69845 [2024-12-02 08:11:05,174 INFO L226 Difference]: Without dead ends: 51389 [2024-12-02 08:11:05,188 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:11:05,188 INFO L435 NwaCegarLoop]: 2043 mSDtfsCounter, 858 mSDsluCounter, 7286 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 858 SdHoareTripleChecker+Valid, 9329 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:05,188 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [858 Valid, 9329 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:11:05,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51389 states. [2024-12-02 08:11:06,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51389 to 41853. [2024-12-02 08:11:06,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41853 states, 41469 states have (on average 1.203525525091032) internal successors, (49909), 41469 states have internal predecessors, (49909), 382 states have call successors, (382), 1 states have call predecessors, (382), 1 states have return successors, (382), 382 states have call predecessors, (382), 382 states have call successors, (382) [2024-12-02 08:11:06,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41853 states to 41853 states and 50673 transitions. [2024-12-02 08:11:06,153 INFO L78 Accepts]: Start accepts. Automaton has 41853 states and 50673 transitions. Word has length 781 [2024-12-02 08:11:06,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:06,153 INFO L471 AbstractCegarLoop]: Abstraction has 41853 states and 50673 transitions. [2024-12-02 08:11:06,154 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:11:06,154 INFO L276 IsEmpty]: Start isEmpty. Operand 41853 states and 50673 transitions. [2024-12-02 08:11:06,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 08:11:06,192 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:06,192 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:06,192 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable146 [2024-12-02 08:11:06,192 INFO L396 AbstractCegarLoop]: === Iteration 148 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:06,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:06,193 INFO L85 PathProgramCache]: Analyzing trace with hash -1388768601, now seen corresponding path program 1 times [2024-12-02 08:11:06,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:06,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501726466] [2024-12-02 08:11:06,193 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:06,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:16,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:21,689 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:21,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:21,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501726466] [2024-12-02 08:11:21,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501726466] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:21,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [116412225] [2024-12-02 08:11:21,689 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:21,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:21,689 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:21,691 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:21,691 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 08:11:33,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:33,410 INFO L256 TraceCheckSpWp]: Trace formula consists of 4818 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:11:33,416 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:11:33,473 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 217 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 08:11:33,473 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:11:33,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [116412225] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:11:33,473 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:11:33,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [12] total 16 [2024-12-02 08:11:33,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88125910] [2024-12-02 08:11:33,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:11:33,474 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:11:33,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:11:33,475 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:11:33,475 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=209, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:11:33,475 INFO L87 Difference]: Start difference. First operand 41853 states and 50673 transitions. Second operand has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:34,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:11:34,237 INFO L93 Difference]: Finished difference Result 83241 states and 100695 transitions. [2024-12-02 08:11:34,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:11:34,237 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 782 [2024-12-02 08:11:34,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:11:34,269 INFO L225 Difference]: With dead ends: 83241 [2024-12-02 08:11:34,269 INFO L226 Difference]: Without dead ends: 41853 [2024-12-02 08:11:34,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 794 GetRequests, 780 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=209, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:11:34,291 INFO L435 NwaCegarLoop]: 1170 mSDtfsCounter, 0 mSDsluCounter, 4661 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5831 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:11:34,291 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5831 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:11:34,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41853 states. [2024-12-02 08:11:35,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41853 to 41853. [2024-12-02 08:11:35,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41853 states, 41469 states have (on average 1.2022715763582434) internal successors, (49857), 41469 states have internal predecessors, (49857), 382 states have call successors, (382), 1 states have call predecessors, (382), 1 states have return successors, (382), 382 states have call predecessors, (382), 382 states have call successors, (382) [2024-12-02 08:11:35,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41853 states to 41853 states and 50621 transitions. [2024-12-02 08:11:35,856 INFO L78 Accepts]: Start accepts. Automaton has 41853 states and 50621 transitions. Word has length 782 [2024-12-02 08:11:35,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:11:35,856 INFO L471 AbstractCegarLoop]: Abstraction has 41853 states and 50621 transitions. [2024-12-02 08:11:35,856 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:11:35,856 INFO L276 IsEmpty]: Start isEmpty. Operand 41853 states and 50621 transitions. [2024-12-02 08:11:35,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 08:11:35,887 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:11:35,887 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:11:35,943 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 08:11:36,087 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable147 [2024-12-02 08:11:36,087 INFO L396 AbstractCegarLoop]: === Iteration 149 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:11:36,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:11:36,088 INFO L85 PathProgramCache]: Analyzing trace with hash -120512030, now seen corresponding path program 1 times [2024-12-02 08:11:36,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:11:36,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425311084] [2024-12-02 08:11:36,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:36,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:11:46,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:11:50,873 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:11:50,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:11:50,873 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425311084] [2024-12-02 08:11:50,873 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [425311084] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:11:50,873 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874976848] [2024-12-02 08:11:50,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:11:50,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:11:50,873 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:11:50,874 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:11:50,875 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-12-02 08:12:02,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:12:02,842 INFO L256 TraceCheckSpWp]: Trace formula consists of 4821 conjuncts, 115 conjuncts are in the unsatisfiable core [2024-12-02 08:12:02,854 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:12:09,945 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:09,945 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:12:21,923 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:12:21,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874976848] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:12:21,923 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:12:21,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 25, 14] total 46 [2024-12-02 08:12:21,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450843414] [2024-12-02 08:12:21,923 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:12:21,925 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2024-12-02 08:12:21,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:12:21,927 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-12-02 08:12:21,927 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=260, Invalid=1810, Unknown=0, NotChecked=0, Total=2070 [2024-12-02 08:12:21,927 INFO L87 Difference]: Start difference. First operand 41853 states and 50621 transitions. Second operand has 46 states, 46 states have (on average 48.95652173913044) internal successors, (2252), 46 states have internal predecessors, (2252), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:12:28,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:12:28,501 INFO L93 Difference]: Finished difference Result 76061 states and 92228 transitions. [2024-12-02 08:12:28,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-12-02 08:12:28,502 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 48.95652173913044) internal successors, (2252), 46 states have internal predecessors, (2252), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 783 [2024-12-02 08:12:28,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:12:28,546 INFO L225 Difference]: With dead ends: 76061 [2024-12-02 08:12:28,546 INFO L226 Difference]: Without dead ends: 55151 [2024-12-02 08:12:28,574 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1611 GetRequests, 1533 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1542 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=798, Invalid=5522, Unknown=0, NotChecked=0, Total=6320 [2024-12-02 08:12:28,574 INFO L435 NwaCegarLoop]: 1026 mSDtfsCounter, 6556 mSDsluCounter, 21392 mSDsCounter, 0 mSdLazyCounter, 9892 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6556 SdHoareTripleChecker+Valid, 22418 SdHoareTripleChecker+Invalid, 9901 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 9892 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:12:28,574 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6556 Valid, 22418 Invalid, 9901 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [9 Valid, 9892 Invalid, 0 Unknown, 0 Unchecked, 4.8s Time] [2024-12-02 08:12:28,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55151 states. [2024-12-02 08:12:29,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55151 to 41817. [2024-12-02 08:12:29,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41817 states, 41433 states have (on average 1.2015784519585837) internal successors, (49785), 41433 states have internal predecessors, (49785), 382 states have call successors, (382), 1 states have call predecessors, (382), 1 states have return successors, (382), 382 states have call predecessors, (382), 382 states have call successors, (382) [2024-12-02 08:12:29,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41817 states to 41817 states and 50549 transitions. [2024-12-02 08:12:29,492 INFO L78 Accepts]: Start accepts. Automaton has 41817 states and 50549 transitions. Word has length 783 [2024-12-02 08:12:29,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:12:29,493 INFO L471 AbstractCegarLoop]: Abstraction has 41817 states and 50549 transitions. [2024-12-02 08:12:29,493 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 48.95652173913044) internal successors, (2252), 46 states have internal predecessors, (2252), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:12:29,493 INFO L276 IsEmpty]: Start isEmpty. Operand 41817 states and 50549 transitions. [2024-12-02 08:12:29,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 08:12:29,592 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:12:29,592 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:12:29,642 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-12-02 08:12:29,792 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable148,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:12:29,793 INFO L396 AbstractCegarLoop]: === Iteration 150 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:12:29,793 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:12:29,793 INFO L85 PathProgramCache]: Analyzing trace with hash 1442248545, now seen corresponding path program 1 times [2024-12-02 08:12:29,793 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:12:29,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111749996] [2024-12-02 08:12:29,793 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:12:29,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:12:57,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:12:57,714 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:13:22,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:13:23,821 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:13:23,821 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:13:23,822 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:13:23,823 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable149 [2024-12-02 08:13:23,825 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:24,236 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:13:24,239 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:13:24 BoogieIcfgContainer [2024-12-02 08:13:24,239 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:13:24,239 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:13:24,239 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:13:24,240 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:13:24,240 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:01:33" (3/4) ... [2024-12-02 08:13:24,242 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 08:13:24,243 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:13:24,243 INFO L158 Benchmark]: Toolchain (without parser) took 715954.42ms. Allocated memory was 142.6MB in the beginning and 3.9GB in the end (delta: 3.7GB). Free memory was 117.7MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB. [2024-12-02 08:13:24,243 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 142.6MB. Free memory is still 81.3MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: CACSL2BoogieTranslator took 565.37ms. Allocated memory is still 142.6MB. Free memory was 117.5MB in the beginning and 102.9MB in the end (delta: 14.6MB). Peak memory consumption was 67.4MB. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: Boogie Procedure Inliner took 295.84ms. Allocated memory is still 142.6MB. Free memory was 102.9MB in the beginning and 58.0MB in the end (delta: 44.9MB). Peak memory consumption was 75.4MB. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: Boogie Preprocessor took 417.19ms. Allocated memory was 142.6MB in the beginning and 285.2MB in the end (delta: 142.6MB). Free memory was 58.0MB in the beginning and 191.9MB in the end (delta: -133.9MB). Peak memory consumption was 52.5MB. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: RCFGBuilder took 3685.79ms. Allocated memory was 285.2MB in the beginning and 570.4MB in the end (delta: 285.2MB). Free memory was 191.9MB in the beginning and 429.6MB in the end (delta: -237.7MB). Peak memory consumption was 146.7MB. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: TraceAbstraction took 710979.96ms. Allocated memory was 570.4MB in the beginning and 3.9GB in the end (delta: 3.3GB). Free memory was 429.6MB in the beginning and 2.3GB in the end (delta: -1.9GB). Peak memory consumption was 2.5GB. Max. memory is 16.1GB. [2024-12-02 08:13:24,244 INFO L158 Benchmark]: Witness Printer took 3.60ms. Allocated memory is still 3.9GB. Free memory was 2.3GB in the beginning and 2.3GB in the end (delta: 139.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:13:24,245 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 142.6MB. Free memory is still 81.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 565.37ms. Allocated memory is still 142.6MB. Free memory was 117.5MB in the beginning and 102.9MB in the end (delta: 14.6MB). Peak memory consumption was 67.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 295.84ms. Allocated memory is still 142.6MB. Free memory was 102.9MB in the beginning and 58.0MB in the end (delta: 44.9MB). Peak memory consumption was 75.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 417.19ms. Allocated memory was 142.6MB in the beginning and 285.2MB in the end (delta: 142.6MB). Free memory was 58.0MB in the beginning and 191.9MB in the end (delta: -133.9MB). Peak memory consumption was 52.5MB. Max. memory is 16.1GB. * RCFGBuilder took 3685.79ms. Allocated memory was 285.2MB in the beginning and 570.4MB in the end (delta: 285.2MB). Free memory was 191.9MB in the beginning and 429.6MB in the end (delta: -237.7MB). Peak memory consumption was 146.7MB. Max. memory is 16.1GB. * TraceAbstraction took 710979.96ms. Allocated memory was 570.4MB in the beginning and 3.9GB in the end (delta: 3.3GB). Free memory was 429.6MB in the beginning and 2.3GB in the end (delta: -1.9GB). Peak memory consumption was 2.5GB. Max. memory is 16.1GB. * Witness Printer took 3.60ms. Allocated memory is still 3.9GB. Free memory was 2.3GB in the beginning and 2.3GB in the end (delta: 139.9kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 584, overapproximation of bitwiseOr at line 199, overapproximation of bitwiseOr at line 180, overapproximation of bitwiseAnd at line 312, overapproximation of bitwiseAnd at line 792, overapproximation of bitwiseAnd at line 773, overapproximation of bitwiseAnd at line 372, overapproximation of bitwiseAnd at line 282, overapproximation of bitwiseAnd at line 390, overapproximation of bitwiseAnd at line 360, overapproximation of bitwiseAnd at line 378, overapproximation of bitwiseAnd at line 288, overapproximation of bitwiseAnd at line 1039, overapproximation of bitwiseAnd at line 276, overapproximation of bitwiseAnd at line 300, overapproximation of bitwiseAnd at line 593, overapproximation of bitwiseAnd at line 1058, overapproximation of bitwiseAnd at line 330, overapproximation of bitwiseAnd at line 925, overapproximation of bitwiseAnd at line 306, overapproximation of bitwiseAnd at line 348, overapproximation of bitwiseAnd at line 164, overapproximation of bitwiseAnd at line 408, overapproximation of bitwiseAnd at line 716, overapproximation of bitwiseAnd at line 963, overapproximation of bitwiseAnd at line 1265, overapproximation of bitwiseAnd at line 420, overapproximation of bitwiseAnd at line 402, overapproximation of bitwiseAnd at line 735, overapproximation of bitwiseAnd at line 754, overapproximation of bitwiseAnd at line 868, overapproximation of bitwiseAnd at line 982, overapproximation of bitwiseAnd at line 354, overapproximation of bitwiseAnd at line 659, overapproximation of bitwiseAnd at line 811, overapproximation of bitwiseAnd at line 887, overapproximation of bitwiseAnd at line 1134, overapproximation of bitwiseAnd at line 366, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 906, overapproximation of bitwiseAnd at line 396, overapproximation of bitwiseAnd at line 830, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 324, overapproximation of bitwiseAnd at line 678, overapproximation of bitwiseAnd at line 1020, overapproximation of bitwiseAnd at line 1115, overapproximation of bitwiseAnd at line 1153, overapproximation of bitwiseAnd at line 1191, overapproximation of bitwiseAnd at line 160, overapproximation of bitwiseAnd at line 264, overapproximation of bitwiseAnd at line 336, overapproximation of bitwiseAnd at line 256, overapproximation of bitwiseAnd at line 414, overapproximation of bitwiseAnd at line 432, overapproximation of bitwiseAnd at line 426, overapproximation of bitwiseAnd at line 849, overapproximation of bitwiseAnd at line 697, overapproximation of bitwiseAnd at line 1001, overapproximation of bitwiseAnd at line 1077, overapproximation of bitwiseAnd at line 318. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L41] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L42] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L44] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L45] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L47] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L48] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L50] const SORT_13 var_15 = 32; [L51] const SORT_19 var_20 = 31; [L52] const SORT_19 var_25 = 30; [L53] const SORT_19 var_30 = 29; [L54] const SORT_19 var_35 = 28; [L55] const SORT_19 var_40 = 27; [L56] const SORT_19 var_45 = 26; [L57] const SORT_19 var_50 = 25; [L58] const SORT_19 var_55 = 24; [L59] const SORT_19 var_60 = 23; [L60] const SORT_19 var_65 = 22; [L61] const SORT_19 var_70 = 21; [L62] const SORT_19 var_75 = 20; [L63] const SORT_19 var_80 = 19; [L64] const SORT_19 var_85 = 18; [L65] const SORT_19 var_90 = 17; [L66] const SORT_19 var_95 = 16; [L67] const SORT_100 var_101 = 15; [L68] const SORT_100 var_106 = 14; [L69] const SORT_100 var_111 = 13; [L70] const SORT_100 var_116 = 12; [L71] const SORT_100 var_121 = 11; [L72] const SORT_100 var_126 = 10; [L73] const SORT_100 var_131 = 9; [L74] const SORT_100 var_136 = 8; [L75] const SORT_141 var_142 = 7; [L76] const SORT_141 var_147 = 6; [L77] const SORT_141 var_152 = 5; [L78] const SORT_141 var_157 = 4; [L79] const SORT_162 var_163 = 3; [L80] const SORT_162 var_168 = 2; [L81] const SORT_1 var_173 = 1; [L82] const SORT_13 var_186 = 33; [L83] const SORT_11 var_203 = 0; [L84] const SORT_1 var_233 = 0; [L85] const SORT_3 var_582 = 0; [L87] SORT_1 input_2; [L88] SORT_3 input_4; [L89] SORT_1 input_5; [L90] SORT_1 input_6; [L91] SORT_1 input_7; [L92] SORT_1 input_8; [L93] SORT_3 input_9; [L94] SORT_1 input_231; [L96] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L96] SORT_3 state_10 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L97] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L98] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L98] SORT_3 state_18 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L99] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L99] SORT_3 state_24 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L100] SORT_3 state_29 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L101] SORT_3 state_34 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L102] SORT_3 state_39 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L103] SORT_3 state_44 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L104] SORT_3 state_49 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L105] SORT_3 state_54 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L106] SORT_3 state_59 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L107] SORT_3 state_64 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L108] SORT_3 state_69 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L109] SORT_3 state_74 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L110] SORT_3 state_79 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L111] SORT_3 state_84 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L112] SORT_3 state_89 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L113] SORT_3 state_94 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L114] SORT_3 state_99 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L115] SORT_3 state_105 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L116] SORT_3 state_110 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L117] SORT_3 state_115 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L118] SORT_3 state_120 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L119] SORT_3 state_125 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L120] SORT_3 state_130 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L121] SORT_3 state_135 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L122] SORT_3 state_140 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L123] SORT_3 state_146 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L124] SORT_3 state_151 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L125] SORT_3 state_156 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L126] SORT_3 state_161 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L127] SORT_3 state_167 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L128] SORT_3 state_172 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L129] SORT_3 state_177 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L130] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L131] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L132] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L133] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L134] EXPR __VERIFIER_nondet_ushort() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L134] SORT_3 state_209 = __VERIFIER_nondet_ushort() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L135] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L136] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L138] SORT_1 init_214_arg_1 = var_173; [L139] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_ushort() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_ushort() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=255, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=256, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=65535, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=0, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=0, var_236_arg_1=-256, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND FALSE !(!(cond)) [L596] RET __VERIFIER_assert(!(bad_237_arg_0)) [L598] SORT_11 var_283_arg_0 = state_282; [L599] SORT_13 var_283 = var_283_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] EXPR var_283 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] var_283 = var_283 & mask_SORT_13 [L601] SORT_13 var_459_arg_0 = var_283; [L602] SORT_13 var_459_arg_1 = var_15; [L603] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L604] SORT_1 var_460_arg_0 = input_6; [L605] SORT_1 var_460_arg_1 = var_459; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_460_arg_0=0, var_460_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] EXPR var_460_arg_0 & var_460_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L607] EXPR var_460 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] var_460 = var_460 & mask_SORT_1 [L608] SORT_1 var_581_arg_0 = var_460; [L609] SORT_3 var_581_arg_1 = input_4; [L610] SORT_3 var_581_arg_2 = state_10; [L611] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L612] SORT_1 var_583_arg_0 = input_7; [L613] SORT_3 var_583_arg_1 = var_582; [L614] SORT_3 var_583_arg_2 = var_581; [L615] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L616] SORT_3 next_584_arg_1 = var_583; [L617] SORT_1 var_241_arg_0 = input_6; [L618] SORT_1 var_241_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_241_arg_0=0, var_241_arg_1=256, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] EXPR var_241_arg_0 | var_241_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L620] SORT_1 var_242_arg_0 = var_241; [L621] SORT_1 var_242_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242_arg_0=0, var_242_arg_1=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] EXPR var_242_arg_0 | var_242_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L623] EXPR var_242 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] var_242 = var_242 & mask_SORT_1 [L624] SORT_1 var_512_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_512_arg_0=256, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] EXPR var_512_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L626] SORT_11 var_512 = var_512_arg_0; [L627] SORT_11 var_513_arg_0 = state_12; [L628] SORT_11 var_513_arg_1 = var_512; [L629] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L630] SORT_1 var_585_arg_0 = var_242; [L631] SORT_11 var_585_arg_1 = var_513; [L632] SORT_11 var_585_arg_2 = state_12; [L633] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L634] SORT_1 var_586_arg_0 = input_7; [L635] SORT_11 var_586_arg_1 = var_203; [L636] SORT_11 var_586_arg_2 = var_585; [L637] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L638] SORT_11 next_587_arg_1 = var_586; [L639] SORT_19 var_452_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_452_arg_0=31, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] EXPR var_452_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L641] SORT_13 var_452 = var_452_arg_0; [L642] SORT_13 var_453_arg_0 = var_283; [L643] SORT_13 var_453_arg_1 = var_452; [L644] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L645] SORT_1 var_454_arg_0 = input_6; [L646] SORT_1 var_454_arg_1 = var_453; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_454_arg_0=0, var_454_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] EXPR var_454_arg_0 & var_454_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L648] EXPR var_454 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] var_454 = var_454 & mask_SORT_1 [L649] SORT_1 var_588_arg_0 = var_454; [L650] SORT_3 var_588_arg_1 = input_4; [L651] SORT_3 var_588_arg_2 = state_18; [L652] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L653] SORT_1 var_589_arg_0 = input_7; [L654] SORT_3 var_589_arg_1 = var_582; [L655] SORT_3 var_589_arg_2 = var_588; [L656] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L657] SORT_3 next_590_arg_1 = var_589; [L658] SORT_19 var_445_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_445_arg_0=30, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] EXPR var_445_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L660] SORT_13 var_445 = var_445_arg_0; [L661] SORT_13 var_446_arg_0 = var_283; [L662] SORT_13 var_446_arg_1 = var_445; [L663] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L664] SORT_1 var_447_arg_0 = input_6; [L665] SORT_1 var_447_arg_1 = var_446; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_447_arg_0=0, var_447_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] EXPR var_447_arg_0 & var_447_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L667] EXPR var_447 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] var_447 = var_447 & mask_SORT_1 [L668] SORT_1 var_591_arg_0 = var_447; [L669] SORT_3 var_591_arg_1 = input_4; [L670] SORT_3 var_591_arg_2 = state_24; [L671] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L672] SORT_1 var_592_arg_0 = input_7; [L673] SORT_3 var_592_arg_1 = var_582; [L674] SORT_3 var_592_arg_2 = var_591; [L675] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L676] SORT_3 next_593_arg_1 = var_592; [L677] SORT_19 var_431_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_431_arg_0=29, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] EXPR var_431_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L679] SORT_13 var_431 = var_431_arg_0; [L680] SORT_13 var_432_arg_0 = var_283; [L681] SORT_13 var_432_arg_1 = var_431; [L682] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L683] SORT_1 var_433_arg_0 = input_6; [L684] SORT_1 var_433_arg_1 = var_432; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_433_arg_0=0, var_433_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] EXPR var_433_arg_0 & var_433_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L686] EXPR var_433 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] var_433 = var_433 & mask_SORT_1 [L687] SORT_1 var_594_arg_0 = var_433; [L688] SORT_3 var_594_arg_1 = input_4; [L689] SORT_3 var_594_arg_2 = state_29; [L690] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L691] SORT_1 var_595_arg_0 = input_7; [L692] SORT_3 var_595_arg_1 = var_582; [L693] SORT_3 var_595_arg_2 = var_594; [L694] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L695] SORT_3 next_596_arg_1 = var_595; [L696] SORT_19 var_424_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_424_arg_0=28, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] EXPR var_424_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L698] SORT_13 var_424 = var_424_arg_0; [L699] SORT_13 var_425_arg_0 = var_283; [L700] SORT_13 var_425_arg_1 = var_424; [L701] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L702] SORT_1 var_426_arg_0 = input_6; [L703] SORT_1 var_426_arg_1 = var_425; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_426_arg_0=0, var_426_arg_1=1, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] EXPR var_426_arg_0 & var_426_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L705] EXPR var_426 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] var_426 = var_426 & mask_SORT_1 [L706] SORT_1 var_597_arg_0 = var_426; [L707] SORT_3 var_597_arg_1 = input_4; [L708] SORT_3 var_597_arg_2 = state_34; [L709] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L710] SORT_1 var_598_arg_0 = input_7; [L711] SORT_3 var_598_arg_1 = var_582; [L712] SORT_3 var_598_arg_2 = var_597; [L713] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L714] SORT_3 next_599_arg_1 = var_598; [L715] SORT_19 var_417_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_417_arg_0=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] EXPR var_417_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L717] SORT_13 var_417 = var_417_arg_0; [L718] SORT_13 var_418_arg_0 = var_283; [L719] SORT_13 var_418_arg_1 = var_417; [L720] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L721] SORT_1 var_419_arg_0 = input_6; [L722] SORT_1 var_419_arg_1 = var_418; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_419_arg_0=0, var_419_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] EXPR var_419_arg_0 & var_419_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L724] EXPR var_419 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] var_419 = var_419 & mask_SORT_1 [L725] SORT_1 var_600_arg_0 = var_419; [L726] SORT_3 var_600_arg_1 = input_4; [L727] SORT_3 var_600_arg_2 = state_39; [L728] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L729] SORT_1 var_601_arg_0 = input_7; [L730] SORT_3 var_601_arg_1 = var_582; [L731] SORT_3 var_601_arg_2 = var_600; [L732] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L733] SORT_3 next_602_arg_1 = var_601; [L734] SORT_19 var_410_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_410_arg_0=26, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] EXPR var_410_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L736] SORT_13 var_410 = var_410_arg_0; [L737] SORT_13 var_411_arg_0 = var_283; [L738] SORT_13 var_411_arg_1 = var_410; [L739] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L740] SORT_1 var_412_arg_0 = input_6; [L741] SORT_1 var_412_arg_1 = var_411; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_412_arg_0=0, var_412_arg_1=1, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] EXPR var_412_arg_0 & var_412_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L743] EXPR var_412 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] var_412 = var_412 & mask_SORT_1 [L744] SORT_1 var_603_arg_0 = var_412; [L745] SORT_3 var_603_arg_1 = input_4; [L746] SORT_3 var_603_arg_2 = state_44; [L747] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L748] SORT_1 var_604_arg_0 = input_7; [L749] SORT_3 var_604_arg_1 = var_582; [L750] SORT_3 var_604_arg_2 = var_603; [L751] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L752] SORT_3 next_605_arg_1 = var_604; [L753] SORT_19 var_403_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_403_arg_0=25, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] EXPR var_403_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L755] SORT_13 var_403 = var_403_arg_0; [L756] SORT_13 var_404_arg_0 = var_283; [L757] SORT_13 var_404_arg_1 = var_403; [L758] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L759] SORT_1 var_405_arg_0 = input_6; [L760] SORT_1 var_405_arg_1 = var_404; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_405_arg_0=0, var_405_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] EXPR var_405_arg_0 & var_405_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L762] EXPR var_405 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] var_405 = var_405 & mask_SORT_1 [L763] SORT_1 var_606_arg_0 = var_405; [L764] SORT_3 var_606_arg_1 = input_4; [L765] SORT_3 var_606_arg_2 = state_49; [L766] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L767] SORT_1 var_607_arg_0 = input_7; [L768] SORT_3 var_607_arg_1 = var_582; [L769] SORT_3 var_607_arg_2 = var_606; [L770] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L771] SORT_3 next_608_arg_1 = var_607; [L772] SORT_19 var_396_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_396_arg_0=24, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] EXPR var_396_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L774] SORT_13 var_396 = var_396_arg_0; [L775] SORT_13 var_397_arg_0 = var_283; [L776] SORT_13 var_397_arg_1 = var_396; [L777] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L778] SORT_1 var_398_arg_0 = input_6; [L779] SORT_1 var_398_arg_1 = var_397; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_398_arg_0=0, var_398_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] EXPR var_398_arg_0 & var_398_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L781] EXPR var_398 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] var_398 = var_398 & mask_SORT_1 [L782] SORT_1 var_609_arg_0 = var_398; [L783] SORT_3 var_609_arg_1 = input_4; [L784] SORT_3 var_609_arg_2 = state_54; [L785] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L786] SORT_1 var_610_arg_0 = input_7; [L787] SORT_3 var_610_arg_1 = var_582; [L788] SORT_3 var_610_arg_2 = var_609; [L789] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L790] SORT_3 next_611_arg_1 = var_610; [L791] SORT_19 var_389_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_389_arg_0=23, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] EXPR var_389_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L793] SORT_13 var_389 = var_389_arg_0; [L794] SORT_13 var_390_arg_0 = var_283; [L795] SORT_13 var_390_arg_1 = var_389; [L796] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L797] SORT_1 var_391_arg_0 = input_6; [L798] SORT_1 var_391_arg_1 = var_390; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_391_arg_0=0, var_391_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] EXPR var_391_arg_0 & var_391_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L800] EXPR var_391 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] var_391 = var_391 & mask_SORT_1 [L801] SORT_1 var_612_arg_0 = var_391; [L802] SORT_3 var_612_arg_1 = input_4; [L803] SORT_3 var_612_arg_2 = state_59; [L804] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L805] SORT_1 var_613_arg_0 = input_7; [L806] SORT_3 var_613_arg_1 = var_582; [L807] SORT_3 var_613_arg_2 = var_612; [L808] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L809] SORT_3 next_614_arg_1 = var_613; [L810] SORT_19 var_382_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_382_arg_0=22, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] EXPR var_382_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L812] SORT_13 var_382 = var_382_arg_0; [L813] SORT_13 var_383_arg_0 = var_283; [L814] SORT_13 var_383_arg_1 = var_382; [L815] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L816] SORT_1 var_384_arg_0 = input_6; [L817] SORT_1 var_384_arg_1 = var_383; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_384_arg_0=0, var_384_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] EXPR var_384_arg_0 & var_384_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L819] EXPR var_384 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] var_384 = var_384 & mask_SORT_1 [L820] SORT_1 var_615_arg_0 = var_384; [L821] SORT_3 var_615_arg_1 = input_4; [L822] SORT_3 var_615_arg_2 = state_64; [L823] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L824] SORT_1 var_616_arg_0 = input_7; [L825] SORT_3 var_616_arg_1 = var_582; [L826] SORT_3 var_616_arg_2 = var_615; [L827] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L828] SORT_3 next_617_arg_1 = var_616; [L829] SORT_19 var_375_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_375_arg_0=21, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] EXPR var_375_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L831] SORT_13 var_375 = var_375_arg_0; [L832] SORT_13 var_376_arg_0 = var_283; [L833] SORT_13 var_376_arg_1 = var_375; [L834] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L835] SORT_1 var_377_arg_0 = input_6; [L836] SORT_1 var_377_arg_1 = var_376; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_377_arg_0=0, var_377_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] EXPR var_377_arg_0 & var_377_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L838] EXPR var_377 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] var_377 = var_377 & mask_SORT_1 [L839] SORT_1 var_618_arg_0 = var_377; [L840] SORT_3 var_618_arg_1 = input_4; [L841] SORT_3 var_618_arg_2 = state_69; [L842] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L843] SORT_1 var_619_arg_0 = input_7; [L844] SORT_3 var_619_arg_1 = var_582; [L845] SORT_3 var_619_arg_2 = var_618; [L846] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L847] SORT_3 next_620_arg_1 = var_619; [L848] SORT_19 var_368_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_368_arg_0=20, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] EXPR var_368_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L850] SORT_13 var_368 = var_368_arg_0; [L851] SORT_13 var_369_arg_0 = var_283; [L852] SORT_13 var_369_arg_1 = var_368; [L853] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L854] SORT_1 var_370_arg_0 = input_6; [L855] SORT_1 var_370_arg_1 = var_369; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_370_arg_0=0, var_370_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] EXPR var_370_arg_0 & var_370_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L857] EXPR var_370 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] var_370 = var_370 & mask_SORT_1 [L858] SORT_1 var_621_arg_0 = var_370; [L859] SORT_3 var_621_arg_1 = input_4; [L860] SORT_3 var_621_arg_2 = state_74; [L861] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L862] SORT_1 var_622_arg_0 = input_7; [L863] SORT_3 var_622_arg_1 = var_582; [L864] SORT_3 var_622_arg_2 = var_621; [L865] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L866] SORT_3 next_623_arg_1 = var_622; [L867] SORT_19 var_354_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_354_arg_0=19, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] EXPR var_354_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L869] SORT_13 var_354 = var_354_arg_0; [L870] SORT_13 var_355_arg_0 = var_283; [L871] SORT_13 var_355_arg_1 = var_354; [L872] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L873] SORT_1 var_356_arg_0 = input_6; [L874] SORT_1 var_356_arg_1 = var_355; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_356_arg_0=0, var_356_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] EXPR var_356_arg_0 & var_356_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L876] EXPR var_356 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] var_356 = var_356 & mask_SORT_1 [L877] SORT_1 var_624_arg_0 = var_356; [L878] SORT_3 var_624_arg_1 = input_4; [L879] SORT_3 var_624_arg_2 = state_79; [L880] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L881] SORT_1 var_625_arg_0 = input_7; [L882] SORT_3 var_625_arg_1 = var_582; [L883] SORT_3 var_625_arg_2 = var_624; [L884] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L885] SORT_3 next_626_arg_1 = var_625; [L886] SORT_19 var_347_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_347_arg_0=18, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] EXPR var_347_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L888] SORT_13 var_347 = var_347_arg_0; [L889] SORT_13 var_348_arg_0 = var_283; [L890] SORT_13 var_348_arg_1 = var_347; [L891] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L892] SORT_1 var_349_arg_0 = input_6; [L893] SORT_1 var_349_arg_1 = var_348; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_349_arg_0=0, var_349_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] EXPR var_349_arg_0 & var_349_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L895] EXPR var_349 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] var_349 = var_349 & mask_SORT_1 [L896] SORT_1 var_627_arg_0 = var_349; [L897] SORT_3 var_627_arg_1 = input_4; [L898] SORT_3 var_627_arg_2 = state_84; [L899] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L900] SORT_1 var_628_arg_0 = input_7; [L901] SORT_3 var_628_arg_1 = var_582; [L902] SORT_3 var_628_arg_2 = var_627; [L903] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L904] SORT_3 next_629_arg_1 = var_628; [L905] SORT_19 var_340_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_340_arg_0=17, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] EXPR var_340_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L907] SORT_13 var_340 = var_340_arg_0; [L908] SORT_13 var_341_arg_0 = var_283; [L909] SORT_13 var_341_arg_1 = var_340; [L910] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L911] SORT_1 var_342_arg_0 = input_6; [L912] SORT_1 var_342_arg_1 = var_341; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_342_arg_0=0, var_342_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] EXPR var_342_arg_0 & var_342_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L914] EXPR var_342 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] var_342 = var_342 & mask_SORT_1 [L915] SORT_1 var_630_arg_0 = var_342; [L916] SORT_3 var_630_arg_1 = input_4; [L917] SORT_3 var_630_arg_2 = state_89; [L918] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L919] SORT_1 var_631_arg_0 = input_7; [L920] SORT_3 var_631_arg_1 = var_582; [L921] SORT_3 var_631_arg_2 = var_630; [L922] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L923] SORT_3 next_632_arg_1 = var_631; [L924] SORT_19 var_333_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_333_arg_0=16, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] EXPR var_333_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L926] SORT_13 var_333 = var_333_arg_0; [L927] SORT_13 var_334_arg_0 = var_283; [L928] SORT_13 var_334_arg_1 = var_333; [L929] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L930] SORT_1 var_335_arg_0 = input_6; [L931] SORT_1 var_335_arg_1 = var_334; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_335_arg_0=0, var_335_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] EXPR var_335_arg_0 & var_335_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L933] EXPR var_335 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] var_335 = var_335 & mask_SORT_1 [L934] SORT_1 var_633_arg_0 = var_335; [L935] SORT_3 var_633_arg_1 = input_4; [L936] SORT_3 var_633_arg_2 = state_94; [L937] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L938] SORT_1 var_634_arg_0 = input_7; [L939] SORT_3 var_634_arg_1 = var_582; [L940] SORT_3 var_634_arg_2 = var_633; [L941] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L942] SORT_3 next_635_arg_1 = var_634; [L943] SORT_100 var_326_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_326_arg_0=15, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] EXPR var_326_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L945] SORT_13 var_326 = var_326_arg_0; [L946] SORT_13 var_327_arg_0 = var_283; [L947] SORT_13 var_327_arg_1 = var_326; [L948] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L949] SORT_1 var_328_arg_0 = input_6; [L950] SORT_1 var_328_arg_1 = var_327; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_328_arg_0=0, var_328_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] EXPR var_328_arg_0 & var_328_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L952] EXPR var_328 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] var_328 = var_328 & mask_SORT_1 [L953] SORT_1 var_636_arg_0 = var_328; [L954] SORT_3 var_636_arg_1 = input_4; [L955] SORT_3 var_636_arg_2 = state_99; [L956] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L957] SORT_1 var_637_arg_0 = input_7; [L958] SORT_3 var_637_arg_1 = var_582; [L959] SORT_3 var_637_arg_2 = var_636; [L960] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L961] SORT_3 next_638_arg_1 = var_637; [L962] SORT_100 var_319_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_319_arg_0=14, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] EXPR var_319_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L964] SORT_13 var_319 = var_319_arg_0; [L965] SORT_13 var_320_arg_0 = var_283; [L966] SORT_13 var_320_arg_1 = var_319; [L967] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L968] SORT_1 var_321_arg_0 = input_6; [L969] SORT_1 var_321_arg_1 = var_320; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_321_arg_0=0, var_321_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] EXPR var_321_arg_0 & var_321_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L971] EXPR var_321 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] var_321 = var_321 & mask_SORT_1 [L972] SORT_1 var_639_arg_0 = var_321; [L973] SORT_3 var_639_arg_1 = input_4; [L974] SORT_3 var_639_arg_2 = state_105; [L975] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L976] SORT_1 var_640_arg_0 = input_7; [L977] SORT_3 var_640_arg_1 = var_582; [L978] SORT_3 var_640_arg_2 = var_639; [L979] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L980] SORT_3 next_641_arg_1 = var_640; [L981] SORT_100 var_312_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_312_arg_0=13, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] EXPR var_312_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L983] SORT_13 var_312 = var_312_arg_0; [L984] SORT_13 var_313_arg_0 = var_283; [L985] SORT_13 var_313_arg_1 = var_312; [L986] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L987] SORT_1 var_314_arg_0 = input_6; [L988] SORT_1 var_314_arg_1 = var_313; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_314_arg_0=0, var_314_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] EXPR var_314_arg_0 & var_314_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L990] EXPR var_314 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] var_314 = var_314 & mask_SORT_1 [L991] SORT_1 var_642_arg_0 = var_314; [L992] SORT_3 var_642_arg_1 = input_4; [L993] SORT_3 var_642_arg_2 = state_110; [L994] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L995] SORT_1 var_643_arg_0 = input_7; [L996] SORT_3 var_643_arg_1 = var_582; [L997] SORT_3 var_643_arg_2 = var_642; [L998] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L999] SORT_3 next_644_arg_1 = var_643; [L1000] SORT_100 var_305_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_305_arg_0=12, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] EXPR var_305_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1002] SORT_13 var_305 = var_305_arg_0; [L1003] SORT_13 var_306_arg_0 = var_283; [L1004] SORT_13 var_306_arg_1 = var_305; [L1005] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1006] SORT_1 var_307_arg_0 = input_6; [L1007] SORT_1 var_307_arg_1 = var_306; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_307_arg_0=0, var_307_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] EXPR var_307_arg_0 & var_307_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1009] EXPR var_307 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] var_307 = var_307 & mask_SORT_1 [L1010] SORT_1 var_645_arg_0 = var_307; [L1011] SORT_3 var_645_arg_1 = input_4; [L1012] SORT_3 var_645_arg_2 = state_115; [L1013] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1014] SORT_1 var_646_arg_0 = input_7; [L1015] SORT_3 var_646_arg_1 = var_582; [L1016] SORT_3 var_646_arg_2 = var_645; [L1017] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1018] SORT_3 next_647_arg_1 = var_646; [L1019] SORT_100 var_298_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_298_arg_0=11, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] EXPR var_298_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1021] SORT_13 var_298 = var_298_arg_0; [L1022] SORT_13 var_299_arg_0 = var_283; [L1023] SORT_13 var_299_arg_1 = var_298; [L1024] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1025] SORT_1 var_300_arg_0 = input_6; [L1026] SORT_1 var_300_arg_1 = var_299; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_300_arg_0=0, var_300_arg_1=1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1028] EXPR var_300 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] var_300 = var_300 & mask_SORT_1 [L1029] SORT_1 var_648_arg_0 = var_300; [L1030] SORT_3 var_648_arg_1 = input_4; [L1031] SORT_3 var_648_arg_2 = state_120; [L1032] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1033] SORT_1 var_649_arg_0 = input_7; [L1034] SORT_3 var_649_arg_1 = var_582; [L1035] SORT_3 var_649_arg_2 = var_648; [L1036] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1037] SORT_3 next_650_arg_1 = var_649; [L1038] SORT_100 var_291_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_291_arg_0=10, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] EXPR var_291_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1040] SORT_13 var_291 = var_291_arg_0; [L1041] SORT_13 var_292_arg_0 = var_283; [L1042] SORT_13 var_292_arg_1 = var_291; [L1043] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1044] SORT_1 var_293_arg_0 = input_6; [L1045] SORT_1 var_293_arg_1 = var_292; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_293_arg_0=0, var_293_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1047] EXPR var_293 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] var_293 = var_293 & mask_SORT_1 [L1048] SORT_1 var_651_arg_0 = var_293; [L1049] SORT_3 var_651_arg_1 = input_4; [L1050] SORT_3 var_651_arg_2 = state_125; [L1051] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1052] SORT_1 var_652_arg_0 = input_7; [L1053] SORT_3 var_652_arg_1 = var_582; [L1054] SORT_3 var_652_arg_2 = var_651; [L1055] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1056] SORT_3 next_653_arg_1 = var_652; [L1057] SORT_100 var_507_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_507_arg_0=9, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] EXPR var_507_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1059] SORT_13 var_507 = var_507_arg_0; [L1060] SORT_13 var_508_arg_0 = var_283; [L1061] SORT_13 var_508_arg_1 = var_507; [L1062] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1063] SORT_1 var_509_arg_0 = input_6; [L1064] SORT_1 var_509_arg_1 = var_508; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_509_arg_0=0, var_509_arg_1=1, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] EXPR var_509_arg_0 & var_509_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1066] EXPR var_509 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] var_509 = var_509 & mask_SORT_1 [L1067] SORT_1 var_654_arg_0 = var_509; [L1068] SORT_3 var_654_arg_1 = input_4; [L1069] SORT_3 var_654_arg_2 = state_130; [L1070] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1071] SORT_1 var_655_arg_0 = input_7; [L1072] SORT_3 var_655_arg_1 = var_582; [L1073] SORT_3 var_655_arg_2 = var_654; [L1074] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1075] SORT_3 next_656_arg_1 = var_655; [L1076] SORT_100 var_500_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_500_arg_0=8, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] EXPR var_500_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1078] SORT_13 var_500 = var_500_arg_0; [L1079] SORT_13 var_501_arg_0 = var_283; [L1080] SORT_13 var_501_arg_1 = var_500; [L1081] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1082] SORT_1 var_502_arg_0 = input_6; [L1083] SORT_1 var_502_arg_1 = var_501; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_502_arg_0=0, var_502_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] EXPR var_502_arg_0 & var_502_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1085] EXPR var_502 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] var_502 = var_502 & mask_SORT_1 [L1086] SORT_1 var_657_arg_0 = var_502; [L1087] SORT_3 var_657_arg_1 = input_4; [L1088] SORT_3 var_657_arg_2 = state_135; [L1089] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1090] SORT_1 var_658_arg_0 = input_7; [L1091] SORT_3 var_658_arg_1 = var_582; [L1092] SORT_3 var_658_arg_2 = var_657; [L1093] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1094] SORT_3 next_659_arg_1 = var_658; [L1095] SORT_141 var_493_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_493_arg_0=7, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] EXPR var_493_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1097] SORT_13 var_493 = var_493_arg_0; [L1098] SORT_13 var_494_arg_0 = var_283; [L1099] SORT_13 var_494_arg_1 = var_493; [L1100] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1101] SORT_1 var_495_arg_0 = input_6; [L1102] SORT_1 var_495_arg_1 = var_494; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_495_arg_0=0, var_495_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] EXPR var_495_arg_0 & var_495_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1104] EXPR var_495 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] var_495 = var_495 & mask_SORT_1 [L1105] SORT_1 var_660_arg_0 = var_495; [L1106] SORT_3 var_660_arg_1 = input_4; [L1107] SORT_3 var_660_arg_2 = state_140; [L1108] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1109] SORT_1 var_661_arg_0 = input_7; [L1110] SORT_3 var_661_arg_1 = var_582; [L1111] SORT_3 var_661_arg_2 = var_660; [L1112] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1113] SORT_3 next_662_arg_1 = var_661; [L1114] SORT_141 var_486_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_486_arg_0=6, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] EXPR var_486_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1116] SORT_13 var_486 = var_486_arg_0; [L1117] SORT_13 var_487_arg_0 = var_283; [L1118] SORT_13 var_487_arg_1 = var_486; [L1119] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1120] SORT_1 var_488_arg_0 = input_6; [L1121] SORT_1 var_488_arg_1 = var_487; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_488_arg_0=0, var_488_arg_1=1, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] EXPR var_488_arg_0 & var_488_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1123] EXPR var_488 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] var_488 = var_488 & mask_SORT_1 [L1124] SORT_1 var_663_arg_0 = var_488; [L1125] SORT_3 var_663_arg_1 = input_4; [L1126] SORT_3 var_663_arg_2 = state_146; [L1127] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1128] SORT_1 var_664_arg_0 = input_7; [L1129] SORT_3 var_664_arg_1 = var_582; [L1130] SORT_3 var_664_arg_2 = var_663; [L1131] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1132] SORT_3 next_665_arg_1 = var_664; [L1133] SORT_141 var_479_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_479_arg_0=5, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] EXPR var_479_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1135] SORT_13 var_479 = var_479_arg_0; [L1136] SORT_13 var_480_arg_0 = var_283; [L1137] SORT_13 var_480_arg_1 = var_479; [L1138] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1139] SORT_1 var_481_arg_0 = input_6; [L1140] SORT_1 var_481_arg_1 = var_480; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_481_arg_0=0, var_481_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] EXPR var_481_arg_0 & var_481_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1142] EXPR var_481 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] var_481 = var_481 & mask_SORT_1 [L1143] SORT_1 var_666_arg_0 = var_481; [L1144] SORT_3 var_666_arg_1 = input_4; [L1145] SORT_3 var_666_arg_2 = state_151; [L1146] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1147] SORT_1 var_667_arg_0 = input_7; [L1148] SORT_3 var_667_arg_1 = var_582; [L1149] SORT_3 var_667_arg_2 = var_666; [L1150] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1151] SORT_3 next_668_arg_1 = var_667; [L1152] SORT_141 var_472_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_472_arg_0=4, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] EXPR var_472_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1154] SORT_13 var_472 = var_472_arg_0; [L1155] SORT_13 var_473_arg_0 = var_283; [L1156] SORT_13 var_473_arg_1 = var_472; [L1157] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1158] SORT_1 var_474_arg_0 = input_6; [L1159] SORT_1 var_474_arg_1 = var_473; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_474_arg_0=0, var_474_arg_1=1, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] EXPR var_474_arg_0 & var_474_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1161] EXPR var_474 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] var_474 = var_474 & mask_SORT_1 [L1162] SORT_1 var_669_arg_0 = var_474; [L1163] SORT_3 var_669_arg_1 = input_4; [L1164] SORT_3 var_669_arg_2 = state_156; [L1165] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1166] SORT_1 var_670_arg_0 = input_7; [L1167] SORT_3 var_670_arg_1 = var_582; [L1168] SORT_3 var_670_arg_2 = var_669; [L1169] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1170] SORT_3 next_671_arg_1 = var_670; [L1171] SORT_162 var_465_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_465_arg_0=3, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] EXPR var_465_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1173] SORT_13 var_465 = var_465_arg_0; [L1174] SORT_13 var_466_arg_0 = var_283; [L1175] SORT_13 var_466_arg_1 = var_465; [L1176] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1177] SORT_1 var_467_arg_0 = input_6; [L1178] SORT_1 var_467_arg_1 = var_466; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_467_arg_0=0, var_467_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] EXPR var_467_arg_0 & var_467_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1180] EXPR var_467 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] var_467 = var_467 & mask_SORT_1 [L1181] SORT_1 var_672_arg_0 = var_467; [L1182] SORT_3 var_672_arg_1 = input_4; [L1183] SORT_3 var_672_arg_2 = state_161; [L1184] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1185] SORT_1 var_673_arg_0 = input_7; [L1186] SORT_3 var_673_arg_1 = var_582; [L1187] SORT_3 var_673_arg_2 = var_672; [L1188] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1189] SORT_3 next_674_arg_1 = var_673; [L1190] SORT_162 var_438_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_438_arg_0=2, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] EXPR var_438_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1192] SORT_13 var_438 = var_438_arg_0; [L1193] SORT_13 var_439_arg_0 = var_283; [L1194] SORT_13 var_439_arg_1 = var_438; [L1195] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1196] SORT_1 var_440_arg_0 = input_6; [L1197] SORT_1 var_440_arg_1 = var_439; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_440_arg_0=0, var_440_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] EXPR var_440_arg_0 & var_440_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1199] EXPR var_440 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] var_440 = var_440 & mask_SORT_1 [L1200] SORT_1 var_675_arg_0 = var_440; [L1201] SORT_3 var_675_arg_1 = input_4; [L1202] SORT_3 var_675_arg_2 = state_167; [L1203] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1204] SORT_1 var_676_arg_0 = input_7; [L1205] SORT_3 var_676_arg_1 = var_582; [L1206] SORT_3 var_676_arg_2 = var_675; [L1207] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1208] SORT_3 next_677_arg_1 = var_676; [L1209] SORT_1 var_361_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_361_arg_0=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] EXPR var_361_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1211] SORT_13 var_361 = var_361_arg_0; [L1212] SORT_13 var_362_arg_0 = var_283; [L1213] SORT_13 var_362_arg_1 = var_361; [L1214] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1215] SORT_1 var_363_arg_0 = input_6; [L1216] SORT_1 var_363_arg_1 = var_362; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_363_arg_0=0, var_363_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] EXPR var_363_arg_0 & var_363_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1218] EXPR var_363 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] var_363 = var_363 & mask_SORT_1 [L1219] SORT_1 var_678_arg_0 = var_363; [L1220] SORT_3 var_678_arg_1 = input_4; [L1221] SORT_3 var_678_arg_2 = state_172; [L1222] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1223] SORT_1 var_679_arg_0 = input_7; [L1224] SORT_3 var_679_arg_1 = var_582; [L1225] SORT_3 var_679_arg_2 = var_678; [L1226] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1227] SORT_3 next_680_arg_1 = var_679; [L1228] SORT_13 var_284_arg_0 = var_283; [L1229] SORT_1 var_284 = var_284_arg_0 != 0; [L1230] SORT_1 var_285_arg_0 = var_284; [L1231] SORT_1 var_285 = ~var_285_arg_0; [L1232] SORT_1 var_286_arg_0 = input_6; [L1233] SORT_1 var_286_arg_1 = var_285; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_286_arg_0=0, var_286_arg_1=-1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1235] EXPR var_286 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] var_286 = var_286 & mask_SORT_1 [L1236] SORT_1 var_681_arg_0 = var_286; [L1237] SORT_3 var_681_arg_1 = input_4; [L1238] SORT_3 var_681_arg_2 = state_177; [L1239] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1240] SORT_1 var_682_arg_0 = input_7; [L1241] SORT_3 var_682_arg_1 = var_582; [L1242] SORT_3 var_682_arg_2 = var_681; [L1243] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1244] SORT_3 next_683_arg_1 = var_682; [L1245] SORT_1 var_684_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_684_arg_0=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] EXPR var_684_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1247] SORT_11 var_684 = var_684_arg_0; [L1248] SORT_11 var_685_arg_0 = state_182; [L1249] SORT_11 var_685_arg_1 = var_684; [L1250] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1251] SORT_1 var_686_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_686_arg_0=256, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] EXPR var_686_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1253] SORT_11 var_686 = var_686_arg_0; [L1254] SORT_11 var_687_arg_0 = var_685; [L1255] SORT_11 var_687_arg_1 = var_686; [L1256] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1257] SORT_1 var_688_arg_0 = input_7; [L1258] SORT_11 var_688_arg_1 = var_203; [L1259] SORT_11 var_688_arg_2 = var_687; [L1260] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_688=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] EXPR var_688 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] var_688 = var_688 & mask_SORT_11 [L1262] SORT_11 next_689_arg_1 = var_688; [L1263] SORT_1 var_542_arg_0 = state_190; [L1264] SORT_1 var_542 = ~var_542_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=-1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] EXPR var_542 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] var_542 = var_542 & mask_SORT_1 [L1266] SORT_1 var_538_arg_0 = input_8; [L1267] SORT_1 var_538_arg_1 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538_arg_0=0, var_538_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] EXPR var_538_arg_0 & var_538_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1269] SORT_1 var_539_arg_0 = state_190; [L1270] SORT_1 var_539_arg_1 = var_538; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_539_arg_0=0, var_539_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] EXPR var_539_arg_0 | var_539_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1272] SORT_1 var_690_arg_0 = var_542; [L1273] SORT_1 var_690_arg_1 = var_539; [L1274] SORT_1 var_690_arg_2 = state_190; [L1275] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1276] SORT_1 var_691_arg_0 = input_7; [L1277] SORT_1 var_691_arg_1 = var_233; [L1278] SORT_1 var_691_arg_2 = var_690; [L1279] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1280] SORT_1 next_692_arg_1 = var_691; [L1281] SORT_1 var_550_arg_0 = var_207; [L1282] SORT_1 var_550_arg_1 = state_191; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_550_arg_0=0, var_550_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] EXPR var_550_arg_0 | var_550_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1284] SORT_1 var_693_arg_0 = var_173; [L1285] SORT_1 var_693_arg_1 = var_550; [L1286] SORT_1 var_693_arg_2 = state_191; [L1287] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1288] SORT_1 var_694_arg_0 = input_7; [L1289] SORT_1 var_694_arg_1 = var_233; [L1290] SORT_1 var_694_arg_2 = var_693; [L1291] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1292] SORT_1 next_695_arg_1 = var_694; [L1293] SORT_1 var_562_arg_0 = input_6; [L1294] SORT_1 var_562_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_562_arg_0=0, var_562_arg_1=256, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] EXPR var_562_arg_0 | var_562_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1296] SORT_1 var_563_arg_0 = var_562; [L1297] SORT_1 var_563_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_563_arg_0=0, var_563_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] EXPR var_563_arg_0 | var_563_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1299] SORT_1 var_564_arg_0 = var_563; [L1300] SORT_1 var_564_arg_1 = state_190; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_564_arg_0=0, var_564_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] EXPR var_564_arg_0 | var_564_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1302] EXPR var_564 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] var_564 = var_564 & mask_SORT_1 [L1303] SORT_1 var_696_arg_0 = var_564; [L1304] SORT_11 var_696_arg_1 = var_204; [L1305] SORT_11 var_696_arg_2 = state_194; [L1306] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1307] SORT_1 var_697_arg_0 = input_7; [L1308] SORT_11 var_697_arg_1 = var_203; [L1309] SORT_11 var_697_arg_2 = var_696; [L1310] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_697=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] EXPR var_697 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] var_697 = var_697 & mask_SORT_11 [L1312] SORT_11 next_698_arg_1 = var_697; [L1313] SORT_1 var_547_arg_0 = var_538; [L1314] SORT_1 var_547_arg_1 = var_542; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_547_arg_0=0, var_547_arg_1=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] EXPR var_547_arg_0 & var_547_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1316] EXPR var_547 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] var_547 = var_547 & mask_SORT_1 [L1317] SORT_1 var_699_arg_0 = var_547; [L1318] SORT_3 var_699_arg_1 = input_4; [L1319] SORT_3 var_699_arg_2 = state_209; [L1320] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1321] SORT_1 var_700_arg_0 = input_7; [L1322] SORT_3 var_700_arg_1 = var_582; [L1323] SORT_3 var_700_arg_2 = var_699; [L1324] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_700=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] EXPR var_700 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] var_700 = var_700 & mask_SORT_3 [L1326] SORT_3 next_701_arg_1 = var_700; [L1327] SORT_1 next_702_arg_1 = var_233; [L1328] SORT_1 var_518_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_518_arg_0=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] EXPR var_518_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1330] SORT_11 var_518 = var_518_arg_0; [L1331] SORT_11 var_519_arg_0 = state_282; [L1332] SORT_11 var_519_arg_1 = var_518; [L1333] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1334] SORT_1 var_703_arg_0 = var_242; [L1335] SORT_11 var_703_arg_1 = var_519; [L1336] SORT_11 var_703_arg_2 = state_282; [L1337] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1338] SORT_1 var_704_arg_0 = input_7; [L1339] SORT_11 var_704_arg_1 = var_203; [L1340] SORT_11 var_704_arg_2 = var_703; [L1341] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1342] SORT_11 next_705_arg_1 = var_704; [L1344] state_10 = next_584_arg_1 [L1345] state_12 = next_587_arg_1 [L1346] state_18 = next_590_arg_1 [L1347] state_24 = next_593_arg_1 [L1348] state_29 = next_596_arg_1 [L1349] state_34 = next_599_arg_1 [L1350] state_39 = next_602_arg_1 [L1351] state_44 = next_605_arg_1 [L1352] state_49 = next_608_arg_1 [L1353] state_54 = next_611_arg_1 [L1354] state_59 = next_614_arg_1 [L1355] state_64 = next_617_arg_1 [L1356] state_69 = next_620_arg_1 [L1357] state_74 = next_623_arg_1 [L1358] state_79 = next_626_arg_1 [L1359] state_84 = next_629_arg_1 [L1360] state_89 = next_632_arg_1 [L1361] state_94 = next_635_arg_1 [L1362] state_99 = next_638_arg_1 [L1363] state_105 = next_641_arg_1 [L1364] state_110 = next_644_arg_1 [L1365] state_115 = next_647_arg_1 [L1366] state_120 = next_650_arg_1 [L1367] state_125 = next_653_arg_1 [L1368] state_130 = next_656_arg_1 [L1369] state_135 = next_659_arg_1 [L1370] state_140 = next_662_arg_1 [L1371] state_146 = next_665_arg_1 [L1372] state_151 = next_668_arg_1 [L1373] state_156 = next_671_arg_1 [L1374] state_161 = next_674_arg_1 [L1375] state_167 = next_677_arg_1 [L1376] state_172 = next_680_arg_1 [L1377] state_177 = next_683_arg_1 [L1378] state_182 = next_689_arg_1 [L1379] state_190 = next_692_arg_1 [L1380] state_191 = next_695_arg_1 [L1381] state_194 = next_698_arg_1 [L1382] state_209 = next_701_arg_1 [L1383] state_213 = next_702_arg_1 [L1384] state_282 = next_705_arg_1 [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_ushort() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_ushort() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=254, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=257, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=1, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=1, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_26_arg_0=30, var_30=29, var_32=1, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_32=1, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=1, var_25=30, var_27=0, var_30=29, var_32=1, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_27=0, var_30=29, var_32=1, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=0, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=1, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=1, var_236_arg_1=-1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=65535, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 872 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 710.5s, OverallIterations: 150, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.6s, AutomataDifference: 114.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 282178 SdHoareTripleChecker+Valid, 80.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 281966 mSDsluCounter, 670651 SdHoareTripleChecker+Invalid, 69.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 492902 mSDsCounter, 391 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 145382 IncrementalHoareTripleChecker+Invalid, 145773 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 391 mSolverCounterUnsat, 177749 mSDtfsCounter, 145382 mSolverCounterSat, 1.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 14171 GetRequests, 12885 SyntacticMatches, 0 SemanticMatches, 1286 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36829 ImplicationChecksByTransitivity, 28.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=41853occurred in iteration=147, InterpolantAutomatonStates: 1079, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.7s AutomataMinimizationTime, 149 MinimizatonAttempts, 113313 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 5.4s SsaConstructionTime, 269.8s SatisfiabilityAnalysisTime, 215.7s InterpolantComputationTime, 88452 NumberOfCodeBlocks, 88452 NumberOfCodeBlocksAsserted, 162 NumberOfCheckSat, 91403 ConstructedInterpolants, 0 QuantifiedInterpolants, 582899 SizeOfPredicates, 59 NumberOfNonLiveVariables, 54340 ConjunctsInSsa, 502 ConjunctsInUnsatCore, 166 InterpolantComputations, 145 PerfectInterpolantSequences, 23044/24943 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 08:13:24,322 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 61bc671f3649b1d9d6fbe9f0597d430b8b23b87e2a7d2106b41de545f5b7b012 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:13:26,696 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:13:26,784 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 08:13:26,792 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:13:26,792 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:13:26,819 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:13:26,820 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:13:26,820 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:13:26,821 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:13:26,821 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:13:26,821 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:13:26,821 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:13:26,822 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:13:26,822 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:13:26,822 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:13:26,822 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:13:26,822 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:13:26,823 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:13:26,824 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:13:26,824 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:13:26,824 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:13:26,825 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:13:26,825 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:13:26,826 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:13:26,826 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 61bc671f3649b1d9d6fbe9f0597d430b8b23b87e2a7d2106b41de545f5b7b012 [2024-12-02 08:13:27,106 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:13:27,114 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:13:27,116 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:13:27,118 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:13:27,118 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:13:27,120 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:13:29,871 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/5c4695b9a/35f7aa10f17c4b7b8e2691415c487209/FLAGe07298f0c [2024-12-02 08:13:30,133 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:13:30,134 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:13:30,148 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/5c4695b9a/35f7aa10f17c4b7b8e2691415c487209/FLAGe07298f0c [2024-12-02 08:13:30,162 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/data/5c4695b9a/35f7aa10f17c4b7b8e2691415c487209 [2024-12-02 08:13:30,165 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:13:30,166 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:13:30,168 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:13:30,168 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:13:30,172 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:13:30,172 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,173 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@289b2674 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30, skipping insertion in model container [2024-12-02 08:13:30,173 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,218 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:13:30,380 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c[1280,1293] [2024-12-02 08:13:30,645 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:13:30,659 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:13:30,669 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c[1280,1293] [2024-12-02 08:13:30,780 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:13:30,793 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:13:30,794 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30 WrapperNode [2024-12-02 08:13:30,794 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:13:30,795 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:13:30,795 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:13:30,795 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:13:30,801 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,830 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,901 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-12-02 08:13:30,902 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:13:30,902 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:13:30,902 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:13:30,903 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:13:30,910 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,911 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,923 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,967 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:13:30,967 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,968 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:30,999 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,002 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,007 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,012 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,017 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,029 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:13:31,030 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:13:31,031 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:13:31,031 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:13:31,032 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (1/1) ... [2024-12-02 08:13:31,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:13:31,053 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:31,067 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:13:31,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:13:31,099 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:13:31,100 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 08:13:31,100 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:13:31,100 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:13:31,100 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:13:31,100 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:13:31,405 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:13:31,407 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:13:32,592 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-12-02 08:13:32,592 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:13:32,601 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:13:32,602 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:13:32,602 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:13:32 BoogieIcfgContainer [2024-12-02 08:13:32,602 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:13:32,605 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:13:32,605 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:13:32,610 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:13:32,610 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:13:30" (1/3) ... [2024-12-02 08:13:32,611 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b44efd2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:13:32, skipping insertion in model container [2024-12-02 08:13:32,611 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:13:30" (2/3) ... [2024-12-02 08:13:32,611 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b44efd2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:13:32, skipping insertion in model container [2024-12-02 08:13:32,611 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:13:32" (3/3) ... [2024-12-02 08:13:32,613 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c [2024-12-02 08:13:32,630 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:13:32,632 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w16_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:13:32,682 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:13:32,693 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5dc3df0, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:13:32,694 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:13:32,698 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:13:32,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 08:13:32,705 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:32,706 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:32,706 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:32,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:32,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 08:13:32,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:13:32,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1925468982] [2024-12-02 08:13:32,724 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:32,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:32,724 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:32,726 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:32,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:13:33,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:33,283 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 08:13:33,295 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:33,612 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 08:13:33,612 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:13:33,808 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:13:33,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1925468982] [2024-12-02 08:13:33,809 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1925468982] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:33,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [971865427] [2024-12-02 08:13:33,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:33,810 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:13:33,810 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:13:33,814 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:13:33,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 08:13:34,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:34,779 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 08:13:34,788 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:34,900 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:13:34,900 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:13:34,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [971865427] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:13:34,901 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:13:34,901 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 08:13:34,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995211732] [2024-12-02 08:13:34,904 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:13:34,907 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:13:34,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:13:34,925 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:13:34,926 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:13:34,927 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:13:35,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:13:35,091 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 08:13:35,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:13:35,093 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 08:13:35,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:13:35,098 INFO L225 Difference]: With dead ends: 43 [2024-12-02 08:13:35,098 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 08:13:35,101 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:13:35,104 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:13:35,105 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:13:35,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 08:13:35,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 08:13:35,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:13:35,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 08:13:35,140 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 08:13:35,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:13:35,141 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 08:13:35,142 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:13:35,142 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 08:13:35,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 08:13:35,144 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:35,144 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 08:13:35,151 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 08:13:35,352 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:13:35,545 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:35,545 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:35,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:35,545 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 08:13:35,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:13:35,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1503998066] [2024-12-02 08:13:35,548 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:35,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:35,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:35,551 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:35,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:13:36,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:36,275 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 08:13:36,288 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:36,799 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:13:36,800 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:13:36,982 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:13:36,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1503998066] [2024-12-02 08:13:36,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1503998066] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:36,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2081658149] [2024-12-02 08:13:36,983 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:13:36,983 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:13:36,983 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:13:36,985 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:13:36,986 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 08:13:38,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:13:38,476 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 08:13:38,489 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:38,883 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:13:38,883 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:13:39,035 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2081658149] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:13:39,036 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:13:39,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 08:13:39,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727448523] [2024-12-02 08:13:39,036 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:13:39,037 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:13:39,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:13:39,037 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:13:39,038 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:13:39,038 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:13:39,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:13:39,570 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 08:13:39,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:13:39,571 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 08:13:39,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:13:39,572 INFO L225 Difference]: With dead ends: 36 [2024-12-02 08:13:39,572 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 08:13:39,573 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:13:39,574 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:13:39,574 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:13:39,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 08:13:39,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 08:13:39,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:13:39,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 08:13:39,582 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 08:13:39,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:13:39,583 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 08:13:39,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:13:39,583 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 08:13:39,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 08:13:39,585 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:13:39,585 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 08:13:39,594 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 08:13:39,794 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:13:39,985 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:39,986 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:13:39,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:13:39,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 08:13:39,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:13:39,988 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [819572791] [2024-12-02 08:13:39,988 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:13:39,988 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:13:39,988 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:13:39,989 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:13:39,990 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:13:40,880 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:13:40,881 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:13:40,895 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 126 conjuncts are in the unsatisfiable core [2024-12-02 08:13:40,915 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:13:46,772 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 24 proven. 55 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2024-12-02 08:13:46,772 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:14:10,329 WARN L286 SmtUtils]: Spent 16.78s on a formula simplification. DAG size of input: 182 DAG size of output: 179 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-12-02 08:14:20,696 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:14:20,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [819572791] [2024-12-02 08:14:20,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [819572791] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:14:20,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1950629988] [2024-12-02 08:14:20,696 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:14:20,696 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:14:20,696 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:14:20,698 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:14:20,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cd874716-017b-49da-9766-e2f95ed5a54d/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 08:14:22,800 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:14:22,800 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:14:22,883 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 08:14:22,897 INFO L279 TraceCheckSpWp]: Computing forward predicates...