./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9138a2614bedb023e2047cd39c42b34c38da629619813e3b818f3e1fdd02af0f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:27:45,072 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:27:45,131 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 08:27:45,135 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:27:45,135 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:27:45,157 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:27:45,157 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:27:45,157 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:27:45,158 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:27:45,158 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:27:45,158 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:27:45,158 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:27:45,158 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:27:45,159 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:27:45,159 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:27:45,160 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:27:45,160 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:27:45,160 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:27:45,161 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:27:45,161 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9138a2614bedb023e2047cd39c42b34c38da629619813e3b818f3e1fdd02af0f [2024-12-02 08:27:45,394 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:27:45,403 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:27:45,405 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:27:45,406 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:27:45,407 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:27:45,408 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:27:48,148 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/4ab86a685/731e0202ac094265bf18e03928c5c1aa/FLAG92cdfe87d [2024-12-02 08:27:48,438 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:27:48,439 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:27:48,451 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/4ab86a685/731e0202ac094265bf18e03928c5c1aa/FLAG92cdfe87d [2024-12-02 08:27:48,465 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/4ab86a685/731e0202ac094265bf18e03928c5c1aa [2024-12-02 08:27:48,468 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:27:48,469 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:27:48,470 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:27:48,470 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:27:48,474 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:27:48,475 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:27:48" (1/1) ... [2024-12-02 08:27:48,476 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a583f44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:48, skipping insertion in model container [2024-12-02 08:27:48,476 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:27:48" (1/1) ... [2024-12-02 08:27:48,509 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:27:48,657 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c[1280,1293] [2024-12-02 08:27:48,907 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:27:48,914 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:27:48,923 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c[1280,1293] [2024-12-02 08:27:49,046 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:27:49,060 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:27:49,061 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49 WrapperNode [2024-12-02 08:27:49,061 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:27:49,062 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:27:49,062 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:27:49,062 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:27:49,082 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,110 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,426 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-12-02 08:27:49,427 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:27:49,427 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:27:49,427 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:27:49,427 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:27:49,438 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,438 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,487 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,576 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:27:49,576 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,576 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,644 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,653 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,667 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,688 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,698 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,756 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:27:49,757 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:27:49,757 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:27:49,757 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:27:49,758 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (1/1) ... [2024-12-02 08:27:49,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:27:49,774 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:27:49,787 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:27:49,789 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:27:49,813 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:27:49,813 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:27:49,814 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:27:49,814 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 08:27:49,814 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:27:49,814 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:27:50,113 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:27:50,115 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:27:53,622 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-12-02 08:27:53,622 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:27:53,650 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:27:53,651 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:27:53,651 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:27:53 BoogieIcfgContainer [2024-12-02 08:27:53,651 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:27:53,654 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:27:53,654 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:27:53,659 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:27:53,659 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:27:48" (1/3) ... [2024-12-02 08:27:53,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@104beaec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:27:53, skipping insertion in model container [2024-12-02 08:27:53,660 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:27:49" (2/3) ... [2024-12-02 08:27:53,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@104beaec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:27:53, skipping insertion in model container [2024-12-02 08:27:53,660 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:27:53" (3/3) ... [2024-12-02 08:27:53,661 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:27:53,673 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:27:53,674 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c that has 2 procedures, 872 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:27:53,746 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:27:53,757 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@48d106c0, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:27:53,758 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:27:53,764 INFO L276 IsEmpty]: Start isEmpty. Operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:27:53,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 08:27:53,781 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:27:53,782 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:27:53,782 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:27:53,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:27:53,787 INFO L85 PathProgramCache]: Analyzing trace with hash -684669181, now seen corresponding path program 1 times [2024-12-02 08:27:53,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:27:53,794 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634018519] [2024-12-02 08:27:53,794 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:53,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:27:54,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:27:54,341 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:27:54,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:27:54,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634018519] [2024-12-02 08:27:54,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1634018519] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:27:54,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [366023579] [2024-12-02 08:27:54,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:54,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:27:54,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:27:54,347 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:27:54,350 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:27:54,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:27:54,982 INFO L256 TraceCheckSpWp]: Trace formula consists of 1413 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 08:27:54,993 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:27:55,019 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 08:27:55,019 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:27:55,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [366023579] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:27:55,020 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:27:55,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 08:27:55,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816643900] [2024-12-02 08:27:55,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:27:55,027 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 08:27:55,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:27:55,045 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 08:27:55,046 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:27:55,048 INFO L87 Difference]: Start difference. First operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:27:55,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:27:55,109 INFO L93 Difference]: Finished difference Result 1575 states and 2357 transitions. [2024-12-02 08:27:55,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 08:27:55,112 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 213 [2024-12-02 08:27:55,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:27:55,122 INFO L225 Difference]: With dead ends: 1575 [2024-12-02 08:27:55,122 INFO L226 Difference]: Without dead ends: 869 [2024-12-02 08:27:55,126 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 08:27:55,128 INFO L435 NwaCegarLoop]: 1297 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:27:55,129 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:27:55,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-02 08:27:55,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 869. [2024-12-02 08:27:55,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 869 states, 864 states have (on average 1.494212962962963) internal successors, (1291), 864 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:27:55,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 869 states to 869 states and 1297 transitions. [2024-12-02 08:27:55,195 INFO L78 Accepts]: Start accepts. Automaton has 869 states and 1297 transitions. Word has length 213 [2024-12-02 08:27:55,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:27:55,196 INFO L471 AbstractCegarLoop]: Abstraction has 869 states and 1297 transitions. [2024-12-02 08:27:55,197 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:27:55,197 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 1297 transitions. [2024-12-02 08:27:55,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 08:27:55,200 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:27:55,200 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:27:55,210 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:27:55,401 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:27:55,401 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:27:55,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:27:55,402 INFO L85 PathProgramCache]: Analyzing trace with hash 275406397, now seen corresponding path program 1 times [2024-12-02 08:27:55,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:27:55,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142607344] [2024-12-02 08:27:55,402 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:55,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:27:55,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:27:56,661 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:27:56,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:27:56,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142607344] [2024-12-02 08:27:56,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142607344] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:27:56,661 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:27:56,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:27:56,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840522740] [2024-12-02 08:27:56,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:27:56,663 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:27:56,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:27:56,663 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:27:56,664 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:27:56,664 INFO L87 Difference]: Start difference. First operand 869 states and 1297 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:56,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:27:56,723 INFO L93 Difference]: Finished difference Result 873 states and 1301 transitions. [2024-12-02 08:27:56,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:27:56,724 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 213 [2024-12-02 08:27:56,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:27:56,728 INFO L225 Difference]: With dead ends: 873 [2024-12-02 08:27:56,728 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 08:27:56,729 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:27:56,730 INFO L435 NwaCegarLoop]: 1295 mSDtfsCounter, 0 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3879 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:27:56,730 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3879 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:27:56,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 08:27:56,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 08:27:56,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.4930715935334873) internal successors, (1293), 866 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:27:56,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1299 transitions. [2024-12-02 08:27:56,757 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1299 transitions. Word has length 213 [2024-12-02 08:27:56,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:27:56,759 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1299 transitions. [2024-12-02 08:27:56,759 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:56,759 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1299 transitions. [2024-12-02 08:27:56,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-12-02 08:27:56,762 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:27:56,763 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:27:56,763 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 08:27:56,763 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:27:56,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:27:56,764 INFO L85 PathProgramCache]: Analyzing trace with hash -50639891, now seen corresponding path program 1 times [2024-12-02 08:27:56,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:27:56,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664217103] [2024-12-02 08:27:56,764 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:56,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:27:56,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:27:57,650 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:27:57,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:27:57,651 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664217103] [2024-12-02 08:27:57,651 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664217103] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:27:57,651 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:27:57,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:27:57,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052826171] [2024-12-02 08:27:57,651 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:27:57,652 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:27:57,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:27:57,653 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:27:57,653 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:27:57,654 INFO L87 Difference]: Start difference. First operand 871 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:58,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:27:58,421 INFO L93 Difference]: Finished difference Result 2171 states and 3241 transitions. [2024-12-02 08:27:58,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:27:58,422 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 214 [2024-12-02 08:27:58,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:27:58,426 INFO L225 Difference]: With dead ends: 2171 [2024-12-02 08:27:58,427 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 08:27:58,428 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:27:58,429 INFO L435 NwaCegarLoop]: 1325 mSDtfsCounter, 2674 mSDsluCounter, 2354 mSDsCounter, 0 mSdLazyCounter, 414 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2674 SdHoareTripleChecker+Valid, 3679 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:27:58,430 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2674 Valid, 3679 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 414 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 08:27:58,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 08:27:58,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 08:27:58,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.491916859122402) internal successors, (1292), 866 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:27:58,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1298 transitions. [2024-12-02 08:27:58,454 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1298 transitions. Word has length 214 [2024-12-02 08:27:58,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:27:58,454 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1298 transitions. [2024-12-02 08:27:58,455 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:58,455 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1298 transitions. [2024-12-02 08:27:58,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-02 08:27:58,457 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:27:58,458 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:27:58,458 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 08:27:58,458 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:27:58,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:27:58,459 INFO L85 PathProgramCache]: Analyzing trace with hash -125930801, now seen corresponding path program 1 times [2024-12-02 08:27:58,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:27:58,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077705926] [2024-12-02 08:27:58,459 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:58,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:27:58,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:27:59,108 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:27:59,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:27:59,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077705926] [2024-12-02 08:27:59,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077705926] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:27:59,109 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:27:59,109 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:27:59,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989449875] [2024-12-02 08:27:59,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:27:59,110 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:27:59,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:27:59,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:27:59,111 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:27:59,111 INFO L87 Difference]: Start difference. First operand 871 states and 1298 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:59,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:27:59,169 INFO L93 Difference]: Finished difference Result 1578 states and 2351 transitions. [2024-12-02 08:27:59,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:27:59,170 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 215 [2024-12-02 08:27:59,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:27:59,174 INFO L225 Difference]: With dead ends: 1578 [2024-12-02 08:27:59,174 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:27:59,175 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:27:59,176 INFO L435 NwaCegarLoop]: 1294 mSDtfsCounter, 0 mSDsluCounter, 2578 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3872 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:27:59,176 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3872 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:27:59,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:27:59,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:27:59,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4907834101382489) internal successors, (1294), 868 states have internal predecessors, (1294), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:27:59,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1300 transitions. [2024-12-02 08:27:59,201 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1300 transitions. Word has length 215 [2024-12-02 08:27:59,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:27:59,202 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1300 transitions. [2024-12-02 08:27:59,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:27:59,202 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1300 transitions. [2024-12-02 08:27:59,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-12-02 08:27:59,205 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:27:59,205 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:27:59,205 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 08:27:59,205 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:27:59,206 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:27:59,206 INFO L85 PathProgramCache]: Analyzing trace with hash -706852236, now seen corresponding path program 1 times [2024-12-02 08:27:59,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:27:59,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523815014] [2024-12-02 08:27:59,206 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:27:59,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:27:59,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:00,141 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:00,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:00,142 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523815014] [2024-12-02 08:28:00,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1523815014] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:00,142 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:00,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:00,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1308006952] [2024-12-02 08:28:00,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:00,142 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:00,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:00,143 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:00,144 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:00,144 INFO L87 Difference]: Start difference. First operand 873 states and 1300 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:00,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:00,519 INFO L93 Difference]: Finished difference Result 1580 states and 2352 transitions. [2024-12-02 08:28:00,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:00,520 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 216 [2024-12-02 08:28:00,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:00,524 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:00,524 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:00,525 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:00,525 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1130 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:00,526 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 2270 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:00,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:00,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:00,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.48963133640553) internal successors, (1293), 868 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:00,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1299 transitions. [2024-12-02 08:28:00,549 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1299 transitions. Word has length 216 [2024-12-02 08:28:00,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:00,550 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1299 transitions. [2024-12-02 08:28:00,550 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:00,550 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1299 transitions. [2024-12-02 08:28:00,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-12-02 08:28:00,553 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:00,553 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:00,553 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 08:28:00,553 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:00,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:00,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1177044582, now seen corresponding path program 1 times [2024-12-02 08:28:00,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:00,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539510916] [2024-12-02 08:28:00,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:00,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:00,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:01,108 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:01,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:01,108 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539510916] [2024-12-02 08:28:01,108 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1539510916] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:01,108 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:01,108 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:01,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1829876834] [2024-12-02 08:28:01,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:01,109 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:01,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:01,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:01,110 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:01,110 INFO L87 Difference]: Start difference. First operand 873 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:01,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:01,387 INFO L93 Difference]: Finished difference Result 1582 states and 2352 transitions. [2024-12-02 08:28:01,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:28:01,388 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 217 [2024-12-02 08:28:01,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:01,391 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 08:28:01,392 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:01,393 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:28:01,393 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 1133 mSDsluCounter, 2426 mSDsCounter, 0 mSdLazyCounter, 174 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1133 SdHoareTripleChecker+Valid, 3714 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:01,394 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1133 Valid, 3714 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 174 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:01,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:01,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:01,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4884792626728112) internal successors, (1292), 868 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:01,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1298 transitions. [2024-12-02 08:28:01,420 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1298 transitions. Word has length 217 [2024-12-02 08:28:01,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:01,420 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1298 transitions. [2024-12-02 08:28:01,421 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:01,421 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1298 transitions. [2024-12-02 08:28:01,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-02 08:28:01,424 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:01,424 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:01,424 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 08:28:01,424 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:01,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:01,425 INFO L85 PathProgramCache]: Analyzing trace with hash 67362509, now seen corresponding path program 1 times [2024-12-02 08:28:01,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:01,425 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953540164] [2024-12-02 08:28:01,425 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:01,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:01,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:01,937 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:01,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:01,938 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953540164] [2024-12-02 08:28:01,938 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1953540164] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:01,938 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:01,938 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:01,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141956440] [2024-12-02 08:28:01,938 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:01,938 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:01,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:01,939 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:01,939 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:01,939 INFO L87 Difference]: Start difference. First operand 873 states and 1298 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:02,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:02,290 INFO L93 Difference]: Finished difference Result 1580 states and 2348 transitions. [2024-12-02 08:28:02,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:02,291 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 218 [2024-12-02 08:28:02,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:02,295 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:02,295 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:02,296 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:02,297 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2401 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2404 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:02,297 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2404 Valid, 2270 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:02,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:02,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:02,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.487327188940092) internal successors, (1291), 868 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:02,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1297 transitions. [2024-12-02 08:28:02,322 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1297 transitions. Word has length 218 [2024-12-02 08:28:02,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:02,322 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1297 transitions. [2024-12-02 08:28:02,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:02,323 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1297 transitions. [2024-12-02 08:28:02,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-02 08:28:02,326 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:02,326 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:02,326 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 08:28:02,326 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:02,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:02,327 INFO L85 PathProgramCache]: Analyzing trace with hash -1444744026, now seen corresponding path program 1 times [2024-12-02 08:28:02,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:02,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355355467] [2024-12-02 08:28:02,327 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:02,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:02,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:02,844 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:02,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:02,844 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355355467] [2024-12-02 08:28:02,844 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [355355467] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:02,844 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:02,844 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:02,844 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043806242] [2024-12-02 08:28:02,844 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:02,845 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:02,845 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:02,845 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:02,846 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:02,846 INFO L87 Difference]: Start difference. First operand 873 states and 1297 transitions. Second operand has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:03,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:03,194 INFO L93 Difference]: Finished difference Result 1580 states and 2346 transitions. [2024-12-02 08:28:03,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:03,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 219 [2024-12-02 08:28:03,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:03,199 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:03,199 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:03,200 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:03,200 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2393 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2396 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:03,201 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2396 Valid, 2270 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:03,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:03,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:03,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4861751152073732) internal successors, (1290), 868 states have internal predecessors, (1290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:03,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1296 transitions. [2024-12-02 08:28:03,225 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1296 transitions. Word has length 219 [2024-12-02 08:28:03,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:03,225 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1296 transitions. [2024-12-02 08:28:03,226 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:03,226 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1296 transitions. [2024-12-02 08:28:03,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-12-02 08:28:03,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:03,229 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:03,229 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 08:28:03,229 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:03,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:03,230 INFO L85 PathProgramCache]: Analyzing trace with hash 769514406, now seen corresponding path program 1 times [2024-12-02 08:28:03,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:03,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222045908] [2024-12-02 08:28:03,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:03,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:03,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:03,718 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:03,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:03,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222045908] [2024-12-02 08:28:03,719 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [222045908] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:03,719 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:03,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:03,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243765985] [2024-12-02 08:28:03,719 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:03,719 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:03,719 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:03,720 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:03,720 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:03,720 INFO L87 Difference]: Start difference. First operand 873 states and 1296 transitions. Second operand has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:04,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:04,047 INFO L93 Difference]: Finished difference Result 1580 states and 2344 transitions. [2024-12-02 08:28:04,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:04,048 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 220 [2024-12-02 08:28:04,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:04,051 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:04,052 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:04,053 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:04,053 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2385 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 316 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2388 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 316 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:04,053 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2388 Valid, 2270 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 316 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:04,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:04,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:04,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4850230414746544) internal successors, (1289), 868 states have internal predecessors, (1289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:04,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1295 transitions. [2024-12-02 08:28:04,077 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1295 transitions. Word has length 220 [2024-12-02 08:28:04,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:04,077 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1295 transitions. [2024-12-02 08:28:04,077 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:04,077 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1295 transitions. [2024-12-02 08:28:04,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-02 08:28:04,080 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:04,080 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:04,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 08:28:04,081 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:04,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:04,081 INFO L85 PathProgramCache]: Analyzing trace with hash 626929823, now seen corresponding path program 1 times [2024-12-02 08:28:04,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:04,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833064161] [2024-12-02 08:28:04,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:04,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:04,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:04,569 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:04,569 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:04,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833064161] [2024-12-02 08:28:04,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833064161] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:04,570 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:04,570 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:04,570 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504806050] [2024-12-02 08:28:04,570 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:04,571 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:04,571 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:04,571 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:04,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:04,572 INFO L87 Difference]: Start difference. First operand 873 states and 1295 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:04,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:04,912 INFO L93 Difference]: Finished difference Result 1580 states and 2342 transitions. [2024-12-02 08:28:04,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:04,912 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 221 [2024-12-02 08:28:04,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:04,916 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:04,916 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:04,917 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:04,918 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1267 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:04,918 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 2277 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:04,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:04,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:04,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4838709677419355) internal successors, (1288), 868 states have internal predecessors, (1288), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:04,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1294 transitions. [2024-12-02 08:28:04,940 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1294 transitions. Word has length 221 [2024-12-02 08:28:04,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:04,941 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1294 transitions. [2024-12-02 08:28:04,941 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:04,941 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1294 transitions. [2024-12-02 08:28:04,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-02 08:28:04,944 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:04,944 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:04,944 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 08:28:04,944 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:04,945 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:04,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1873772799, now seen corresponding path program 1 times [2024-12-02 08:28:04,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:04,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222988778] [2024-12-02 08:28:04,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:04,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:05,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:05,568 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:05,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:05,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222988778] [2024-12-02 08:28:05,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222988778] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:05,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:05,568 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:05,568 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094600973] [2024-12-02 08:28:05,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:05,569 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:05,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:05,570 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:05,570 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:05,570 INFO L87 Difference]: Start difference. First operand 873 states and 1294 transitions. Second operand has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:05,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:05,908 INFO L93 Difference]: Finished difference Result 1580 states and 2340 transitions. [2024-12-02 08:28:05,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:05,909 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 222 [2024-12-02 08:28:05,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:05,913 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:05,913 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:05,914 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:05,915 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1263 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1266 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:05,915 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1266 Valid, 2277 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:05,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:05,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:05,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4827188940092166) internal successors, (1287), 868 states have internal predecessors, (1287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:05,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1293 transitions. [2024-12-02 08:28:05,943 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1293 transitions. Word has length 222 [2024-12-02 08:28:05,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:05,943 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1293 transitions. [2024-12-02 08:28:05,943 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:05,943 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1293 transitions. [2024-12-02 08:28:05,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-12-02 08:28:05,947 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:05,947 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:05,947 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 08:28:05,947 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:05,948 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:05,948 INFO L85 PathProgramCache]: Analyzing trace with hash -241337064, now seen corresponding path program 1 times [2024-12-02 08:28:05,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:05,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772009437] [2024-12-02 08:28:05,948 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:05,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:06,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:06,412 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:06,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:06,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772009437] [2024-12-02 08:28:06,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772009437] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:06,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:06,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:06,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602219158] [2024-12-02 08:28:06,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:06,413 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:06,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:06,414 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:06,414 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:06,414 INFO L87 Difference]: Start difference. First operand 873 states and 1293 transitions. Second operand has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:06,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:06,665 INFO L93 Difference]: Finished difference Result 1580 states and 2338 transitions. [2024-12-02 08:28:06,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:06,666 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 223 [2024-12-02 08:28:06,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:06,669 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:06,669 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:06,670 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:06,671 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2361 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:06,671 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 2270 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:06,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:06,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:06,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4815668202764978) internal successors, (1286), 868 states have internal predecessors, (1286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:06,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1292 transitions. [2024-12-02 08:28:06,689 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1292 transitions. Word has length 223 [2024-12-02 08:28:06,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:06,690 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1292 transitions. [2024-12-02 08:28:06,690 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:06,690 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1292 transitions. [2024-12-02 08:28:06,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-02 08:28:06,692 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:06,692 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:06,692 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 08:28:06,692 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:06,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:06,692 INFO L85 PathProgramCache]: Analyzing trace with hash -962851112, now seen corresponding path program 1 times [2024-12-02 08:28:06,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:06,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258550246] [2024-12-02 08:28:06,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:06,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:06,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:07,150 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:07,150 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:07,150 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1258550246] [2024-12-02 08:28:07,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1258550246] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:07,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:07,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:07,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38199220] [2024-12-02 08:28:07,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:07,151 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:07,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:07,151 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:07,151 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:07,152 INFO L87 Difference]: Start difference. First operand 873 states and 1292 transitions. Second operand has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:07,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:07,409 INFO L93 Difference]: Finished difference Result 1580 states and 2336 transitions. [2024-12-02 08:28:07,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:07,410 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 224 [2024-12-02 08:28:07,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:07,411 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:07,411 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:07,412 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:07,413 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1255 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:07,413 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 2277 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:07,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:07,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:07,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4804147465437787) internal successors, (1285), 868 states have internal predecessors, (1285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:07,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1291 transitions. [2024-12-02 08:28:07,430 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1291 transitions. Word has length 224 [2024-12-02 08:28:07,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:07,430 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1291 transitions. [2024-12-02 08:28:07,430 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:07,430 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1291 transitions. [2024-12-02 08:28:07,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-12-02 08:28:07,432 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:07,432 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:07,432 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 08:28:07,432 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:07,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:07,433 INFO L85 PathProgramCache]: Analyzing trace with hash -308143599, now seen corresponding path program 1 times [2024-12-02 08:28:07,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:07,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077410823] [2024-12-02 08:28:07,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:07,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:07,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:07,902 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:07,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:07,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077410823] [2024-12-02 08:28:07,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077410823] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:07,902 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:07,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:07,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569994596] [2024-12-02 08:28:07,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:07,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:07,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:07,904 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:07,904 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:07,904 INFO L87 Difference]: Start difference. First operand 873 states and 1291 transitions. Second operand has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:08,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:08,180 INFO L93 Difference]: Finished difference Result 1580 states and 2334 transitions. [2024-12-02 08:28:08,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:08,181 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 225 [2024-12-02 08:28:08,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:08,183 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:08,183 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:08,184 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:08,185 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2345 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2348 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:08,185 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2348 Valid, 2270 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:08,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:08,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:08,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4792626728110598) internal successors, (1284), 868 states have internal predecessors, (1284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:08,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1290 transitions. [2024-12-02 08:28:08,202 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1290 transitions. Word has length 225 [2024-12-02 08:28:08,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:08,203 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1290 transitions. [2024-12-02 08:28:08,203 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:08,203 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1290 transitions. [2024-12-02 08:28:08,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-02 08:28:08,204 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:08,205 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:08,205 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 08:28:08,205 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:08,205 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:08,205 INFO L85 PathProgramCache]: Analyzing trace with hash 816235825, now seen corresponding path program 1 times [2024-12-02 08:28:08,205 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:08,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460927072] [2024-12-02 08:28:08,206 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:08,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:08,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:08,693 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:08,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:08,694 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460927072] [2024-12-02 08:28:08,694 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460927072] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:08,694 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:08,694 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:08,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076107588] [2024-12-02 08:28:08,694 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:08,694 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:08,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:08,695 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:08,695 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:08,695 INFO L87 Difference]: Start difference. First operand 873 states and 1290 transitions. Second operand has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:08,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:08,916 INFO L93 Difference]: Finished difference Result 1580 states and 2332 transitions. [2024-12-02 08:28:08,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:08,917 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 226 [2024-12-02 08:28:08,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:08,918 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:08,918 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:08,919 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:08,920 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2337 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2340 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:08,920 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2340 Valid, 2270 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:08,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:08,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:08,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.478110599078341) internal successors, (1283), 868 states have internal predecessors, (1283), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:08,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1289 transitions. [2024-12-02 08:28:08,936 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1289 transitions. Word has length 226 [2024-12-02 08:28:08,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:08,936 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1289 transitions. [2024-12-02 08:28:08,937 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:08,937 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1289 transitions. [2024-12-02 08:28:08,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-02 08:28:08,938 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:08,939 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:08,939 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 08:28:08,939 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:08,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:08,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1707952010, now seen corresponding path program 1 times [2024-12-02 08:28:08,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:08,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223833568] [2024-12-02 08:28:08,940 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:08,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:09,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:09,393 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:09,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:09,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223833568] [2024-12-02 08:28:09,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1223833568] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:09,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:09,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:09,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257658634] [2024-12-02 08:28:09,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:09,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:09,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:09,394 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:09,394 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:09,395 INFO L87 Difference]: Start difference. First operand 873 states and 1289 transitions. Second operand has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:09,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:09,659 INFO L93 Difference]: Finished difference Result 1580 states and 2330 transitions. [2024-12-02 08:28:09,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:09,660 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 227 [2024-12-02 08:28:09,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:09,662 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:09,662 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:09,663 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:09,664 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1243 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:09,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2277 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:09,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:09,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:09,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.476958525345622) internal successors, (1282), 868 states have internal predecessors, (1282), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:09,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1288 transitions. [2024-12-02 08:28:09,680 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1288 transitions. Word has length 227 [2024-12-02 08:28:09,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:09,680 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1288 transitions. [2024-12-02 08:28:09,681 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:09,681 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1288 transitions. [2024-12-02 08:28:09,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-02 08:28:09,682 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:09,682 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:09,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 08:28:09,683 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:09,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:09,683 INFO L85 PathProgramCache]: Analyzing trace with hash -860691446, now seen corresponding path program 1 times [2024-12-02 08:28:09,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:09,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428307300] [2024-12-02 08:28:09,683 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:09,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:09,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:10,096 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:10,096 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:10,096 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428307300] [2024-12-02 08:28:10,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1428307300] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:10,097 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:10,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:10,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [368610994] [2024-12-02 08:28:10,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:10,097 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:10,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:10,098 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:10,098 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:10,098 INFO L87 Difference]: Start difference. First operand 873 states and 1288 transitions. Second operand has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:10,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:10,322 INFO L93 Difference]: Finished difference Result 1580 states and 2328 transitions. [2024-12-02 08:28:10,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:10,323 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 228 [2024-12-02 08:28:10,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:10,325 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:10,325 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:10,326 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:10,326 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1239 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1242 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:10,326 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1242 Valid, 2277 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:10,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:10,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:10,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4758064516129032) internal successors, (1281), 868 states have internal predecessors, (1281), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:10,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1287 transitions. [2024-12-02 08:28:10,336 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1287 transitions. Word has length 228 [2024-12-02 08:28:10,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:10,336 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1287 transitions. [2024-12-02 08:28:10,336 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:10,336 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1287 transitions. [2024-12-02 08:28:10,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-02 08:28:10,337 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:10,338 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:10,338 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 08:28:10,338 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:10,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:10,338 INFO L85 PathProgramCache]: Analyzing trace with hash 333464963, now seen corresponding path program 1 times [2024-12-02 08:28:10,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:10,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510143465] [2024-12-02 08:28:10,339 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:10,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:10,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:10,640 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:10,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:10,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510143465] [2024-12-02 08:28:10,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [510143465] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:10,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:10,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:10,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151061141] [2024-12-02 08:28:10,641 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:10,641 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:10,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:10,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:10,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:10,642 INFO L87 Difference]: Start difference. First operand 873 states and 1287 transitions. Second operand has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:10,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:10,890 INFO L93 Difference]: Finished difference Result 1580 states and 2326 transitions. [2024-12-02 08:28:10,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:10,891 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 229 [2024-12-02 08:28:10,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:10,892 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:10,892 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:10,893 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:10,893 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1235 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1238 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:10,893 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1238 Valid, 2277 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:10,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:10,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:10,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4746543778801844) internal successors, (1280), 868 states have internal predecessors, (1280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:10,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1286 transitions. [2024-12-02 08:28:10,901 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1286 transitions. Word has length 229 [2024-12-02 08:28:10,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:10,901 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1286 transitions. [2024-12-02 08:28:10,901 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:10,901 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1286 transitions. [2024-12-02 08:28:10,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-12-02 08:28:10,902 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:10,902 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:10,902 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 08:28:10,902 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:10,903 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:10,903 INFO L85 PathProgramCache]: Analyzing trace with hash -92034205, now seen corresponding path program 1 times [2024-12-02 08:28:10,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:10,903 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551125044] [2024-12-02 08:28:10,903 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:10,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:11,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:11,406 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:11,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:11,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551125044] [2024-12-02 08:28:11,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [551125044] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:11,407 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:11,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:11,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634994076] [2024-12-02 08:28:11,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:11,407 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:11,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:11,408 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:11,408 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:11,408 INFO L87 Difference]: Start difference. First operand 873 states and 1286 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:11,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:11,633 INFO L93 Difference]: Finished difference Result 1580 states and 2324 transitions. [2024-12-02 08:28:11,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:11,634 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 230 [2024-12-02 08:28:11,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:11,637 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:11,637 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:11,638 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:11,639 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2305 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2308 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:11,639 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2308 Valid, 2270 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:11,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:11,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:11,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4735023041474655) internal successors, (1279), 868 states have internal predecessors, (1279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:11,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1285 transitions. [2024-12-02 08:28:11,647 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1285 transitions. Word has length 230 [2024-12-02 08:28:11,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:11,648 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1285 transitions. [2024-12-02 08:28:11,648 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:11,648 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1285 transitions. [2024-12-02 08:28:11,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-02 08:28:11,649 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:11,650 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:11,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 08:28:11,650 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:11,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:11,650 INFO L85 PathProgramCache]: Analyzing trace with hash 519853052, now seen corresponding path program 1 times [2024-12-02 08:28:11,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:11,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195508038] [2024-12-02 08:28:11,651 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:11,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:11,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:11,961 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:11,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:11,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195508038] [2024-12-02 08:28:11,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1195508038] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:11,962 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:11,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:11,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813417878] [2024-12-02 08:28:11,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:11,962 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:11,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:11,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:11,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:11,963 INFO L87 Difference]: Start difference. First operand 873 states and 1285 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:12,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:12,191 INFO L93 Difference]: Finished difference Result 1580 states and 2322 transitions. [2024-12-02 08:28:12,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:12,192 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 231 [2024-12-02 08:28:12,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:12,193 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:12,193 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:12,194 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:12,194 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1227 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:12,194 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 2277 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:12,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:12,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:12,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4723502304147464) internal successors, (1278), 868 states have internal predecessors, (1278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:12,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1284 transitions. [2024-12-02 08:28:12,202 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1284 transitions. Word has length 231 [2024-12-02 08:28:12,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:12,202 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1284 transitions. [2024-12-02 08:28:12,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:12,202 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1284 transitions. [2024-12-02 08:28:12,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-02 08:28:12,203 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:12,203 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:12,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 08:28:12,203 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:12,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:12,204 INFO L85 PathProgramCache]: Analyzing trace with hash 2059164476, now seen corresponding path program 1 times [2024-12-02 08:28:12,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:12,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967601469] [2024-12-02 08:28:12,204 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:12,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:12,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:12,675 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:12,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:12,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967601469] [2024-12-02 08:28:12,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967601469] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:12,676 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:12,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:12,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [752100760] [2024-12-02 08:28:12,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:12,676 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:12,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:12,677 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:12,677 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:12,677 INFO L87 Difference]: Start difference. First operand 873 states and 1284 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:12,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:12,815 INFO L93 Difference]: Finished difference Result 1580 states and 2320 transitions. [2024-12-02 08:28:12,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:12,815 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 232 [2024-12-02 08:28:12,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:12,817 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:12,817 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:12,817 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:12,818 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1120 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1120 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:12,818 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1120 Valid, 2398 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:12,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:12,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:12,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4711981566820276) internal successors, (1277), 868 states have internal predecessors, (1277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:12,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1283 transitions. [2024-12-02 08:28:12,829 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1283 transitions. Word has length 232 [2024-12-02 08:28:12,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:12,829 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1283 transitions. [2024-12-02 08:28:12,829 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:12,829 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1283 transitions. [2024-12-02 08:28:12,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-12-02 08:28:12,831 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:12,831 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:12,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 08:28:12,831 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:12,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:12,831 INFO L85 PathProgramCache]: Analyzing trace with hash 84533315, now seen corresponding path program 1 times [2024-12-02 08:28:12,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:12,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876088968] [2024-12-02 08:28:12,832 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:12,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:12,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:13,130 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:13,130 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:13,130 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876088968] [2024-12-02 08:28:13,130 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876088968] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:13,130 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:13,130 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:13,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555729077] [2024-12-02 08:28:13,131 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:13,131 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:13,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:13,132 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:13,132 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:13,133 INFO L87 Difference]: Start difference. First operand 873 states and 1283 transitions. Second operand has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:13,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:13,327 INFO L93 Difference]: Finished difference Result 1592 states and 2335 transitions. [2024-12-02 08:28:13,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:28:13,328 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 233 [2024-12-02 08:28:13,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:13,331 INFO L225 Difference]: With dead ends: 1592 [2024-12-02 08:28:13,331 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:13,332 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:28:13,334 INFO L435 NwaCegarLoop]: 1267 mSDtfsCounter, 1143 mSDsluCounter, 2469 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 3736 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:13,334 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1143 Valid, 3736 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:13,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:13,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:13,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4700460829493087) internal successors, (1276), 868 states have internal predecessors, (1276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:13,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1282 transitions. [2024-12-02 08:28:13,348 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1282 transitions. Word has length 233 [2024-12-02 08:28:13,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:13,348 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1282 transitions. [2024-12-02 08:28:13,349 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:13,349 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1282 transitions. [2024-12-02 08:28:13,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-02 08:28:13,350 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:13,350 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:13,350 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 08:28:13,351 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:13,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:13,351 INFO L85 PathProgramCache]: Analyzing trace with hash -1868539278, now seen corresponding path program 1 times [2024-12-02 08:28:13,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:13,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487771732] [2024-12-02 08:28:13,351 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:13,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:13,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:13,772 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:13,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:13,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487771732] [2024-12-02 08:28:13,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1487771732] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:13,772 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:13,772 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:13,772 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391980153] [2024-12-02 08:28:13,772 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:13,773 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:13,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:13,773 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:13,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:13,774 INFO L87 Difference]: Start difference. First operand 873 states and 1282 transitions. Second operand has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:13,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:13,928 INFO L93 Difference]: Finished difference Result 1580 states and 2316 transitions. [2024-12-02 08:28:13,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:13,929 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 234 [2024-12-02 08:28:13,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:13,931 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:13,931 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:13,932 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:13,932 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1266 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1269 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:13,933 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1269 Valid, 2405 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:13,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:13,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:13,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4688940092165899) internal successors, (1275), 868 states have internal predecessors, (1275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:13,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1281 transitions. [2024-12-02 08:28:13,941 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1281 transitions. Word has length 234 [2024-12-02 08:28:13,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:13,941 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1281 transitions. [2024-12-02 08:28:13,941 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:13,941 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1281 transitions. [2024-12-02 08:28:13,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-12-02 08:28:13,942 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:13,942 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:13,942 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 08:28:13,942 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:13,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:13,943 INFO L85 PathProgramCache]: Analyzing trace with hash -1766214646, now seen corresponding path program 1 times [2024-12-02 08:28:13,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:13,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536734146] [2024-12-02 08:28:13,943 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:13,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:14,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:14,282 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:14,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:14,282 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536734146] [2024-12-02 08:28:14,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [536734146] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:14,282 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:14,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:14,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905262688] [2024-12-02 08:28:14,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:14,283 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:14,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:14,283 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:14,283 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:14,283 INFO L87 Difference]: Start difference. First operand 873 states and 1281 transitions. Second operand has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:14,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:14,394 INFO L93 Difference]: Finished difference Result 1580 states and 2314 transitions. [2024-12-02 08:28:14,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:14,395 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 235 [2024-12-02 08:28:14,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:14,396 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:14,396 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:14,397 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:14,397 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2383 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2386 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:14,397 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2386 Valid, 2398 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:14,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:14,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:14,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.467741935483871) internal successors, (1274), 868 states have internal predecessors, (1274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:14,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1280 transitions. [2024-12-02 08:28:14,405 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1280 transitions. Word has length 235 [2024-12-02 08:28:14,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:14,406 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1280 transitions. [2024-12-02 08:28:14,406 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:14,406 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1280 transitions. [2024-12-02 08:28:14,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2024-12-02 08:28:14,407 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:14,407 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:14,407 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 08:28:14,407 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:14,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:14,407 INFO L85 PathProgramCache]: Analyzing trace with hash 963930393, now seen corresponding path program 1 times [2024-12-02 08:28:14,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:14,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108757970] [2024-12-02 08:28:14,407 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:14,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:14,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:14,723 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:14,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:14,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108757970] [2024-12-02 08:28:14,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [108757970] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:14,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:14,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:14,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132324202] [2024-12-02 08:28:14,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:14,724 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:14,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:14,725 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:14,725 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:14,725 INFO L87 Difference]: Start difference. First operand 873 states and 1280 transitions. Second operand has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:14,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:14,885 INFO L93 Difference]: Finished difference Result 1580 states and 2312 transitions. [2024-12-02 08:28:14,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:14,886 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 236 [2024-12-02 08:28:14,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:14,888 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:14,888 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:14,888 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:14,889 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1258 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1261 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:14,889 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1261 Valid, 2405 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:14,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:14,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:14,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4665898617511521) internal successors, (1273), 868 states have internal predecessors, (1273), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:14,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1279 transitions. [2024-12-02 08:28:14,902 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1279 transitions. Word has length 236 [2024-12-02 08:28:14,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:14,902 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1279 transitions. [2024-12-02 08:28:14,902 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:14,902 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1279 transitions. [2024-12-02 08:28:14,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-02 08:28:14,903 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:14,903 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:14,904 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 08:28:14,904 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:14,904 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:14,904 INFO L85 PathProgramCache]: Analyzing trace with hash -1749422255, now seen corresponding path program 1 times [2024-12-02 08:28:14,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:14,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729598390] [2024-12-02 08:28:14,904 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:14,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:15,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:15,242 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:15,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:15,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729598390] [2024-12-02 08:28:15,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729598390] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:15,242 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:15,243 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:15,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971655320] [2024-12-02 08:28:15,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:15,243 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:15,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:15,243 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:15,244 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:15,244 INFO L87 Difference]: Start difference. First operand 873 states and 1279 transitions. Second operand has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:15,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:15,347 INFO L93 Difference]: Finished difference Result 1580 states and 2310 transitions. [2024-12-02 08:28:15,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:15,348 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 237 [2024-12-02 08:28:15,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:15,350 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:15,350 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:15,350 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:15,351 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2367 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2370 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:15,351 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2370 Valid, 2398 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:15,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:15,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:15,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4654377880184333) internal successors, (1272), 868 states have internal predecessors, (1272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:15,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1278 transitions. [2024-12-02 08:28:15,364 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1278 transitions. Word has length 237 [2024-12-02 08:28:15,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:15,364 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1278 transitions. [2024-12-02 08:28:15,364 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:15,364 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1278 transitions. [2024-12-02 08:28:15,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-02 08:28:15,365 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:15,365 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:15,366 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 08:28:15,366 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:15,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:15,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1080293184, now seen corresponding path program 1 times [2024-12-02 08:28:15,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:15,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067984837] [2024-12-02 08:28:15,366 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:15,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:15,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:15,793 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:15,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:15,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067984837] [2024-12-02 08:28:15,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2067984837] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:15,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:15,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:15,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2028881770] [2024-12-02 08:28:15,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:15,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:15,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:15,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:15,795 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:15,795 INFO L87 Difference]: Start difference. First operand 873 states and 1278 transitions. Second operand has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:15,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:15,931 INFO L93 Difference]: Finished difference Result 1580 states and 2308 transitions. [2024-12-02 08:28:15,931 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:15,931 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 238 [2024-12-02 08:28:15,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:15,933 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:15,933 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:15,934 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:15,934 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2359 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2362 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:15,935 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2362 Valid, 2398 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:15,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:15,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:15,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4642857142857142) internal successors, (1271), 868 states have internal predecessors, (1271), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:15,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1277 transitions. [2024-12-02 08:28:15,945 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1277 transitions. Word has length 238 [2024-12-02 08:28:15,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:15,945 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1277 transitions. [2024-12-02 08:28:15,946 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:15,946 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1277 transitions. [2024-12-02 08:28:15,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-02 08:28:15,946 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:15,947 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:15,947 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 08:28:15,947 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:15,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:15,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1254052376, now seen corresponding path program 1 times [2024-12-02 08:28:15,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:15,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846594757] [2024-12-02 08:28:15,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:15,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:16,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:16,267 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:16,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:16,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846594757] [2024-12-02 08:28:16,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846594757] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:16,268 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:16,268 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:16,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301051142] [2024-12-02 08:28:16,268 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:16,268 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:16,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:16,269 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:16,269 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:16,269 INFO L87 Difference]: Start difference. First operand 873 states and 1277 transitions. Second operand has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:16,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:16,398 INFO L93 Difference]: Finished difference Result 1580 states and 2306 transitions. [2024-12-02 08:28:16,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:16,398 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 239 [2024-12-02 08:28:16,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:16,401 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:16,401 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:16,402 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:16,402 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1243 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:16,402 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2405 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:16,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:16,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:16,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4631336405529953) internal successors, (1270), 868 states have internal predecessors, (1270), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:16,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1276 transitions. [2024-12-02 08:28:16,414 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1276 transitions. Word has length 239 [2024-12-02 08:28:16,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:16,414 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1276 transitions. [2024-12-02 08:28:16,414 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:16,414 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1276 transitions. [2024-12-02 08:28:16,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-02 08:28:16,416 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:16,416 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:16,416 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 08:28:16,416 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:16,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:16,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1194218592, now seen corresponding path program 1 times [2024-12-02 08:28:16,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:16,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802840337] [2024-12-02 08:28:16,417 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:16,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:16,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:16,854 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:16,854 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:16,854 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802840337] [2024-12-02 08:28:16,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802840337] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:16,854 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:16,854 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:16,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63251305] [2024-12-02 08:28:16,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:16,855 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:16,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:16,855 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:16,855 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:16,856 INFO L87 Difference]: Start difference. First operand 873 states and 1276 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:16,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:16,928 INFO L93 Difference]: Finished difference Result 1580 states and 2304 transitions. [2024-12-02 08:28:16,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:16,929 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 240 [2024-12-02 08:28:16,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:16,932 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:16,932 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:16,933 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:16,934 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1135 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:16,934 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2502 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:28:16,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:16,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:16,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4608294930875576) internal successors, (1268), 868 states have internal predecessors, (1268), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:16,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1274 transitions. [2024-12-02 08:28:16,948 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1274 transitions. Word has length 240 [2024-12-02 08:28:16,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:16,948 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1274 transitions. [2024-12-02 08:28:16,948 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:16,948 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1274 transitions. [2024-12-02 08:28:16,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-02 08:28:16,949 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:16,949 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:16,949 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 08:28:16,950 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:16,950 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:16,950 INFO L85 PathProgramCache]: Analyzing trace with hash 1191452317, now seen corresponding path program 1 times [2024-12-02 08:28:16,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:16,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641622524] [2024-12-02 08:28:16,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:16,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:17,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:17,303 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:17,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:17,304 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641622524] [2024-12-02 08:28:17,304 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641622524] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:17,304 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:17,304 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:17,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810131325] [2024-12-02 08:28:17,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:17,304 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:17,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:17,305 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:17,305 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:17,305 INFO L87 Difference]: Start difference. First operand 873 states and 1274 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:17,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:17,371 INFO L93 Difference]: Finished difference Result 1580 states and 2300 transitions. [2024-12-02 08:28:17,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:17,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 242 [2024-12-02 08:28:17,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:17,373 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:17,373 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:17,374 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:17,374 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1257 mSDsluCounter, 1259 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1260 SdHoareTripleChecker+Valid, 2509 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:17,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1260 Valid, 2509 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:28:17,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:17,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:17,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4596774193548387) internal successors, (1267), 868 states have internal predecessors, (1267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:17,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1273 transitions. [2024-12-02 08:28:17,388 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1273 transitions. Word has length 242 [2024-12-02 08:28:17,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:17,389 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1273 transitions. [2024-12-02 08:28:17,389 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:17,389 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1273 transitions. [2024-12-02 08:28:17,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-02 08:28:17,390 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:17,390 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:17,391 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 08:28:17,391 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:17,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:17,391 INFO L85 PathProgramCache]: Analyzing trace with hash 864928727, now seen corresponding path program 1 times [2024-12-02 08:28:17,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:17,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825091380] [2024-12-02 08:28:17,391 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:17,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:17,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:17,983 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:17,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:17,983 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825091380] [2024-12-02 08:28:17,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825091380] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:17,983 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:17,983 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:17,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915016588] [2024-12-02 08:28:17,983 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:17,984 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:17,984 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:17,984 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:17,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:17,984 INFO L87 Difference]: Start difference. First operand 873 states and 1273 transitions. Second operand has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:18,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:18,117 INFO L93 Difference]: Finished difference Result 1580 states and 2298 transitions. [2024-12-02 08:28:18,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:18,118 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 243 [2024-12-02 08:28:18,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:18,121 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:18,121 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:18,123 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:18,123 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1126 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:18,123 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2456 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:18,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:18,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:18,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4585253456221199) internal successors, (1266), 868 states have internal predecessors, (1266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:18,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1272 transitions. [2024-12-02 08:28:18,140 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1272 transitions. Word has length 243 [2024-12-02 08:28:18,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:18,141 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1272 transitions. [2024-12-02 08:28:18,141 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:18,141 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1272 transitions. [2024-12-02 08:28:18,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-02 08:28:18,142 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:18,142 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:18,143 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 08:28:18,143 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:18,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:18,143 INFO L85 PathProgramCache]: Analyzing trace with hash 243720918, now seen corresponding path program 1 times [2024-12-02 08:28:18,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:18,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931981666] [2024-12-02 08:28:18,144 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:18,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:18,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:18,517 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:18,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:18,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931981666] [2024-12-02 08:28:18,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1931981666] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:18,518 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:18,518 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:18,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825677936] [2024-12-02 08:28:18,518 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:18,519 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:18,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:18,519 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:18,519 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:18,520 INFO L87 Difference]: Start difference. First operand 873 states and 1272 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:18,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:18,622 INFO L93 Difference]: Finished difference Result 1580 states and 2296 transitions. [2024-12-02 08:28:18,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:18,623 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 244 [2024-12-02 08:28:18,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:18,624 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:18,624 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:18,625 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:18,626 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2376 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2379 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:18,626 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2379 Valid, 2456 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:18,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:18,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:18,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.457373271889401) internal successors, (1265), 868 states have internal predecessors, (1265), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:18,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1271 transitions. [2024-12-02 08:28:18,640 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1271 transitions. Word has length 244 [2024-12-02 08:28:18,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:18,640 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1271 transitions. [2024-12-02 08:28:18,640 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:18,640 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1271 transitions. [2024-12-02 08:28:18,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-02 08:28:18,641 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:18,641 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:18,641 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 08:28:18,641 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:18,642 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:18,642 INFO L85 PathProgramCache]: Analyzing trace with hash -1180390672, now seen corresponding path program 1 times [2024-12-02 08:28:18,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:18,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138430967] [2024-12-02 08:28:18,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:18,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:18,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:18,947 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:18,947 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:18,947 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138430967] [2024-12-02 08:28:18,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138430967] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:18,947 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:18,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:18,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83882662] [2024-12-02 08:28:18,947 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:18,948 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:18,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:18,948 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:18,948 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:18,948 INFO L87 Difference]: Start difference. First operand 873 states and 1271 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:19,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:19,033 INFO L93 Difference]: Finished difference Result 1580 states and 2294 transitions. [2024-12-02 08:28:19,034 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:19,034 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 245 [2024-12-02 08:28:19,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:19,035 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:19,035 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:19,036 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:19,036 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2368 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2371 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:19,036 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2371 Valid, 2456 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:19,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:19,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:19,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.456221198156682) internal successors, (1264), 868 states have internal predecessors, (1264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:19,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1270 transitions. [2024-12-02 08:28:19,044 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1270 transitions. Word has length 245 [2024-12-02 08:28:19,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:19,045 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1270 transitions. [2024-12-02 08:28:19,045 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:19,045 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1270 transitions. [2024-12-02 08:28:19,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-02 08:28:19,045 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:19,045 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:19,046 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 08:28:19,046 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:19,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:19,046 INFO L85 PathProgramCache]: Analyzing trace with hash 1988978575, now seen corresponding path program 1 times [2024-12-02 08:28:19,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:19,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452485548] [2024-12-02 08:28:19,046 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:19,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:19,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:19,418 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:19,419 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:19,419 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452485548] [2024-12-02 08:28:19,419 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452485548] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:19,419 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:19,419 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:19,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912860840] [2024-12-02 08:28:19,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:19,420 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:19,420 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:19,420 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:19,420 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:19,421 INFO L87 Difference]: Start difference. First operand 873 states and 1270 transitions. Second operand has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:19,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:19,506 INFO L93 Difference]: Finished difference Result 1580 states and 2292 transitions. [2024-12-02 08:28:19,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:19,506 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 246 [2024-12-02 08:28:19,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:19,508 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:19,508 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:19,508 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:19,509 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1248 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1251 SdHoareTripleChecker+Valid, 2463 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:19,509 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1251 Valid, 2463 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:19,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:19,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:19,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.455069124423963) internal successors, (1263), 868 states have internal predecessors, (1263), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:19,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1269 transitions. [2024-12-02 08:28:19,518 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1269 transitions. Word has length 246 [2024-12-02 08:28:19,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:19,518 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1269 transitions. [2024-12-02 08:28:19,518 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:19,518 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1269 transitions. [2024-12-02 08:28:19,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-02 08:28:19,519 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:19,519 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:19,519 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 08:28:19,520 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:19,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:19,520 INFO L85 PathProgramCache]: Analyzing trace with hash -180499831, now seen corresponding path program 1 times [2024-12-02 08:28:19,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:19,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74475503] [2024-12-02 08:28:19,520 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:19,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:19,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:20,102 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:20,103 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:20,103 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74475503] [2024-12-02 08:28:20,103 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74475503] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:20,103 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:20,103 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:20,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526418859] [2024-12-02 08:28:20,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:20,104 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:20,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:20,104 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:20,104 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:20,104 INFO L87 Difference]: Start difference. First operand 873 states and 1269 transitions. Second operand has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:20,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:20,163 INFO L93 Difference]: Finished difference Result 1580 states and 2290 transitions. [2024-12-02 08:28:20,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:20,164 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 247 [2024-12-02 08:28:20,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:20,165 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:20,165 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:20,166 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:20,166 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1166 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1168 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:20,166 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1168 Valid, 2500 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:28:20,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:20,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:20,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4539170506912442) internal successors, (1262), 868 states have internal predecessors, (1262), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:20,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1268 transitions. [2024-12-02 08:28:20,179 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1268 transitions. Word has length 247 [2024-12-02 08:28:20,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:20,179 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1268 transitions. [2024-12-02 08:28:20,179 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:20,180 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1268 transitions. [2024-12-02 08:28:20,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-02 08:28:20,180 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:20,180 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:20,180 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 08:28:20,181 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:20,181 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:20,181 INFO L85 PathProgramCache]: Analyzing trace with hash 51167845, now seen corresponding path program 1 times [2024-12-02 08:28:20,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:20,181 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575795611] [2024-12-02 08:28:20,181 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:20,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:20,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:20,661 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:20,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:20,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575795611] [2024-12-02 08:28:20,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1575795611] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:20,661 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:20,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:20,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834705340] [2024-12-02 08:28:20,661 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:20,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:20,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:20,662 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:20,662 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:20,662 INFO L87 Difference]: Start difference. First operand 873 states and 1268 transitions. Second operand has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:20,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:20,717 INFO L93 Difference]: Finished difference Result 1580 states and 2288 transitions. [2024-12-02 08:28:20,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:20,718 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 248 [2024-12-02 08:28:20,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:20,720 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:20,720 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:20,721 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:20,721 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1164 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:20,722 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 2500 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:28:20,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:20,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:20,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4527649769585254) internal successors, (1261), 868 states have internal predecessors, (1261), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:20,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1267 transitions. [2024-12-02 08:28:20,737 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1267 transitions. Word has length 248 [2024-12-02 08:28:20,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:20,738 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1267 transitions. [2024-12-02 08:28:20,738 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:20,738 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1267 transitions. [2024-12-02 08:28:20,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-12-02 08:28:20,739 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:20,739 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:20,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 08:28:20,739 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:20,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:20,740 INFO L85 PathProgramCache]: Analyzing trace with hash -594336282, now seen corresponding path program 1 times [2024-12-02 08:28:20,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:20,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345090050] [2024-12-02 08:28:20,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:20,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:21,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:21,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:21,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:21,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345090050] [2024-12-02 08:28:21,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1345090050] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:21,339 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:21,340 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:21,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777219483] [2024-12-02 08:28:21,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:21,340 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:21,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:21,341 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:21,341 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:21,341 INFO L87 Difference]: Start difference. First operand 873 states and 1267 transitions. Second operand has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:21,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:21,446 INFO L93 Difference]: Finished difference Result 1580 states and 2286 transitions. [2024-12-02 08:28:21,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:21,447 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 249 [2024-12-02 08:28:21,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:21,449 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:21,449 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:21,449 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:21,450 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1119 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1119 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:21,450 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1119 Valid, 2452 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:21,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:21,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:21,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4516129032258065) internal successors, (1260), 868 states have internal predecessors, (1260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:21,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1266 transitions. [2024-12-02 08:28:21,462 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1266 transitions. Word has length 249 [2024-12-02 08:28:21,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:21,462 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1266 transitions. [2024-12-02 08:28:21,462 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:21,462 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1266 transitions. [2024-12-02 08:28:21,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2024-12-02 08:28:21,463 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:21,464 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:21,464 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 08:28:21,464 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:21,464 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:21,464 INFO L85 PathProgramCache]: Analyzing trace with hash -592829682, now seen corresponding path program 1 times [2024-12-02 08:28:21,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:21,465 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031727296] [2024-12-02 08:28:21,465 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:21,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:21,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:22,258 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:22,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:22,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031727296] [2024-12-02 08:28:22,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031727296] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:22,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:22,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:22,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219922008] [2024-12-02 08:28:22,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:22,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:22,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:22,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:22,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:22,260 INFO L87 Difference]: Start difference. First operand 873 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:22,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:22,400 INFO L93 Difference]: Finished difference Result 1580 states and 2284 transitions. [2024-12-02 08:28:22,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:22,401 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 250 [2024-12-02 08:28:22,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:22,402 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:22,402 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:22,403 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:22,403 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1115 mSDsluCounter, 1234 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1115 SdHoareTripleChecker+Valid, 2459 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:22,403 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1115 Valid, 2459 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:22,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:22,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:22,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4504608294930876) internal successors, (1259), 868 states have internal predecessors, (1259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:22,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1265 transitions. [2024-12-02 08:28:22,415 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1265 transitions. Word has length 250 [2024-12-02 08:28:22,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:22,415 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1265 transitions. [2024-12-02 08:28:22,416 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:22,416 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1265 transitions. [2024-12-02 08:28:22,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2024-12-02 08:28:22,417 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:22,417 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:22,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 08:28:22,417 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:22,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:22,418 INFO L85 PathProgramCache]: Analyzing trace with hash -142001561, now seen corresponding path program 1 times [2024-12-02 08:28:22,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:22,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414052037] [2024-12-02 08:28:22,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:22,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:22,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:23,066 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:23,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:23,066 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414052037] [2024-12-02 08:28:23,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414052037] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:23,067 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:23,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:23,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894892335] [2024-12-02 08:28:23,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:23,067 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:23,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:23,068 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:23,068 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:23,068 INFO L87 Difference]: Start difference. First operand 873 states and 1265 transitions. Second operand has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:23,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:23,194 INFO L93 Difference]: Finished difference Result 1580 states and 2282 transitions. [2024-12-02 08:28:23,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:23,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 251 [2024-12-02 08:28:23,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:23,196 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:23,197 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:23,197 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:23,198 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 2220 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2220 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:23,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2220 Valid, 2452 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:23,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:23,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:23,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4493087557603688) internal successors, (1258), 868 states have internal predecessors, (1258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:23,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1264 transitions. [2024-12-02 08:28:23,209 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1264 transitions. Word has length 251 [2024-12-02 08:28:23,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:23,209 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1264 transitions. [2024-12-02 08:28:23,209 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:23,209 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1264 transitions. [2024-12-02 08:28:23,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-02 08:28:23,210 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:23,211 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:23,211 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 08:28:23,211 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:23,211 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:23,211 INFO L85 PathProgramCache]: Analyzing trace with hash 488879693, now seen corresponding path program 1 times [2024-12-02 08:28:23,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:23,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025194210] [2024-12-02 08:28:23,211 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:23,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:23,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:23,793 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:23,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:23,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025194210] [2024-12-02 08:28:23,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1025194210] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:23,793 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:23,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:23,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505319326] [2024-12-02 08:28:23,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:23,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:23,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:23,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:23,795 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:23,795 INFO L87 Difference]: Start difference. First operand 873 states and 1264 transitions. Second operand has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:23,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:23,998 INFO L93 Difference]: Finished difference Result 1580 states and 2280 transitions. [2024-12-02 08:28:23,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:23,998 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 252 [2024-12-02 08:28:23,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:24,001 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:24,001 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:24,002 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:24,002 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1100 mSDsluCounter, 2369 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1100 SdHoareTripleChecker+Valid, 3555 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:24,002 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1100 Valid, 3555 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:24,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:24,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:24,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4481566820276497) internal successors, (1257), 868 states have internal predecessors, (1257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:24,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1263 transitions. [2024-12-02 08:28:24,019 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1263 transitions. Word has length 252 [2024-12-02 08:28:24,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:24,019 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1263 transitions. [2024-12-02 08:28:24,019 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:24,019 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1263 transitions. [2024-12-02 08:28:24,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2024-12-02 08:28:24,020 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:24,021 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:24,021 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 08:28:24,021 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:24,021 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:24,022 INFO L85 PathProgramCache]: Analyzing trace with hash -1768421689, now seen corresponding path program 1 times [2024-12-02 08:28:24,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:24,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885946895] [2024-12-02 08:28:24,022 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:24,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:24,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:24,644 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:24,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:24,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885946895] [2024-12-02 08:28:24,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1885946895] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:24,644 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:24,644 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:24,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1332037765] [2024-12-02 08:28:24,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:24,645 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:24,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:24,646 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:24,646 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:24,646 INFO L87 Difference]: Start difference. First operand 873 states and 1263 transitions. Second operand has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:24,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:24,849 INFO L93 Difference]: Finished difference Result 1580 states and 2278 transitions. [2024-12-02 08:28:24,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:24,850 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 253 [2024-12-02 08:28:24,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:24,852 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:24,852 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:24,852 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:24,853 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1097 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1097 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:24,853 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1097 Valid, 2381 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:24,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:24,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:24,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4470046082949308) internal successors, (1256), 868 states have internal predecessors, (1256), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:24,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1262 transitions. [2024-12-02 08:28:24,869 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1262 transitions. Word has length 253 [2024-12-02 08:28:24,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:24,869 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1262 transitions. [2024-12-02 08:28:24,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:24,869 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1262 transitions. [2024-12-02 08:28:24,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-02 08:28:24,871 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:24,871 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:24,871 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 08:28:24,871 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:24,872 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:24,872 INFO L85 PathProgramCache]: Analyzing trace with hash -262754674, now seen corresponding path program 1 times [2024-12-02 08:28:24,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:24,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285984647] [2024-12-02 08:28:24,872 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:24,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:25,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:25,495 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:25,496 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:25,496 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285984647] [2024-12-02 08:28:25,496 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285984647] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:25,496 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:25,496 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:25,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959244430] [2024-12-02 08:28:25,496 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:25,496 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:25,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:25,497 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:25,497 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:25,497 INFO L87 Difference]: Start difference. First operand 873 states and 1262 transitions. Second operand has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:25,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:25,654 INFO L93 Difference]: Finished difference Result 1580 states and 2276 transitions. [2024-12-02 08:28:25,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:25,655 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 254 [2024-12-02 08:28:25,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:25,657 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:25,657 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:25,658 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:25,658 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2184 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2184 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:25,658 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2184 Valid, 2374 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:25,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:25,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:25,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.445852534562212) internal successors, (1255), 868 states have internal predecessors, (1255), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:25,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1261 transitions. [2024-12-02 08:28:25,674 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1261 transitions. Word has length 254 [2024-12-02 08:28:25,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:25,674 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1261 transitions. [2024-12-02 08:28:25,674 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:25,674 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1261 transitions. [2024-12-02 08:28:25,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-02 08:28:25,675 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:25,676 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:25,676 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 08:28:25,676 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:25,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:25,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1822400070, now seen corresponding path program 1 times [2024-12-02 08:28:25,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:25,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864520696] [2024-12-02 08:28:25,676 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:25,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:25,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:26,245 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:26,245 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:26,245 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864520696] [2024-12-02 08:28:26,245 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1864520696] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:26,246 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:26,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:26,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334872237] [2024-12-02 08:28:26,246 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:26,246 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:26,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:26,247 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:26,247 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:26,247 INFO L87 Difference]: Start difference. First operand 873 states and 1261 transitions. Second operand has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:26,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:26,393 INFO L93 Difference]: Finished difference Result 1580 states and 2274 transitions. [2024-12-02 08:28:26,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:26,394 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 255 [2024-12-02 08:28:26,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:26,395 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:26,396 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:26,396 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:26,397 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2178 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:26,397 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2178 Valid, 2374 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:26,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:26,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:26,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.444700460829493) internal successors, (1254), 868 states have internal predecessors, (1254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:26,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1260 transitions. [2024-12-02 08:28:26,407 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1260 transitions. Word has length 255 [2024-12-02 08:28:26,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:26,408 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1260 transitions. [2024-12-02 08:28:26,408 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:26,408 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1260 transitions. [2024-12-02 08:28:26,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2024-12-02 08:28:26,409 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:26,409 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:26,409 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 08:28:26,409 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:26,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:26,410 INFO L85 PathProgramCache]: Analyzing trace with hash -449010865, now seen corresponding path program 1 times [2024-12-02 08:28:26,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:26,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180208519] [2024-12-02 08:28:26,410 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:26,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:26,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:26,921 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:26,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:26,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180208519] [2024-12-02 08:28:26,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180208519] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:26,921 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:26,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:26,921 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047223084] [2024-12-02 08:28:26,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:26,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:26,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:26,922 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:26,922 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:26,922 INFO L87 Difference]: Start difference. First operand 873 states and 1260 transitions. Second operand has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:27,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:27,048 INFO L93 Difference]: Finished difference Result 1580 states and 2272 transitions. [2024-12-02 08:28:27,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:27,049 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 256 [2024-12-02 08:28:27,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:27,051 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:27,051 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:27,052 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:27,052 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1079 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:27,052 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2374 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:27,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:27,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:27,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4435483870967742) internal successors, (1253), 868 states have internal predecessors, (1253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:27,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1259 transitions. [2024-12-02 08:28:27,065 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1259 transitions. Word has length 256 [2024-12-02 08:28:27,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:27,065 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1259 transitions. [2024-12-02 08:28:27,065 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:27,065 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1259 transitions. [2024-12-02 08:28:27,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2024-12-02 08:28:27,066 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:27,066 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:27,066 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 08:28:27,066 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:27,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:27,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1710883141, now seen corresponding path program 1 times [2024-12-02 08:28:27,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:27,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873248315] [2024-12-02 08:28:27,067 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:27,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:27,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:27,620 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:27,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:27,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873248315] [2024-12-02 08:28:27,620 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1873248315] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:27,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:27,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:27,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891746317] [2024-12-02 08:28:27,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:27,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:27,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:27,621 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:27,621 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:27,622 INFO L87 Difference]: Start difference. First operand 873 states and 1259 transitions. Second operand has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:27,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:27,773 INFO L93 Difference]: Finished difference Result 1580 states and 2270 transitions. [2024-12-02 08:28:27,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:27,773 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 257 [2024-12-02 08:28:27,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:27,775 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:27,775 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:27,776 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:27,776 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2166 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2166 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:27,776 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2166 Valid, 2374 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:27,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:27,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:27,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4423963133640554) internal successors, (1252), 868 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:27,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1258 transitions. [2024-12-02 08:28:27,789 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1258 transitions. Word has length 257 [2024-12-02 08:28:27,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:27,789 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1258 transitions. [2024-12-02 08:28:27,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:27,789 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1258 transitions. [2024-12-02 08:28:27,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2024-12-02 08:28:27,791 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:27,791 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:27,791 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 08:28:27,791 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:27,791 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:27,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1726874768, now seen corresponding path program 1 times [2024-12-02 08:28:27,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:27,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157821606] [2024-12-02 08:28:27,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:27,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:27,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:28,264 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:28,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:28,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157821606] [2024-12-02 08:28:28,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1157821606] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:28,264 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:28,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:28,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094042273] [2024-12-02 08:28:28,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:28,265 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:28,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:28,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:28,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:28,265 INFO L87 Difference]: Start difference. First operand 873 states and 1258 transitions. Second operand has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:28,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:28,418 INFO L93 Difference]: Finished difference Result 1580 states and 2268 transitions. [2024-12-02 08:28:28,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:28,419 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 258 [2024-12-02 08:28:28,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:28,421 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 08:28:28,421 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 08:28:28,422 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:28,422 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2160 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2160 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:28,422 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2160 Valid, 2374 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:28,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 08:28:28,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 08:28:28,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4412442396313363) internal successors, (1251), 868 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:28,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1257 transitions. [2024-12-02 08:28:28,432 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1257 transitions. Word has length 258 [2024-12-02 08:28:28,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:28,432 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1257 transitions. [2024-12-02 08:28:28,432 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:28,433 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1257 transitions. [2024-12-02 08:28:28,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2024-12-02 08:28:28,433 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:28,433 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:28,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 08:28:28,434 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:28,434 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:28,434 INFO L85 PathProgramCache]: Analyzing trace with hash 564576196, now seen corresponding path program 1 times [2024-12-02 08:28:28,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:28,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509987114] [2024-12-02 08:28:28,434 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:28,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:28,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:29,253 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:29,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:29,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509987114] [2024-12-02 08:28:29,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509987114] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:29,253 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:29,254 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:28:29,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [579421394] [2024-12-02 08:28:29,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:29,254 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:28:29,254 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:29,255 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:28:29,255 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:28:29,255 INFO L87 Difference]: Start difference. First operand 873 states and 1257 transitions. Second operand has 7 states, 7 states have (on average 35.285714285714285) internal successors, (247), 7 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:29,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:29,629 INFO L93 Difference]: Finished difference Result 1646 states and 2362 transitions. [2024-12-02 08:28:29,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:28:29,629 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 35.285714285714285) internal successors, (247), 7 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 259 [2024-12-02 08:28:29,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:29,632 INFO L225 Difference]: With dead ends: 1646 [2024-12-02 08:28:29,632 INFO L226 Difference]: Without dead ends: 877 [2024-12-02 08:28:29,633 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:28:29,633 INFO L435 NwaCegarLoop]: 1229 mSDtfsCounter, 1285 mSDsluCounter, 4658 mSDsCounter, 0 mSdLazyCounter, 376 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1288 SdHoareTripleChecker+Valid, 5887 SdHoareTripleChecker+Invalid, 385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 376 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:29,633 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1288 Valid, 5887 Invalid, 385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 376 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:29,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 877 states. [2024-12-02 08:28:29,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 877 to 875. [2024-12-02 08:28:29,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.439080459770115) internal successors, (1252), 870 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:29,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1258 transitions. [2024-12-02 08:28:29,656 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1258 transitions. Word has length 259 [2024-12-02 08:28:29,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:29,656 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1258 transitions. [2024-12-02 08:28:29,656 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 35.285714285714285) internal successors, (247), 7 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:29,657 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1258 transitions. [2024-12-02 08:28:29,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2024-12-02 08:28:29,658 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:29,659 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:29,659 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 08:28:29,659 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:29,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:29,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1938858229, now seen corresponding path program 1 times [2024-12-02 08:28:29,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:29,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146496072] [2024-12-02 08:28:29,660 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:29,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:30,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:30,386 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:30,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:30,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146496072] [2024-12-02 08:28:30,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146496072] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:30,386 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:30,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:28:30,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1841795827] [2024-12-02 08:28:30,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:30,387 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:28:30,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:30,388 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:28:30,388 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:28:30,388 INFO L87 Difference]: Start difference. First operand 875 states and 1258 transitions. Second operand has 4 states, 4 states have (on average 62.0) internal successors, (248), 4 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:30,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:30,624 INFO L93 Difference]: Finished difference Result 1584 states and 2268 transitions. [2024-12-02 08:28:30,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:30,625 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 62.0) internal successors, (248), 4 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 260 [2024-12-02 08:28:30,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:30,626 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:30,626 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:30,627 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:30,627 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1059 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1059 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:30,628 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1059 Valid, 2214 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:30,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:30,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:30,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4379310344827587) internal successors, (1251), 870 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:30,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1257 transitions. [2024-12-02 08:28:30,641 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1257 transitions. Word has length 260 [2024-12-02 08:28:30,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:30,642 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1257 transitions. [2024-12-02 08:28:30,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 62.0) internal successors, (248), 4 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:30,642 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1257 transitions. [2024-12-02 08:28:30,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2024-12-02 08:28:30,643 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:30,643 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:30,643 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 08:28:30,643 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:30,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:30,644 INFO L85 PathProgramCache]: Analyzing trace with hash -1664884833, now seen corresponding path program 1 times [2024-12-02 08:28:30,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:30,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565261524] [2024-12-02 08:28:30,644 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:30,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:30,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:31,258 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:31,258 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:31,258 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565261524] [2024-12-02 08:28:31,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565261524] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:31,258 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:31,258 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:31,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303453228] [2024-12-02 08:28:31,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:31,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:31,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:31,259 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:31,259 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:31,260 INFO L87 Difference]: Start difference. First operand 875 states and 1257 transitions. Second operand has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:31,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:31,532 INFO L93 Difference]: Finished difference Result 1584 states and 2266 transitions. [2024-12-02 08:28:31,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:31,533 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 261 [2024-12-02 08:28:31,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:31,534 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:31,534 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:31,535 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:31,535 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2110 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2110 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:31,536 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2110 Valid, 2214 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:31,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:31,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:31,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4367816091954022) internal successors, (1250), 870 states have internal predecessors, (1250), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:31,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1256 transitions. [2024-12-02 08:28:31,555 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1256 transitions. Word has length 261 [2024-12-02 08:28:31,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:31,555 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1256 transitions. [2024-12-02 08:28:31,555 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:31,556 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1256 transitions. [2024-12-02 08:28:31,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2024-12-02 08:28:31,557 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:31,557 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:31,557 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 08:28:31,557 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:31,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:31,558 INFO L85 PathProgramCache]: Analyzing trace with hash 797250102, now seen corresponding path program 1 times [2024-12-02 08:28:31,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:31,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835449027] [2024-12-02 08:28:31,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:31,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:31,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:32,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:32,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:32,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835449027] [2024-12-02 08:28:32,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1835449027] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:32,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:32,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:32,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495004183] [2024-12-02 08:28:32,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:32,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:32,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:32,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:32,088 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:32,088 INFO L87 Difference]: Start difference. First operand 875 states and 1256 transitions. Second operand has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:32,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:32,353 INFO L93 Difference]: Finished difference Result 1584 states and 2264 transitions. [2024-12-02 08:28:32,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:32,354 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 262 [2024-12-02 08:28:32,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:32,355 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:32,355 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:32,356 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:32,356 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2104 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 288 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2104 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 288 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:32,356 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2104 Valid, 2214 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 288 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:32,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:32,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:32,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.435632183908046) internal successors, (1249), 870 states have internal predecessors, (1249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:32,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1255 transitions. [2024-12-02 08:28:32,368 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1255 transitions. Word has length 262 [2024-12-02 08:28:32,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:32,368 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1255 transitions. [2024-12-02 08:28:32,368 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:32,368 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1255 transitions. [2024-12-02 08:28:32,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2024-12-02 08:28:32,369 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:32,369 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:32,369 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 08:28:32,369 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:32,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:32,370 INFO L85 PathProgramCache]: Analyzing trace with hash -1525809634, now seen corresponding path program 1 times [2024-12-02 08:28:32,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:32,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489989935] [2024-12-02 08:28:32,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:32,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:32,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:32,932 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:32,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:32,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489989935] [2024-12-02 08:28:32,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [489989935] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:32,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:32,933 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:32,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041631952] [2024-12-02 08:28:32,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:32,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:32,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:32,933 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:32,933 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:32,933 INFO L87 Difference]: Start difference. First operand 875 states and 1255 transitions. Second operand has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:33,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:33,203 INFO L93 Difference]: Finished difference Result 1584 states and 2262 transitions. [2024-12-02 08:28:33,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:33,204 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 263 [2024-12-02 08:28:33,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:33,206 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:33,206 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:33,207 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:33,207 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1055 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1055 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:33,208 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1055 Valid, 2221 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:33,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:33,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:33,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4344827586206896) internal successors, (1248), 870 states have internal predecessors, (1248), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:33,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1254 transitions. [2024-12-02 08:28:33,231 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1254 transitions. Word has length 263 [2024-12-02 08:28:33,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:33,231 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1254 transitions. [2024-12-02 08:28:33,231 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:33,231 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1254 transitions. [2024-12-02 08:28:33,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2024-12-02 08:28:33,232 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:33,232 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:33,232 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 08:28:33,233 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:33,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:33,233 INFO L85 PathProgramCache]: Analyzing trace with hash -758087689, now seen corresponding path program 1 times [2024-12-02 08:28:33,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:33,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886563075] [2024-12-02 08:28:33,233 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:33,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:33,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:33,770 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:33,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:33,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886563075] [2024-12-02 08:28:33,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1886563075] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:33,771 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:33,771 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:33,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492294529] [2024-12-02 08:28:33,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:33,771 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:33,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:33,771 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:33,771 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:33,771 INFO L87 Difference]: Start difference. First operand 875 states and 1254 transitions. Second operand has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:34,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:34,005 INFO L93 Difference]: Finished difference Result 1584 states and 2260 transitions. [2024-12-02 08:28:34,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:34,006 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 264 [2024-12-02 08:28:34,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:34,008 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:34,008 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:34,009 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:34,009 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2092 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2092 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:34,009 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2092 Valid, 2214 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:34,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:34,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:34,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4333333333333333) internal successors, (1247), 870 states have internal predecessors, (1247), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:34,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1253 transitions. [2024-12-02 08:28:34,028 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1253 transitions. Word has length 264 [2024-12-02 08:28:34,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:34,028 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1253 transitions. [2024-12-02 08:28:34,029 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:34,029 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1253 transitions. [2024-12-02 08:28:34,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2024-12-02 08:28:34,030 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:34,030 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:34,030 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 08:28:34,030 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:34,031 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:34,031 INFO L85 PathProgramCache]: Analyzing trace with hash 950986781, now seen corresponding path program 1 times [2024-12-02 08:28:34,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:34,031 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451889305] [2024-12-02 08:28:34,031 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:34,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:34,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:34,532 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:34,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:34,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451889305] [2024-12-02 08:28:34,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [451889305] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:34,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:34,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:34,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866108904] [2024-12-02 08:28:34,532 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:34,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:34,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:34,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:34,534 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:34,534 INFO L87 Difference]: Start difference. First operand 875 states and 1253 transitions. Second operand has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:34,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:34,772 INFO L93 Difference]: Finished difference Result 1584 states and 2258 transitions. [2024-12-02 08:28:34,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:34,772 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 265 [2024-12-02 08:28:34,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:34,774 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:34,774 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:34,774 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:34,775 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2086 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 282 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2086 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 282 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:34,775 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2086 Valid, 2214 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 282 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:34,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:34,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:34,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.432183908045977) internal successors, (1246), 870 states have internal predecessors, (1246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:34,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1252 transitions. [2024-12-02 08:28:34,786 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1252 transitions. Word has length 265 [2024-12-02 08:28:34,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:34,786 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1252 transitions. [2024-12-02 08:28:34,786 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:34,786 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1252 transitions. [2024-12-02 08:28:34,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2024-12-02 08:28:34,787 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:34,787 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:34,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 08:28:34,787 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:34,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:34,788 INFO L85 PathProgramCache]: Analyzing trace with hash -214214088, now seen corresponding path program 1 times [2024-12-02 08:28:34,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:34,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529026421] [2024-12-02 08:28:34,788 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:34,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:34,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:35,361 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:35,361 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:35,361 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529026421] [2024-12-02 08:28:35,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529026421] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:35,361 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:35,361 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:35,361 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734251294] [2024-12-02 08:28:35,361 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:35,362 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:35,362 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:35,362 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:35,362 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:35,363 INFO L87 Difference]: Start difference. First operand 875 states and 1252 transitions. Second operand has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:35,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:35,610 INFO L93 Difference]: Finished difference Result 1584 states and 2256 transitions. [2024-12-02 08:28:35,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:35,611 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 266 [2024-12-02 08:28:35,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:35,612 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:35,612 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:35,612 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:35,613 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1052 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 280 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1052 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 280 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:35,613 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1052 Valid, 2221 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 280 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:35,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:35,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:35,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4310344827586208) internal successors, (1245), 870 states have internal predecessors, (1245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:35,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1251 transitions. [2024-12-02 08:28:35,622 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1251 transitions. Word has length 266 [2024-12-02 08:28:35,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:35,622 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1251 transitions. [2024-12-02 08:28:35,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:35,622 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1251 transitions. [2024-12-02 08:28:35,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2024-12-02 08:28:35,623 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:35,624 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:35,624 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 08:28:35,624 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:35,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:35,624 INFO L85 PathProgramCache]: Analyzing trace with hash 536227228, now seen corresponding path program 1 times [2024-12-02 08:28:35,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:35,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830935565] [2024-12-02 08:28:35,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:35,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:35,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:36,097 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:36,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:36,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830935565] [2024-12-02 08:28:36,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830935565] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:36,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:36,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:36,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561247239] [2024-12-02 08:28:36,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:36,098 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:36,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:36,099 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:36,099 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:36,099 INFO L87 Difference]: Start difference. First operand 875 states and 1251 transitions. Second operand has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:36,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:36,407 INFO L93 Difference]: Finished difference Result 1584 states and 2254 transitions. [2024-12-02 08:28:36,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:36,408 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 267 [2024-12-02 08:28:36,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:36,410 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:36,410 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:36,411 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:36,411 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1051 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1051 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:36,411 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1051 Valid, 2221 Invalid, 278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:28:36,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:36,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:36,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4298850574712643) internal successors, (1244), 870 states have internal predecessors, (1244), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:36,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1250 transitions. [2024-12-02 08:28:36,432 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1250 transitions. Word has length 267 [2024-12-02 08:28:36,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:36,432 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1250 transitions. [2024-12-02 08:28:36,432 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:36,433 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1250 transitions. [2024-12-02 08:28:36,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2024-12-02 08:28:36,434 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:36,434 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:36,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 08:28:36,435 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:36,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:36,435 INFO L85 PathProgramCache]: Analyzing trace with hash 1503531257, now seen corresponding path program 1 times [2024-12-02 08:28:36,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:36,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194184452] [2024-12-02 08:28:36,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:36,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:36,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:36,969 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:36,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:36,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194184452] [2024-12-02 08:28:36,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [194184452] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:36,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:36,970 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:36,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004558304] [2024-12-02 08:28:36,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:36,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:36,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:36,970 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:36,970 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:36,971 INFO L87 Difference]: Start difference. First operand 875 states and 1250 transitions. Second operand has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:37,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:37,213 INFO L93 Difference]: Finished difference Result 1584 states and 2252 transitions. [2024-12-02 08:28:37,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:37,214 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 268 [2024-12-02 08:28:37,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:37,215 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:37,215 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:37,215 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:37,216 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2068 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2068 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:37,216 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2068 Valid, 2214 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 276 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:37,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:37,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:37,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.428735632183908) internal successors, (1243), 870 states have internal predecessors, (1243), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:37,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1249 transitions. [2024-12-02 08:28:37,228 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1249 transitions. Word has length 268 [2024-12-02 08:28:37,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:37,228 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1249 transitions. [2024-12-02 08:28:37,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:37,228 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1249 transitions. [2024-12-02 08:28:37,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2024-12-02 08:28:37,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:37,229 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:37,229 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 08:28:37,229 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:37,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:37,230 INFO L85 PathProgramCache]: Analyzing trace with hash 1638096539, now seen corresponding path program 1 times [2024-12-02 08:28:37,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:37,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268139391] [2024-12-02 08:28:37,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:37,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:37,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:37,880 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:37,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:37,880 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268139391] [2024-12-02 08:28:37,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [268139391] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:37,880 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:37,880 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:37,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1604709760] [2024-12-02 08:28:37,880 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:37,880 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:37,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:37,881 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:37,881 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:37,881 INFO L87 Difference]: Start difference. First operand 875 states and 1249 transitions. Second operand has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:38,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:38,159 INFO L93 Difference]: Finished difference Result 1584 states and 2250 transitions. [2024-12-02 08:28:38,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:38,160 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 269 [2024-12-02 08:28:38,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:38,161 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:38,161 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:38,162 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:38,162 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2062 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2062 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:38,162 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2062 Valid, 2214 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:38,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:38,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:38,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4275862068965517) internal successors, (1242), 870 states have internal predecessors, (1242), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:38,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1248 transitions. [2024-12-02 08:28:38,173 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1248 transitions. Word has length 269 [2024-12-02 08:28:38,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:38,173 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1248 transitions. [2024-12-02 08:28:38,174 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:38,174 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1248 transitions. [2024-12-02 08:28:38,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-12-02 08:28:38,175 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:38,175 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:38,175 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 08:28:38,175 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:38,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:38,175 INFO L85 PathProgramCache]: Analyzing trace with hash 2128679994, now seen corresponding path program 1 times [2024-12-02 08:28:38,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:38,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509564486] [2024-12-02 08:28:38,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:38,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:38,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:38,739 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:38,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:38,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509564486] [2024-12-02 08:28:38,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509564486] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:38,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:38,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:38,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327981577] [2024-12-02 08:28:38,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:38,740 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:38,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:38,740 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:38,740 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:38,740 INFO L87 Difference]: Start difference. First operand 875 states and 1248 transitions. Second operand has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:38,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:38,988 INFO L93 Difference]: Finished difference Result 1584 states and 2248 transitions. [2024-12-02 08:28:38,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:38,988 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 270 [2024-12-02 08:28:38,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:38,989 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:38,989 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:38,990 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:38,990 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1048 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 272 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1048 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:38,990 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1048 Valid, 2221 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 272 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:38,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:39,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:39,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4264367816091954) internal successors, (1241), 870 states have internal predecessors, (1241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:39,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1247 transitions. [2024-12-02 08:28:39,008 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1247 transitions. Word has length 270 [2024-12-02 08:28:39,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:39,009 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1247 transitions. [2024-12-02 08:28:39,009 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:39,009 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1247 transitions. [2024-12-02 08:28:39,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2024-12-02 08:28:39,010 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:39,011 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:39,011 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 08:28:39,011 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:39,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:39,011 INFO L85 PathProgramCache]: Analyzing trace with hash 98962202, now seen corresponding path program 1 times [2024-12-02 08:28:39,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:39,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252737463] [2024-12-02 08:28:39,012 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:39,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:39,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:39,541 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:39,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:39,541 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252737463] [2024-12-02 08:28:39,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252737463] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:39,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:39,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:39,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507620449] [2024-12-02 08:28:39,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:39,542 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:39,542 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:39,542 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:39,542 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:39,542 INFO L87 Difference]: Start difference. First operand 875 states and 1247 transitions. Second operand has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:39,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:39,783 INFO L93 Difference]: Finished difference Result 1584 states and 2246 transitions. [2024-12-02 08:28:39,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:39,783 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 271 [2024-12-02 08:28:39,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:39,785 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:39,785 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:39,786 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:39,786 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1047 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:39,786 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 2221 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:39,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:39,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:39,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4252873563218391) internal successors, (1240), 870 states have internal predecessors, (1240), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:39,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1246 transitions. [2024-12-02 08:28:39,804 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1246 transitions. Word has length 271 [2024-12-02 08:28:39,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:39,804 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1246 transitions. [2024-12-02 08:28:39,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:39,804 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1246 transitions. [2024-12-02 08:28:39,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-12-02 08:28:39,806 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:39,806 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:39,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 08:28:39,806 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:39,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:39,807 INFO L85 PathProgramCache]: Analyzing trace with hash -1996696581, now seen corresponding path program 1 times [2024-12-02 08:28:39,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:39,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149302585] [2024-12-02 08:28:39,807 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:39,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:39,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:40,381 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:40,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:40,382 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149302585] [2024-12-02 08:28:40,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [149302585] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:40,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:40,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:40,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206956018] [2024-12-02 08:28:40,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:40,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:40,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:40,383 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:40,383 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:40,383 INFO L87 Difference]: Start difference. First operand 875 states and 1246 transitions. Second operand has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:40,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:40,646 INFO L93 Difference]: Finished difference Result 1584 states and 2244 transitions. [2024-12-02 08:28:40,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:40,647 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 272 [2024-12-02 08:28:40,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:40,648 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:40,649 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:40,649 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:40,650 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2044 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 268 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2044 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:40,650 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2044 Valid, 2214 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 268 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:40,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:40,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:40,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4241379310344828) internal successors, (1239), 870 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:40,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1245 transitions. [2024-12-02 08:28:40,670 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1245 transitions. Word has length 272 [2024-12-02 08:28:40,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:40,671 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1245 transitions. [2024-12-02 08:28:40,671 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:40,671 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1245 transitions. [2024-12-02 08:28:40,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-12-02 08:28:40,673 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:40,674 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:40,674 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 08:28:40,674 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:40,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:40,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1499317017, now seen corresponding path program 1 times [2024-12-02 08:28:40,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:40,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135593924] [2024-12-02 08:28:40,675 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:40,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:40,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:41,202 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:41,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:41,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135593924] [2024-12-02 08:28:41,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135593924] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:41,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:41,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:41,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206566633] [2024-12-02 08:28:41,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:41,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:41,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:41,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:41,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:41,203 INFO L87 Difference]: Start difference. First operand 875 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:41,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:41,437 INFO L93 Difference]: Finished difference Result 1584 states and 2242 transitions. [2024-12-02 08:28:41,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:41,437 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 273 [2024-12-02 08:28:41,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:41,438 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:41,438 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:41,439 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:41,439 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1045 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1045 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:41,439 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1045 Valid, 2221 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:41,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:41,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:41,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.4229885057471265) internal successors, (1238), 870 states have internal predecessors, (1238), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:41,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1244 transitions. [2024-12-02 08:28:41,450 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1244 transitions. Word has length 273 [2024-12-02 08:28:41,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:41,450 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1244 transitions. [2024-12-02 08:28:41,450 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:41,450 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1244 transitions. [2024-12-02 08:28:41,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2024-12-02 08:28:41,451 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:41,451 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:41,452 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 08:28:41,452 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:41,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:41,452 INFO L85 PathProgramCache]: Analyzing trace with hash -939933636, now seen corresponding path program 1 times [2024-12-02 08:28:41,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:41,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514206126] [2024-12-02 08:28:41,452 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:41,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:41,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:41,964 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:41,964 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:41,964 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514206126] [2024-12-02 08:28:41,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514206126] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:41,964 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:41,964 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:41,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135425553] [2024-12-02 08:28:41,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:41,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:41,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:41,965 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:41,965 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:41,965 INFO L87 Difference]: Start difference. First operand 875 states and 1244 transitions. Second operand has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:42,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:42,180 INFO L93 Difference]: Finished difference Result 1584 states and 2240 transitions. [2024-12-02 08:28:42,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:42,180 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 274 [2024-12-02 08:28:42,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:42,181 INFO L225 Difference]: With dead ends: 1584 [2024-12-02 08:28:42,181 INFO L226 Difference]: Without dead ends: 875 [2024-12-02 08:28:42,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:42,182 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2032 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2032 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:42,182 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2032 Valid, 2214 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:42,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2024-12-02 08:28:42,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 875. [2024-12-02 08:28:42,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 875 states, 870 states have (on average 1.42183908045977) internal successors, (1237), 870 states have internal predecessors, (1237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:42,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 1243 transitions. [2024-12-02 08:28:42,193 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 1243 transitions. Word has length 274 [2024-12-02 08:28:42,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:42,193 INFO L471 AbstractCegarLoop]: Abstraction has 875 states and 1243 transitions. [2024-12-02 08:28:42,193 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.4) internal successors, (262), 5 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:42,193 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 1243 transitions. [2024-12-02 08:28:42,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2024-12-02 08:28:42,195 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:42,195 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:42,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 08:28:42,195 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:42,195 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:42,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1340467560, now seen corresponding path program 1 times [2024-12-02 08:28:42,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:42,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428906803] [2024-12-02 08:28:42,196 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:42,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:42,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:42,930 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:42,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:42,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428906803] [2024-12-02 08:28:42,931 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1428906803] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:42,931 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:42,931 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:42,931 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454919130] [2024-12-02 08:28:42,931 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:42,931 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:42,931 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:42,932 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:42,932 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:42,932 INFO L87 Difference]: Start difference. First operand 875 states and 1243 transitions. Second operand has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:43,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:43,371 INFO L93 Difference]: Finished difference Result 1588 states and 2244 transitions. [2024-12-02 08:28:43,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:28:43,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 275 [2024-12-02 08:28:43,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:43,372 INFO L225 Difference]: With dead ends: 1588 [2024-12-02 08:28:43,372 INFO L226 Difference]: Without dead ends: 879 [2024-12-02 08:28:43,373 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:43,373 INFO L435 NwaCegarLoop]: 967 mSDtfsCounter, 1195 mSDsluCounter, 1913 mSDsCounter, 0 mSdLazyCounter, 823 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1195 SdHoareTripleChecker+Valid, 2880 SdHoareTripleChecker+Invalid, 824 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 823 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:43,373 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1195 Valid, 2880 Invalid, 824 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 823 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:28:43,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 879 states. [2024-12-02 08:28:43,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 879 to 877. [2024-12-02 08:28:43,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 877 states, 872 states have (on average 1.4208715596330275) internal successors, (1239), 872 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:43,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 877 states to 877 states and 1245 transitions. [2024-12-02 08:28:43,390 INFO L78 Accepts]: Start accepts. Automaton has 877 states and 1245 transitions. Word has length 275 [2024-12-02 08:28:43,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:43,390 INFO L471 AbstractCegarLoop]: Abstraction has 877 states and 1245 transitions. [2024-12-02 08:28:43,391 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:43,391 INFO L276 IsEmpty]: Start isEmpty. Operand 877 states and 1245 transitions. [2024-12-02 08:28:43,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2024-12-02 08:28:43,392 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:43,392 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:43,392 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 08:28:43,392 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:43,393 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:43,393 INFO L85 PathProgramCache]: Analyzing trace with hash 380712047, now seen corresponding path program 1 times [2024-12-02 08:28:43,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:43,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346024564] [2024-12-02 08:28:43,393 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:43,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:43,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:44,676 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:44,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:44,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346024564] [2024-12-02 08:28:44,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1346024564] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:44,676 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:44,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:44,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884049449] [2024-12-02 08:28:44,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:44,677 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:44,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:44,677 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:44,678 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:44,678 INFO L87 Difference]: Start difference. First operand 877 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 52.8) internal successors, (264), 5 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:44,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:44,733 INFO L93 Difference]: Finished difference Result 1730 states and 2397 transitions. [2024-12-02 08:28:44,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:28:44,734 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.8) internal successors, (264), 5 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 276 [2024-12-02 08:28:44,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:44,735 INFO L225 Difference]: With dead ends: 1730 [2024-12-02 08:28:44,735 INFO L226 Difference]: Without dead ends: 1019 [2024-12-02 08:28:44,736 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:44,736 INFO L435 NwaCegarLoop]: 1231 mSDtfsCounter, 23 mSDsluCounter, 3684 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 4915 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:44,736 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 4915 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:28:44,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2024-12-02 08:28:44,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 1017. [2024-12-02 08:28:44,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1017 states, 1012 states have (on average 1.3735177865612649) internal successors, (1390), 1012 states have internal predecessors, (1390), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:44,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1017 states to 1017 states and 1396 transitions. [2024-12-02 08:28:44,753 INFO L78 Accepts]: Start accepts. Automaton has 1017 states and 1396 transitions. Word has length 276 [2024-12-02 08:28:44,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:44,754 INFO L471 AbstractCegarLoop]: Abstraction has 1017 states and 1396 transitions. [2024-12-02 08:28:44,754 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.8) internal successors, (264), 5 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:44,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1396 transitions. [2024-12-02 08:28:44,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 278 [2024-12-02 08:28:44,755 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:44,755 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:44,755 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 08:28:44,756 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:44,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:44,756 INFO L85 PathProgramCache]: Analyzing trace with hash -173940389, now seen corresponding path program 1 times [2024-12-02 08:28:44,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:44,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915616295] [2024-12-02 08:28:44,756 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:44,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:44,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:45,377 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:45,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:45,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915616295] [2024-12-02 08:28:45,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915616295] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:45,377 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:45,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:28:45,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775649319] [2024-12-02 08:28:45,377 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:45,378 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:28:45,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:45,378 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:28:45,379 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:28:45,379 INFO L87 Difference]: Start difference. First operand 1017 states and 1396 transitions. Second operand has 7 states, 7 states have (on average 37.857142857142854) internal successors, (265), 7 states have internal predecessors, (265), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:46,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:46,008 INFO L93 Difference]: Finished difference Result 1872 states and 2550 transitions. [2024-12-02 08:28:46,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:28:46,008 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 37.857142857142854) internal successors, (265), 7 states have internal predecessors, (265), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 277 [2024-12-02 08:28:46,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:46,009 INFO L225 Difference]: With dead ends: 1872 [2024-12-02 08:28:46,009 INFO L226 Difference]: Without dead ends: 1021 [2024-12-02 08:28:46,009 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:28:46,010 INFO L435 NwaCegarLoop]: 954 mSDtfsCounter, 1218 mSDsluCounter, 2862 mSDsCounter, 0 mSdLazyCounter, 1138 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1219 SdHoareTripleChecker+Valid, 3816 SdHoareTripleChecker+Invalid, 1140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:46,010 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1219 Valid, 3816 Invalid, 1140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1138 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 08:28:46,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1021 states. [2024-12-02 08:28:46,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1021 to 1019. [2024-12-02 08:28:46,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1019 states, 1014 states have (on average 1.3717948717948718) internal successors, (1391), 1014 states have internal predecessors, (1391), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:28:46,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1019 states to 1019 states and 1397 transitions. [2024-12-02 08:28:46,022 INFO L78 Accepts]: Start accepts. Automaton has 1019 states and 1397 transitions. Word has length 277 [2024-12-02 08:28:46,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:46,022 INFO L471 AbstractCegarLoop]: Abstraction has 1019 states and 1397 transitions. [2024-12-02 08:28:46,022 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 37.857142857142854) internal successors, (265), 7 states have internal predecessors, (265), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 08:28:46,022 INFO L276 IsEmpty]: Start isEmpty. Operand 1019 states and 1397 transitions. [2024-12-02 08:28:46,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 279 [2024-12-02 08:28:46,024 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:46,024 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:46,024 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 08:28:46,025 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:46,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:46,025 INFO L85 PathProgramCache]: Analyzing trace with hash -879242569, now seen corresponding path program 1 times [2024-12-02 08:28:46,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:46,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793271350] [2024-12-02 08:28:46,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:46,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:46,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:47,231 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:28:47,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:47,232 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793271350] [2024-12-02 08:28:47,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [793271350] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:47,232 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:47,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 08:28:47,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [150706050] [2024-12-02 08:28:47,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:47,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:28:47,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:47,233 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:28:47,233 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:28:47,233 INFO L87 Difference]: Start difference. First operand 1019 states and 1397 transitions. Second operand has 7 states, 7 states have (on average 38.0) internal successors, (266), 7 states have internal predecessors, (266), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:47,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:47,405 INFO L93 Difference]: Finished difference Result 2234 states and 2966 transitions. [2024-12-02 08:28:47,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:28:47,406 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 38.0) internal successors, (266), 7 states have internal predecessors, (266), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 278 [2024-12-02 08:28:47,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:47,407 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:47,407 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:47,408 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:28:47,409 INFO L435 NwaCegarLoop]: 1224 mSDtfsCounter, 1679 mSDsluCounter, 4884 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1682 SdHoareTripleChecker+Valid, 6108 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:47,409 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1682 Valid, 6108 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:28:47,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:47,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:47,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3139111434814275) internal successors, (1804), 1373 states have internal predecessors, (1804), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:47,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1816 transitions. [2024-12-02 08:28:47,433 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1816 transitions. Word has length 278 [2024-12-02 08:28:47,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:47,434 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1816 transitions. [2024-12-02 08:28:47,434 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 38.0) internal successors, (266), 7 states have internal predecessors, (266), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:28:47,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1816 transitions. [2024-12-02 08:28:47,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 707 [2024-12-02 08:28:47,438 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:47,438 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:47,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 08:28:47,438 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:47,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:47,439 INFO L85 PathProgramCache]: Analyzing trace with hash -406545932, now seen corresponding path program 1 times [2024-12-02 08:28:47,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:47,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138751380] [2024-12-02 08:28:47,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:47,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:47,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:48,464 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:48,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:48,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138751380] [2024-12-02 08:28:48,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2138751380] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:48,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:48,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:48,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [113971010] [2024-12-02 08:28:48,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:48,465 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:48,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:48,466 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:48,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:48,466 INFO L87 Difference]: Start difference. First operand 1381 states and 1816 transitions. Second operand has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:48,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:48,724 INFO L93 Difference]: Finished difference Result 2234 states and 2965 transitions. [2024-12-02 08:28:48,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:48,725 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 706 [2024-12-02 08:28:48,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:48,727 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:48,727 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:48,728 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:48,728 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1139 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1142 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:48,729 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1142 Valid, 2219 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:48,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:48,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:48,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.313182811361981) internal successors, (1803), 1373 states have internal predecessors, (1803), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:48,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1815 transitions. [2024-12-02 08:28:48,760 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1815 transitions. Word has length 706 [2024-12-02 08:28:48,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:48,760 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1815 transitions. [2024-12-02 08:28:48,761 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:48,761 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1815 transitions. [2024-12-02 08:28:48,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-12-02 08:28:48,767 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:48,768 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:48,768 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 08:28:48,768 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:48,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:48,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1463353904, now seen corresponding path program 1 times [2024-12-02 08:28:48,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:48,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562028927] [2024-12-02 08:28:48,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:48,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:49,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:49,897 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:49,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:49,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562028927] [2024-12-02 08:28:49,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [562028927] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:49,897 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:49,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:49,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276899516] [2024-12-02 08:28:49,897 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:49,897 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:49,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:49,898 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:49,898 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:49,898 INFO L87 Difference]: Start difference. First operand 1381 states and 1815 transitions. Second operand has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:50,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:50,108 INFO L93 Difference]: Finished difference Result 2234 states and 2963 transitions. [2024-12-02 08:28:50,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:50,109 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 707 [2024-12-02 08:28:50,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:50,110 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:50,110 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:50,110 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:50,111 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 2075 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2078 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:50,111 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2078 Valid, 2212 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:50,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:50,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:50,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3124544792425346) internal successors, (1802), 1373 states have internal predecessors, (1802), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:50,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1814 transitions. [2024-12-02 08:28:50,128 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1814 transitions. Word has length 707 [2024-12-02 08:28:50,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:50,128 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1814 transitions. [2024-12-02 08:28:50,129 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:50,129 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1814 transitions. [2024-12-02 08:28:50,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-12-02 08:28:50,131 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:50,132 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:50,132 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-02 08:28:50,132 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:50,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:50,132 INFO L85 PathProgramCache]: Analyzing trace with hash -1158888353, now seen corresponding path program 1 times [2024-12-02 08:28:50,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:50,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590517722] [2024-12-02 08:28:50,133 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:50,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:50,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:51,073 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:51,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:51,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590517722] [2024-12-02 08:28:51,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [590517722] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:51,074 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:51,074 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:51,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710121120] [2024-12-02 08:28:51,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:51,075 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:51,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:51,076 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:51,076 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:51,076 INFO L87 Difference]: Start difference. First operand 1381 states and 1814 transitions. Second operand has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:51,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:51,296 INFO L93 Difference]: Finished difference Result 2234 states and 2961 transitions. [2024-12-02 08:28:51,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:51,297 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 708 [2024-12-02 08:28:51,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:51,298 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:51,298 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:51,298 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:51,299 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1123 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 258 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 258 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:51,299 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2219 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 258 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:51,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:51,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:51,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.311726147123088) internal successors, (1801), 1373 states have internal predecessors, (1801), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:51,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1813 transitions. [2024-12-02 08:28:51,328 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1813 transitions. Word has length 708 [2024-12-02 08:28:51,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:51,329 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1813 transitions. [2024-12-02 08:28:51,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:51,329 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1813 transitions. [2024-12-02 08:28:51,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 710 [2024-12-02 08:28:51,334 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:51,335 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:51,335 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 08:28:51,335 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:51,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:51,335 INFO L85 PathProgramCache]: Analyzing trace with hash -1630024997, now seen corresponding path program 1 times [2024-12-02 08:28:51,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:51,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984078461] [2024-12-02 08:28:51,336 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:51,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:51,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:52,261 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:52,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:52,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984078461] [2024-12-02 08:28:52,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984078461] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:52,261 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:52,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:52,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [327936690] [2024-12-02 08:28:52,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:52,262 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:52,262 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:52,263 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:52,263 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:52,263 INFO L87 Difference]: Start difference. First operand 1381 states and 1813 transitions. Second operand has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:52,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:52,470 INFO L93 Difference]: Finished difference Result 2234 states and 2959 transitions. [2024-12-02 08:28:52,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:52,471 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 709 [2024-12-02 08:28:52,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:52,472 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:52,472 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:52,472 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:52,473 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 2043 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2046 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:52,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2046 Valid, 2212 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:52,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:52,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:52,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3109978150036417) internal successors, (1800), 1373 states have internal predecessors, (1800), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:52,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1812 transitions. [2024-12-02 08:28:52,490 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1812 transitions. Word has length 709 [2024-12-02 08:28:52,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:52,490 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1812 transitions. [2024-12-02 08:28:52,490 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:52,490 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1812 transitions. [2024-12-02 08:28:52,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 711 [2024-12-02 08:28:52,493 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:52,494 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:52,494 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 08:28:52,494 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:52,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:52,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1566575434, now seen corresponding path program 1 times [2024-12-02 08:28:52,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:52,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942628442] [2024-12-02 08:28:52,494 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:52,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:53,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:53,605 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:53,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:53,605 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942628442] [2024-12-02 08:28:53,605 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942628442] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:53,605 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:53,605 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:53,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971836459] [2024-12-02 08:28:53,605 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:53,606 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:53,606 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:53,606 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:53,606 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:53,606 INFO L87 Difference]: Start difference. First operand 1381 states and 1812 transitions. Second operand has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:53,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:53,810 INFO L93 Difference]: Finished difference Result 2234 states and 2957 transitions. [2024-12-02 08:28:53,810 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:53,810 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 710 [2024-12-02 08:28:53,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:53,811 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:53,812 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:53,812 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:53,812 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1107 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:53,813 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1110 Valid, 2219 Invalid, 255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:53,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:53,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:53,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3102694828841952) internal successors, (1799), 1373 states have internal predecessors, (1799), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:53,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1811 transitions. [2024-12-02 08:28:53,855 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1811 transitions. Word has length 710 [2024-12-02 08:28:53,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:53,855 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1811 transitions. [2024-12-02 08:28:53,855 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:53,855 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1811 transitions. [2024-12-02 08:28:53,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 712 [2024-12-02 08:28:53,858 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:53,858 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:53,858 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 08:28:53,859 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:53,859 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:53,859 INFO L85 PathProgramCache]: Analyzing trace with hash 340720742, now seen corresponding path program 1 times [2024-12-02 08:28:53,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:53,859 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035993310] [2024-12-02 08:28:53,859 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:53,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:54,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:54,812 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:54,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:54,812 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035993310] [2024-12-02 08:28:54,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035993310] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:54,812 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:54,812 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:54,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855580122] [2024-12-02 08:28:54,812 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:54,813 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:54,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:54,814 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:54,814 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:54,814 INFO L87 Difference]: Start difference. First operand 1381 states and 1811 transitions. Second operand has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:55,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:55,026 INFO L93 Difference]: Finished difference Result 2234 states and 2955 transitions. [2024-12-02 08:28:55,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:55,026 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 711 [2024-12-02 08:28:55,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:55,028 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:55,028 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:55,028 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:55,029 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1099 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1102 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:55,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1102 Valid, 2219 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:55,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:55,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:55,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3095411507647488) internal successors, (1798), 1373 states have internal predecessors, (1798), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:55,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1810 transitions. [2024-12-02 08:28:55,061 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1810 transitions. Word has length 711 [2024-12-02 08:28:55,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:55,061 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1810 transitions. [2024-12-02 08:28:55,061 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:55,062 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1810 transitions. [2024-12-02 08:28:55,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 713 [2024-12-02 08:28:55,067 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:55,068 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:55,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 08:28:55,068 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:55,068 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:55,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1676661067, now seen corresponding path program 1 times [2024-12-02 08:28:55,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:55,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348310068] [2024-12-02 08:28:55,069 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:55,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:55,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:56,176 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:56,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:56,176 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348310068] [2024-12-02 08:28:56,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [348310068] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:56,176 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:56,176 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:56,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1600889575] [2024-12-02 08:28:56,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:56,177 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:56,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:56,177 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:56,177 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:56,177 INFO L87 Difference]: Start difference. First operand 1381 states and 1810 transitions. Second operand has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:56,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:56,362 INFO L93 Difference]: Finished difference Result 2234 states and 2953 transitions. [2024-12-02 08:28:56,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:56,363 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 712 [2024-12-02 08:28:56,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:56,364 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:56,364 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:56,365 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:56,365 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1995 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1998 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:56,365 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1998 Valid, 2212 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:56,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:56,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:56,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3088128186453023) internal successors, (1797), 1373 states have internal predecessors, (1797), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:56,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1809 transitions. [2024-12-02 08:28:56,392 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1809 transitions. Word has length 712 [2024-12-02 08:28:56,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:56,392 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1809 transitions. [2024-12-02 08:28:56,392 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:56,392 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1809 transitions. [2024-12-02 08:28:56,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 714 [2024-12-02 08:28:56,398 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:56,398 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:56,398 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 08:28:56,399 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:56,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:56,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1930711665, now seen corresponding path program 1 times [2024-12-02 08:28:56,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:56,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379023778] [2024-12-02 08:28:56,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:56,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:56,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:57,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:57,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379023778] [2024-12-02 08:28:57,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379023778] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:57,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:57,437 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:57,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655127965] [2024-12-02 08:28:57,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:57,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:57,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:57,438 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:57,438 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:57,438 INFO L87 Difference]: Start difference. First operand 1381 states and 1809 transitions. Second operand has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:57,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:57,645 INFO L93 Difference]: Finished difference Result 2234 states and 2951 transitions. [2024-12-02 08:28:57,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:57,646 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 713 [2024-12-02 08:28:57,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:57,647 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:57,647 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:57,648 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:57,648 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1979 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 248 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1982 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 248 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:57,648 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1982 Valid, 2212 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 248 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:57,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:57,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:57,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3080844865258558) internal successors, (1796), 1373 states have internal predecessors, (1796), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:57,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1808 transitions. [2024-12-02 08:28:57,668 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1808 transitions. Word has length 713 [2024-12-02 08:28:57,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:57,668 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1808 transitions. [2024-12-02 08:28:57,668 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:57,668 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1808 transitions. [2024-12-02 08:28:57,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-12-02 08:28:57,672 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:57,672 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:57,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 08:28:57,672 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:57,672 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:57,673 INFO L85 PathProgramCache]: Analyzing trace with hash 1506733728, now seen corresponding path program 1 times [2024-12-02 08:28:57,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:57,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670937788] [2024-12-02 08:28:57,673 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:57,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:58,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:28:58,809 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:28:58,809 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:28:58,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670937788] [2024-12-02 08:28:58,809 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1670937788] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:28:58,809 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:28:58,810 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:28:58,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441868816] [2024-12-02 08:28:58,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:28:58,811 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:28:58,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:28:58,812 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:28:58,812 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:28:58,812 INFO L87 Difference]: Start difference. First operand 1381 states and 1808 transitions. Second operand has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:59,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:28:59,020 INFO L93 Difference]: Finished difference Result 2234 states and 2949 transitions. [2024-12-02 08:28:59,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:28:59,021 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 714 [2024-12-02 08:28:59,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:28:59,023 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:28:59,023 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:28:59,023 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:28:59,024 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1075 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1078 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:28:59,024 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1078 Valid, 2219 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:28:59,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:28:59,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:28:59,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3073561544064094) internal successors, (1795), 1373 states have internal predecessors, (1795), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:28:59,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1807 transitions. [2024-12-02 08:28:59,057 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1807 transitions. Word has length 714 [2024-12-02 08:28:59,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:28:59,057 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1807 transitions. [2024-12-02 08:28:59,058 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:28:59,058 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1807 transitions. [2024-12-02 08:28:59,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-12-02 08:28:59,065 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:28:59,065 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:28:59,065 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 08:28:59,066 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:28:59,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:28:59,066 INFO L85 PathProgramCache]: Analyzing trace with hash -1854960388, now seen corresponding path program 1 times [2024-12-02 08:28:59,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:28:59,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748682725] [2024-12-02 08:28:59,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:28:59,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:28:59,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:00,178 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:00,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:00,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748682725] [2024-12-02 08:29:00,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748682725] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:00,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:00,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:00,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [752265799] [2024-12-02 08:29:00,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:00,179 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:00,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:00,179 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:00,179 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:00,180 INFO L87 Difference]: Start difference. First operand 1381 states and 1807 transitions. Second operand has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:00,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:00,371 INFO L93 Difference]: Finished difference Result 2234 states and 2947 transitions. [2024-12-02 08:29:00,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:00,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 715 [2024-12-02 08:29:00,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:00,373 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:00,373 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:00,373 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:00,374 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1947 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1950 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 245 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:00,374 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1950 Valid, 2212 Invalid, 245 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:00,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:00,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:00,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.306627822286963) internal successors, (1794), 1373 states have internal predecessors, (1794), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:00,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1806 transitions. [2024-12-02 08:29:00,403 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1806 transitions. Word has length 715 [2024-12-02 08:29:00,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:00,403 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1806 transitions. [2024-12-02 08:29:00,403 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:00,403 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1806 transitions. [2024-12-02 08:29:00,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 717 [2024-12-02 08:29:00,409 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:00,409 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:00,409 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 08:29:00,410 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:00,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:00,410 INFO L85 PathProgramCache]: Analyzing trace with hash 256772875, now seen corresponding path program 1 times [2024-12-02 08:29:00,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:00,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149875101] [2024-12-02 08:29:00,410 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:00,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:00,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:01,428 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:01,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:01,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149875101] [2024-12-02 08:29:01,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [149875101] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:01,429 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:01,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:01,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644768976] [2024-12-02 08:29:01,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:01,430 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:01,430 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:01,430 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:01,430 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:01,430 INFO L87 Difference]: Start difference. First operand 1381 states and 1806 transitions. Second operand has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:01,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:01,645 INFO L93 Difference]: Finished difference Result 2234 states and 2945 transitions. [2024-12-02 08:29:01,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:01,646 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 716 [2024-12-02 08:29:01,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:01,647 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:01,647 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:01,648 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:01,648 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1059 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1062 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:01,648 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1062 Valid, 2219 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:01,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:01,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:01,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3058994901675165) internal successors, (1793), 1373 states have internal predecessors, (1793), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:01,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1805 transitions. [2024-12-02 08:29:01,689 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1805 transitions. Word has length 716 [2024-12-02 08:29:01,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:01,689 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1805 transitions. [2024-12-02 08:29:01,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:01,689 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1805 transitions. [2024-12-02 08:29:01,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 718 [2024-12-02 08:29:01,693 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:01,693 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:01,693 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-02 08:29:01,693 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:01,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:01,694 INFO L85 PathProgramCache]: Analyzing trace with hash -1844941817, now seen corresponding path program 1 times [2024-12-02 08:29:01,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:01,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204635408] [2024-12-02 08:29:01,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:01,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:02,707 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:02,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:02,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204635408] [2024-12-02 08:29:02,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204635408] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:02,707 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:02,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:02,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15803645] [2024-12-02 08:29:02,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:02,708 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:02,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:02,709 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:02,709 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:02,709 INFO L87 Difference]: Start difference. First operand 1381 states and 1805 transitions. Second operand has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:02,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:02,901 INFO L93 Difference]: Finished difference Result 2234 states and 2943 transitions. [2024-12-02 08:29:02,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:02,902 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 717 [2024-12-02 08:29:02,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:02,903 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:02,903 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:02,904 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:02,904 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1915 mSDsluCounter, 1107 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1918 SdHoareTripleChecker+Valid, 2212 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:02,904 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1918 Valid, 2212 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:02,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:02,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:02,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3051711580480698) internal successors, (1792), 1373 states have internal predecessors, (1792), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:02,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1804 transitions. [2024-12-02 08:29:02,922 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1804 transitions. Word has length 717 [2024-12-02 08:29:02,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:02,922 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1804 transitions. [2024-12-02 08:29:02,923 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:02,923 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1804 transitions. [2024-12-02 08:29:02,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 719 [2024-12-02 08:29:02,926 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:02,926 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:02,926 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 08:29:02,926 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:02,927 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:02,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1260340214, now seen corresponding path program 1 times [2024-12-02 08:29:02,927 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:02,927 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139487021] [2024-12-02 08:29:02,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:02,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:03,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:03,958 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:03,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:03,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139487021] [2024-12-02 08:29:03,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1139487021] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:03,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:03,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:03,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182891061] [2024-12-02 08:29:03,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:03,959 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:03,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:03,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:03,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:03,959 INFO L87 Difference]: Start difference. First operand 1381 states and 1804 transitions. Second operand has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:04,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:04,154 INFO L93 Difference]: Finished difference Result 2234 states and 2941 transitions. [2024-12-02 08:29:04,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:04,155 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 718 [2024-12-02 08:29:04,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:04,156 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:04,156 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:04,157 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:04,157 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1043 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1046 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:04,157 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1046 Valid, 2219 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:04,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:04,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:04,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3044428259286234) internal successors, (1791), 1373 states have internal predecessors, (1791), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:04,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1803 transitions. [2024-12-02 08:29:04,174 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1803 transitions. Word has length 718 [2024-12-02 08:29:04,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:04,175 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1803 transitions. [2024-12-02 08:29:04,175 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:04,175 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1803 transitions. [2024-12-02 08:29:04,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 720 [2024-12-02 08:29:04,178 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:04,178 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:04,178 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-02 08:29:04,178 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:04,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:04,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1008291950, now seen corresponding path program 1 times [2024-12-02 08:29:04,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:04,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121473692] [2024-12-02 08:29:04,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:04,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:04,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:05,224 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:05,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:05,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121473692] [2024-12-02 08:29:05,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121473692] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:05,224 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:05,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:05,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234445336] [2024-12-02 08:29:05,225 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:05,225 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:05,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:05,226 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:05,226 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:05,227 INFO L87 Difference]: Start difference. First operand 1381 states and 1803 transitions. Second operand has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:05,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:05,418 INFO L93 Difference]: Finished difference Result 2234 states and 2939 transitions. [2024-12-02 08:29:05,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:05,419 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 719 [2024-12-02 08:29:05,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:05,420 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:05,420 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:05,421 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:05,421 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1035 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 236 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1038 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 236 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:05,421 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1038 Valid, 2219 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 236 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:05,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:05,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:05,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.303714493809177) internal successors, (1790), 1373 states have internal predecessors, (1790), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:05,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1802 transitions. [2024-12-02 08:29:05,439 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1802 transitions. Word has length 719 [2024-12-02 08:29:05,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:05,440 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1802 transitions. [2024-12-02 08:29:05,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:05,440 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1802 transitions. [2024-12-02 08:29:05,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 721 [2024-12-02 08:29:05,443 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:05,443 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:05,443 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-02 08:29:05,444 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:05,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:05,444 INFO L85 PathProgramCache]: Analyzing trace with hash 833902945, now seen corresponding path program 1 times [2024-12-02 08:29:05,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:05,444 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163272756] [2024-12-02 08:29:05,444 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:05,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:06,728 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:06,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:06,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163272756] [2024-12-02 08:29:06,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [163272756] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:06,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:06,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:06,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813434132] [2024-12-02 08:29:06,728 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:06,729 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:06,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:06,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:06,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:06,729 INFO L87 Difference]: Start difference. First operand 1381 states and 1802 transitions. Second operand has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:06,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:06,883 INFO L93 Difference]: Finished difference Result 2234 states and 2937 transitions. [2024-12-02 08:29:06,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:06,884 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 720 [2024-12-02 08:29:06,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:06,885 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:06,885 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:06,885 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:06,886 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1027 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 234 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1030 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 234 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:06,886 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1030 Valid, 2219 Invalid, 235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 234 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:06,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:06,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:06,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3029861616897305) internal successors, (1789), 1373 states have internal predecessors, (1789), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:06,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1801 transitions. [2024-12-02 08:29:06,902 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1801 transitions. Word has length 720 [2024-12-02 08:29:06,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:06,902 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1801 transitions. [2024-12-02 08:29:06,902 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:06,902 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1801 transitions. [2024-12-02 08:29:06,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 722 [2024-12-02 08:29:06,905 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:06,906 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:06,906 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 08:29:06,906 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:06,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:06,906 INFO L85 PathProgramCache]: Analyzing trace with hash -2106452067, now seen corresponding path program 1 times [2024-12-02 08:29:06,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:06,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623003532] [2024-12-02 08:29:06,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:06,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:07,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:07,922 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:07,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:07,923 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [623003532] [2024-12-02 08:29:07,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [623003532] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:07,923 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:07,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:07,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1567617805] [2024-12-02 08:29:07,923 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:07,923 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:07,924 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:07,924 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:07,924 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:07,924 INFO L87 Difference]: Start difference. First operand 1381 states and 1801 transitions. Second operand has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:08,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:08,109 INFO L93 Difference]: Finished difference Result 2234 states and 2935 transitions. [2024-12-02 08:29:08,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:08,110 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 721 [2024-12-02 08:29:08,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:08,111 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:08,111 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:08,112 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:08,113 INFO L435 NwaCegarLoop]: 1105 mSDtfsCounter, 1019 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1022 SdHoareTripleChecker+Valid, 2219 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:08,113 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1022 Valid, 2219 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:08,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:08,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:08,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.302257829570284) internal successors, (1788), 1373 states have internal predecessors, (1788), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:08,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1800 transitions. [2024-12-02 08:29:08,131 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1800 transitions. Word has length 721 [2024-12-02 08:29:08,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:08,132 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1800 transitions. [2024-12-02 08:29:08,132 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:08,132 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1800 transitions. [2024-12-02 08:29:08,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 723 [2024-12-02 08:29:08,135 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:08,135 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:08,135 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 08:29:08,135 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:08,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:08,136 INFO L85 PathProgramCache]: Analyzing trace with hash -44102836, now seen corresponding path program 1 times [2024-12-02 08:29:08,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:08,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245585373] [2024-12-02 08:29:08,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:08,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:08,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:09,203 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:09,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:09,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245585373] [2024-12-02 08:29:09,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245585373] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:09,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:09,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:09,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642498799] [2024-12-02 08:29:09,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:09,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:09,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:09,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:09,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:09,205 INFO L87 Difference]: Start difference. First operand 1381 states and 1800 transitions. Second operand has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:09,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:09,337 INFO L93 Difference]: Finished difference Result 2234 states and 2933 transitions. [2024-12-02 08:29:09,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:09,337 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 722 [2024-12-02 08:29:09,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:09,339 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:09,339 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:09,339 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:09,339 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 980 mSDsluCounter, 1162 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 983 SdHoareTripleChecker+Valid, 2315 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:09,340 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [983 Valid, 2315 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:09,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:09,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:09,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3015294974508376) internal successors, (1787), 1373 states have internal predecessors, (1787), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:09,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1799 transitions. [2024-12-02 08:29:09,356 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1799 transitions. Word has length 722 [2024-12-02 08:29:09,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:09,356 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1799 transitions. [2024-12-02 08:29:09,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:09,356 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1799 transitions. [2024-12-02 08:29:09,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-12-02 08:29:09,359 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:09,359 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:09,360 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-02 08:29:09,360 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:09,360 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:09,360 INFO L85 PathProgramCache]: Analyzing trace with hash 359818280, now seen corresponding path program 1 times [2024-12-02 08:29:09,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:09,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252730052] [2024-12-02 08:29:09,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:09,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:09,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:10,369 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:10,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:10,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252730052] [2024-12-02 08:29:10,370 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252730052] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:10,370 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:10,370 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:10,370 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870972535] [2024-12-02 08:29:10,370 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:10,370 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:10,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:10,371 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:10,371 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:10,371 INFO L87 Difference]: Start difference. First operand 1381 states and 1799 transitions. Second operand has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:10,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:10,478 INFO L93 Difference]: Finished difference Result 2234 states and 2931 transitions. [2024-12-02 08:29:10,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:10,479 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 723 [2024-12-02 08:29:10,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:10,480 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:10,480 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:10,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:10,481 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1788 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1791 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:10,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1791 Valid, 2308 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:10,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:10,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:10,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3008011653313911) internal successors, (1786), 1373 states have internal predecessors, (1786), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:10,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1798 transitions. [2024-12-02 08:29:10,497 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1798 transitions. Word has length 723 [2024-12-02 08:29:10,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:10,498 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1798 transitions. [2024-12-02 08:29:10,498 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:10,498 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1798 transitions. [2024-12-02 08:29:10,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 725 [2024-12-02 08:29:10,501 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:10,501 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:10,501 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-12-02 08:29:10,501 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:10,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:10,502 INFO L85 PathProgramCache]: Analyzing trace with hash 2119244215, now seen corresponding path program 1 times [2024-12-02 08:29:10,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:10,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062423779] [2024-12-02 08:29:10,502 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:10,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:10,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:11,667 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:11,667 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:11,667 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062423779] [2024-12-02 08:29:11,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2062423779] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:11,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:11,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:11,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [93204142] [2024-12-02 08:29:11,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:11,669 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:11,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:11,670 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:11,670 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:11,670 INFO L87 Difference]: Start difference. First operand 1381 states and 1798 transitions. Second operand has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:11,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:11,806 INFO L93 Difference]: Finished difference Result 2234 states and 2929 transitions. [2024-12-02 08:29:11,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:11,807 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 724 [2024-12-02 08:29:11,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:11,809 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:11,809 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:11,809 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:11,810 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 964 mSDsluCounter, 1162 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 967 SdHoareTripleChecker+Valid, 2315 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:11,810 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [967 Valid, 2315 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:11,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:11,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:11,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.3000728332119447) internal successors, (1785), 1373 states have internal predecessors, (1785), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:11,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1797 transitions. [2024-12-02 08:29:11,830 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1797 transitions. Word has length 724 [2024-12-02 08:29:11,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:11,830 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1797 transitions. [2024-12-02 08:29:11,830 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:11,830 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1797 transitions. [2024-12-02 08:29:11,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-12-02 08:29:11,834 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:11,834 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:11,834 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-02 08:29:11,834 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:11,834 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:11,835 INFO L85 PathProgramCache]: Analyzing trace with hash -1861266125, now seen corresponding path program 1 times [2024-12-02 08:29:11,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:11,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641699735] [2024-12-02 08:29:11,835 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:11,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:12,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:13,210 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:13,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:13,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641699735] [2024-12-02 08:29:13,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641699735] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:13,210 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:13,210 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:13,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738357526] [2024-12-02 08:29:13,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:13,211 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:13,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:13,212 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:13,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:13,212 INFO L87 Difference]: Start difference. First operand 1381 states and 1797 transitions. Second operand has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:13,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:13,357 INFO L93 Difference]: Finished difference Result 2234 states and 2927 transitions. [2024-12-02 08:29:13,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:13,357 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 725 [2024-12-02 08:29:13,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:13,359 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:13,359 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:13,359 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:13,360 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1756 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1759 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:13,360 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1759 Valid, 2308 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:13,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:13,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:13,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2993445010924982) internal successors, (1784), 1373 states have internal predecessors, (1784), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:13,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1796 transitions. [2024-12-02 08:29:13,380 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1796 transitions. Word has length 725 [2024-12-02 08:29:13,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:13,380 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1796 transitions. [2024-12-02 08:29:13,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:13,380 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1796 transitions. [2024-12-02 08:29:13,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 727 [2024-12-02 08:29:13,384 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:13,384 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:13,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 08:29:13,384 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:13,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:13,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1701034846, now seen corresponding path program 1 times [2024-12-02 08:29:13,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:13,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570163222] [2024-12-02 08:29:13,385 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:13,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:13,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:14,732 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:14,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:14,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570163222] [2024-12-02 08:29:14,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1570163222] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:14,733 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:14,733 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:14,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [983214627] [2024-12-02 08:29:14,733 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:14,734 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:14,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:14,735 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:14,735 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:14,735 INFO L87 Difference]: Start difference. First operand 1381 states and 1796 transitions. Second operand has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:14,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:14,886 INFO L93 Difference]: Finished difference Result 2234 states and 2925 transitions. [2024-12-02 08:29:14,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:14,887 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 726 [2024-12-02 08:29:14,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:14,889 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:14,889 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:14,890 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:14,890 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1740 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1743 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:14,890 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1743 Valid, 2308 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:14,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:14,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:14,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2986161689730518) internal successors, (1783), 1373 states have internal predecessors, (1783), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:14,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1795 transitions. [2024-12-02 08:29:14,927 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1795 transitions. Word has length 726 [2024-12-02 08:29:14,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:14,927 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1795 transitions. [2024-12-02 08:29:14,927 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:14,927 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1795 transitions. [2024-12-02 08:29:14,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 728 [2024-12-02 08:29:14,936 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:14,936 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:14,936 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 08:29:14,937 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:14,937 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:14,937 INFO L85 PathProgramCache]: Analyzing trace with hash -1244616002, now seen corresponding path program 1 times [2024-12-02 08:29:14,937 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:14,937 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204999014] [2024-12-02 08:29:14,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:14,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:15,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:16,499 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:16,499 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:16,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204999014] [2024-12-02 08:29:16,499 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204999014] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:16,499 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:16,499 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:16,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667192793] [2024-12-02 08:29:16,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:16,500 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:16,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:16,501 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:16,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:16,501 INFO L87 Difference]: Start difference. First operand 1381 states and 1795 transitions. Second operand has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:16,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:16,630 INFO L93 Difference]: Finished difference Result 2234 states and 2923 transitions. [2024-12-02 08:29:16,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:16,631 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 727 [2024-12-02 08:29:16,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:16,633 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:16,633 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:16,633 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:16,634 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1724 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1727 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:16,634 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1727 Valid, 2308 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:16,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:16,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:16,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2978878368536053) internal successors, (1782), 1373 states have internal predecessors, (1782), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:16,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1794 transitions. [2024-12-02 08:29:16,654 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1794 transitions. Word has length 727 [2024-12-02 08:29:16,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:16,654 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1794 transitions. [2024-12-02 08:29:16,654 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:16,654 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1794 transitions. [2024-12-02 08:29:16,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 729 [2024-12-02 08:29:16,659 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:16,660 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:16,660 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-02 08:29:16,660 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:16,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:16,661 INFO L85 PathProgramCache]: Analyzing trace with hash -835564531, now seen corresponding path program 1 times [2024-12-02 08:29:16,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:16,661 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391680037] [2024-12-02 08:29:16,661 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:16,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:17,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:17,961 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:17,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:17,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391680037] [2024-12-02 08:29:17,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [391680037] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:17,962 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:17,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:17,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266565608] [2024-12-02 08:29:17,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:17,962 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:17,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:17,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:17,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:17,963 INFO L87 Difference]: Start difference. First operand 1381 states and 1794 transitions. Second operand has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:18,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:18,087 INFO L93 Difference]: Finished difference Result 2234 states and 2921 transitions. [2024-12-02 08:29:18,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:18,088 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 728 [2024-12-02 08:29:18,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:18,090 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:18,090 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:18,090 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:18,090 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1708 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1711 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:18,091 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1711 Valid, 2308 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:18,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:18,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:18,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2971595047341589) internal successors, (1781), 1373 states have internal predecessors, (1781), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:18,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1793 transitions. [2024-12-02 08:29:18,109 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1793 transitions. Word has length 728 [2024-12-02 08:29:18,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:18,110 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1793 transitions. [2024-12-02 08:29:18,110 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:18,110 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1793 transitions. [2024-12-02 08:29:18,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2024-12-02 08:29:18,114 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:18,114 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:18,114 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 08:29:18,114 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:18,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:18,115 INFO L85 PathProgramCache]: Analyzing trace with hash -794942263, now seen corresponding path program 1 times [2024-12-02 08:29:18,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:18,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591962276] [2024-12-02 08:29:18,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:18,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:18,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:19,270 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:19,270 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:19,270 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591962276] [2024-12-02 08:29:19,270 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [591962276] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:19,271 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:19,271 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:19,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896629688] [2024-12-02 08:29:19,271 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:19,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:19,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:19,272 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:19,272 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:19,272 INFO L87 Difference]: Start difference. First operand 1381 states and 1793 transitions. Second operand has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:19,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:19,400 INFO L93 Difference]: Finished difference Result 2234 states and 2919 transitions. [2024-12-02 08:29:19,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:19,401 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 729 [2024-12-02 08:29:19,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:19,402 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:19,402 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:19,403 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:19,403 INFO L435 NwaCegarLoop]: 1153 mSDtfsCounter, 1692 mSDsluCounter, 1155 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1695 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:19,403 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1695 Valid, 2308 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:19,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:19,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:19,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2964311726147124) internal successors, (1780), 1373 states have internal predecessors, (1780), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:19,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1792 transitions. [2024-12-02 08:29:19,458 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1792 transitions. Word has length 729 [2024-12-02 08:29:19,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:19,458 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1792 transitions. [2024-12-02 08:29:19,458 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:19,458 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1792 transitions. [2024-12-02 08:29:19,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 731 [2024-12-02 08:29:19,462 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:19,463 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:19,463 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-02 08:29:19,463 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:19,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:19,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1427836936, now seen corresponding path program 1 times [2024-12-02 08:29:19,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:19,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211246148] [2024-12-02 08:29:19,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:19,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:19,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:20,598 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:20,599 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:20,599 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [211246148] [2024-12-02 08:29:20,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [211246148] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:20,599 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:20,599 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:20,599 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495867653] [2024-12-02 08:29:20,599 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:20,599 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:20,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:20,600 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:20,600 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:20,600 INFO L87 Difference]: Start difference. First operand 1381 states and 1792 transitions. Second operand has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:20,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:20,702 INFO L93 Difference]: Finished difference Result 2234 states and 2917 transitions. [2024-12-02 08:29:20,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:20,703 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 730 [2024-12-02 08:29:20,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:20,704 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:20,704 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:20,705 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:20,705 INFO L435 NwaCegarLoop]: 1177 mSDtfsCounter, 901 mSDsluCounter, 1186 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 904 SdHoareTripleChecker+Valid, 2363 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:20,705 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [904 Valid, 2363 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:20,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:20,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:20,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2957028404952657) internal successors, (1779), 1373 states have internal predecessors, (1779), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:20,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1791 transitions. [2024-12-02 08:29:20,724 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1791 transitions. Word has length 730 [2024-12-02 08:29:20,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:20,724 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1791 transitions. [2024-12-02 08:29:20,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:20,724 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1791 transitions. [2024-12-02 08:29:20,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2024-12-02 08:29:20,728 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:20,728 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:20,728 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90 [2024-12-02 08:29:20,728 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:20,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:20,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1698725036, now seen corresponding path program 1 times [2024-12-02 08:29:20,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:20,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984843606] [2024-12-02 08:29:20,729 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:20,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:21,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:21,853 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:21,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:21,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984843606] [2024-12-02 08:29:21,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984843606] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:21,854 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:21,854 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:21,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593749767] [2024-12-02 08:29:21,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:21,855 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:21,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:21,856 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:21,856 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:21,856 INFO L87 Difference]: Start difference. First operand 1381 states and 1791 transitions. Second operand has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:21,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:21,941 INFO L93 Difference]: Finished difference Result 2234 states and 2915 transitions. [2024-12-02 08:29:21,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:21,942 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 731 [2024-12-02 08:29:21,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:21,944 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:21,944 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:21,944 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:21,945 INFO L435 NwaCegarLoop]: 1177 mSDtfsCounter, 893 mSDsluCounter, 1186 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 896 SdHoareTripleChecker+Valid, 2363 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:21,945 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [896 Valid, 2363 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:21,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:21,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:21,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2949745083758193) internal successors, (1778), 1373 states have internal predecessors, (1778), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:21,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1790 transitions. [2024-12-02 08:29:21,963 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1790 transitions. Word has length 731 [2024-12-02 08:29:21,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:21,963 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1790 transitions. [2024-12-02 08:29:21,963 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:21,963 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1790 transitions. [2024-12-02 08:29:21,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 733 [2024-12-02 08:29:21,967 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:21,967 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:21,967 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-12-02 08:29:21,967 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:21,968 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:21,968 INFO L85 PathProgramCache]: Analyzing trace with hash 1483075683, now seen corresponding path program 1 times [2024-12-02 08:29:21,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:21,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119465112] [2024-12-02 08:29:21,968 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:21,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:22,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:23,124 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:23,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:23,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119465112] [2024-12-02 08:29:23,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119465112] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:23,124 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:23,124 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:23,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1338295826] [2024-12-02 08:29:23,124 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:23,125 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:23,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:23,125 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:23,125 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:23,126 INFO L87 Difference]: Start difference. First operand 1381 states and 1790 transitions. Second operand has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:23,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:23,203 INFO L93 Difference]: Finished difference Result 2234 states and 2913 transitions. [2024-12-02 08:29:23,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:23,204 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 732 [2024-12-02 08:29:23,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:23,205 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:23,205 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:23,206 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:23,206 INFO L435 NwaCegarLoop]: 1177 mSDtfsCounter, 885 mSDsluCounter, 1186 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 888 SdHoareTripleChecker+Valid, 2363 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:23,206 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [888 Valid, 2363 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:29:23,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:23,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:23,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2942461762563728) internal successors, (1777), 1373 states have internal predecessors, (1777), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:23,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1789 transitions. [2024-12-02 08:29:23,225 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1789 transitions. Word has length 732 [2024-12-02 08:29:23,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:23,225 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1789 transitions. [2024-12-02 08:29:23,225 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:23,225 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1789 transitions. [2024-12-02 08:29:23,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-12-02 08:29:23,229 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:23,229 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:23,229 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-12-02 08:29:23,229 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:23,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:23,229 INFO L85 PathProgramCache]: Analyzing trace with hash 433882719, now seen corresponding path program 1 times [2024-12-02 08:29:23,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:23,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904515218] [2024-12-02 08:29:23,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:23,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:23,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:24,490 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:24,491 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:24,491 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904515218] [2024-12-02 08:29:24,491 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904515218] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:24,491 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:24,491 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:24,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122551360] [2024-12-02 08:29:24,491 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:24,491 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:24,491 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:24,492 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:24,492 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:24,492 INFO L87 Difference]: Start difference. First operand 1381 states and 1789 transitions. Second operand has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:24,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:24,574 INFO L93 Difference]: Finished difference Result 2234 states and 2911 transitions. [2024-12-02 08:29:24,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:24,575 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 733 [2024-12-02 08:29:24,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:24,576 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:24,577 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:24,577 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:24,577 INFO L435 NwaCegarLoop]: 1177 mSDtfsCounter, 1613 mSDsluCounter, 1179 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1616 SdHoareTripleChecker+Valid, 2356 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:24,578 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1616 Valid, 2356 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:24,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:24,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:24,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2935178441369264) internal successors, (1776), 1373 states have internal predecessors, (1776), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:24,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1788 transitions. [2024-12-02 08:29:24,595 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1788 transitions. Word has length 733 [2024-12-02 08:29:24,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:24,596 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1788 transitions. [2024-12-02 08:29:24,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.2) internal successors, (706), 5 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:24,596 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1788 transitions. [2024-12-02 08:29:24,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-12-02 08:29:24,599 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:24,599 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:24,599 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-12-02 08:29:24,600 INFO L396 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:24,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:24,600 INFO L85 PathProgramCache]: Analyzing trace with hash 340200782, now seen corresponding path program 1 times [2024-12-02 08:29:24,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:24,600 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039397120] [2024-12-02 08:29:24,600 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:24,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:25,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:25,887 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:25,887 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:25,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039397120] [2024-12-02 08:29:25,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039397120] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:25,888 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:25,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:25,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749137746] [2024-12-02 08:29:25,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:25,889 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:25,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:25,890 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:25,890 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:25,890 INFO L87 Difference]: Start difference. First operand 1381 states and 1788 transitions. Second operand has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:25,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:25,957 INFO L93 Difference]: Finished difference Result 2234 states and 2909 transitions. [2024-12-02 08:29:25,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:25,958 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 734 [2024-12-02 08:29:25,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:25,959 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:25,959 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:25,960 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:25,960 INFO L435 NwaCegarLoop]: 1189 mSDtfsCounter, 1590 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1593 SdHoareTripleChecker+Valid, 2380 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:25,961 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1593 Valid, 2380 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:29:25,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:25,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:25,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.29278951201748) internal successors, (1775), 1373 states have internal predecessors, (1775), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:25,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1787 transitions. [2024-12-02 08:29:25,992 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1787 transitions. Word has length 734 [2024-12-02 08:29:25,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:25,992 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1787 transitions. [2024-12-02 08:29:25,992 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:25,992 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1787 transitions. [2024-12-02 08:29:25,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2024-12-02 08:29:25,998 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:25,998 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:25,999 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94 [2024-12-02 08:29:25,999 INFO L396 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:25,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:25,999 INFO L85 PathProgramCache]: Analyzing trace with hash 2147282410, now seen corresponding path program 1 times [2024-12-02 08:29:25,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:25,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503247865] [2024-12-02 08:29:26,000 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:26,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:26,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:27,291 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:27,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:27,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503247865] [2024-12-02 08:29:27,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [503247865] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:27,291 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:27,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:27,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134964110] [2024-12-02 08:29:27,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:27,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:27,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:27,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:27,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:27,292 INFO L87 Difference]: Start difference. First operand 1381 states and 1787 transitions. Second operand has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:27,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:27,352 INFO L93 Difference]: Finished difference Result 2234 states and 2907 transitions. [2024-12-02 08:29:27,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:27,353 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 735 [2024-12-02 08:29:27,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:27,354 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:27,354 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:27,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:27,355 INFO L435 NwaCegarLoop]: 1189 mSDtfsCounter, 1574 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1577 SdHoareTripleChecker+Valid, 2380 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:27,355 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1577 Valid, 2380 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:29:27,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:27,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:27,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2920611798980335) internal successors, (1774), 1373 states have internal predecessors, (1774), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:27,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1786 transitions. [2024-12-02 08:29:27,372 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1786 transitions. Word has length 735 [2024-12-02 08:29:27,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:27,373 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1786 transitions. [2024-12-02 08:29:27,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:27,373 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1786 transitions. [2024-12-02 08:29:27,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 737 [2024-12-02 08:29:27,376 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:27,376 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:27,376 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95 [2024-12-02 08:29:27,376 INFO L396 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:27,376 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:27,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1309014343, now seen corresponding path program 1 times [2024-12-02 08:29:27,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:27,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965838953] [2024-12-02 08:29:27,376 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:27,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:27,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:28,621 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:28,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:28,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1965838953] [2024-12-02 08:29:28,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1965838953] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:28,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:28,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:28,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358631737] [2024-12-02 08:29:28,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:28,622 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:28,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:28,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:28,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:28,623 INFO L87 Difference]: Start difference. First operand 1381 states and 1786 transitions. Second operand has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:28,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:28,975 INFO L93 Difference]: Finished difference Result 2234 states and 2905 transitions. [2024-12-02 08:29:28,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:28,976 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 736 [2024-12-02 08:29:28,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:28,977 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:28,977 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:28,978 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:28,978 INFO L435 NwaCegarLoop]: 929 mSDtfsCounter, 1513 mSDsluCounter, 931 mSDsCounter, 0 mSdLazyCounter, 554 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1513 SdHoareTripleChecker+Valid, 1860 SdHoareTripleChecker+Invalid, 555 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 554 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:28,978 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1513 Valid, 1860 Invalid, 555 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 554 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:29:28,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:28,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:28,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.291332847778587) internal successors, (1773), 1373 states have internal predecessors, (1773), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:28,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1785 transitions. [2024-12-02 08:29:28,994 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1785 transitions. Word has length 736 [2024-12-02 08:29:28,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:28,994 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1785 transitions. [2024-12-02 08:29:28,994 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.8) internal successors, (709), 5 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:28,994 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1785 transitions. [2024-12-02 08:29:28,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 738 [2024-12-02 08:29:28,997 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:28,998 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:28,998 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96 [2024-12-02 08:29:28,998 INFO L396 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:28,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:28,998 INFO L85 PathProgramCache]: Analyzing trace with hash 193493493, now seen corresponding path program 1 times [2024-12-02 08:29:28,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:28,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349873840] [2024-12-02 08:29:28,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:28,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:30,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:31,104 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:31,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:31,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349873840] [2024-12-02 08:29:31,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349873840] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:31,104 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:31,104 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:29:31,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861502396] [2024-12-02 08:29:31,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:31,105 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:29:31,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:31,105 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:29:31,105 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:29:31,105 INFO L87 Difference]: Start difference. First operand 1381 states and 1785 transitions. Second operand has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:31,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:31,150 INFO L93 Difference]: Finished difference Result 2234 states and 2903 transitions. [2024-12-02 08:29:31,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:31,151 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 737 [2024-12-02 08:29:31,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:31,152 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:31,152 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:31,153 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:31,153 INFO L435 NwaCegarLoop]: 1188 mSDtfsCounter, 719 mSDsluCounter, 1190 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 719 SdHoareTripleChecker+Valid, 2378 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:31,153 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [719 Valid, 2378 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:29:31,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:31,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:31,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2906045156591406) internal successors, (1772), 1373 states have internal predecessors, (1772), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:31,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1784 transitions. [2024-12-02 08:29:31,170 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1784 transitions. Word has length 737 [2024-12-02 08:29:31,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:31,171 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1784 transitions. [2024-12-02 08:29:31,171 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 177.5) internal successors, (710), 4 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:31,171 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1784 transitions. [2024-12-02 08:29:31,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-12-02 08:29:31,174 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:31,174 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:31,174 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable97 [2024-12-02 08:29:31,174 INFO L396 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:31,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:31,175 INFO L85 PathProgramCache]: Analyzing trace with hash 486616135, now seen corresponding path program 1 times [2024-12-02 08:29:31,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:31,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980908172] [2024-12-02 08:29:31,175 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:31,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:32,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:33,571 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:33,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:33,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980908172] [2024-12-02 08:29:33,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980908172] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:33,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:33,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:33,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270696361] [2024-12-02 08:29:33,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:33,573 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:33,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:33,574 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:33,574 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:33,574 INFO L87 Difference]: Start difference. First operand 1381 states and 1784 transitions. Second operand has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:33,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:33,691 INFO L93 Difference]: Finished difference Result 2234 states and 2901 transitions. [2024-12-02 08:29:33,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:33,692 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 738 [2024-12-02 08:29:33,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:33,693 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:33,693 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:33,694 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:33,694 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 1054 mSDsluCounter, 1182 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1054 SdHoareTripleChecker+Valid, 2355 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:33,694 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1054 Valid, 2355 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:33,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:33,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:33,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2898761835396941) internal successors, (1771), 1373 states have internal predecessors, (1771), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:33,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1783 transitions. [2024-12-02 08:29:33,722 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1783 transitions. Word has length 738 [2024-12-02 08:29:33,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:33,722 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1783 transitions. [2024-12-02 08:29:33,722 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:33,722 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1783 transitions. [2024-12-02 08:29:33,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2024-12-02 08:29:33,730 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:33,730 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:33,730 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable98 [2024-12-02 08:29:33,730 INFO L396 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:33,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:33,731 INFO L85 PathProgramCache]: Analyzing trace with hash -1548764683, now seen corresponding path program 1 times [2024-12-02 08:29:33,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:33,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1336404020] [2024-12-02 08:29:33,731 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:33,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:35,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:35,988 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:35,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:35,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1336404020] [2024-12-02 08:29:35,988 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1336404020] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:35,988 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:35,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:35,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584820529] [2024-12-02 08:29:35,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:35,988 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:35,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:35,989 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:35,989 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:35,989 INFO L87 Difference]: Start difference. First operand 1381 states and 1783 transitions. Second operand has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:36,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:36,111 INFO L93 Difference]: Finished difference Result 2234 states and 2899 transitions. [2024-12-02 08:29:36,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:36,112 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 739 [2024-12-02 08:29:36,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:36,113 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:36,113 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:36,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:36,114 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 1053 mSDsluCounter, 1182 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1053 SdHoareTripleChecker+Valid, 2355 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:36,114 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1053 Valid, 2355 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:36,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:36,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:36,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2891478514202477) internal successors, (1770), 1373 states have internal predecessors, (1770), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:36,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1782 transitions. [2024-12-02 08:29:36,130 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1782 transitions. Word has length 739 [2024-12-02 08:29:36,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:36,130 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1782 transitions. [2024-12-02 08:29:36,131 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.4) internal successors, (712), 5 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:36,131 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1782 transitions. [2024-12-02 08:29:36,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 741 [2024-12-02 08:29:36,134 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:36,134 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:36,134 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable99 [2024-12-02 08:29:36,134 INFO L396 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:36,134 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:36,135 INFO L85 PathProgramCache]: Analyzing trace with hash -2099221928, now seen corresponding path program 1 times [2024-12-02 08:29:36,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:36,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322677118] [2024-12-02 08:29:36,135 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:36,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:37,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:38,210 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:38,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:38,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322677118] [2024-12-02 08:29:38,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322677118] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:38,210 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:38,210 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:29:38,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927287167] [2024-12-02 08:29:38,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:38,211 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:29:38,211 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:38,212 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:29:38,212 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:29:38,212 INFO L87 Difference]: Start difference. First operand 1381 states and 1782 transitions. Second operand has 4 states, 4 states have (on average 178.25) internal successors, (713), 4 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:38,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:38,283 INFO L93 Difference]: Finished difference Result 2234 states and 2897 transitions. [2024-12-02 08:29:38,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:38,284 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 178.25) internal successors, (713), 4 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 740 [2024-12-02 08:29:38,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:38,285 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:38,285 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:38,286 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:38,286 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 728 mSDsluCounter, 1175 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 728 SdHoareTripleChecker+Valid, 2348 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:38,286 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [728 Valid, 2348 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:29:38,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:38,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:38,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2884195193008012) internal successors, (1769), 1373 states have internal predecessors, (1769), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:38,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1781 transitions. [2024-12-02 08:29:38,302 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1781 transitions. Word has length 740 [2024-12-02 08:29:38,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:38,303 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1781 transitions. [2024-12-02 08:29:38,303 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 178.25) internal successors, (713), 4 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:38,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1781 transitions. [2024-12-02 08:29:38,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-12-02 08:29:38,306 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:38,306 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:38,306 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100 [2024-12-02 08:29:38,306 INFO L396 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:38,306 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:38,306 INFO L85 PathProgramCache]: Analyzing trace with hash 567510820, now seen corresponding path program 1 times [2024-12-02 08:29:38,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:38,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924226006] [2024-12-02 08:29:38,306 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:38,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:39,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:40,290 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:40,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:40,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924226006] [2024-12-02 08:29:40,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924226006] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:40,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:40,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:40,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138147260] [2024-12-02 08:29:40,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:40,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:40,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:40,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:40,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:40,292 INFO L87 Difference]: Start difference. First operand 1381 states and 1781 transitions. Second operand has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:40,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:40,425 INFO L93 Difference]: Finished difference Result 2234 states and 2895 transitions. [2024-12-02 08:29:40,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:40,426 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 741 [2024-12-02 08:29:40,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:40,427 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:40,427 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:40,428 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:40,428 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 1036 mSDsluCounter, 1151 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1036 SdHoareTripleChecker+Valid, 2293 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:40,428 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1036 Valid, 2293 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:40,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:40,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:40,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2876911871813548) internal successors, (1768), 1373 states have internal predecessors, (1768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:40,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1780 transitions. [2024-12-02 08:29:40,444 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1780 transitions. Word has length 741 [2024-12-02 08:29:40,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:40,445 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1780 transitions. [2024-12-02 08:29:40,445 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:40,445 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1780 transitions. [2024-12-02 08:29:40,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 743 [2024-12-02 08:29:40,448 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:40,448 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:40,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable101 [2024-12-02 08:29:40,448 INFO L396 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:40,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:40,448 INFO L85 PathProgramCache]: Analyzing trace with hash -864569546, now seen corresponding path program 1 times [2024-12-02 08:29:40,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:40,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [760571909] [2024-12-02 08:29:40,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:40,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:41,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:42,538 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:42,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:42,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [760571909] [2024-12-02 08:29:42,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [760571909] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:42,538 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:42,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:42,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772542319] [2024-12-02 08:29:42,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:42,539 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:42,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:42,539 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:42,539 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:42,539 INFO L87 Difference]: Start difference. First operand 1381 states and 1780 transitions. Second operand has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:42,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:42,666 INFO L93 Difference]: Finished difference Result 2234 states and 2893 transitions. [2024-12-02 08:29:42,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:42,667 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 742 [2024-12-02 08:29:42,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:42,668 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:42,668 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:42,669 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:42,669 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 1824 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1824 SdHoareTripleChecker+Valid, 2286 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:42,669 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1824 Valid, 2286 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:42,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:42,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:42,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2869628550619083) internal successors, (1767), 1373 states have internal predecessors, (1767), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:42,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1779 transitions. [2024-12-02 08:29:42,686 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1779 transitions. Word has length 742 [2024-12-02 08:29:42,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:42,686 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1779 transitions. [2024-12-02 08:29:42,686 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:42,686 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1779 transitions. [2024-12-02 08:29:42,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 744 [2024-12-02 08:29:42,691 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:42,692 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:42,692 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102 [2024-12-02 08:29:42,692 INFO L396 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:42,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:42,692 INFO L85 PathProgramCache]: Analyzing trace with hash 627726963, now seen corresponding path program 1 times [2024-12-02 08:29:42,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:42,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632606671] [2024-12-02 08:29:42,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:42,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:44,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:44,904 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:44,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:44,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632606671] [2024-12-02 08:29:44,904 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632606671] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:44,904 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:44,904 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:29:44,904 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397610322] [2024-12-02 08:29:44,904 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:44,905 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:29:44,905 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:44,906 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:29:44,906 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:29:44,906 INFO L87 Difference]: Start difference. First operand 1381 states and 1779 transitions. Second operand has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:45,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:45,005 INFO L93 Difference]: Finished difference Result 2234 states and 2891 transitions. [2024-12-02 08:29:45,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:45,005 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 743 [2024-12-02 08:29:45,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:45,007 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:45,007 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:45,007 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:45,008 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 781 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 781 SdHoareTripleChecker+Valid, 2286 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:45,008 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [781 Valid, 2286 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:45,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:45,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:45,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2862345229424617) internal successors, (1766), 1373 states have internal predecessors, (1766), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:45,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1778 transitions. [2024-12-02 08:29:45,025 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1778 transitions. Word has length 743 [2024-12-02 08:29:45,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:45,025 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1778 transitions. [2024-12-02 08:29:45,025 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:45,025 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1778 transitions. [2024-12-02 08:29:45,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 745 [2024-12-02 08:29:45,028 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:45,028 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:45,028 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable103 [2024-12-02 08:29:45,029 INFO L396 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:45,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:45,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1547161767, now seen corresponding path program 1 times [2024-12-02 08:29:45,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:45,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64376435] [2024-12-02 08:29:45,029 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:45,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:46,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:47,097 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:47,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:47,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64376435] [2024-12-02 08:29:47,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64376435] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:47,097 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:47,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:47,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134830783] [2024-12-02 08:29:47,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:47,098 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:47,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:47,098 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:47,098 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:47,099 INFO L87 Difference]: Start difference. First operand 1381 states and 1778 transitions. Second operand has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:47,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:47,214 INFO L93 Difference]: Finished difference Result 2234 states and 2889 transitions. [2024-12-02 08:29:47,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:47,215 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 744 [2024-12-02 08:29:47,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:47,216 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:47,216 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:47,217 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:47,217 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 1033 mSDsluCounter, 1151 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1033 SdHoareTripleChecker+Valid, 2293 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:47,217 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1033 Valid, 2293 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:47,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:47,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:47,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2855061908230152) internal successors, (1765), 1373 states have internal predecessors, (1765), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:47,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1777 transitions. [2024-12-02 08:29:47,232 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1777 transitions. Word has length 744 [2024-12-02 08:29:47,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:47,233 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1777 transitions. [2024-12-02 08:29:47,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:47,233 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1777 transitions. [2024-12-02 08:29:47,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 746 [2024-12-02 08:29:47,236 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:47,236 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:47,236 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104 [2024-12-02 08:29:47,236 INFO L396 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:47,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:47,236 INFO L85 PathProgramCache]: Analyzing trace with hash -767793086, now seen corresponding path program 1 times [2024-12-02 08:29:47,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:47,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54279911] [2024-12-02 08:29:47,237 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:47,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:48,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:49,545 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:49,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:49,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54279911] [2024-12-02 08:29:49,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [54279911] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:49,545 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:49,545 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:49,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565028258] [2024-12-02 08:29:49,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:49,546 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:49,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:49,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:49,547 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:49,547 INFO L87 Difference]: Start difference. First operand 1381 states and 1777 transitions. Second operand has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:49,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:49,683 INFO L93 Difference]: Finished difference Result 2234 states and 2887 transitions. [2024-12-02 08:29:49,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:49,684 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 745 [2024-12-02 08:29:49,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:49,685 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:49,685 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:49,686 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:49,686 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 1032 mSDsluCounter, 1151 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1032 SdHoareTripleChecker+Valid, 2293 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:49,686 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1032 Valid, 2293 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:49,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:49,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:49,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2847778587035688) internal successors, (1764), 1373 states have internal predecessors, (1764), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:49,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1776 transitions. [2024-12-02 08:29:49,702 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1776 transitions. Word has length 745 [2024-12-02 08:29:49,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:49,702 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1776 transitions. [2024-12-02 08:29:49,702 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:49,702 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1776 transitions. [2024-12-02 08:29:49,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2024-12-02 08:29:49,705 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:49,705 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:49,705 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable105 [2024-12-02 08:29:49,705 INFO L396 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:49,706 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:49,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1472235416, now seen corresponding path program 1 times [2024-12-02 08:29:49,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:49,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550480468] [2024-12-02 08:29:49,706 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:49,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:51,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:51,935 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:51,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:51,935 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550480468] [2024-12-02 08:29:51,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [550480468] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:51,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:51,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:51,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402157112] [2024-12-02 08:29:51,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:51,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:51,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:51,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:51,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:51,936 INFO L87 Difference]: Start difference. First operand 1381 states and 1776 transitions. Second operand has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:52,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:52,066 INFO L93 Difference]: Finished difference Result 2234 states and 2885 transitions. [2024-12-02 08:29:52,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:52,067 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 746 [2024-12-02 08:29:52,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:52,068 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:52,068 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:52,069 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:52,069 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 1784 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1784 SdHoareTripleChecker+Valid, 2286 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:52,069 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1784 Valid, 2286 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:52,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:52,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:52,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2840495265841223) internal successors, (1763), 1373 states have internal predecessors, (1763), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:52,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1775 transitions. [2024-12-02 08:29:52,086 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1775 transitions. Word has length 746 [2024-12-02 08:29:52,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:52,086 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1775 transitions. [2024-12-02 08:29:52,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:52,087 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1775 transitions. [2024-12-02 08:29:52,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2024-12-02 08:29:52,089 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:52,090 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:52,090 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106 [2024-12-02 08:29:52,090 INFO L396 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:52,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:52,090 INFO L85 PathProgramCache]: Analyzing trace with hash -364511087, now seen corresponding path program 1 times [2024-12-02 08:29:52,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:52,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105658832] [2024-12-02 08:29:52,090 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:52,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:53,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:54,382 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:54,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:54,382 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105658832] [2024-12-02 08:29:54,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105658832] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:54,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:54,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 08:29:54,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102312135] [2024-12-02 08:29:54,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:54,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:29:54,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:54,383 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:29:54,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 08:29:54,384 INFO L87 Difference]: Start difference. First operand 1381 states and 1775 transitions. Second operand has 4 states, 4 states have (on average 180.0) internal successors, (720), 4 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:54,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:54,495 INFO L93 Difference]: Finished difference Result 2234 states and 2883 transitions. [2024-12-02 08:29:54,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:54,496 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 180.0) internal successors, (720), 4 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 747 [2024-12-02 08:29:54,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:54,497 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:54,497 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:54,498 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:54,498 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 745 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 2286 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:54,498 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [745 Valid, 2286 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:29:54,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:54,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:54,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2833211944646759) internal successors, (1762), 1373 states have internal predecessors, (1762), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:54,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1774 transitions. [2024-12-02 08:29:54,514 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1774 transitions. Word has length 747 [2024-12-02 08:29:54,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:54,514 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1774 transitions. [2024-12-02 08:29:54,514 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 180.0) internal successors, (720), 4 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:54,514 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1774 transitions. [2024-12-02 08:29:54,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 749 [2024-12-02 08:29:54,517 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:54,517 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:54,517 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107 [2024-12-02 08:29:54,517 INFO L396 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:54,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:54,518 INFO L85 PathProgramCache]: Analyzing trace with hash -1649570807, now seen corresponding path program 1 times [2024-12-02 08:29:54,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:54,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263808445] [2024-12-02 08:29:54,518 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:54,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:56,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:56,982 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:56,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:56,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263808445] [2024-12-02 08:29:56,983 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263808445] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:56,983 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:56,983 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:56,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183312487] [2024-12-02 08:29:56,983 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:56,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:56,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:56,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:56,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:56,984 INFO L87 Difference]: Start difference. First operand 1381 states and 1774 transitions. Second operand has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:57,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:57,185 INFO L93 Difference]: Finished difference Result 2234 states and 2881 transitions. [2024-12-02 08:29:57,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:57,185 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 748 [2024-12-02 08:29:57,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:57,187 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:57,187 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:57,187 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:57,187 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 998 mSDsluCounter, 1088 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 998 SdHoareTripleChecker+Valid, 2167 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:57,187 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [998 Valid, 2167 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:57,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:57,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:57,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2825928623452294) internal successors, (1761), 1373 states have internal predecessors, (1761), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:57,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1773 transitions. [2024-12-02 08:29:57,203 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1773 transitions. Word has length 748 [2024-12-02 08:29:57,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:57,203 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1773 transitions. [2024-12-02 08:29:57,203 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:57,203 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1773 transitions. [2024-12-02 08:29:57,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-12-02 08:29:57,206 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:57,206 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:57,206 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable108 [2024-12-02 08:29:57,207 INFO L396 AbstractCegarLoop]: === Iteration 110 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:57,207 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:57,207 INFO L85 PathProgramCache]: Analyzing trace with hash -940746057, now seen corresponding path program 1 times [2024-12-02 08:29:57,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:57,207 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683887373] [2024-12-02 08:29:57,207 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:57,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:29:58,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:29:59,499 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:29:59,499 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:29:59,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683887373] [2024-12-02 08:29:59,499 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1683887373] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:29:59,499 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:29:59,499 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:29:59,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491268618] [2024-12-02 08:29:59,499 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:29:59,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:29:59,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:29:59,500 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:29:59,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:29:59,500 INFO L87 Difference]: Start difference. First operand 1381 states and 1773 transitions. Second operand has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:59,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:29:59,696 INFO L93 Difference]: Finished difference Result 2234 states and 2879 transitions. [2024-12-02 08:29:59,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:29:59,697 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 749 [2024-12-02 08:29:59,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:29:59,698 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:29:59,698 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:29:59,699 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:29:59,699 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 1891 mSDsluCounter, 1081 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1891 SdHoareTripleChecker+Valid, 2160 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:29:59,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1891 Valid, 2160 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:29:59,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:29:59,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:29:59,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.281864530225783) internal successors, (1760), 1373 states have internal predecessors, (1760), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:29:59,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1772 transitions. [2024-12-02 08:29:59,715 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1772 transitions. Word has length 749 [2024-12-02 08:29:59,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:29:59,715 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1772 transitions. [2024-12-02 08:29:59,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:29:59,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1772 transitions. [2024-12-02 08:29:59,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 751 [2024-12-02 08:29:59,718 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:29:59,719 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:29:59,719 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable109 [2024-12-02 08:29:59,719 INFO L396 AbstractCegarLoop]: === Iteration 111 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:29:59,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:29:59,719 INFO L85 PathProgramCache]: Analyzing trace with hash -304790566, now seen corresponding path program 1 times [2024-12-02 08:29:59,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:29:59,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403776307] [2024-12-02 08:29:59,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:29:59,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:30:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:30:01,958 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:30:01,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:30:01,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [403776307] [2024-12-02 08:30:01,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [403776307] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:30:01,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:30:01,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:30:01,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503339665] [2024-12-02 08:30:01,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:30:01,959 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:30:01,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:30:01,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:30:01,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:30:01,960 INFO L87 Difference]: Start difference. First operand 1381 states and 1772 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:02,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:30:02,184 INFO L93 Difference]: Finished difference Result 2234 states and 2877 transitions. [2024-12-02 08:30:02,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:30:02,184 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 750 [2024-12-02 08:30:02,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:30:02,185 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:30:02,185 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:30:02,186 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:30:02,186 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 1881 mSDsluCounter, 1081 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1881 SdHoareTripleChecker+Valid, 2160 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:30:02,186 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1881 Valid, 2160 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:30:02,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:30:02,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:30:02,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2811361981063365) internal successors, (1759), 1373 states have internal predecessors, (1759), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:30:02,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1771 transitions. [2024-12-02 08:30:02,202 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1771 transitions. Word has length 750 [2024-12-02 08:30:02,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:30:02,202 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1771 transitions. [2024-12-02 08:30:02,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:02,202 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1771 transitions. [2024-12-02 08:30:02,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 752 [2024-12-02 08:30:02,206 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:30:02,206 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:30:02,206 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110 [2024-12-02 08:30:02,206 INFO L396 AbstractCegarLoop]: === Iteration 112 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:30:02,206 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:30:02,206 INFO L85 PathProgramCache]: Analyzing trace with hash -1346019802, now seen corresponding path program 1 times [2024-12-02 08:30:02,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:30:02,207 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434518062] [2024-12-02 08:30:02,207 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:30:02,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:30:03,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:30:04,636 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:30:04,636 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:30:04,636 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434518062] [2024-12-02 08:30:04,636 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [434518062] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:30:04,636 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:30:04,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:30:04,637 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139869380] [2024-12-02 08:30:04,637 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:30:04,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:30:04,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:30:04,637 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:30:04,637 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:30:04,637 INFO L87 Difference]: Start difference. First operand 1381 states and 1771 transitions. Second operand has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:04,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:30:04,845 INFO L93 Difference]: Finished difference Result 2234 states and 2875 transitions. [2024-12-02 08:30:04,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:30:04,845 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 751 [2024-12-02 08:30:04,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:30:04,846 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:30:04,846 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:30:04,847 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:30:04,847 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 1871 mSDsluCounter, 1081 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1871 SdHoareTripleChecker+Valid, 2160 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:30:04,847 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1871 Valid, 2160 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 224 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:30:04,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:30:04,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:30:04,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.28040786598689) internal successors, (1758), 1373 states have internal predecessors, (1758), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:30:04,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1770 transitions. [2024-12-02 08:30:04,862 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1770 transitions. Word has length 751 [2024-12-02 08:30:04,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:30:04,863 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1770 transitions. [2024-12-02 08:30:04,863 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:04,863 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1770 transitions. [2024-12-02 08:30:04,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 753 [2024-12-02 08:30:04,866 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:30:04,866 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:30:04,866 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable111 [2024-12-02 08:30:04,866 INFO L396 AbstractCegarLoop]: === Iteration 113 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:30:04,866 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:30:04,866 INFO L85 PathProgramCache]: Analyzing trace with hash 1586360619, now seen corresponding path program 1 times [2024-12-02 08:30:04,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:30:04,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236625653] [2024-12-02 08:30:04,866 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:30:04,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:30:06,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:30:07,011 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:30:07,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:30:07,012 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236625653] [2024-12-02 08:30:07,012 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1236625653] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:30:07,012 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:30:07,012 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:30:07,012 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982204938] [2024-12-02 08:30:07,012 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:30:07,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:30:07,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:30:07,013 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:30:07,013 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:30:07,013 INFO L87 Difference]: Start difference. First operand 1381 states and 1770 transitions. Second operand has 5 states, 5 states have (on average 145.0) internal successors, (725), 5 states have internal predecessors, (725), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:07,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:30:07,219 INFO L93 Difference]: Finished difference Result 2234 states and 2873 transitions. [2024-12-02 08:30:07,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:30:07,220 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 145.0) internal successors, (725), 5 states have internal predecessors, (725), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 752 [2024-12-02 08:30:07,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:30:07,221 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:30:07,221 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:30:07,222 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:30:07,222 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 994 mSDsluCounter, 1088 mSDsCounter, 0 mSdLazyCounter, 222 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 994 SdHoareTripleChecker+Valid, 2167 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:30:07,222 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [994 Valid, 2167 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 222 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:30:07,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:30:07,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. [2024-12-02 08:30:07,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1381 states, 1373 states have (on average 1.2796795338674436) internal successors, (1757), 1373 states have internal predecessors, (1757), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:30:07,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 1381 states and 1769 transitions. [2024-12-02 08:30:07,237 INFO L78 Accepts]: Start accepts. Automaton has 1381 states and 1769 transitions. Word has length 752 [2024-12-02 08:30:07,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:30:07,238 INFO L471 AbstractCegarLoop]: Abstraction has 1381 states and 1769 transitions. [2024-12-02 08:30:07,238 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 145.0) internal successors, (725), 5 states have internal predecessors, (725), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:07,238 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 1769 transitions. [2024-12-02 08:30:07,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 754 [2024-12-02 08:30:07,241 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:30:07,241 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:30:07,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable112 [2024-12-02 08:30:07,241 INFO L396 AbstractCegarLoop]: === Iteration 114 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:30:07,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:30:07,242 INFO L85 PathProgramCache]: Analyzing trace with hash -933915627, now seen corresponding path program 1 times [2024-12-02 08:30:07,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:30:07,242 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496703898] [2024-12-02 08:30:07,242 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:30:07,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:30:08,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:30:09,371 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:30:09,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:30:09,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496703898] [2024-12-02 08:30:09,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1496703898] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:30:09,371 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:30:09,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:30:09,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730884918] [2024-12-02 08:30:09,372 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:30:09,372 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:30:09,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:30:09,373 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:30:09,373 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:30:09,373 INFO L87 Difference]: Start difference. First operand 1381 states and 1769 transitions. Second operand has 5 states, 5 states have (on average 145.2) internal successors, (726), 5 states have internal predecessors, (726), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:30:09,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:30:09,602 INFO L93 Difference]: Finished difference Result 2234 states and 2871 transitions. [2024-12-02 08:30:09,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:30:09,603 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 145.2) internal successors, (726), 5 states have internal predecessors, (726), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 753 [2024-12-02 08:30:09,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:30:09,604 INFO L225 Difference]: With dead ends: 2234 [2024-12-02 08:30:09,604 INFO L226 Difference]: Without dead ends: 1381 [2024-12-02 08:30:09,605 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:30:09,605 INFO L435 NwaCegarLoop]: 1079 mSDtfsCounter, 993 mSDsluCounter, 1088 mSDsCounter, 0 mSdLazyCounter, 220 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 993 SdHoareTripleChecker+Valid, 2167 SdHoareTripleChecker+Invalid, 220 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:30:09,605 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [993 Valid, 2167 Invalid, 220 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 220 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:30:09,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1381 states. [2024-12-02 08:30:09,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1381 to 1381. WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-02 08:30:58,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:30:58,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217588972] [2024-12-02 08:30:58,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:30:58,069 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:30:58,069 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:30:58,069 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:30:58,069 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:30:58,070 INFO L87 Difference]: Start difference. First operand 2254 states and 2868 transitions. Second operand has 8 states, 8 states have (on average 77.25) internal successors, (618), 8 states have internal predecessors, (618), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:30:59,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:30:59,130 INFO L93 Difference]: Finished difference Result 5950 states and 7445 transitions. [2024-12-02 08:30:59,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:30:59,130 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.25) internal successors, (618), 8 states have internal predecessors, (618), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 769 [2024-12-02 08:30:59,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:30:59,133 INFO L225 Difference]: With dead ends: 5950 [2024-12-02 08:30:59,133 INFO L226 Difference]: Without dead ends: 4161 [2024-12-02 08:30:59,134 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:30:59,134 INFO L435 NwaCegarLoop]: 1821 mSDtfsCounter, 1968 mSDsluCounter, 7859 mSDsCounter, 0 mSdLazyCounter, 1961 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1971 SdHoareTripleChecker+Valid, 9680 SdHoareTripleChecker+Invalid, 1961 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1961 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:30:59,134 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1971 Valid, 9680 Invalid, 1961 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1961 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:30:59,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4161 states. [2024-12-02 08:30:59,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4161 to 4153. [2024-12-02 08:30:59,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4153 states, 4133 states have (on average 1.2557464311638036) internal successors, (5190), 4133 states have internal predecessors, (5190), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2024-12-02 08:30:59,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4153 states to 4153 states and 5226 transitions. [2024-12-02 08:30:59,185 INFO L78 Accepts]: Start accepts. Automaton has 4153 states and 5226 transitions. Word has length 769 [2024-12-02 08:30:59,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:30:59,185 INFO L471 AbstractCegarLoop]: Abstraction has 4153 states and 5226 transitions. [2024-12-02 08:30:59,185 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.25) internal successors, (618), 8 states have internal predecessors, (618), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:30:59,185 INFO L276 IsEmpty]: Start isEmpty. Operand 4153 states and 5226 transitions. [2024-12-02 08:30:59,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-12-02 08:30:59,190 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:30:59,191 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:30:59,191 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable128 [2024-12-02 08:30:59,191 INFO L396 AbstractCegarLoop]: === Iteration 130 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:30:59,191 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:30:59,191 INFO L85 PathProgramCache]: Analyzing trace with hash -1015368665, now seen corresponding path program 1 times [2024-12-02 08:30:59,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:30:59,191 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1344394559] [2024-12-02 08:30:59,191 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:30:59,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:02,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:03,425 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 213 trivial. 0 not checked. [2024-12-02 08:31:03,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:03,425 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1344394559] [2024-12-02 08:31:03,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1344394559] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:03,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:31:03,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:31:03,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998610263] [2024-12-02 08:31:03,426 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:03,426 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:31:03,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:03,426 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:31:03,426 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:31:03,426 INFO L87 Difference]: Start difference. First operand 4153 states and 5226 transitions. Second operand has 6 states, 6 states have (on average 99.16666666666667) internal successors, (595), 6 states have internal predecessors, (595), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:31:04,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:04,018 INFO L93 Difference]: Finished difference Result 4163 states and 5234 transitions. [2024-12-02 08:31:04,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:31:04,018 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 99.16666666666667) internal successors, (595), 6 states have internal predecessors, (595), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 771 [2024-12-02 08:31:04,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:04,020 INFO L225 Difference]: With dead ends: 4163 [2024-12-02 08:31:04,020 INFO L226 Difference]: Without dead ends: 2262 [2024-12-02 08:31:04,021 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:31:04,021 INFO L435 NwaCegarLoop]: 898 mSDtfsCounter, 1069 mSDsluCounter, 2687 mSDsCounter, 0 mSdLazyCounter, 1126 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1070 SdHoareTripleChecker+Valid, 3585 SdHoareTripleChecker+Invalid, 1126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:04,021 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1070 Valid, 3585 Invalid, 1126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1126 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:31:04,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2262 states. [2024-12-02 08:31:04,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2262 to 2258. [2024-12-02 08:31:04,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2258 states, 2244 states have (on average 1.2691622103386808) internal successors, (2848), 2244 states have internal predecessors, (2848), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:31:04,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2258 states to 2258 states and 2872 transitions. [2024-12-02 08:31:04,063 INFO L78 Accepts]: Start accepts. Automaton has 2258 states and 2872 transitions. Word has length 771 [2024-12-02 08:31:04,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:04,063 INFO L471 AbstractCegarLoop]: Abstraction has 2258 states and 2872 transitions. [2024-12-02 08:31:04,063 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 99.16666666666667) internal successors, (595), 6 states have internal predecessors, (595), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 08:31:04,063 INFO L276 IsEmpty]: Start isEmpty. Operand 2258 states and 2872 transitions. [2024-12-02 08:31:04,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-12-02 08:31:04,069 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:04,069 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:04,069 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable129 [2024-12-02 08:31:04,069 INFO L396 AbstractCegarLoop]: === Iteration 131 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:04,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:04,070 INFO L85 PathProgramCache]: Analyzing trace with hash 2022238291, now seen corresponding path program 1 times [2024-12-02 08:31:04,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:04,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101145707] [2024-12-02 08:31:04,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:04,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:07,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:09,975 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:31:09,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:09,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101145707] [2024-12-02 08:31:09,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [101145707] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:31:09,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [593969700] [2024-12-02 08:31:09,975 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:09,975 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:31:09,975 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:31:09,977 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:31:09,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 08:31:14,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:14,650 INFO L256 TraceCheckSpWp]: Trace formula consists of 4793 conjuncts, 39 conjuncts are in the unsatisfiable core [2024-12-02 08:31:14,670 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:31:15,092 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2024-12-02 08:31:15,092 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:31:15,093 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [593969700] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:15,093 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:31:15,093 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [10] total 17 [2024-12-02 08:31:15,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367852867] [2024-12-02 08:31:15,093 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:15,094 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:31:15,094 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:15,094 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:31:15,094 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:31:15,094 INFO L87 Difference]: Start difference. First operand 2258 states and 2872 transitions. Second operand has 9 states, 9 states have (on average 65.55555555555556) internal successors, (590), 9 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:31:15,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:15,935 INFO L93 Difference]: Finished difference Result 4243 states and 5348 transitions. [2024-12-02 08:31:15,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:31:15,936 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 65.55555555555556) internal successors, (590), 9 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 771 [2024-12-02 08:31:15,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:15,938 INFO L225 Difference]: With dead ends: 4243 [2024-12-02 08:31:15,938 INFO L226 Difference]: Without dead ends: 2278 [2024-12-02 08:31:15,939 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 781 GetRequests, 766 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:31:15,939 INFO L435 NwaCegarLoop]: 892 mSDtfsCounter, 1079 mSDsluCounter, 5289 mSDsCounter, 0 mSdLazyCounter, 2008 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1081 SdHoareTripleChecker+Valid, 6181 SdHoareTripleChecker+Invalid, 2010 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2008 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:15,939 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1081 Valid, 6181 Invalid, 2010 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2008 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:31:15,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2278 states. [2024-12-02 08:31:15,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2278 to 2270. [2024-12-02 08:31:15,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2270 states, 2256 states have (on average 1.2659574468085106) internal successors, (2856), 2256 states have internal predecessors, (2856), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:31:15,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2270 states to 2270 states and 2880 transitions. [2024-12-02 08:31:15,972 INFO L78 Accepts]: Start accepts. Automaton has 2270 states and 2880 transitions. Word has length 771 [2024-12-02 08:31:15,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:15,972 INFO L471 AbstractCegarLoop]: Abstraction has 2270 states and 2880 transitions. [2024-12-02 08:31:15,973 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 65.55555555555556) internal successors, (590), 9 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:31:15,973 INFO L276 IsEmpty]: Start isEmpty. Operand 2270 states and 2880 transitions. [2024-12-02 08:31:15,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:31:15,976 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:15,977 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:16,019 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 08:31:16,177 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable130 [2024-12-02 08:31:16,177 INFO L396 AbstractCegarLoop]: === Iteration 132 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:16,177 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:16,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1784286067, now seen corresponding path program 1 times [2024-12-02 08:31:16,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:16,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368932163] [2024-12-02 08:31:16,178 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:16,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:19,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:23,227 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2024-12-02 08:31:23,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:23,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368932163] [2024-12-02 08:31:23,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1368932163] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:23,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:31:23,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:31:23,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181751572] [2024-12-02 08:31:23,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:23,229 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:31:23,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:23,229 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:31:23,229 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:31:23,229 INFO L87 Difference]: Start difference. First operand 2270 states and 2880 transitions. Second operand has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:31:25,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:25,080 INFO L93 Difference]: Finished difference Result 5971 states and 7444 transitions. [2024-12-02 08:31:25,081 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:31:25,081 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-02 08:31:25,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:25,083 INFO L225 Difference]: With dead ends: 5971 [2024-12-02 08:31:25,083 INFO L226 Difference]: Without dead ends: 4114 [2024-12-02 08:31:25,085 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:31:25,085 INFO L435 NwaCegarLoop]: 1457 mSDtfsCounter, 1989 mSDsluCounter, 6678 mSDsCounter, 0 mSdLazyCounter, 2801 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1990 SdHoareTripleChecker+Valid, 8135 SdHoareTripleChecker+Invalid, 2804 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 2801 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:25,085 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1990 Valid, 8135 Invalid, 2804 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 2801 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2024-12-02 08:31:25,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4114 states. [2024-12-02 08:31:25,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4114 to 2358. [2024-12-02 08:31:25,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2358 states, 2340 states have (on average 1.2683760683760683) internal successors, (2968), 2340 states have internal predecessors, (2968), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-12-02 08:31:25,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2358 states to 2358 states and 3000 transitions. [2024-12-02 08:31:25,128 INFO L78 Accepts]: Start accepts. Automaton has 2358 states and 3000 transitions. Word has length 775 [2024-12-02 08:31:25,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:25,128 INFO L471 AbstractCegarLoop]: Abstraction has 2358 states and 3000 transitions. [2024-12-02 08:31:25,128 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:31:25,128 INFO L276 IsEmpty]: Start isEmpty. Operand 2358 states and 3000 transitions. [2024-12-02 08:31:25,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:31:25,132 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:25,132 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:25,132 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable131 [2024-12-02 08:31:25,132 INFO L396 AbstractCegarLoop]: === Iteration 133 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:25,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:25,133 INFO L85 PathProgramCache]: Analyzing trace with hash -708444211, now seen corresponding path program 1 times [2024-12-02 08:31:25,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:25,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246501144] [2024-12-02 08:31:25,133 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:25,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:31,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:40,475 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 144 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:31:40,475 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:40,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246501144] [2024-12-02 08:31:40,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [246501144] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:31:40,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1321046817] [2024-12-02 08:31:40,475 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:40,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:31:40,476 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:31:40,477 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:31:40,478 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:31:46,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:46,859 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:31:46,872 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:31:47,215 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 214 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 08:31:47,215 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:31:47,215 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1321046817] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:47,215 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:31:47,215 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [18] total 24 [2024-12-02 08:31:47,215 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574958431] [2024-12-02 08:31:47,215 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:47,216 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:31:47,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:47,216 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:31:47,216 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=484, Unknown=0, NotChecked=0, Total=552 [2024-12-02 08:31:47,216 INFO L87 Difference]: Start difference. First operand 2358 states and 3000 transitions. Second operand has 8 states, 8 states have (on average 93.5) internal successors, (748), 8 states have internal predecessors, (748), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:31:48,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:48,127 INFO L93 Difference]: Finished difference Result 5449 states and 6976 transitions. [2024-12-02 08:31:48,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 08:31:48,127 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 93.5) internal successors, (748), 8 states have internal predecessors, (748), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 775 [2024-12-02 08:31:48,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:48,131 INFO L225 Difference]: With dead ends: 5449 [2024-12-02 08:31:48,131 INFO L226 Difference]: Without dead ends: 4138 [2024-12-02 08:31:48,132 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 794 GetRequests, 770 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=570, Unknown=0, NotChecked=0, Total=650 [2024-12-02 08:31:48,132 INFO L435 NwaCegarLoop]: 903 mSDtfsCounter, 2898 mSDsluCounter, 4249 mSDsCounter, 0 mSdLazyCounter, 1631 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2904 SdHoareTripleChecker+Valid, 5152 SdHoareTripleChecker+Invalid, 1634 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:48,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2904 Valid, 5152 Invalid, 1634 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1631 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:31:48,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4138 states. [2024-12-02 08:31:48,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4138 to 3216. [2024-12-02 08:31:48,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3216 states, 3186 states have (on average 1.2404268675455117) internal successors, (3952), 3186 states have internal predecessors, (3952), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 08:31:48,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3216 states to 3216 states and 4008 transitions. [2024-12-02 08:31:48,205 INFO L78 Accepts]: Start accepts. Automaton has 3216 states and 4008 transitions. Word has length 775 [2024-12-02 08:31:48,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:48,205 INFO L471 AbstractCegarLoop]: Abstraction has 3216 states and 4008 transitions. [2024-12-02 08:31:48,205 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 93.5) internal successors, (748), 8 states have internal predecessors, (748), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:31:48,205 INFO L276 IsEmpty]: Start isEmpty. Operand 3216 states and 4008 transitions. [2024-12-02 08:31:48,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 08:31:48,209 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:48,210 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:48,251 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:31:48,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable132,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:31:48,410 INFO L396 AbstractCegarLoop]: === Iteration 134 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:48,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:48,410 INFO L85 PathProgramCache]: Analyzing trace with hash -1236257790, now seen corresponding path program 1 times [2024-12-02 08:31:48,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:48,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23732142] [2024-12-02 08:31:48,411 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:48,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:48,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:49,632 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2024-12-02 08:31:49,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:49,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23732142] [2024-12-02 08:31:49,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [23732142] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:49,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:31:49,633 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:31:49,633 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936191227] [2024-12-02 08:31:49,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:49,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:31:49,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:49,634 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:31:49,634 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:31:49,634 INFO L87 Difference]: Start difference. First operand 3216 states and 4008 transitions. Second operand has 5 states, 5 states have (on average 123.4) internal successors, (617), 5 states have internal predecessors, (617), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:31:49,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:49,711 INFO L93 Difference]: Finished difference Result 5229 states and 6527 transitions. [2024-12-02 08:31:49,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 08:31:49,711 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 123.4) internal successors, (617), 5 states have internal predecessors, (617), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 775 [2024-12-02 08:31:49,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:49,714 INFO L225 Difference]: With dead ends: 5229 [2024-12-02 08:31:49,714 INFO L226 Difference]: Without dead ends: 3356 [2024-12-02 08:31:49,715 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:31:49,715 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 16 mSDsluCounter, 3507 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 4680 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:49,715 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 4680 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:31:49,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3356 states. [2024-12-02 08:31:49,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3356 to 3356. [2024-12-02 08:31:49,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3356 states, 3326 states have (on average 1.2483463619963922) internal successors, (4152), 3326 states have internal predecessors, (4152), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 08:31:49,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3356 states to 3356 states and 4208 transitions. [2024-12-02 08:31:49,778 INFO L78 Accepts]: Start accepts. Automaton has 3356 states and 4208 transitions. Word has length 775 [2024-12-02 08:31:49,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:49,778 INFO L471 AbstractCegarLoop]: Abstraction has 3356 states and 4208 transitions. [2024-12-02 08:31:49,778 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 123.4) internal successors, (617), 5 states have internal predecessors, (617), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:31:49,778 INFO L276 IsEmpty]: Start isEmpty. Operand 3356 states and 4208 transitions. [2024-12-02 08:31:49,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:31:49,783 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:49,783 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:49,783 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable133 [2024-12-02 08:31:49,783 INFO L396 AbstractCegarLoop]: === Iteration 135 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:49,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:49,784 INFO L85 PathProgramCache]: Analyzing trace with hash -1138477626, now seen corresponding path program 1 times [2024-12-02 08:31:49,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:49,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452555283] [2024-12-02 08:31:49,784 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:49,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:31:53,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:31:57,192 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-12-02 08:31:57,192 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:31:57,192 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452555283] [2024-12-02 08:31:57,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452555283] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:31:57,193 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:31:57,193 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 08:31:57,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1095425580] [2024-12-02 08:31:57,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:31:57,193 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:31:57,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:31:57,194 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:31:57,194 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-12-02 08:31:57,194 INFO L87 Difference]: Start difference. First operand 3356 states and 4208 transitions. Second operand has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:31:57,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:31:57,907 INFO L93 Difference]: Finished difference Result 6584 states and 8222 transitions. [2024-12-02 08:31:57,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 08:31:57,908 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-02 08:31:57,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:31:57,911 INFO L225 Difference]: With dead ends: 6584 [2024-12-02 08:31:57,911 INFO L226 Difference]: Without dead ends: 4612 [2024-12-02 08:31:57,913 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:31:57,913 INFO L435 NwaCegarLoop]: 1917 mSDtfsCounter, 3720 mSDsluCounter, 11411 mSDsCounter, 0 mSdLazyCounter, 665 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3725 SdHoareTripleChecker+Valid, 13328 SdHoareTripleChecker+Invalid, 670 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 665 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:31:57,913 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3725 Valid, 13328 Invalid, 670 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 665 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:31:57,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4612 states. [2024-12-02 08:31:57,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4612 to 3484. [2024-12-02 08:31:57,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3484 states, 3448 states have (on average 1.25) internal successors, (4310), 3448 states have internal predecessors, (4310), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-12-02 08:31:57,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3484 states to 3484 states and 4378 transitions. [2024-12-02 08:31:57,989 INFO L78 Accepts]: Start accepts. Automaton has 3484 states and 4378 transitions. Word has length 776 [2024-12-02 08:31:57,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:31:57,989 INFO L471 AbstractCegarLoop]: Abstraction has 3484 states and 4378 transitions. [2024-12-02 08:31:57,989 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 60.9) internal successors, (609), 10 states have internal predecessors, (609), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:31:57,989 INFO L276 IsEmpty]: Start isEmpty. Operand 3484 states and 4378 transitions. [2024-12-02 08:31:57,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:31:57,993 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:31:57,993 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:31:57,994 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable134 [2024-12-02 08:31:57,994 INFO L396 AbstractCegarLoop]: === Iteration 136 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:31:57,994 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:31:57,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1756345382, now seen corresponding path program 1 times [2024-12-02 08:31:57,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:31:57,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091321708] [2024-12-02 08:31:57,994 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:31:57,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:04,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:06,858 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:32:06,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:32:06,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091321708] [2024-12-02 08:32:06,858 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091321708] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:32:06,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [626786896] [2024-12-02 08:32:06,859 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:06,859 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:32:06,859 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:32:06,860 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:32:06,861 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:32:12,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:12,622 INFO L256 TraceCheckSpWp]: Trace formula consists of 4804 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:32:12,633 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:32:12,700 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-12-02 08:32:12,701 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:32:12,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [626786896] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:32:12,701 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:32:12,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14 [2024-12-02 08:32:12,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850338146] [2024-12-02 08:32:12,701 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:32:12,702 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:32:12,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:32:12,702 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:32:12,702 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-02 08:32:12,703 INFO L87 Difference]: Start difference. First operand 3484 states and 4378 transitions. Second operand has 6 states, 5 states have (on average 120.0) internal successors, (600), 6 states have internal predecessors, (600), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:32:12,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:32:12,873 INFO L93 Difference]: Finished difference Result 6495 states and 8097 transitions. [2024-12-02 08:32:12,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:32:12,873 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 120.0) internal successors, (600), 6 states have internal predecessors, (600), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 776 [2024-12-02 08:32:12,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:32:12,877 INFO L225 Difference]: With dead ends: 6495 [2024-12-02 08:32:12,877 INFO L226 Difference]: Without dead ends: 3484 [2024-12-02 08:32:12,880 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 786 GetRequests, 774 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-02 08:32:12,880 INFO L435 NwaCegarLoop]: 1173 mSDtfsCounter, 0 mSDsluCounter, 4673 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5846 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:32:12,880 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5846 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:32:12,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3484 states. [2024-12-02 08:32:12,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3484 to 3484. [2024-12-02 08:32:12,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3484 states, 3448 states have (on average 1.2473897911832947) internal successors, (4301), 3448 states have internal predecessors, (4301), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-12-02 08:32:12,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3484 states to 3484 states and 4369 transitions. [2024-12-02 08:32:12,969 INFO L78 Accepts]: Start accepts. Automaton has 3484 states and 4369 transitions. Word has length 776 [2024-12-02 08:32:12,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:32:12,969 INFO L471 AbstractCegarLoop]: Abstraction has 3484 states and 4369 transitions. [2024-12-02 08:32:12,969 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 120.0) internal successors, (600), 6 states have internal predecessors, (600), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:32:12,969 INFO L276 IsEmpty]: Start isEmpty. Operand 3484 states and 4369 transitions. [2024-12-02 08:32:12,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:32:12,976 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:32:12,976 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:32:13,018 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 08:32:13,177 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable135 [2024-12-02 08:32:13,177 INFO L396 AbstractCegarLoop]: === Iteration 137 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:32:13,177 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:32:13,177 INFO L85 PathProgramCache]: Analyzing trace with hash -466236153, now seen corresponding path program 1 times [2024-12-02 08:32:13,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:32:13,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541446193] [2024-12-02 08:32:13,177 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:13,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:15,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:17,062 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:32:17,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:32:17,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541446193] [2024-12-02 08:32:17,062 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1541446193] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:32:17,062 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:32:17,062 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:32:17,062 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031612571] [2024-12-02 08:32:17,063 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:32:17,063 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:32:17,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:32:17,063 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:32:17,063 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:32:17,064 INFO L87 Difference]: Start difference. First operand 3484 states and 4369 transitions. Second operand has 6 states, 6 states have (on average 124.83333333333333) internal successors, (749), 6 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:32:18,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:32:18,106 INFO L93 Difference]: Finished difference Result 5696 states and 7157 transitions. [2024-12-02 08:32:18,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:32:18,107 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 124.83333333333333) internal successors, (749), 6 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 776 [2024-12-02 08:32:18,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:32:18,110 INFO L225 Difference]: With dead ends: 5696 [2024-12-02 08:32:18,110 INFO L226 Difference]: Without dead ends: 4788 [2024-12-02 08:32:18,111 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:32:18,112 INFO L435 NwaCegarLoop]: 1565 mSDtfsCounter, 1527 mSDsluCounter, 4000 mSDsCounter, 0 mSdLazyCounter, 1828 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1530 SdHoareTripleChecker+Valid, 5565 SdHoareTripleChecker+Invalid, 1829 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1828 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:32:18,112 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1530 Valid, 5565 Invalid, 1829 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1828 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:32:18,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4788 states. [2024-12-02 08:32:18,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4788 to 3560. [2024-12-02 08:32:18,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3560 states, 3522 states have (on average 1.2498580352072686) internal successors, (4402), 3522 states have internal predecessors, (4402), 36 states have call successors, (36), 1 states have call predecessors, (36), 1 states have return successors, (36), 36 states have call predecessors, (36), 36 states have call successors, (36) [2024-12-02 08:32:18,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3560 states to 3560 states and 4474 transitions. [2024-12-02 08:32:18,190 INFO L78 Accepts]: Start accepts. Automaton has 3560 states and 4474 transitions. Word has length 776 [2024-12-02 08:32:18,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:32:18,191 INFO L471 AbstractCegarLoop]: Abstraction has 3560 states and 4474 transitions. [2024-12-02 08:32:18,191 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 124.83333333333333) internal successors, (749), 6 states have internal predecessors, (749), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:32:18,191 INFO L276 IsEmpty]: Start isEmpty. Operand 3560 states and 4474 transitions. [2024-12-02 08:32:18,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-12-02 08:32:18,195 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:32:18,196 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:32:18,196 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable136 [2024-12-02 08:32:18,196 INFO L396 AbstractCegarLoop]: === Iteration 138 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:32:18,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:32:18,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1645548032, now seen corresponding path program 1 times [2024-12-02 08:32:18,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:32:18,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118187718] [2024-12-02 08:32:18,196 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:18,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:22,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:26,974 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:32:26,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:32:26,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118187718] [2024-12-02 08:32:26,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118187718] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:32:26,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:32:26,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-12-02 08:32:26,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999324359] [2024-12-02 08:32:26,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:32:26,975 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-12-02 08:32:26,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:32:26,975 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-12-02 08:32:26,975 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:32:26,975 INFO L87 Difference]: Start difference. First operand 3560 states and 4474 transitions. Second operand has 11 states, 11 states have (on average 68.0909090909091) internal successors, (749), 11 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:32:27,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:32:27,660 INFO L93 Difference]: Finished difference Result 8255 states and 10400 transitions. [2024-12-02 08:32:27,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:32:27,661 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 68.0909090909091) internal successors, (749), 11 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 776 [2024-12-02 08:32:27,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:32:27,667 INFO L225 Difference]: With dead ends: 8255 [2024-12-02 08:32:27,667 INFO L226 Difference]: Without dead ends: 7328 [2024-12-02 08:32:27,669 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=216, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:32:27,669 INFO L435 NwaCegarLoop]: 1951 mSDtfsCounter, 2408 mSDsluCounter, 12338 mSDsCounter, 0 mSdLazyCounter, 763 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2410 SdHoareTripleChecker+Valid, 14289 SdHoareTripleChecker+Invalid, 766 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 763 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:32:27,669 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2410 Valid, 14289 Invalid, 766 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 763 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:32:27,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7328 states. [2024-12-02 08:32:27,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7328 to 6420. [2024-12-02 08:32:27,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6420 states, 6361 states have (on average 1.235183147303883) internal successors, (7857), 6361 states have internal predecessors, (7857), 57 states have call successors, (57), 1 states have call predecessors, (57), 1 states have return successors, (57), 57 states have call predecessors, (57), 57 states have call successors, (57) [2024-12-02 08:32:27,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6420 states to 6420 states and 7971 transitions. [2024-12-02 08:32:27,792 INFO L78 Accepts]: Start accepts. Automaton has 6420 states and 7971 transitions. Word has length 776 [2024-12-02 08:32:27,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:32:27,793 INFO L471 AbstractCegarLoop]: Abstraction has 6420 states and 7971 transitions. [2024-12-02 08:32:27,793 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 68.0909090909091) internal successors, (749), 11 states have internal predecessors, (749), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:32:27,793 INFO L276 IsEmpty]: Start isEmpty. Operand 6420 states and 7971 transitions. [2024-12-02 08:32:27,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 08:32:27,799 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:32:27,799 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:32:27,799 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable137 [2024-12-02 08:32:27,799 INFO L396 AbstractCegarLoop]: === Iteration 139 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:32:27,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:32:27,799 INFO L85 PathProgramCache]: Analyzing trace with hash -1560879987, now seen corresponding path program 1 times [2024-12-02 08:32:27,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:32:27,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327028089] [2024-12-02 08:32:27,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:27,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:33,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:40,552 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 144 proven. 39 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:32:40,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:32:40,552 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327028089] [2024-12-02 08:32:40,552 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1327028089] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:32:40,552 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [576894659] [2024-12-02 08:32:40,552 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:40,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:32:40,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:32:40,554 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:32:40,590 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:32:46,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:46,507 INFO L256 TraceCheckSpWp]: Trace formula consists of 4807 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:32:46,517 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:32:46,586 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 167 proven. 0 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 08:32:46,586 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:32:46,586 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [576894659] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:32:46,586 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:32:46,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-12-02 08:32:46,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737356022] [2024-12-02 08:32:46,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:32:46,587 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:32:46,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:32:46,588 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:32:46,588 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-02 08:32:46,588 INFO L87 Difference]: Start difference. First operand 6420 states and 7971 transitions. Second operand has 6 states, 5 states have (on average 145.4) internal successors, (727), 6 states have internal predecessors, (727), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:32:46,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:32:46,753 INFO L93 Difference]: Finished difference Result 11609 states and 14271 transitions. [2024-12-02 08:32:46,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:32:46,754 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 145.4) internal successors, (727), 6 states have internal predecessors, (727), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 777 [2024-12-02 08:32:46,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:32:46,759 INFO L225 Difference]: With dead ends: 11609 [2024-12-02 08:32:46,759 INFO L226 Difference]: Without dead ends: 6420 [2024-12-02 08:32:46,762 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 795 GetRequests, 774 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-02 08:32:46,762 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 0 mSDsluCounter, 4669 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5841 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:32:46,763 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5841 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:32:46,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6420 states. [2024-12-02 08:32:46,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6420 to 6420. [2024-12-02 08:32:46,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6420 states, 6361 states have (on average 1.2326678195252319) internal successors, (7841), 6361 states have internal predecessors, (7841), 57 states have call successors, (57), 1 states have call predecessors, (57), 1 states have return successors, (57), 57 states have call predecessors, (57), 57 states have call successors, (57) [2024-12-02 08:32:46,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6420 states to 6420 states and 7955 transitions. [2024-12-02 08:32:46,879 INFO L78 Accepts]: Start accepts. Automaton has 6420 states and 7955 transitions. Word has length 777 [2024-12-02 08:32:46,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:32:46,879 INFO L471 AbstractCegarLoop]: Abstraction has 6420 states and 7955 transitions. [2024-12-02 08:32:46,879 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 145.4) internal successors, (727), 6 states have internal predecessors, (727), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 08:32:46,879 INFO L276 IsEmpty]: Start isEmpty. Operand 6420 states and 7955 transitions. [2024-12-02 08:32:46,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 08:32:46,885 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:32:46,886 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:32:46,928 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:32:47,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable138,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:32:47,086 INFO L396 AbstractCegarLoop]: === Iteration 140 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:32:47,086 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:32:47,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1157941443, now seen corresponding path program 1 times [2024-12-02 08:32:47,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:32:47,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781391920] [2024-12-02 08:32:47,087 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:47,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:50,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:32:53,350 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:32:53,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:32:53,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781391920] [2024-12-02 08:32:53,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781391920] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:32:53,350 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:32:53,350 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:32:53,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [209455518] [2024-12-02 08:32:53,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:32:53,351 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:32:53,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:32:53,351 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:32:53,351 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:32:53,351 INFO L87 Difference]: Start difference. First operand 6420 states and 7955 transitions. Second operand has 9 states, 9 states have (on average 83.55555555555556) internal successors, (752), 9 states have internal predecessors, (752), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:32:55,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:32:55,161 INFO L93 Difference]: Finished difference Result 14101 states and 17441 transitions. [2024-12-02 08:32:55,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:32:55,161 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 83.55555555555556) internal successors, (752), 9 states have internal predecessors, (752), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 779 [2024-12-02 08:32:55,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:32:55,169 INFO L225 Difference]: With dead ends: 14101 [2024-12-02 08:32:55,169 INFO L226 Difference]: Without dead ends: 11618 [2024-12-02 08:32:55,172 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:32:55,172 INFO L435 NwaCegarLoop]: 1474 mSDtfsCounter, 1814 mSDsluCounter, 6748 mSDsCounter, 0 mSdLazyCounter, 2821 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1815 SdHoareTripleChecker+Valid, 8222 SdHoareTripleChecker+Invalid, 2825 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 2821 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:32:55,172 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1815 Valid, 8222 Invalid, 2825 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 2821 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-12-02 08:32:55,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11618 states. [2024-12-02 08:32:55,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11618 to 10024. [2024-12-02 08:32:55,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10024 states, 9949 states have (on average 1.199417026836868) internal successors, (11933), 9949 states have internal predecessors, (11933), 73 states have call successors, (73), 1 states have call predecessors, (73), 1 states have return successors, (73), 73 states have call predecessors, (73), 73 states have call successors, (73) [2024-12-02 08:32:55,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10024 states to 10024 states and 12079 transitions. [2024-12-02 08:32:55,332 INFO L78 Accepts]: Start accepts. Automaton has 10024 states and 12079 transitions. Word has length 779 [2024-12-02 08:32:55,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:32:55,332 INFO L471 AbstractCegarLoop]: Abstraction has 10024 states and 12079 transitions. [2024-12-02 08:32:55,332 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 83.55555555555556) internal successors, (752), 9 states have internal predecessors, (752), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:32:55,332 INFO L276 IsEmpty]: Start isEmpty. Operand 10024 states and 12079 transitions. [2024-12-02 08:32:55,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 08:32:55,340 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:32:55,340 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:32:55,340 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable139 [2024-12-02 08:32:55,340 INFO L396 AbstractCegarLoop]: === Iteration 141 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:32:55,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:32:55,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1657236708, now seen corresponding path program 1 times [2024-12-02 08:32:55,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:32:55,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865695826] [2024-12-02 08:32:55,340 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:32:55,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:32:57,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:33:00,151 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:00,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:33:00,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865695826] [2024-12-02 08:33:00,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [865695826] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:33:00,151 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [505132103] [2024-12-02 08:33:00,151 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:33:00,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:33:00,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:33:00,153 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:33:00,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:33:07,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:33:07,376 INFO L256 TraceCheckSpWp]: Trace formula consists of 4813 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 08:33:07,386 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:33:07,673 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 176 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:07,673 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:33:08,081 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 182 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:08,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [505132103] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 08:33:08,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:33:08,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10, 8] total 21 [2024-12-02 08:33:08,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730065308] [2024-12-02 08:33:08,082 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:33:08,082 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:33:08,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:33:08,083 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:33:08,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=370, Unknown=0, NotChecked=0, Total=420 [2024-12-02 08:33:08,083 INFO L87 Difference]: Start difference. First operand 10024 states and 12079 transitions. Second operand has 7 states, 7 states have (on average 107.42857142857143) internal successors, (752), 7 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:33:08,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:33:08,357 INFO L93 Difference]: Finished difference Result 14969 states and 18209 transitions. [2024-12-02 08:33:08,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:33:08,358 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 107.42857142857143) internal successors, (752), 7 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 779 [2024-12-02 08:33:08,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:33:08,410 INFO L225 Difference]: With dead ends: 14969 [2024-12-02 08:33:08,410 INFO L226 Difference]: Without dead ends: 12503 [2024-12-02 08:33:08,411 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1570 GetRequests, 1549 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2024-12-02 08:33:08,412 INFO L435 NwaCegarLoop]: 2076 mSDtfsCounter, 740 mSDsluCounter, 9449 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 740 SdHoareTripleChecker+Valid, 11525 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:33:08,412 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [740 Valid, 11525 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:33:08,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12503 states. [2024-12-02 08:33:08,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12503 to 11490. [2024-12-02 08:33:08,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11490 states, 11406 states have (on average 1.1921795546203753) internal successors, (13598), 11406 states have internal predecessors, (13598), 82 states have call successors, (82), 1 states have call predecessors, (82), 1 states have return successors, (82), 82 states have call predecessors, (82), 82 states have call successors, (82) [2024-12-02 08:33:08,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11490 states to 11490 states and 13762 transitions. [2024-12-02 08:33:08,597 INFO L78 Accepts]: Start accepts. Automaton has 11490 states and 13762 transitions. Word has length 779 [2024-12-02 08:33:08,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:33:08,597 INFO L471 AbstractCegarLoop]: Abstraction has 11490 states and 13762 transitions. [2024-12-02 08:33:08,597 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 107.42857142857143) internal successors, (752), 7 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:33:08,597 INFO L276 IsEmpty]: Start isEmpty. Operand 11490 states and 13762 transitions. [2024-12-02 08:33:08,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 08:33:08,606 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:33:08,606 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:33:08,652 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:33:08,807 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable140,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:33:08,807 INFO L396 AbstractCegarLoop]: === Iteration 142 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:33:08,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:33:08,807 INFO L85 PathProgramCache]: Analyzing trace with hash 1279464039, now seen corresponding path program 1 times [2024-12-02 08:33:08,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:33:08,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137989654] [2024-12-02 08:33:08,807 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:33:08,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:33:11,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:33:14,227 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 4 proven. 179 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:14,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:33:14,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137989654] [2024-12-02 08:33:14,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137989654] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:33:14,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1116926850] [2024-12-02 08:33:14,228 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:33:14,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:33:14,228 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:33:14,230 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:33:14,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:33:27,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:33:27,797 INFO L256 TraceCheckSpWp]: Trace formula consists of 4816 conjuncts, 176 conjuncts are in the unsatisfiable core [2024-12-02 08:33:27,815 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:33:35,405 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 145 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:35,405 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:33:50,877 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 143 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:33:50,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1116926850] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:33:50,877 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:33:50,877 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 28, 29] total 63 [2024-12-02 08:33:50,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128317783] [2024-12-02 08:33:50,877 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:33:50,878 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-12-02 08:33:50,878 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:33:50,879 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-12-02 08:33:50,879 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=368, Invalid=3538, Unknown=0, NotChecked=0, Total=3906 [2024-12-02 08:33:50,880 INFO L87 Difference]: Start difference. First operand 11490 states and 13762 transitions. Second operand has 63 states, 63 states have (on average 33.301587301587304) internal successors, (2098), 63 states have internal predecessors, (2098), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-02 08:34:35,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:34:35,722 INFO L93 Difference]: Finished difference Result 61141 states and 74602 transitions. [2024-12-02 08:34:35,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-12-02 08:34:35,723 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 33.301587301587304) internal successors, (2098), 63 states have internal predecessors, (2098), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 780 [2024-12-02 08:34:35,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:34:35,752 INFO L225 Difference]: With dead ends: 61141 [2024-12-02 08:34:35,752 INFO L226 Difference]: Without dead ends: 53832 [2024-12-02 08:34:35,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1746 GetRequests, 1508 SyntacticMatches, 0 SemanticMatches, 238 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18384 ImplicationChecksByTransitivity, 14.9s TimeCoverageRelationStatistics Valid=7065, Invalid=50295, Unknown=0, NotChecked=0, Total=57360 [2024-12-02 08:34:35,762 INFO L435 NwaCegarLoop]: 2936 mSDtfsCounter, 55219 mSDsluCounter, 91117 mSDsCounter, 0 mSdLazyCounter, 46536 mSolverCounterSat, 135 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 25.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55221 SdHoareTripleChecker+Valid, 94053 SdHoareTripleChecker+Invalid, 46671 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.3s SdHoareTripleChecker+Time, 135 IncrementalHoareTripleChecker+Valid, 46536 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 28.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:34:35,762 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [55221 Valid, 94053 Invalid, 46671 Unknown, 0 Unchecked, 0.3s Time], IncrementalHoareTripleChecker [135 Valid, 46536 Invalid, 0 Unknown, 0 Unchecked, 28.9s Time] [2024-12-02 08:34:35,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53832 states. [2024-12-02 08:34:36,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53832 to 27963. [2024-12-02 08:34:36,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27963 states, 27815 states have (on average 1.201474024806759) internal successors, (33419), 27815 states have internal predecessors, (33419), 146 states have call successors, (146), 1 states have call predecessors, (146), 1 states have return successors, (146), 146 states have call predecessors, (146), 146 states have call successors, (146) [2024-12-02 08:34:36,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27963 states to 27963 states and 33711 transitions. [2024-12-02 08:34:36,354 INFO L78 Accepts]: Start accepts. Automaton has 27963 states and 33711 transitions. Word has length 780 [2024-12-02 08:34:36,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:34:36,354 INFO L471 AbstractCegarLoop]: Abstraction has 27963 states and 33711 transitions. [2024-12-02 08:34:36,355 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 33.301587301587304) internal successors, (2098), 63 states have internal predecessors, (2098), 10 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-12-02 08:34:36,355 INFO L276 IsEmpty]: Start isEmpty. Operand 27963 states and 33711 transitions. [2024-12-02 08:34:36,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:34:36,376 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:34:36,377 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:34:36,428 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-12-02 08:34:36,577 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable141,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:34:36,577 INFO L396 AbstractCegarLoop]: === Iteration 143 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:34:36,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:34:36,578 INFO L85 PathProgramCache]: Analyzing trace with hash -14855570, now seen corresponding path program 1 times [2024-12-02 08:34:36,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:34:36,578 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747402744] [2024-12-02 08:34:36,578 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:34:36,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:34:37,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:34:38,076 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 150 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2024-12-02 08:34:38,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:34:38,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747402744] [2024-12-02 08:34:38,076 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747402744] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:34:38,076 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:34:38,076 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:34:38,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985935394] [2024-12-02 08:34:38,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:34:38,077 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:34:38,077 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:34:38,077 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:34:38,077 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:34:38,077 INFO L87 Difference]: Start difference. First operand 27963 states and 33711 transitions. Second operand has 6 states, 6 states have (on average 121.66666666666667) internal successors, (730), 6 states have internal predecessors, (730), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:34:38,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:34:38,966 INFO L93 Difference]: Finished difference Result 53769 states and 64541 transitions. [2024-12-02 08:34:38,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:34:38,967 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 121.66666666666667) internal successors, (730), 6 states have internal predecessors, (730), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 781 [2024-12-02 08:34:38,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:34:38,993 INFO L225 Difference]: With dead ends: 53769 [2024-12-02 08:34:38,993 INFO L226 Difference]: Without dead ends: 28635 [2024-12-02 08:34:39,011 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:34:39,011 INFO L435 NwaCegarLoop]: 907 mSDtfsCounter, 677 mSDsluCounter, 2708 mSDsCounter, 0 mSdLazyCounter, 1102 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 677 SdHoareTripleChecker+Valid, 3615 SdHoareTripleChecker+Invalid, 1103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 08:34:39,012 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [677 Valid, 3615 Invalid, 1103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1102 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 08:34:39,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28635 states. [2024-12-02 08:34:39,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28635 to 28299. [2024-12-02 08:34:39,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28299 states, 28151 states have (on average 1.1990693048204326) internal successors, (33755), 28151 states have internal predecessors, (33755), 146 states have call successors, (146), 1 states have call predecessors, (146), 1 states have return successors, (146), 146 states have call predecessors, (146), 146 states have call successors, (146) [2024-12-02 08:34:39,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28299 states to 28299 states and 34047 transitions. [2024-12-02 08:34:39,472 INFO L78 Accepts]: Start accepts. Automaton has 28299 states and 34047 transitions. Word has length 781 [2024-12-02 08:34:39,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:34:39,472 INFO L471 AbstractCegarLoop]: Abstraction has 28299 states and 34047 transitions. [2024-12-02 08:34:39,473 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 121.66666666666667) internal successors, (730), 6 states have internal predecessors, (730), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:34:39,473 INFO L276 IsEmpty]: Start isEmpty. Operand 28299 states and 34047 transitions. [2024-12-02 08:34:39,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:34:39,495 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:34:39,495 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:34:39,495 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable142 [2024-12-02 08:34:39,495 INFO L396 AbstractCegarLoop]: === Iteration 144 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:34:39,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:34:39,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1808848188, now seen corresponding path program 1 times [2024-12-02 08:34:39,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:34:39,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694455129] [2024-12-02 08:34:39,496 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:34:39,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:34:45,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:34:50,209 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:34:50,209 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:34:50,209 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694455129] [2024-12-02 08:34:50,209 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1694455129] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:34:50,209 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [188678546] [2024-12-02 08:34:50,209 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:34:50,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:34:50,209 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:34:50,211 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:34:50,211 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:35:01,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:35:01,113 INFO L256 TraceCheckSpWp]: Trace formula consists of 4817 conjuncts, 62 conjuncts are in the unsatisfiable core [2024-12-02 08:35:01,124 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:35:03,307 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:35:03,308 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:35:13,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [188678546] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:35:13,489 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:35:13,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 16] total 26 [2024-12-02 08:35:13,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685352545] [2024-12-02 08:35:13,490 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:35:13,490 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-12-02 08:35:13,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:35:13,491 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-12-02 08:35:13,491 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=151, Invalid=904, Unknown=1, NotChecked=0, Total=1056 [2024-12-02 08:35:13,491 INFO L87 Difference]: Start difference. First operand 28299 states and 34047 transitions. Second operand has 26 states, 26 states have (on average 51.92307692307692) internal successors, (1350), 26 states have internal predecessors, (1350), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 08:35:17,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:35:17,421 INFO L93 Difference]: Finished difference Result 89720 states and 109717 transitions. [2024-12-02 08:35:17,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-12-02 08:35:17,421 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 51.92307692307692) internal successors, (1350), 26 states have internal predecessors, (1350), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 781 [2024-12-02 08:35:17,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:35:17,468 INFO L225 Difference]: With dead ends: 89720 [2024-12-02 08:35:17,469 INFO L226 Difference]: Without dead ends: 70855 [2024-12-02 08:35:17,490 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1465 GetRequests, 1407 SyntacticMatches, 5 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 904 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=441, Invalid=2528, Unknown=1, NotChecked=0, Total=2970 [2024-12-02 08:35:17,490 INFO L435 NwaCegarLoop]: 896 mSDtfsCounter, 10128 mSDsluCounter, 12729 mSDsCounter, 0 mSdLazyCounter, 5950 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10134 SdHoareTripleChecker+Valid, 13625 SdHoareTripleChecker+Invalid, 5958 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 5950 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:35:17,490 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [10134 Valid, 13625 Invalid, 5958 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 5950 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2024-12-02 08:35:17,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70855 states. [2024-12-02 08:35:18,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70855 to 47709. [2024-12-02 08:35:18,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47709 states, 47433 states have (on average 1.207387262032762) internal successors, (57270), 47433 states have internal predecessors, (57270), 274 states have call successors, (274), 1 states have call predecessors, (274), 1 states have return successors, (274), 274 states have call predecessors, (274), 274 states have call successors, (274) [2024-12-02 08:35:18,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47709 states to 47709 states and 57818 transitions. [2024-12-02 08:35:18,390 INFO L78 Accepts]: Start accepts. Automaton has 47709 states and 57818 transitions. Word has length 781 [2024-12-02 08:35:18,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:35:18,390 INFO L471 AbstractCegarLoop]: Abstraction has 47709 states and 57818 transitions. [2024-12-02 08:35:18,391 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 51.92307692307692) internal successors, (1350), 26 states have internal predecessors, (1350), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 08:35:18,391 INFO L276 IsEmpty]: Start isEmpty. Operand 47709 states and 57818 transitions. [2024-12-02 08:35:18,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:35:18,423 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:35:18,423 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:35:18,473 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 08:35:18,623 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable143 [2024-12-02 08:35:18,624 INFO L396 AbstractCegarLoop]: === Iteration 145 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:35:18,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:35:18,624 INFO L85 PathProgramCache]: Analyzing trace with hash -2038550880, now seen corresponding path program 1 times [2024-12-02 08:35:18,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:35:18,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740443448] [2024-12-02 08:35:18,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:35:18,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:35:24,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:35:28,570 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:35:28,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:35:28,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740443448] [2024-12-02 08:35:28,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [740443448] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:35:28,570 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1868560080] [2024-12-02 08:35:28,570 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:35:28,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:35:28,570 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:35:28,572 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:35:28,573 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:35:37,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:35:37,413 INFO L256 TraceCheckSpWp]: Trace formula consists of 4817 conjuncts, 125 conjuncts are in the unsatisfiable core [2024-12-02 08:35:37,427 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:35:43,679 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 216 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:35:43,679 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:35:47,371 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 177 proven. 7 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:35:47,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1868560080] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:35:47,371 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:35:47,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18, 13] total 42 [2024-12-02 08:35:47,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019739016] [2024-12-02 08:35:47,371 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:35:47,372 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2024-12-02 08:35:47,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:35:47,373 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2024-12-02 08:35:47,373 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1511, Unknown=0, NotChecked=0, Total=1722 [2024-12-02 08:35:47,373 INFO L87 Difference]: Start difference. First operand 47709 states and 57818 transitions. Second operand has 42 states, 42 states have (on average 49.42857142857143) internal successors, (2076), 42 states have internal predecessors, (2076), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:35:52,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:35:52,302 INFO L93 Difference]: Finished difference Result 91754 states and 112771 transitions. [2024-12-02 08:35:52,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2024-12-02 08:35:52,303 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 49.42857142857143) internal successors, (2076), 42 states have internal predecessors, (2076), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 781 [2024-12-02 08:35:52,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:35:52,424 INFO L225 Difference]: With dead ends: 91754 [2024-12-02 08:35:52,424 INFO L226 Difference]: Without dead ends: 58480 [2024-12-02 08:35:52,435 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1594 GetRequests, 1537 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 939 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=439, Invalid=2983, Unknown=0, NotChecked=0, Total=3422 [2024-12-02 08:35:52,435 INFO L435 NwaCegarLoop]: 1067 mSDtfsCounter, 8193 mSDsluCounter, 19864 mSDsCounter, 0 mSdLazyCounter, 7823 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8196 SdHoareTripleChecker+Valid, 20931 SdHoareTripleChecker+Invalid, 7835 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 7823 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2024-12-02 08:35:52,435 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [8196 Valid, 20931 Invalid, 7835 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [12 Valid, 7823 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2024-12-02 08:35:52,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58480 states. [2024-12-02 08:35:53,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58480 to 47867. [2024-12-02 08:35:53,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47867 states, 47591 states have (on average 1.2073291168498246) internal successors, (57458), 47591 states have internal predecessors, (57458), 274 states have call successors, (274), 1 states have call predecessors, (274), 1 states have return successors, (274), 274 states have call predecessors, (274), 274 states have call successors, (274) [2024-12-02 08:35:53,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47867 states to 47867 states and 58006 transitions. [2024-12-02 08:35:53,191 INFO L78 Accepts]: Start accepts. Automaton has 47867 states and 58006 transitions. Word has length 781 [2024-12-02 08:35:53,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:35:53,191 INFO L471 AbstractCegarLoop]: Abstraction has 47867 states and 58006 transitions. [2024-12-02 08:35:53,192 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 49.42857142857143) internal successors, (2076), 42 states have internal predecessors, (2076), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:35:53,192 INFO L276 IsEmpty]: Start isEmpty. Operand 47867 states and 58006 transitions. [2024-12-02 08:35:53,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-12-02 08:35:53,225 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:35:53,225 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:35:53,279 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 08:35:53,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable144 [2024-12-02 08:35:53,425 INFO L396 AbstractCegarLoop]: === Iteration 146 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:35:53,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:35:53,426 INFO L85 PathProgramCache]: Analyzing trace with hash -348844068, now seen corresponding path program 1 times [2024-12-02 08:35:53,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:35:53,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633643398] [2024-12-02 08:35:53,426 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:35:53,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:35:53,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:35:55,644 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:35:55,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:35:55,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633643398] [2024-12-02 08:35:55,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1633643398] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:35:55,644 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:35:55,645 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:35:55,645 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70816853] [2024-12-02 08:35:55,645 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:35:55,645 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:35:55,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:35:55,646 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:35:55,646 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:35:55,646 INFO L87 Difference]: Start difference. First operand 47867 states and 58006 transitions. Second operand has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:35:56,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:35:56,443 INFO L93 Difference]: Finished difference Result 89481 states and 109146 transitions. [2024-12-02 08:35:56,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:35:56,443 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 781 [2024-12-02 08:35:56,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:35:56,487 INFO L225 Difference]: With dead ends: 89481 [2024-12-02 08:35:56,487 INFO L226 Difference]: Without dead ends: 64099 [2024-12-02 08:35:56,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:35:56,506 INFO L435 NwaCegarLoop]: 2045 mSDtfsCounter, 859 mSDsluCounter, 7293 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 859 SdHoareTripleChecker+Valid, 9338 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:35:56,506 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [859 Valid, 9338 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:35:56,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64099 states. [2024-12-02 08:35:57,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64099 to 49817. [2024-12-02 08:35:57,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49817 states, 49441 states have (on average 1.2082684411723064) internal successors, (59738), 49441 states have internal predecessors, (59738), 374 states have call successors, (374), 1 states have call predecessors, (374), 1 states have return successors, (374), 374 states have call predecessors, (374), 374 states have call successors, (374) [2024-12-02 08:35:57,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49817 states to 49817 states and 60486 transitions. [2024-12-02 08:35:57,462 INFO L78 Accepts]: Start accepts. Automaton has 49817 states and 60486 transitions. Word has length 781 [2024-12-02 08:35:57,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:35:57,462 INFO L471 AbstractCegarLoop]: Abstraction has 49817 states and 60486 transitions. [2024-12-02 08:35:57,463 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.66666666666667) internal successors, (754), 6 states have internal predecessors, (754), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:35:57,463 INFO L276 IsEmpty]: Start isEmpty. Operand 49817 states and 60486 transitions. [2024-12-02 08:35:57,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 08:35:57,497 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:35:57,498 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:35:57,498 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable145 [2024-12-02 08:35:57,498 INFO L396 AbstractCegarLoop]: === Iteration 147 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:35:57,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:35:57,498 INFO L85 PathProgramCache]: Analyzing trace with hash -1388768601, now seen corresponding path program 1 times [2024-12-02 08:35:57,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:35:57,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821354321] [2024-12-02 08:35:57,498 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:35:57,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:36:02,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:36:03,975 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 179 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:36:03,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:36:03,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821354321] [2024-12-02 08:36:03,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [821354321] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:36:03,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116803635] [2024-12-02 08:36:03,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:36:03,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:36:03,976 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:36:03,977 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:36:03,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 08:36:13,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:36:13,302 INFO L256 TraceCheckSpWp]: Trace formula consists of 4818 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:36:13,310 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:36:13,357 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 217 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 08:36:13,358 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:36:13,358 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116803635] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:36:13,358 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:36:13,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-12-02 08:36:13,358 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146207525] [2024-12-02 08:36:13,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:36:13,359 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:36:13,359 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:36:13,359 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:36:13,359 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:36:13,359 INFO L87 Difference]: Start difference. First operand 49817 states and 60486 transitions. Second operand has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:36:14,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:36:14,145 INFO L93 Difference]: Finished difference Result 99149 states and 120295 transitions. [2024-12-02 08:36:14,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:36:14,146 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 782 [2024-12-02 08:36:14,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:36:14,185 INFO L225 Difference]: With dead ends: 99149 [2024-12-02 08:36:14,185 INFO L226 Difference]: Without dead ends: 49817 [2024-12-02 08:36:14,211 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 789 GetRequests, 780 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:36:14,211 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 0 mSDsluCounter, 4665 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5836 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:36:14,211 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5836 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:36:14,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49817 states. [2024-12-02 08:36:15,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49817 to 49817. [2024-12-02 08:36:15,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49817 states, 49441 states have (on average 1.2073380392791409) internal successors, (59692), 49441 states have internal predecessors, (59692), 374 states have call successors, (374), 1 states have call predecessors, (374), 1 states have return successors, (374), 374 states have call predecessors, (374), 374 states have call successors, (374) [2024-12-02 08:36:15,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49817 states to 49817 states and 60440 transitions. [2024-12-02 08:36:15,152 INFO L78 Accepts]: Start accepts. Automaton has 49817 states and 60440 transitions. Word has length 782 [2024-12-02 08:36:15,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:36:15,152 INFO L471 AbstractCegarLoop]: Abstraction has 49817 states and 60440 transitions. [2024-12-02 08:36:15,152 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 151.4) internal successors, (757), 6 states have internal predecessors, (757), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:36:15,152 INFO L276 IsEmpty]: Start isEmpty. Operand 49817 states and 60440 transitions. [2024-12-02 08:36:15,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 08:36:15,186 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:36:15,187 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:36:15,235 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-12-02 08:36:15,387 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable146 [2024-12-02 08:36:15,387 INFO L396 AbstractCegarLoop]: === Iteration 148 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:36:15,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:36:15,387 INFO L85 PathProgramCache]: Analyzing trace with hash -120512030, now seen corresponding path program 1 times [2024-12-02 08:36:15,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:36:15,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141331639] [2024-12-02 08:36:15,388 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:36:15,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:36:20,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:36:23,746 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:36:23,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:36:23,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141331639] [2024-12-02 08:36:23,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141331639] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:36:23,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1030444039] [2024-12-02 08:36:23,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:36:23,746 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:36:23,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:36:23,748 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:36:23,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 08:36:37,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:36:37,874 INFO L256 TraceCheckSpWp]: Trace formula consists of 4821 conjuncts, 71 conjuncts are in the unsatisfiable core [2024-12-02 08:36:37,885 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:36:41,949 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:36:41,949 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:36:52,601 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 8 proven. 147 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2024-12-02 08:36:52,601 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1030444039] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:36:52,601 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:36:52,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 16, 10] total 32 [2024-12-02 08:36:52,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782313451] [2024-12-02 08:36:52,602 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:36:52,603 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2024-12-02 08:36:52,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:36:52,604 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-12-02 08:36:52,604 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=872, Unknown=0, NotChecked=0, Total=992 [2024-12-02 08:36:52,604 INFO L87 Difference]: Start difference. First operand 49817 states and 60440 transitions. Second operand has 32 states, 32 states have (on average 65.6875) internal successors, (2102), 32 states have internal predecessors, (2102), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 08:36:56,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:36:56,141 INFO L93 Difference]: Finished difference Result 83068 states and 101802 transitions. [2024-12-02 08:36:56,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-12-02 08:36:56,141 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 65.6875) internal successors, (2102), 32 states have internal predecessors, (2102), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 783 [2024-12-02 08:36:56,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:36:56,180 INFO L225 Difference]: With dead ends: 83068 [2024-12-02 08:36:56,180 INFO L226 Difference]: Without dead ends: 55670 [2024-12-02 08:36:56,202 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1600 GetRequests, 1547 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 636 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=366, Invalid=2604, Unknown=0, NotChecked=0, Total=2970 [2024-12-02 08:36:56,203 INFO L435 NwaCegarLoop]: 1100 mSDtfsCounter, 2182 mSDsluCounter, 16021 mSDsCounter, 0 mSdLazyCounter, 5325 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2182 SdHoareTripleChecker+Valid, 17121 SdHoareTripleChecker+Invalid, 5333 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 5325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:36:56,203 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2182 Valid, 17121 Invalid, 5333 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 5325 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2024-12-02 08:36:56,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55670 states. [2024-12-02 08:36:57,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55670 to 49769. [2024-12-02 08:36:57,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49769 states, 49393 states have (on average 1.2065677322697548) internal successors, (59596), 49393 states have internal predecessors, (59596), 374 states have call successors, (374), 1 states have call predecessors, (374), 1 states have return successors, (374), 374 states have call predecessors, (374), 374 states have call successors, (374) [2024-12-02 08:36:57,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49769 states to 49769 states and 60344 transitions. [2024-12-02 08:36:57,188 INFO L78 Accepts]: Start accepts. Automaton has 49769 states and 60344 transitions. Word has length 783 [2024-12-02 08:36:57,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:36:57,189 INFO L471 AbstractCegarLoop]: Abstraction has 49769 states and 60344 transitions. [2024-12-02 08:36:57,189 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 65.6875) internal successors, (2102), 32 states have internal predecessors, (2102), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 08:36:57,189 INFO L276 IsEmpty]: Start isEmpty. Operand 49769 states and 60344 transitions. [2024-12-02 08:36:57,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 08:36:57,223 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:36:57,223 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:36:57,272 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-12-02 08:36:57,423 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable147 [2024-12-02 08:36:57,424 INFO L396 AbstractCegarLoop]: === Iteration 149 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:36:57,424 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:36:57,424 INFO L85 PathProgramCache]: Analyzing trace with hash 1442248545, now seen corresponding path program 1 times [2024-12-02 08:36:57,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:36:57,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174713748] [2024-12-02 08:36:57,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:36:57,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:37:08,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:37:08,637 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:37:20,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:37:21,339 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:37:21,339 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:37:21,340 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:37:21,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable148 [2024-12-02 08:37:21,345 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:37:21,850 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:37:21,853 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:37:21 BoogieIcfgContainer [2024-12-02 08:37:21,853 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:37:21,853 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:37:21,853 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:37:21,853 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:37:21,854 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:27:53" (3/4) ... [2024-12-02 08:37:21,856 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 08:37:21,857 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:37:21,858 INFO L158 Benchmark]: Toolchain (without parser) took 573388.92ms. Allocated memory was 117.4MB in the beginning and 3.5GB in the end (delta: 3.4GB). Free memory was 90.8MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: CDTParser took 0.35ms. Allocated memory is still 117.4MB. Free memory is still 72.8MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: CACSL2BoogieTranslator took 591.26ms. Allocated memory is still 117.4MB. Free memory was 90.8MB in the beginning and 38.0MB in the end (delta: 52.8MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: Boogie Procedure Inliner took 364.73ms. Allocated memory was 117.4MB in the beginning and 226.5MB in the end (delta: 109.1MB). Free memory was 38.0MB in the beginning and 160.9MB in the end (delta: -122.8MB). Peak memory consumption was 53.8MB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: Boogie Preprocessor took 329.05ms. Allocated memory is still 226.5MB. Free memory was 160.9MB in the beginning and 146.7MB in the end (delta: 14.2MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: RCFGBuilder took 3894.37ms. Allocated memory was 226.5MB in the beginning and 570.4MB in the end (delta: 343.9MB). Free memory was 146.7MB in the beginning and 224.4MB in the end (delta: -77.8MB). Peak memory consumption was 267.7MB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: TraceAbstraction took 568199.12ms. Allocated memory was 570.4MB in the beginning and 3.5GB in the end (delta: 2.9GB). Free memory was 221.0MB in the beginning and 2.3GB in the end (delta: -2.1GB). Peak memory consumption was 2.8GB. Max. memory is 16.1GB. [2024-12-02 08:37:21,858 INFO L158 Benchmark]: Witness Printer took 3.86ms. Allocated memory is still 3.5GB. Free memory was 2.3GB in the beginning and 2.3GB in the end (delta: 200.9kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:37:21,859 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35ms. Allocated memory is still 117.4MB. Free memory is still 72.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 591.26ms. Allocated memory is still 117.4MB. Free memory was 90.8MB in the beginning and 38.0MB in the end (delta: 52.8MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 364.73ms. Allocated memory was 117.4MB in the beginning and 226.5MB in the end (delta: 109.1MB). Free memory was 38.0MB in the beginning and 160.9MB in the end (delta: -122.8MB). Peak memory consumption was 53.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 329.05ms. Allocated memory is still 226.5MB. Free memory was 160.9MB in the beginning and 146.7MB in the end (delta: 14.2MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB. * RCFGBuilder took 3894.37ms. Allocated memory was 226.5MB in the beginning and 570.4MB in the end (delta: 343.9MB). Free memory was 146.7MB in the beginning and 224.4MB in the end (delta: -77.8MB). Peak memory consumption was 267.7MB. Max. memory is 16.1GB. * TraceAbstraction took 568199.12ms. Allocated memory was 570.4MB in the beginning and 3.5GB in the end (delta: 2.9GB). Free memory was 221.0MB in the beginning and 2.3GB in the end (delta: -2.1GB). Peak memory consumption was 2.8GB. Max. memory is 16.1GB. * Witness Printer took 3.86ms. Allocated memory is still 3.5GB. Free memory was 2.3GB in the beginning and 2.3GB in the end (delta: 200.9kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 199, overapproximation of bitwiseOr at line 584, overapproximation of bitwiseOr at line 180, overapproximation of bitwiseAnd at line 773, overapproximation of bitwiseAnd at line 288, overapproximation of bitwiseAnd at line 306, overapproximation of bitwiseAnd at line 426, overapproximation of bitwiseAnd at line 1265, overapproximation of bitwiseAnd at line 264, overapproximation of bitwiseAnd at line 390, overapproximation of bitwiseAnd at line 1039, overapproximation of bitwiseAnd at line 312, overapproximation of bitwiseAnd at line 1077, overapproximation of bitwiseAnd at line 372, overapproximation of bitwiseAnd at line 432, overapproximation of bitwiseAnd at line 982, overapproximation of bitwiseAnd at line 1020, overapproximation of bitwiseAnd at line 396, overapproximation of bitwiseAnd at line 354, overapproximation of bitwiseAnd at line 360, overapproximation of bitwiseAnd at line 330, overapproximation of bitwiseAnd at line 414, overapproximation of bitwiseAnd at line 402, overapproximation of bitwiseAnd at line 1134, overapproximation of bitwiseAnd at line 1153, overapproximation of bitwiseAnd at line 811, overapproximation of bitwiseAnd at line 336, overapproximation of bitwiseAnd at line 408, overapproximation of bitwiseAnd at line 300, overapproximation of bitwiseAnd at line 366, overapproximation of bitwiseAnd at line 420, overapproximation of bitwiseAnd at line 348, overapproximation of bitwiseAnd at line 678, overapproximation of bitwiseAnd at line 1191, overapproximation of bitwiseAnd at line 830, overapproximation of bitwiseAnd at line 754, overapproximation of bitwiseAnd at line 887, overapproximation of bitwiseAnd at line 378, overapproximation of bitwiseAnd at line 735, overapproximation of bitwiseAnd at line 906, overapproximation of bitwiseAnd at line 318, overapproximation of bitwiseAnd at line 716, overapproximation of bitwiseAnd at line 697, overapproximation of bitwiseAnd at line 276, overapproximation of bitwiseAnd at line 849, overapproximation of bitwiseAnd at line 925, overapproximation of bitwiseAnd at line 593, overapproximation of bitwiseAnd at line 1001, overapproximation of bitwiseAnd at line 963, overapproximation of bitwiseAnd at line 868, overapproximation of bitwiseAnd at line 1115, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 324, overapproximation of bitwiseAnd at line 1058, overapproximation of bitwiseAnd at line 792, overapproximation of bitwiseAnd at line 160, overapproximation of bitwiseAnd at line 282, overapproximation of bitwiseAnd at line 659, overapproximation of bitwiseAnd at line 256, overapproximation of bitwiseAnd at line 164. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L41] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L42] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L44] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L45] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L47] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L48] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L50] const SORT_13 var_15 = 32; [L51] const SORT_19 var_20 = 31; [L52] const SORT_19 var_25 = 30; [L53] const SORT_19 var_30 = 29; [L54] const SORT_19 var_35 = 28; [L55] const SORT_19 var_40 = 27; [L56] const SORT_19 var_45 = 26; [L57] const SORT_19 var_50 = 25; [L58] const SORT_19 var_55 = 24; [L59] const SORT_19 var_60 = 23; [L60] const SORT_19 var_65 = 22; [L61] const SORT_19 var_70 = 21; [L62] const SORT_19 var_75 = 20; [L63] const SORT_19 var_80 = 19; [L64] const SORT_19 var_85 = 18; [L65] const SORT_19 var_90 = 17; [L66] const SORT_19 var_95 = 16; [L67] const SORT_100 var_101 = 15; [L68] const SORT_100 var_106 = 14; [L69] const SORT_100 var_111 = 13; [L70] const SORT_100 var_116 = 12; [L71] const SORT_100 var_121 = 11; [L72] const SORT_100 var_126 = 10; [L73] const SORT_100 var_131 = 9; [L74] const SORT_100 var_136 = 8; [L75] const SORT_141 var_142 = 7; [L76] const SORT_141 var_147 = 6; [L77] const SORT_141 var_152 = 5; [L78] const SORT_141 var_157 = 4; [L79] const SORT_162 var_163 = 3; [L80] const SORT_162 var_168 = 2; [L81] const SORT_1 var_173 = 1; [L82] const SORT_13 var_186 = 33; [L83] const SORT_11 var_203 = 0; [L84] const SORT_1 var_233 = 0; [L85] const SORT_3 var_582 = 0; [L87] SORT_1 input_2; [L88] SORT_3 input_4; [L89] SORT_1 input_5; [L90] SORT_1 input_6; [L91] SORT_1 input_7; [L92] SORT_1 input_8; [L93] SORT_3 input_9; [L94] SORT_1 input_231; [L96] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L96] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L97] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L98] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L98] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3; [L99] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L99] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L100] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L101] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L102] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L103] SORT_3 state_44 = __VERIFIER_nondet_uint() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L104] SORT_3 state_49 = __VERIFIER_nondet_uint() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L105] SORT_3 state_54 = __VERIFIER_nondet_uint() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L106] SORT_3 state_59 = __VERIFIER_nondet_uint() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L107] SORT_3 state_64 = __VERIFIER_nondet_uint() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L108] SORT_3 state_69 = __VERIFIER_nondet_uint() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L109] SORT_3 state_74 = __VERIFIER_nondet_uint() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L110] SORT_3 state_79 = __VERIFIER_nondet_uint() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L111] SORT_3 state_84 = __VERIFIER_nondet_uint() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L112] SORT_3 state_89 = __VERIFIER_nondet_uint() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L113] SORT_3 state_94 = __VERIFIER_nondet_uint() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L114] SORT_3 state_99 = __VERIFIER_nondet_uint() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L115] SORT_3 state_105 = __VERIFIER_nondet_uint() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L116] SORT_3 state_110 = __VERIFIER_nondet_uint() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L117] SORT_3 state_115 = __VERIFIER_nondet_uint() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L118] SORT_3 state_120 = __VERIFIER_nondet_uint() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L119] SORT_3 state_125 = __VERIFIER_nondet_uint() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L120] SORT_3 state_130 = __VERIFIER_nondet_uint() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L121] SORT_3 state_135 = __VERIFIER_nondet_uint() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L122] SORT_3 state_140 = __VERIFIER_nondet_uint() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L123] SORT_3 state_146 = __VERIFIER_nondet_uint() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L124] SORT_3 state_151 = __VERIFIER_nondet_uint() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L125] SORT_3 state_156 = __VERIFIER_nondet_uint() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L126] SORT_3 state_161 = __VERIFIER_nondet_uint() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L127] SORT_3 state_167 = __VERIFIER_nondet_uint() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L128] SORT_3 state_172 = __VERIFIER_nondet_uint() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L129] SORT_3 state_177 = __VERIFIER_nondet_uint() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L130] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L131] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L132] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L133] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L134] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L134] SORT_3 state_209 = __VERIFIER_nondet_uint() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L135] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L136] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L138] SORT_1 init_214_arg_1 = var_173; [L139] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_uint() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uint() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=255, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=256, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=4294967295, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=0, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=0, var_236_arg_1=-256, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND FALSE !(!(cond)) [L596] RET __VERIFIER_assert(!(bad_237_arg_0)) [L598] SORT_11 var_283_arg_0 = state_282; [L599] SORT_13 var_283 = var_283_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] EXPR var_283 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] var_283 = var_283 & mask_SORT_13 [L601] SORT_13 var_459_arg_0 = var_283; [L602] SORT_13 var_459_arg_1 = var_15; [L603] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L604] SORT_1 var_460_arg_0 = input_6; [L605] SORT_1 var_460_arg_1 = var_459; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_460_arg_0=0, var_460_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] EXPR var_460_arg_0 & var_460_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L607] EXPR var_460 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] var_460 = var_460 & mask_SORT_1 [L608] SORT_1 var_581_arg_0 = var_460; [L609] SORT_3 var_581_arg_1 = input_4; [L610] SORT_3 var_581_arg_2 = state_10; [L611] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L612] SORT_1 var_583_arg_0 = input_7; [L613] SORT_3 var_583_arg_1 = var_582; [L614] SORT_3 var_583_arg_2 = var_581; [L615] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L616] SORT_3 next_584_arg_1 = var_583; [L617] SORT_1 var_241_arg_0 = input_6; [L618] SORT_1 var_241_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_241_arg_0=0, var_241_arg_1=256, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] EXPR var_241_arg_0 | var_241_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L620] SORT_1 var_242_arg_0 = var_241; [L621] SORT_1 var_242_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242_arg_0=0, var_242_arg_1=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] EXPR var_242_arg_0 | var_242_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L623] EXPR var_242 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] var_242 = var_242 & mask_SORT_1 [L624] SORT_1 var_512_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_512_arg_0=256, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] EXPR var_512_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L626] SORT_11 var_512 = var_512_arg_0; [L627] SORT_11 var_513_arg_0 = state_12; [L628] SORT_11 var_513_arg_1 = var_512; [L629] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L630] SORT_1 var_585_arg_0 = var_242; [L631] SORT_11 var_585_arg_1 = var_513; [L632] SORT_11 var_585_arg_2 = state_12; [L633] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L634] SORT_1 var_586_arg_0 = input_7; [L635] SORT_11 var_586_arg_1 = var_203; [L636] SORT_11 var_586_arg_2 = var_585; [L637] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L638] SORT_11 next_587_arg_1 = var_586; [L639] SORT_19 var_452_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_452_arg_0=31, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] EXPR var_452_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L641] SORT_13 var_452 = var_452_arg_0; [L642] SORT_13 var_453_arg_0 = var_283; [L643] SORT_13 var_453_arg_1 = var_452; [L644] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L645] SORT_1 var_454_arg_0 = input_6; [L646] SORT_1 var_454_arg_1 = var_453; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_454_arg_0=0, var_454_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] EXPR var_454_arg_0 & var_454_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L648] EXPR var_454 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] var_454 = var_454 & mask_SORT_1 [L649] SORT_1 var_588_arg_0 = var_454; [L650] SORT_3 var_588_arg_1 = input_4; [L651] SORT_3 var_588_arg_2 = state_18; [L652] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L653] SORT_1 var_589_arg_0 = input_7; [L654] SORT_3 var_589_arg_1 = var_582; [L655] SORT_3 var_589_arg_2 = var_588; [L656] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L657] SORT_3 next_590_arg_1 = var_589; [L658] SORT_19 var_445_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_445_arg_0=30, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] EXPR var_445_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L660] SORT_13 var_445 = var_445_arg_0; [L661] SORT_13 var_446_arg_0 = var_283; [L662] SORT_13 var_446_arg_1 = var_445; [L663] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L664] SORT_1 var_447_arg_0 = input_6; [L665] SORT_1 var_447_arg_1 = var_446; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_447_arg_0=0, var_447_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] EXPR var_447_arg_0 & var_447_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L667] EXPR var_447 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] var_447 = var_447 & mask_SORT_1 [L668] SORT_1 var_591_arg_0 = var_447; [L669] SORT_3 var_591_arg_1 = input_4; [L670] SORT_3 var_591_arg_2 = state_24; [L671] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L672] SORT_1 var_592_arg_0 = input_7; [L673] SORT_3 var_592_arg_1 = var_582; [L674] SORT_3 var_592_arg_2 = var_591; [L675] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L676] SORT_3 next_593_arg_1 = var_592; [L677] SORT_19 var_431_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_431_arg_0=29, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] EXPR var_431_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L679] SORT_13 var_431 = var_431_arg_0; [L680] SORT_13 var_432_arg_0 = var_283; [L681] SORT_13 var_432_arg_1 = var_431; [L682] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L683] SORT_1 var_433_arg_0 = input_6; [L684] SORT_1 var_433_arg_1 = var_432; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_433_arg_0=0, var_433_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] EXPR var_433_arg_0 & var_433_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L686] EXPR var_433 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] var_433 = var_433 & mask_SORT_1 [L687] SORT_1 var_594_arg_0 = var_433; [L688] SORT_3 var_594_arg_1 = input_4; [L689] SORT_3 var_594_arg_2 = state_29; [L690] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L691] SORT_1 var_595_arg_0 = input_7; [L692] SORT_3 var_595_arg_1 = var_582; [L693] SORT_3 var_595_arg_2 = var_594; [L694] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L695] SORT_3 next_596_arg_1 = var_595; [L696] SORT_19 var_424_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_424_arg_0=28, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] EXPR var_424_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L698] SORT_13 var_424 = var_424_arg_0; [L699] SORT_13 var_425_arg_0 = var_283; [L700] SORT_13 var_425_arg_1 = var_424; [L701] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L702] SORT_1 var_426_arg_0 = input_6; [L703] SORT_1 var_426_arg_1 = var_425; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_426_arg_0=0, var_426_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] EXPR var_426_arg_0 & var_426_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L705] EXPR var_426 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] var_426 = var_426 & mask_SORT_1 [L706] SORT_1 var_597_arg_0 = var_426; [L707] SORT_3 var_597_arg_1 = input_4; [L708] SORT_3 var_597_arg_2 = state_34; [L709] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L710] SORT_1 var_598_arg_0 = input_7; [L711] SORT_3 var_598_arg_1 = var_582; [L712] SORT_3 var_598_arg_2 = var_597; [L713] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L714] SORT_3 next_599_arg_1 = var_598; [L715] SORT_19 var_417_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_417_arg_0=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] EXPR var_417_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L717] SORT_13 var_417 = var_417_arg_0; [L718] SORT_13 var_418_arg_0 = var_283; [L719] SORT_13 var_418_arg_1 = var_417; [L720] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L721] SORT_1 var_419_arg_0 = input_6; [L722] SORT_1 var_419_arg_1 = var_418; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_419_arg_0=0, var_419_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] EXPR var_419_arg_0 & var_419_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L724] EXPR var_419 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] var_419 = var_419 & mask_SORT_1 [L725] SORT_1 var_600_arg_0 = var_419; [L726] SORT_3 var_600_arg_1 = input_4; [L727] SORT_3 var_600_arg_2 = state_39; [L728] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L729] SORT_1 var_601_arg_0 = input_7; [L730] SORT_3 var_601_arg_1 = var_582; [L731] SORT_3 var_601_arg_2 = var_600; [L732] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L733] SORT_3 next_602_arg_1 = var_601; [L734] SORT_19 var_410_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_410_arg_0=26, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] EXPR var_410_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L736] SORT_13 var_410 = var_410_arg_0; [L737] SORT_13 var_411_arg_0 = var_283; [L738] SORT_13 var_411_arg_1 = var_410; [L739] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L740] SORT_1 var_412_arg_0 = input_6; [L741] SORT_1 var_412_arg_1 = var_411; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_412_arg_0=0, var_412_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] EXPR var_412_arg_0 & var_412_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L743] EXPR var_412 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] var_412 = var_412 & mask_SORT_1 [L744] SORT_1 var_603_arg_0 = var_412; [L745] SORT_3 var_603_arg_1 = input_4; [L746] SORT_3 var_603_arg_2 = state_44; [L747] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L748] SORT_1 var_604_arg_0 = input_7; [L749] SORT_3 var_604_arg_1 = var_582; [L750] SORT_3 var_604_arg_2 = var_603; [L751] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L752] SORT_3 next_605_arg_1 = var_604; [L753] SORT_19 var_403_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_403_arg_0=25, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] EXPR var_403_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L755] SORT_13 var_403 = var_403_arg_0; [L756] SORT_13 var_404_arg_0 = var_283; [L757] SORT_13 var_404_arg_1 = var_403; [L758] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L759] SORT_1 var_405_arg_0 = input_6; [L760] SORT_1 var_405_arg_1 = var_404; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_405_arg_0=0, var_405_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] EXPR var_405_arg_0 & var_405_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L762] EXPR var_405 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] var_405 = var_405 & mask_SORT_1 [L763] SORT_1 var_606_arg_0 = var_405; [L764] SORT_3 var_606_arg_1 = input_4; [L765] SORT_3 var_606_arg_2 = state_49; [L766] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L767] SORT_1 var_607_arg_0 = input_7; [L768] SORT_3 var_607_arg_1 = var_582; [L769] SORT_3 var_607_arg_2 = var_606; [L770] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L771] SORT_3 next_608_arg_1 = var_607; [L772] SORT_19 var_396_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_396_arg_0=24, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] EXPR var_396_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L774] SORT_13 var_396 = var_396_arg_0; [L775] SORT_13 var_397_arg_0 = var_283; [L776] SORT_13 var_397_arg_1 = var_396; [L777] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L778] SORT_1 var_398_arg_0 = input_6; [L779] SORT_1 var_398_arg_1 = var_397; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_398_arg_0=0, var_398_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] EXPR var_398_arg_0 & var_398_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L781] EXPR var_398 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] var_398 = var_398 & mask_SORT_1 [L782] SORT_1 var_609_arg_0 = var_398; [L783] SORT_3 var_609_arg_1 = input_4; [L784] SORT_3 var_609_arg_2 = state_54; [L785] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L786] SORT_1 var_610_arg_0 = input_7; [L787] SORT_3 var_610_arg_1 = var_582; [L788] SORT_3 var_610_arg_2 = var_609; [L789] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L790] SORT_3 next_611_arg_1 = var_610; [L791] SORT_19 var_389_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_389_arg_0=23, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] EXPR var_389_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L793] SORT_13 var_389 = var_389_arg_0; [L794] SORT_13 var_390_arg_0 = var_283; [L795] SORT_13 var_390_arg_1 = var_389; [L796] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L797] SORT_1 var_391_arg_0 = input_6; [L798] SORT_1 var_391_arg_1 = var_390; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_391_arg_0=0, var_391_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] EXPR var_391_arg_0 & var_391_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L800] EXPR var_391 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] var_391 = var_391 & mask_SORT_1 [L801] SORT_1 var_612_arg_0 = var_391; [L802] SORT_3 var_612_arg_1 = input_4; [L803] SORT_3 var_612_arg_2 = state_59; [L804] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L805] SORT_1 var_613_arg_0 = input_7; [L806] SORT_3 var_613_arg_1 = var_582; [L807] SORT_3 var_613_arg_2 = var_612; [L808] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L809] SORT_3 next_614_arg_1 = var_613; [L810] SORT_19 var_382_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_382_arg_0=22, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] EXPR var_382_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L812] SORT_13 var_382 = var_382_arg_0; [L813] SORT_13 var_383_arg_0 = var_283; [L814] SORT_13 var_383_arg_1 = var_382; [L815] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L816] SORT_1 var_384_arg_0 = input_6; [L817] SORT_1 var_384_arg_1 = var_383; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_384_arg_0=0, var_384_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] EXPR var_384_arg_0 & var_384_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L819] EXPR var_384 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] var_384 = var_384 & mask_SORT_1 [L820] SORT_1 var_615_arg_0 = var_384; [L821] SORT_3 var_615_arg_1 = input_4; [L822] SORT_3 var_615_arg_2 = state_64; [L823] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L824] SORT_1 var_616_arg_0 = input_7; [L825] SORT_3 var_616_arg_1 = var_582; [L826] SORT_3 var_616_arg_2 = var_615; [L827] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L828] SORT_3 next_617_arg_1 = var_616; [L829] SORT_19 var_375_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_375_arg_0=21, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] EXPR var_375_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L831] SORT_13 var_375 = var_375_arg_0; [L832] SORT_13 var_376_arg_0 = var_283; [L833] SORT_13 var_376_arg_1 = var_375; [L834] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L835] SORT_1 var_377_arg_0 = input_6; [L836] SORT_1 var_377_arg_1 = var_376; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_377_arg_0=0, var_377_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] EXPR var_377_arg_0 & var_377_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L838] EXPR var_377 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] var_377 = var_377 & mask_SORT_1 [L839] SORT_1 var_618_arg_0 = var_377; [L840] SORT_3 var_618_arg_1 = input_4; [L841] SORT_3 var_618_arg_2 = state_69; [L842] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L843] SORT_1 var_619_arg_0 = input_7; [L844] SORT_3 var_619_arg_1 = var_582; [L845] SORT_3 var_619_arg_2 = var_618; [L846] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L847] SORT_3 next_620_arg_1 = var_619; [L848] SORT_19 var_368_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_368_arg_0=20, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] EXPR var_368_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L850] SORT_13 var_368 = var_368_arg_0; [L851] SORT_13 var_369_arg_0 = var_283; [L852] SORT_13 var_369_arg_1 = var_368; [L853] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L854] SORT_1 var_370_arg_0 = input_6; [L855] SORT_1 var_370_arg_1 = var_369; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_370_arg_0=0, var_370_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] EXPR var_370_arg_0 & var_370_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L857] EXPR var_370 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] var_370 = var_370 & mask_SORT_1 [L858] SORT_1 var_621_arg_0 = var_370; [L859] SORT_3 var_621_arg_1 = input_4; [L860] SORT_3 var_621_arg_2 = state_74; [L861] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L862] SORT_1 var_622_arg_0 = input_7; [L863] SORT_3 var_622_arg_1 = var_582; [L864] SORT_3 var_622_arg_2 = var_621; [L865] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L866] SORT_3 next_623_arg_1 = var_622; [L867] SORT_19 var_354_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_354_arg_0=19, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] EXPR var_354_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L869] SORT_13 var_354 = var_354_arg_0; [L870] SORT_13 var_355_arg_0 = var_283; [L871] SORT_13 var_355_arg_1 = var_354; [L872] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L873] SORT_1 var_356_arg_0 = input_6; [L874] SORT_1 var_356_arg_1 = var_355; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_356_arg_0=0, var_356_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] EXPR var_356_arg_0 & var_356_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L876] EXPR var_356 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] var_356 = var_356 & mask_SORT_1 [L877] SORT_1 var_624_arg_0 = var_356; [L878] SORT_3 var_624_arg_1 = input_4; [L879] SORT_3 var_624_arg_2 = state_79; [L880] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L881] SORT_1 var_625_arg_0 = input_7; [L882] SORT_3 var_625_arg_1 = var_582; [L883] SORT_3 var_625_arg_2 = var_624; [L884] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L885] SORT_3 next_626_arg_1 = var_625; [L886] SORT_19 var_347_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_347_arg_0=18, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] EXPR var_347_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L888] SORT_13 var_347 = var_347_arg_0; [L889] SORT_13 var_348_arg_0 = var_283; [L890] SORT_13 var_348_arg_1 = var_347; [L891] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L892] SORT_1 var_349_arg_0 = input_6; [L893] SORT_1 var_349_arg_1 = var_348; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_349_arg_0=0, var_349_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] EXPR var_349_arg_0 & var_349_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L895] EXPR var_349 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] var_349 = var_349 & mask_SORT_1 [L896] SORT_1 var_627_arg_0 = var_349; [L897] SORT_3 var_627_arg_1 = input_4; [L898] SORT_3 var_627_arg_2 = state_84; [L899] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L900] SORT_1 var_628_arg_0 = input_7; [L901] SORT_3 var_628_arg_1 = var_582; [L902] SORT_3 var_628_arg_2 = var_627; [L903] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L904] SORT_3 next_629_arg_1 = var_628; [L905] SORT_19 var_340_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_340_arg_0=17, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] EXPR var_340_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L907] SORT_13 var_340 = var_340_arg_0; [L908] SORT_13 var_341_arg_0 = var_283; [L909] SORT_13 var_341_arg_1 = var_340; [L910] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L911] SORT_1 var_342_arg_0 = input_6; [L912] SORT_1 var_342_arg_1 = var_341; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_342_arg_0=0, var_342_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] EXPR var_342_arg_0 & var_342_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L914] EXPR var_342 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] var_342 = var_342 & mask_SORT_1 [L915] SORT_1 var_630_arg_0 = var_342; [L916] SORT_3 var_630_arg_1 = input_4; [L917] SORT_3 var_630_arg_2 = state_89; [L918] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L919] SORT_1 var_631_arg_0 = input_7; [L920] SORT_3 var_631_arg_1 = var_582; [L921] SORT_3 var_631_arg_2 = var_630; [L922] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L923] SORT_3 next_632_arg_1 = var_631; [L924] SORT_19 var_333_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_333_arg_0=16, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] EXPR var_333_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L926] SORT_13 var_333 = var_333_arg_0; [L927] SORT_13 var_334_arg_0 = var_283; [L928] SORT_13 var_334_arg_1 = var_333; [L929] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L930] SORT_1 var_335_arg_0 = input_6; [L931] SORT_1 var_335_arg_1 = var_334; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_335_arg_0=0, var_335_arg_1=1, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] EXPR var_335_arg_0 & var_335_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L933] EXPR var_335 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] var_335 = var_335 & mask_SORT_1 [L934] SORT_1 var_633_arg_0 = var_335; [L935] SORT_3 var_633_arg_1 = input_4; [L936] SORT_3 var_633_arg_2 = state_94; [L937] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L938] SORT_1 var_634_arg_0 = input_7; [L939] SORT_3 var_634_arg_1 = var_582; [L940] SORT_3 var_634_arg_2 = var_633; [L941] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L942] SORT_3 next_635_arg_1 = var_634; [L943] SORT_100 var_326_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_326_arg_0=15, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] EXPR var_326_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L945] SORT_13 var_326 = var_326_arg_0; [L946] SORT_13 var_327_arg_0 = var_283; [L947] SORT_13 var_327_arg_1 = var_326; [L948] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L949] SORT_1 var_328_arg_0 = input_6; [L950] SORT_1 var_328_arg_1 = var_327; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_328_arg_0=0, var_328_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] EXPR var_328_arg_0 & var_328_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L952] EXPR var_328 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] var_328 = var_328 & mask_SORT_1 [L953] SORT_1 var_636_arg_0 = var_328; [L954] SORT_3 var_636_arg_1 = input_4; [L955] SORT_3 var_636_arg_2 = state_99; [L956] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L957] SORT_1 var_637_arg_0 = input_7; [L958] SORT_3 var_637_arg_1 = var_582; [L959] SORT_3 var_637_arg_2 = var_636; [L960] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L961] SORT_3 next_638_arg_1 = var_637; [L962] SORT_100 var_319_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_319_arg_0=14, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] EXPR var_319_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L964] SORT_13 var_319 = var_319_arg_0; [L965] SORT_13 var_320_arg_0 = var_283; [L966] SORT_13 var_320_arg_1 = var_319; [L967] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L968] SORT_1 var_321_arg_0 = input_6; [L969] SORT_1 var_321_arg_1 = var_320; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_321_arg_0=0, var_321_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] EXPR var_321_arg_0 & var_321_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L971] EXPR var_321 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] var_321 = var_321 & mask_SORT_1 [L972] SORT_1 var_639_arg_0 = var_321; [L973] SORT_3 var_639_arg_1 = input_4; [L974] SORT_3 var_639_arg_2 = state_105; [L975] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L976] SORT_1 var_640_arg_0 = input_7; [L977] SORT_3 var_640_arg_1 = var_582; [L978] SORT_3 var_640_arg_2 = var_639; [L979] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L980] SORT_3 next_641_arg_1 = var_640; [L981] SORT_100 var_312_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_312_arg_0=13, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] EXPR var_312_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L983] SORT_13 var_312 = var_312_arg_0; [L984] SORT_13 var_313_arg_0 = var_283; [L985] SORT_13 var_313_arg_1 = var_312; [L986] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L987] SORT_1 var_314_arg_0 = input_6; [L988] SORT_1 var_314_arg_1 = var_313; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_314_arg_0=0, var_314_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] EXPR var_314_arg_0 & var_314_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L990] EXPR var_314 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] var_314 = var_314 & mask_SORT_1 [L991] SORT_1 var_642_arg_0 = var_314; [L992] SORT_3 var_642_arg_1 = input_4; [L993] SORT_3 var_642_arg_2 = state_110; [L994] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L995] SORT_1 var_643_arg_0 = input_7; [L996] SORT_3 var_643_arg_1 = var_582; [L997] SORT_3 var_643_arg_2 = var_642; [L998] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L999] SORT_3 next_644_arg_1 = var_643; [L1000] SORT_100 var_305_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_305_arg_0=12, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] EXPR var_305_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1002] SORT_13 var_305 = var_305_arg_0; [L1003] SORT_13 var_306_arg_0 = var_283; [L1004] SORT_13 var_306_arg_1 = var_305; [L1005] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1006] SORT_1 var_307_arg_0 = input_6; [L1007] SORT_1 var_307_arg_1 = var_306; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_307_arg_0=0, var_307_arg_1=1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] EXPR var_307_arg_0 & var_307_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1009] EXPR var_307 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] var_307 = var_307 & mask_SORT_1 [L1010] SORT_1 var_645_arg_0 = var_307; [L1011] SORT_3 var_645_arg_1 = input_4; [L1012] SORT_3 var_645_arg_2 = state_115; [L1013] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1014] SORT_1 var_646_arg_0 = input_7; [L1015] SORT_3 var_646_arg_1 = var_582; [L1016] SORT_3 var_646_arg_2 = var_645; [L1017] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1018] SORT_3 next_647_arg_1 = var_646; [L1019] SORT_100 var_298_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_298_arg_0=11, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] EXPR var_298_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1021] SORT_13 var_298 = var_298_arg_0; [L1022] SORT_13 var_299_arg_0 = var_283; [L1023] SORT_13 var_299_arg_1 = var_298; [L1024] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1025] SORT_1 var_300_arg_0 = input_6; [L1026] SORT_1 var_300_arg_1 = var_299; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_300_arg_0=0, var_300_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1028] EXPR var_300 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] var_300 = var_300 & mask_SORT_1 [L1029] SORT_1 var_648_arg_0 = var_300; [L1030] SORT_3 var_648_arg_1 = input_4; [L1031] SORT_3 var_648_arg_2 = state_120; [L1032] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1033] SORT_1 var_649_arg_0 = input_7; [L1034] SORT_3 var_649_arg_1 = var_582; [L1035] SORT_3 var_649_arg_2 = var_648; [L1036] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1037] SORT_3 next_650_arg_1 = var_649; [L1038] SORT_100 var_291_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_291_arg_0=10, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] EXPR var_291_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1040] SORT_13 var_291 = var_291_arg_0; [L1041] SORT_13 var_292_arg_0 = var_283; [L1042] SORT_13 var_292_arg_1 = var_291; [L1043] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1044] SORT_1 var_293_arg_0 = input_6; [L1045] SORT_1 var_293_arg_1 = var_292; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_293_arg_0=0, var_293_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1047] EXPR var_293 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] var_293 = var_293 & mask_SORT_1 [L1048] SORT_1 var_651_arg_0 = var_293; [L1049] SORT_3 var_651_arg_1 = input_4; [L1050] SORT_3 var_651_arg_2 = state_125; [L1051] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1052] SORT_1 var_652_arg_0 = input_7; [L1053] SORT_3 var_652_arg_1 = var_582; [L1054] SORT_3 var_652_arg_2 = var_651; [L1055] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1056] SORT_3 next_653_arg_1 = var_652; [L1057] SORT_100 var_507_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_507_arg_0=9, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] EXPR var_507_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1059] SORT_13 var_507 = var_507_arg_0; [L1060] SORT_13 var_508_arg_0 = var_283; [L1061] SORT_13 var_508_arg_1 = var_507; [L1062] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1063] SORT_1 var_509_arg_0 = input_6; [L1064] SORT_1 var_509_arg_1 = var_508; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_509_arg_0=0, var_509_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] EXPR var_509_arg_0 & var_509_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1066] EXPR var_509 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] var_509 = var_509 & mask_SORT_1 [L1067] SORT_1 var_654_arg_0 = var_509; [L1068] SORT_3 var_654_arg_1 = input_4; [L1069] SORT_3 var_654_arg_2 = state_130; [L1070] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1071] SORT_1 var_655_arg_0 = input_7; [L1072] SORT_3 var_655_arg_1 = var_582; [L1073] SORT_3 var_655_arg_2 = var_654; [L1074] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1075] SORT_3 next_656_arg_1 = var_655; [L1076] SORT_100 var_500_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_500_arg_0=8, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] EXPR var_500_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1078] SORT_13 var_500 = var_500_arg_0; [L1079] SORT_13 var_501_arg_0 = var_283; [L1080] SORT_13 var_501_arg_1 = var_500; [L1081] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1082] SORT_1 var_502_arg_0 = input_6; [L1083] SORT_1 var_502_arg_1 = var_501; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_502_arg_0=0, var_502_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] EXPR var_502_arg_0 & var_502_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1085] EXPR var_502 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] var_502 = var_502 & mask_SORT_1 [L1086] SORT_1 var_657_arg_0 = var_502; [L1087] SORT_3 var_657_arg_1 = input_4; [L1088] SORT_3 var_657_arg_2 = state_135; [L1089] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1090] SORT_1 var_658_arg_0 = input_7; [L1091] SORT_3 var_658_arg_1 = var_582; [L1092] SORT_3 var_658_arg_2 = var_657; [L1093] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1094] SORT_3 next_659_arg_1 = var_658; [L1095] SORT_141 var_493_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_493_arg_0=7, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] EXPR var_493_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1097] SORT_13 var_493 = var_493_arg_0; [L1098] SORT_13 var_494_arg_0 = var_283; [L1099] SORT_13 var_494_arg_1 = var_493; [L1100] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1101] SORT_1 var_495_arg_0 = input_6; [L1102] SORT_1 var_495_arg_1 = var_494; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_495_arg_0=0, var_495_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] EXPR var_495_arg_0 & var_495_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1104] EXPR var_495 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] var_495 = var_495 & mask_SORT_1 [L1105] SORT_1 var_660_arg_0 = var_495; [L1106] SORT_3 var_660_arg_1 = input_4; [L1107] SORT_3 var_660_arg_2 = state_140; [L1108] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1109] SORT_1 var_661_arg_0 = input_7; [L1110] SORT_3 var_661_arg_1 = var_582; [L1111] SORT_3 var_661_arg_2 = var_660; [L1112] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1113] SORT_3 next_662_arg_1 = var_661; [L1114] SORT_141 var_486_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_486_arg_0=6, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] EXPR var_486_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1116] SORT_13 var_486 = var_486_arg_0; [L1117] SORT_13 var_487_arg_0 = var_283; [L1118] SORT_13 var_487_arg_1 = var_486; [L1119] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1120] SORT_1 var_488_arg_0 = input_6; [L1121] SORT_1 var_488_arg_1 = var_487; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_488_arg_0=0, var_488_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] EXPR var_488_arg_0 & var_488_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1123] EXPR var_488 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] var_488 = var_488 & mask_SORT_1 [L1124] SORT_1 var_663_arg_0 = var_488; [L1125] SORT_3 var_663_arg_1 = input_4; [L1126] SORT_3 var_663_arg_2 = state_146; [L1127] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1128] SORT_1 var_664_arg_0 = input_7; [L1129] SORT_3 var_664_arg_1 = var_582; [L1130] SORT_3 var_664_arg_2 = var_663; [L1131] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1132] SORT_3 next_665_arg_1 = var_664; [L1133] SORT_141 var_479_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_479_arg_0=5, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] EXPR var_479_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1135] SORT_13 var_479 = var_479_arg_0; [L1136] SORT_13 var_480_arg_0 = var_283; [L1137] SORT_13 var_480_arg_1 = var_479; [L1138] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1139] SORT_1 var_481_arg_0 = input_6; [L1140] SORT_1 var_481_arg_1 = var_480; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_481_arg_0=0, var_481_arg_1=1, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] EXPR var_481_arg_0 & var_481_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1142] EXPR var_481 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] var_481 = var_481 & mask_SORT_1 [L1143] SORT_1 var_666_arg_0 = var_481; [L1144] SORT_3 var_666_arg_1 = input_4; [L1145] SORT_3 var_666_arg_2 = state_151; [L1146] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1147] SORT_1 var_667_arg_0 = input_7; [L1148] SORT_3 var_667_arg_1 = var_582; [L1149] SORT_3 var_667_arg_2 = var_666; [L1150] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1151] SORT_3 next_668_arg_1 = var_667; [L1152] SORT_141 var_472_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_472_arg_0=4, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] EXPR var_472_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1154] SORT_13 var_472 = var_472_arg_0; [L1155] SORT_13 var_473_arg_0 = var_283; [L1156] SORT_13 var_473_arg_1 = var_472; [L1157] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1158] SORT_1 var_474_arg_0 = input_6; [L1159] SORT_1 var_474_arg_1 = var_473; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_474_arg_0=0, var_474_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] EXPR var_474_arg_0 & var_474_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1161] EXPR var_474 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] var_474 = var_474 & mask_SORT_1 [L1162] SORT_1 var_669_arg_0 = var_474; [L1163] SORT_3 var_669_arg_1 = input_4; [L1164] SORT_3 var_669_arg_2 = state_156; [L1165] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1166] SORT_1 var_670_arg_0 = input_7; [L1167] SORT_3 var_670_arg_1 = var_582; [L1168] SORT_3 var_670_arg_2 = var_669; [L1169] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1170] SORT_3 next_671_arg_1 = var_670; [L1171] SORT_162 var_465_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_465_arg_0=3, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] EXPR var_465_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1173] SORT_13 var_465 = var_465_arg_0; [L1174] SORT_13 var_466_arg_0 = var_283; [L1175] SORT_13 var_466_arg_1 = var_465; [L1176] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1177] SORT_1 var_467_arg_0 = input_6; [L1178] SORT_1 var_467_arg_1 = var_466; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_467_arg_0=0, var_467_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] EXPR var_467_arg_0 & var_467_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1180] EXPR var_467 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] var_467 = var_467 & mask_SORT_1 [L1181] SORT_1 var_672_arg_0 = var_467; [L1182] SORT_3 var_672_arg_1 = input_4; [L1183] SORT_3 var_672_arg_2 = state_161; [L1184] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1185] SORT_1 var_673_arg_0 = input_7; [L1186] SORT_3 var_673_arg_1 = var_582; [L1187] SORT_3 var_673_arg_2 = var_672; [L1188] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1189] SORT_3 next_674_arg_1 = var_673; [L1190] SORT_162 var_438_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_438_arg_0=2, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] EXPR var_438_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1192] SORT_13 var_438 = var_438_arg_0; [L1193] SORT_13 var_439_arg_0 = var_283; [L1194] SORT_13 var_439_arg_1 = var_438; [L1195] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1196] SORT_1 var_440_arg_0 = input_6; [L1197] SORT_1 var_440_arg_1 = var_439; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_440_arg_0=0, var_440_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] EXPR var_440_arg_0 & var_440_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1199] EXPR var_440 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] var_440 = var_440 & mask_SORT_1 [L1200] SORT_1 var_675_arg_0 = var_440; [L1201] SORT_3 var_675_arg_1 = input_4; [L1202] SORT_3 var_675_arg_2 = state_167; [L1203] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1204] SORT_1 var_676_arg_0 = input_7; [L1205] SORT_3 var_676_arg_1 = var_582; [L1206] SORT_3 var_676_arg_2 = var_675; [L1207] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1208] SORT_3 next_677_arg_1 = var_676; [L1209] SORT_1 var_361_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_361_arg_0=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] EXPR var_361_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1211] SORT_13 var_361 = var_361_arg_0; [L1212] SORT_13 var_362_arg_0 = var_283; [L1213] SORT_13 var_362_arg_1 = var_361; [L1214] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1215] SORT_1 var_363_arg_0 = input_6; [L1216] SORT_1 var_363_arg_1 = var_362; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_363_arg_0=0, var_363_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] EXPR var_363_arg_0 & var_363_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1218] EXPR var_363 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] var_363 = var_363 & mask_SORT_1 [L1219] SORT_1 var_678_arg_0 = var_363; [L1220] SORT_3 var_678_arg_1 = input_4; [L1221] SORT_3 var_678_arg_2 = state_172; [L1222] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1223] SORT_1 var_679_arg_0 = input_7; [L1224] SORT_3 var_679_arg_1 = var_582; [L1225] SORT_3 var_679_arg_2 = var_678; [L1226] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1227] SORT_3 next_680_arg_1 = var_679; [L1228] SORT_13 var_284_arg_0 = var_283; [L1229] SORT_1 var_284 = var_284_arg_0 != 0; [L1230] SORT_1 var_285_arg_0 = var_284; [L1231] SORT_1 var_285 = ~var_285_arg_0; [L1232] SORT_1 var_286_arg_0 = input_6; [L1233] SORT_1 var_286_arg_1 = var_285; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_286_arg_0=0, var_286_arg_1=-1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1235] EXPR var_286 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] var_286 = var_286 & mask_SORT_1 [L1236] SORT_1 var_681_arg_0 = var_286; [L1237] SORT_3 var_681_arg_1 = input_4; [L1238] SORT_3 var_681_arg_2 = state_177; [L1239] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1240] SORT_1 var_682_arg_0 = input_7; [L1241] SORT_3 var_682_arg_1 = var_582; [L1242] SORT_3 var_682_arg_2 = var_681; [L1243] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1244] SORT_3 next_683_arg_1 = var_682; [L1245] SORT_1 var_684_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_684_arg_0=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] EXPR var_684_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1247] SORT_11 var_684 = var_684_arg_0; [L1248] SORT_11 var_685_arg_0 = state_182; [L1249] SORT_11 var_685_arg_1 = var_684; [L1250] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1251] SORT_1 var_686_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_686_arg_0=256, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] EXPR var_686_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1253] SORT_11 var_686 = var_686_arg_0; [L1254] SORT_11 var_687_arg_0 = var_685; [L1255] SORT_11 var_687_arg_1 = var_686; [L1256] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1257] SORT_1 var_688_arg_0 = input_7; [L1258] SORT_11 var_688_arg_1 = var_203; [L1259] SORT_11 var_688_arg_2 = var_687; [L1260] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_688=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] EXPR var_688 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] var_688 = var_688 & mask_SORT_11 [L1262] SORT_11 next_689_arg_1 = var_688; [L1263] SORT_1 var_542_arg_0 = state_190; [L1264] SORT_1 var_542 = ~var_542_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=-1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] EXPR var_542 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] var_542 = var_542 & mask_SORT_1 [L1266] SORT_1 var_538_arg_0 = input_8; [L1267] SORT_1 var_538_arg_1 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538_arg_0=0, var_538_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] EXPR var_538_arg_0 & var_538_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1269] SORT_1 var_539_arg_0 = state_190; [L1270] SORT_1 var_539_arg_1 = var_538; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_539_arg_0=0, var_539_arg_1=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] EXPR var_539_arg_0 | var_539_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1272] SORT_1 var_690_arg_0 = var_542; [L1273] SORT_1 var_690_arg_1 = var_539; [L1274] SORT_1 var_690_arg_2 = state_190; [L1275] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1276] SORT_1 var_691_arg_0 = input_7; [L1277] SORT_1 var_691_arg_1 = var_233; [L1278] SORT_1 var_691_arg_2 = var_690; [L1279] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1280] SORT_1 next_692_arg_1 = var_691; [L1281] SORT_1 var_550_arg_0 = var_207; [L1282] SORT_1 var_550_arg_1 = state_191; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_550_arg_0=0, var_550_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] EXPR var_550_arg_0 | var_550_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1284] SORT_1 var_693_arg_0 = var_173; [L1285] SORT_1 var_693_arg_1 = var_550; [L1286] SORT_1 var_693_arg_2 = state_191; [L1287] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1288] SORT_1 var_694_arg_0 = input_7; [L1289] SORT_1 var_694_arg_1 = var_233; [L1290] SORT_1 var_694_arg_2 = var_693; [L1291] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1292] SORT_1 next_695_arg_1 = var_694; [L1293] SORT_1 var_562_arg_0 = input_6; [L1294] SORT_1 var_562_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_562_arg_0=0, var_562_arg_1=256, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] EXPR var_562_arg_0 | var_562_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1296] SORT_1 var_563_arg_0 = var_562; [L1297] SORT_1 var_563_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_563_arg_0=0, var_563_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] EXPR var_563_arg_0 | var_563_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1299] SORT_1 var_564_arg_0 = var_563; [L1300] SORT_1 var_564_arg_1 = state_190; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_564_arg_0=0, var_564_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] EXPR var_564_arg_0 | var_564_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1302] EXPR var_564 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] var_564 = var_564 & mask_SORT_1 [L1303] SORT_1 var_696_arg_0 = var_564; [L1304] SORT_11 var_696_arg_1 = var_204; [L1305] SORT_11 var_696_arg_2 = state_194; [L1306] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1307] SORT_1 var_697_arg_0 = input_7; [L1308] SORT_11 var_697_arg_1 = var_203; [L1309] SORT_11 var_697_arg_2 = var_696; [L1310] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_697=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] EXPR var_697 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] var_697 = var_697 & mask_SORT_11 [L1312] SORT_11 next_698_arg_1 = var_697; [L1313] SORT_1 var_547_arg_0 = var_538; [L1314] SORT_1 var_547_arg_1 = var_542; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_547_arg_0=0, var_547_arg_1=1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] EXPR var_547_arg_0 & var_547_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1316] EXPR var_547 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] var_547 = var_547 & mask_SORT_1 [L1317] SORT_1 var_699_arg_0 = var_547; [L1318] SORT_3 var_699_arg_1 = input_4; [L1319] SORT_3 var_699_arg_2 = state_209; [L1320] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1321] SORT_1 var_700_arg_0 = input_7; [L1322] SORT_3 var_700_arg_1 = var_582; [L1323] SORT_3 var_700_arg_2 = var_699; [L1324] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_700=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] EXPR var_700 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] var_700 = var_700 & mask_SORT_3 [L1326] SORT_3 next_701_arg_1 = var_700; [L1327] SORT_1 next_702_arg_1 = var_233; [L1328] SORT_1 var_518_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_518_arg_0=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] EXPR var_518_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1330] SORT_11 var_518 = var_518_arg_0; [L1331] SORT_11 var_519_arg_0 = state_282; [L1332] SORT_11 var_519_arg_1 = var_518; [L1333] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1334] SORT_1 var_703_arg_0 = var_242; [L1335] SORT_11 var_703_arg_1 = var_519; [L1336] SORT_11 var_703_arg_2 = state_282; [L1337] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1338] SORT_1 var_704_arg_0 = input_7; [L1339] SORT_11 var_704_arg_1 = var_203; [L1340] SORT_11 var_704_arg_2 = var_703; [L1341] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1342] SORT_11 next_705_arg_1 = var_704; [L1344] state_10 = next_584_arg_1 [L1345] state_12 = next_587_arg_1 [L1346] state_18 = next_590_arg_1 [L1347] state_24 = next_593_arg_1 [L1348] state_29 = next_596_arg_1 [L1349] state_34 = next_599_arg_1 [L1350] state_39 = next_602_arg_1 [L1351] state_44 = next_605_arg_1 [L1352] state_49 = next_608_arg_1 [L1353] state_54 = next_611_arg_1 [L1354] state_59 = next_614_arg_1 [L1355] state_64 = next_617_arg_1 [L1356] state_69 = next_620_arg_1 [L1357] state_74 = next_623_arg_1 [L1358] state_79 = next_626_arg_1 [L1359] state_84 = next_629_arg_1 [L1360] state_89 = next_632_arg_1 [L1361] state_94 = next_635_arg_1 [L1362] state_99 = next_638_arg_1 [L1363] state_105 = next_641_arg_1 [L1364] state_110 = next_644_arg_1 [L1365] state_115 = next_647_arg_1 [L1366] state_120 = next_650_arg_1 [L1367] state_125 = next_653_arg_1 [L1368] state_130 = next_656_arg_1 [L1369] state_135 = next_659_arg_1 [L1370] state_140 = next_662_arg_1 [L1371] state_146 = next_665_arg_1 [L1372] state_151 = next_668_arg_1 [L1373] state_156 = next_671_arg_1 [L1374] state_161 = next_674_arg_1 [L1375] state_167 = next_677_arg_1 [L1376] state_172 = next_680_arg_1 [L1377] state_177 = next_683_arg_1 [L1378] state_182 = next_689_arg_1 [L1379] state_190 = next_692_arg_1 [L1380] state_191 = next_695_arg_1 [L1381] state_194 = next_698_arg_1 [L1382] state_209 = next_701_arg_1 [L1383] state_213 = next_702_arg_1 [L1384] state_282 = next_705_arg_1 [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_uint() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uint() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=254, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=257, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=1, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=1, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=1, var_121=11, var_123=1, var_126=10, var_128=0, var_131=9, var_133=1, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=1, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=0, var_35=28, var_37=1, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=1, var_65=22, var_67=1, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=1, var_85=18, var_87=0, var_90=17, var_92=1, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=1, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=1, var_236_arg_1=-1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 872 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 567.6s, OverallIterations: 149, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.7s, AutomataDifference: 98.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 282042 SdHoareTripleChecker+Valid, 69.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 281819 mSDsluCounter, 591492 SdHoareTripleChecker+Invalid, 59.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 416040 mSDsCounter, 327 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 114878 IncrementalHoareTripleChecker+Invalid, 115205 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 327 mSolverCounterUnsat, 175452 mSDtfsCounter, 114878 mSolverCounterSat, 1.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 13085 GetRequests, 11980 SyntacticMatches, 7 SemanticMatches, 1098 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21519 ImplicationChecksByTransitivity, 28.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=49817occurred in iteration=146, InterpolantAutomatonStates: 933, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 9.0s AutomataMinimizationTime, 148 MinimizatonAttempts, 90459 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 5.4s SsaConstructionTime, 178.3s SatisfiabilityAnalysisTime, 197.8s InterpolantComputationTime, 86164 NumberOfCodeBlocks, 86164 NumberOfCodeBlocksAsserted, 160 NumberOfCheckSat, 88341 ConstructedInterpolants, 0 QuantifiedInterpolants, 553666 SizeOfPredicates, 54 NumberOfNonLiveVariables, 49520 ConjunctsInSsa, 551 ConjunctsInUnsatCore, 163 InterpolantComputations, 144 PerfectInterpolantSequences, 22228/23883 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 08:37:21,943 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9138a2614bedb023e2047cd39c42b34c38da629619813e3b818f3e1fdd02af0f --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:37:24,078 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:37:24,155 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 08:37:24,161 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:37:24,161 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:37:24,183 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:37:24,184 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:37:24,184 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:37:24,185 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:37:24,185 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:37:24,185 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:37:24,185 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:37:24,186 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:37:24,186 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:37:24,186 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:37:24,187 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:37:24,187 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:37:24,187 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:37:24,188 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:37:24,188 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:37:24,189 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9138a2614bedb023e2047cd39c42b34c38da629619813e3b818f3e1fdd02af0f [2024-12-02 08:37:24,431 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:37:24,440 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:37:24,442 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:37:24,443 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:37:24,444 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:37:24,445 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:37:27,179 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/dc8ba5c79/5559bb4b719c4732be77aa17a21b8c6e/FLAG89c6b54f1 [2024-12-02 08:37:27,434 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:37:27,435 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:37:27,447 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/dc8ba5c79/5559bb4b719c4732be77aa17a21b8c6e/FLAG89c6b54f1 [2024-12-02 08:37:27,461 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/data/dc8ba5c79/5559bb4b719c4732be77aa17a21b8c6e [2024-12-02 08:37:27,464 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:37:27,465 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:37:27,466 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:37:27,466 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:37:27,470 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:37:27,470 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:37:27" (1/1) ... [2024-12-02 08:37:27,471 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5728f1bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:27, skipping insertion in model container [2024-12-02 08:37:27,471 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:37:27" (1/1) ... [2024-12-02 08:37:27,509 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:37:27,682 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c[1280,1293] [2024-12-02 08:37:27,897 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:37:27,909 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:37:27,917 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c[1280,1293] [2024-12-02 08:37:28,006 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:37:28,017 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:37:28,017 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28 WrapperNode [2024-12-02 08:37:28,018 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:37:28,018 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:37:28,018 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:37:28,019 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:37:28,023 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,047 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,110 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-12-02 08:37:28,110 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:37:28,110 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:37:28,111 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:37:28,111 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:37:28,117 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,117 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,125 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,150 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:37:28,150 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,150 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,191 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,194 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,198 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,202 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,207 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,217 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:37:28,218 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:37:28,218 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:37:28,218 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:37:28,219 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (1/1) ... [2024-12-02 08:37:28,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:37:28,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:37:28,249 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:37:28,255 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:37:28,276 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:37:28,276 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 08:37:28,276 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:37:28,276 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:37:28,276 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:37:28,276 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:37:28,565 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:37:28,566 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:37:29,677 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-12-02 08:37:29,677 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:37:29,686 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:37:29,686 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:37:29,686 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:37:29 BoogieIcfgContainer [2024-12-02 08:37:29,686 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:37:29,688 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:37:29,689 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:37:29,693 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:37:29,693 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:37:27" (1/3) ... [2024-12-02 08:37:29,694 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61962977 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:37:29, skipping insertion in model container [2024-12-02 08:37:29,694 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:37:28" (2/3) ... [2024-12-02 08:37:29,694 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61962977 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:37:29, skipping insertion in model container [2024-12-02 08:37:29,694 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:37:29" (3/3) ... [2024-12-02 08:37:29,696 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c [2024-12-02 08:37:29,719 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:37:29,720 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:37:29,772 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:37:29,785 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6e2da67, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:37:29,785 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:37:29,789 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:37:29,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 08:37:29,796 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:37:29,796 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:37:29,797 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:37:29,802 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:37:29,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 08:37:29,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:37:29,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [731647789] [2024-12-02 08:37:29,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:37:29,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:37:29,816 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:37:29,819 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:37:29,821 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:37:30,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:37:30,343 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 08:37:30,353 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:30,596 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 08:37:30,597 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:37:30,761 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:37:30,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [731647789] [2024-12-02 08:37:30,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [731647789] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:37:30,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [997807575] [2024-12-02 08:37:30,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:37:30,762 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:37:30,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:37:30,767 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:37:30,768 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 08:37:31,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:37:31,659 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 08:37:31,667 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:31,788 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:37:31,788 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:37:31,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [997807575] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:37:31,788 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:37:31,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 08:37:31,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841134185] [2024-12-02 08:37:31,791 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:37:31,795 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:37:31,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:37:31,815 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:37:31,815 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:37:31,817 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:37:32,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:37:32,015 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 08:37:32,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:37:32,018 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 08:37:32,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:37:32,024 INFO L225 Difference]: With dead ends: 43 [2024-12-02 08:37:32,024 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 08:37:32,027 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:37:32,030 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:37:32,031 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 08:37:32,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 08:37:32,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 08:37:32,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:37:32,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 08:37:32,069 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 08:37:32,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:37:32,070 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 08:37:32,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:37:32,071 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 08:37:32,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 08:37:32,072 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:37:32,072 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 08:37:32,081 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 08:37:32,283 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:37:32,473 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:37:32,473 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:37:32,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:37:32,474 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 08:37:32,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:37:32,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [197695504] [2024-12-02 08:37:32,477 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:37:32,477 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:37:32,477 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:37:32,478 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:37:32,480 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:37:33,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:37:33,192 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 08:37:33,203 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:33,637 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:37:33,637 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:37:33,792 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:37:33,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [197695504] [2024-12-02 08:37:33,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [197695504] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:37:33,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [51278145] [2024-12-02 08:37:33,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:37:33,792 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:37:33,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:37:33,794 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:37:33,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 08:37:35,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:37:35,169 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 08:37:35,182 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:35,469 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:37:35,469 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:37:35,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [51278145] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:37:35,599 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:37:35,599 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 08:37:35,599 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896468206] [2024-12-02 08:37:35,599 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:37:35,600 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:37:35,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:37:35,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:37:35,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:37:35,601 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:37:36,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:37:36,046 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 08:37:36,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:37:36,046 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 08:37:36,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:37:36,047 INFO L225 Difference]: With dead ends: 36 [2024-12-02 08:37:36,047 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 08:37:36,047 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:37:36,048 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:37:36,048 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:37:36,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 08:37:36,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 08:37:36,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:37:36,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 08:37:36,055 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 08:37:36,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:37:36,055 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 08:37:36,055 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:37:36,055 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 08:37:36,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 08:37:36,056 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:37:36,056 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 08:37:36,066 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 08:37:36,265 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:37:36,457 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:37:36,457 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:37:36,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:37:36,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 08:37:36,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:37:36,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1017772126] [2024-12-02 08:37:36,459 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:37:36,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:37:36,459 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:37:36,460 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:37:36,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:37:37,359 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:37:37,359 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:37:37,373 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-02 08:37:37,390 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:40,741 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:37:40,741 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:37:45,691 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse0 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse14 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_213~0#1|)) (.cse9 (= ((_ extract 7 0) (bvand .cse0 (_ bv254 32))) (_ bv0 8))) (.cse11 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse6 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 (_ bv255 32)))))) (let ((.cse8 (not .cse6)) (.cse4 (not .cse11)) (.cse10 (not .cse9)) (.cse12 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|)) (.cse2 (not .cse14)) (.cse1 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse3 (or (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_17|))))))))))))) .cse14))) (and (or (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse1))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|)))))))))))))))))))))) .cse2) .cse3) (let ((.cse5 (not .cse12)) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 32))) (not (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|)))))) (and (or .cse4 (and (or .cse5 .cse6) (or .cse7 .cse8))) (or (and (or .cse9 .cse5) (or .cse10 .cse7)) .cse11)))) (or (let ((.cse13 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 32))) (= |c_ULTIMATE.start_main_~state_209~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|))))) (and (or (and (or .cse13 .cse8) (or .cse6 .cse12)) .cse4) (or (and (or .cse10 .cse13) (or .cse9 .cse12)) .cse11))) (and (or .cse2 (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse0 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse1))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|))))))))) .cse3)))))) is different from false [2024-12-02 08:37:46,104 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:37:46,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1017772126] [2024-12-02 08:37:46,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1017772126] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:37:46,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1702461428] [2024-12-02 08:37:46,105 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:37:46,105 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:37:46,105 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:37:46,107 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:37:46,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 08:37:48,079 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:37:48,079 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:37:48,159 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 08:37:48,175 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:37:53,996 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:37:53,997 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:37:58,857 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse3 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32))))) (.cse7 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse6 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse10 (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_233~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_21|))))))))) .cse9)) (_ bv0 8)))) (.cse5 (not .cse6)) (.cse0 (not .cse7)) (.cse2 (not .cse3)) (.cse4 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|))) (and (or (let ((.cse1 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_19| (_ BitVec 32))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_209~0#1|)))) (and (or .cse0 (and (or .cse1 .cse2) (or .cse3 .cse4))) (or (and (or .cse5 .cse1) (or .cse6 .cse4)) .cse7))) (and (forall ((|v_ULTIMATE.start_main_~var_193_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_234_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_21|) .cse8))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_21|)))))))))) (_ bv0 32))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_21|)))))) .cse9)))) .cse10)) (or (and (forall ((|v_ULTIMATE.start_main_~var_193_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_234_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_234_arg_2~0#1_21|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_21|) .cse8))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_21|)))))))))) (_ bv1 32)))))))))))))))) .cse10) (let ((.cse12 (not .cse4)) (.cse11 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_19| (_ BitVec 32))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_209~0#1|))))) (and (or (and (or .cse5 .cse11) (or .cse6 .cse12)) .cse7) (or .cse0 (and (or .cse12 .cse3) (or .cse11 .cse2)))))))))) is different from false [2024-12-02 08:37:59,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1702461428] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:37:59,259 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:37:59,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-12-02 08:37:59,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034952461] [2024-12-02 08:37:59,259 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:37:59,259 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-12-02 08:37:59,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:37:59,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-12-02 08:37:59,261 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=204, Unknown=2, NotChecked=58, Total=306 [2024-12-02 08:37:59,261 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-12-02 08:38:19,757 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-12-02 08:38:23,843 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.08s for a HTC check with result UNKNOWN. Formula has sorts [Bool, BitVec], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-12-02 08:38:23,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:38:23,948 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-12-02 08:38:23,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-12-02 08:38:23,951 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) Word has length 65 [2024-12-02 08:38:23,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:38:23,952 INFO L225 Difference]: With dead ends: 46 [2024-12-02 08:38:23,952 INFO L226 Difference]: Without dead ends: 44 [2024-12-02 08:38:23,953 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 25.0s TimeCoverageRelationStatistics Valid=111, Invalid=542, Unknown=5, NotChecked=98, Total=756 [2024-12-02 08:38:23,953 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 11 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:38:23,954 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 76 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 168 Invalid, 2 Unknown, 0 Unchecked, 9.8s Time] [2024-12-02 08:38:23,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2024-12-02 08:38:23,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2024-12-02 08:38:23,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 08:38:23,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2024-12-02 08:38:23,964 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2024-12-02 08:38:23,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:38:23,964 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2024-12-02 08:38:23,964 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-12-02 08:38:23,964 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2024-12-02 08:38:23,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-12-02 08:38:23,966 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:38:23,966 INFO L218 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-12-02 08:38:23,977 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:38:24,182 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-12-02 08:38:24,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 08:38:24,367 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:38:24,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:38:24,367 INFO L85 PathProgramCache]: Analyzing trace with hash -1616345373, now seen corresponding path program 3 times [2024-12-02 08:38:24,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:38:24,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [573653543] [2024-12-02 08:38:24,369 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-12-02 08:38:24,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:38:24,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:38:24,370 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:38:24,371 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:38:26,211 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-12-02 08:38:26,212 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:38:26,231 INFO L256 TraceCheckSpWp]: Trace formula consists of 1873 conjuncts, 224 conjuncts are in the unsatisfiable core [2024-12-02 08:38:26,262 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:39:25,202 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 111 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked. [2024-12-02 08:39:25,203 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:39:57,866 WARN L286 SmtUtils]: Spent 16.30s on a formula simplification. DAG size of input: 194 DAG size of output: 190 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-12-02 08:40:07,691 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:40:07,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [573653543] [2024-12-02 08:40:07,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [573653543] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:40:07,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [465488986] [2024-12-02 08:40:07,691 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-12-02 08:40:07,691 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:40:07,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:40:07,693 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:40:07,694 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d873d667-a664-4d3c-91e8-343ad4cbc301/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2024-12-02 08:40:11,505 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-12-02 08:40:11,505 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:40:11,599 INFO L256 TraceCheckSpWp]: Trace formula consists of 1873 conjuncts, 259 conjuncts are in the unsatisfiable core [2024-12-02 08:40:11,632 INFO L279 TraceCheckSpWp]: Computing forward predicates...