./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 07:58:21,967 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 07:58:22,024 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 07:58:22,029 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 07:58:22,029 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 07:58:22,051 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 07:58:22,051 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 07:58:22,051 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 07:58:22,052 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 07:58:22,052 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 07:58:22,052 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 07:58:22,052 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 07:58:22,052 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 07:58:22,052 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 07:58:22,053 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 07:58:22,053 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 07:58:22,054 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:58:22,054 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:58:22,054 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:58:22,055 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 07:58:22,055 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 [2024-12-02 07:58:22,289 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 07:58:22,296 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 07:58:22,299 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 07:58:22,300 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 07:58:22,300 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 07:58:22,301 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 07:58:24,926 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/177a28354/b26a6d79b62a4c5196fecc5efab5b7cd/FLAGe73796353 [2024-12-02 07:58:25,183 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 07:58:25,183 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 07:58:25,194 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/177a28354/b26a6d79b62a4c5196fecc5efab5b7cd/FLAGe73796353 [2024-12-02 07:58:25,504 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/177a28354/b26a6d79b62a4c5196fecc5efab5b7cd [2024-12-02 07:58:25,506 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 07:58:25,507 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 07:58:25,508 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 07:58:25,508 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 07:58:25,511 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 07:58:25,512 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:25,512 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@39c0250e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25, skipping insertion in model container [2024-12-02 07:58:25,513 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:25,542 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 07:58:25,677 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-12-02 07:58:25,832 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:58:25,839 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 07:58:25,847 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-12-02 07:58:25,934 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:58:25,947 INFO L204 MainTranslator]: Completed translation [2024-12-02 07:58:25,948 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25 WrapperNode [2024-12-02 07:58:25,948 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 07:58:25,949 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 07:58:25,949 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 07:58:25,949 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 07:58:25,955 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:25,978 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,158 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1976 [2024-12-02 07:58:26,159 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 07:58:26,159 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 07:58:26,159 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 07:58:26,159 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 07:58:26,168 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,168 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,195 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,252 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 07:58:26,252 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,253 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,293 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,297 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,307 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,329 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,337 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,370 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 07:58:26,371 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 07:58:26,371 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 07:58:26,371 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 07:58:26,372 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (1/1) ... [2024-12-02 07:58:26,377 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:58:26,388 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:58:26,400 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 07:58:26,402 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 07:58:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 07:58:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 07:58:26,426 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 07:58:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 07:58:26,426 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 07:58:26,426 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 07:58:26,626 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 07:58:26,628 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 07:58:28,746 INFO L? ?]: Removed 1091 outVars from TransFormulas that were not future-live. [2024-12-02 07:58:28,746 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 07:58:28,765 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 07:58:28,765 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 07:58:28,765 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:58:28 BoogieIcfgContainer [2024-12-02 07:58:28,766 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 07:58:28,768 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 07:58:28,768 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 07:58:28,772 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 07:58:28,772 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 07:58:25" (1/3) ... [2024-12-02 07:58:28,773 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51a0294e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:58:28, skipping insertion in model container [2024-12-02 07:58:28,773 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:58:25" (2/3) ... [2024-12-02 07:58:28,773 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51a0294e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:58:28, skipping insertion in model container [2024-12-02 07:58:28,773 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:58:28" (3/3) ... [2024-12-02 07:58:28,774 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 07:58:28,789 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 07:58:28,791 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c that has 2 procedures, 552 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 07:58:28,851 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 07:58:28,862 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6033c651, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 07:58:28,862 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 07:58:28,868 INFO L276 IsEmpty]: Start isEmpty. Operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:28,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 07:58:28,880 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:28,881 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:28,881 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:28,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:28,886 INFO L85 PathProgramCache]: Analyzing trace with hash 105595379, now seen corresponding path program 1 times [2024-12-02 07:58:28,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:28,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877035840] [2024-12-02 07:58:28,894 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:28,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:29,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:29,271 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 07:58:29,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:29,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877035840] [2024-12-02 07:58:29,273 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1877035840] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:58:29,273 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2071684330] [2024-12-02 07:58:29,273 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:29,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:58:29,273 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:58:29,275 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:58:29,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 07:58:29,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:29,706 INFO L256 TraceCheckSpWp]: Trace formula consists of 929 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 07:58:29,714 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:58:29,732 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 07:58:29,732 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:58:29,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2071684330] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:29,733 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:58:29,733 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 07:58:29,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893329419] [2024-12-02 07:58:29,736 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:29,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 07:58:29,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:29,759 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 07:58:29,759 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 07:58:29,761 INFO L87 Difference]: Start difference. First operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:29,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:29,802 INFO L93 Difference]: Finished difference Result 999 states and 1493 transitions. [2024-12-02 07:58:29,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 07:58:29,803 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 149 [2024-12-02 07:58:29,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:29,810 INFO L225 Difference]: With dead ends: 999 [2024-12-02 07:58:29,810 INFO L226 Difference]: Without dead ends: 549 [2024-12-02 07:58:29,814 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 07:58:29,816 INFO L435 NwaCegarLoop]: 817 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 817 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:29,817 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 817 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:29,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 549 states. [2024-12-02 07:58:29,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 549 to 549. [2024-12-02 07:58:29,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 549 states, 544 states have (on average 1.4908088235294117) internal successors, (811), 544 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:29,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 817 transitions. [2024-12-02 07:58:29,868 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 817 transitions. Word has length 149 [2024-12-02 07:58:29,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:29,869 INFO L471 AbstractCegarLoop]: Abstraction has 549 states and 817 transitions. [2024-12-02 07:58:29,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 69.5) internal successors, (139), 2 states have internal predecessors, (139), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:29,869 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 817 transitions. [2024-12-02 07:58:29,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-12-02 07:58:29,872 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:29,872 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:29,880 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 07:58:30,073 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-12-02 07:58:30,073 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:30,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:30,074 INFO L85 PathProgramCache]: Analyzing trace with hash 677396781, now seen corresponding path program 1 times [2024-12-02 07:58:30,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:30,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391430776] [2024-12-02 07:58:30,074 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:30,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:30,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:31,123 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:31,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:31,123 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391430776] [2024-12-02 07:58:31,123 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [391430776] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:31,124 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:31,124 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:31,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180746752] [2024-12-02 07:58:31,124 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:31,125 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:31,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:31,126 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:31,126 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:31,126 INFO L87 Difference]: Start difference. First operand 549 states and 817 transitions. Second operand has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:31,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:31,169 INFO L93 Difference]: Finished difference Result 553 states and 821 transitions. [2024-12-02 07:58:31,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:31,169 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 149 [2024-12-02 07:58:31,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:31,172 INFO L225 Difference]: With dead ends: 553 [2024-12-02 07:58:31,173 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 07:58:31,173 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:31,174 INFO L435 NwaCegarLoop]: 815 mSDtfsCounter, 0 mSDsluCounter, 1624 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2439 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:31,174 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2439 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:31,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 07:58:31,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 07:58:31,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.489010989010989) internal successors, (813), 546 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:31,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 819 transitions. [2024-12-02 07:58:31,193 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 819 transitions. Word has length 149 [2024-12-02 07:58:31,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:31,194 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 819 transitions. [2024-12-02 07:58:31,195 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:31,195 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 819 transitions. [2024-12-02 07:58:31,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-12-02 07:58:31,196 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:31,197 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:31,197 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 07:58:31,197 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:31,197 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:31,198 INFO L85 PathProgramCache]: Analyzing trace with hash -473840291, now seen corresponding path program 1 times [2024-12-02 07:58:31,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:31,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082789701] [2024-12-02 07:58:31,198 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:31,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:31,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:31,731 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:31,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:31,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082789701] [2024-12-02 07:58:31,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1082789701] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:31,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:31,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:31,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931444161] [2024-12-02 07:58:31,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:31,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:31,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:31,733 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:31,733 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:31,734 INFO L87 Difference]: Start difference. First operand 551 states and 819 transitions. Second operand has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:32,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:32,188 INFO L93 Difference]: Finished difference Result 1371 states and 2041 transitions. [2024-12-02 07:58:32,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:58:32,188 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 150 [2024-12-02 07:58:32,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:32,191 INFO L225 Difference]: With dead ends: 1371 [2024-12-02 07:58:32,191 INFO L226 Difference]: Without dead ends: 551 [2024-12-02 07:58:32,192 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:58:32,193 INFO L435 NwaCegarLoop]: 861 mSDtfsCounter, 1618 mSDsluCounter, 1490 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1618 SdHoareTripleChecker+Valid, 2351 SdHoareTripleChecker+Invalid, 339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:32,193 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1618 Valid, 2351 Invalid, 339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:58:32,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-12-02 07:58:32,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-12-02 07:58:32,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.4871794871794872) internal successors, (812), 546 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:32,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 818 transitions. [2024-12-02 07:58:32,208 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 818 transitions. Word has length 150 [2024-12-02 07:58:32,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:32,209 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 818 transitions. [2024-12-02 07:58:32,209 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:32,209 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 818 transitions. [2024-12-02 07:58:32,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-12-02 07:58:32,211 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:32,211 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:32,211 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 07:58:32,211 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:32,211 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:32,212 INFO L85 PathProgramCache]: Analyzing trace with hash -1290588625, now seen corresponding path program 1 times [2024-12-02 07:58:32,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:32,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369933379] [2024-12-02 07:58:32,212 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:32,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:32,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:32,696 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:32,696 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:32,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369933379] [2024-12-02 07:58:32,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [369933379] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:32,696 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:32,696 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:32,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196430713] [2024-12-02 07:58:32,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:32,697 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:32,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:32,697 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:32,698 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:32,698 INFO L87 Difference]: Start difference. First operand 551 states and 818 transitions. Second operand has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:32,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:32,736 INFO L93 Difference]: Finished difference Result 1002 states and 1487 transitions. [2024-12-02 07:58:32,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:32,737 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 151 [2024-12-02 07:58:32,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:32,739 INFO L225 Difference]: With dead ends: 1002 [2024-12-02 07:58:32,740 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:32,740 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:32,741 INFO L435 NwaCegarLoop]: 814 mSDtfsCounter, 0 mSDsluCounter, 1618 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2432 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:32,741 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2432 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:32,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:32,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:32,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4854014598540146) internal successors, (814), 548 states have internal predecessors, (814), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:32,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2024-12-02 07:58:32,755 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 151 [2024-12-02 07:58:32,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:32,756 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2024-12-02 07:58:32,756 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:32,756 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2024-12-02 07:58:32,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2024-12-02 07:58:32,757 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:32,758 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:32,758 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 07:58:32,758 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:32,758 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:32,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1843460468, now seen corresponding path program 1 times [2024-12-02 07:58:32,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:32,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402388866] [2024-12-02 07:58:32,759 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:32,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:32,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:33,426 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:33,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:33,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402388866] [2024-12-02 07:58:33,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1402388866] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:33,426 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:33,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:33,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290437958] [2024-12-02 07:58:33,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:33,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:33,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:33,428 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:33,428 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:33,428 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:33,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:33,616 INFO L93 Difference]: Finished difference Result 1004 states and 1488 transitions. [2024-12-02 07:58:33,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:33,618 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 152 [2024-12-02 07:58:33,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:33,620 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:33,620 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:33,621 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:33,622 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 694 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:33,622 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 1470 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:58:33,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:33,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:33,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4835766423357664) internal successors, (813), 548 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:33,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 819 transitions. [2024-12-02 07:58:33,637 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 819 transitions. Word has length 152 [2024-12-02 07:58:33,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:33,638 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 819 transitions. [2024-12-02 07:58:33,638 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:33,638 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 819 transitions. [2024-12-02 07:58:33,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-12-02 07:58:33,640 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:33,640 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:33,640 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 07:58:33,640 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:33,640 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:33,641 INFO L85 PathProgramCache]: Analyzing trace with hash -954896960, now seen corresponding path program 1 times [2024-12-02 07:58:33,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:33,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482805600] [2024-12-02 07:58:33,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:33,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:33,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:34,039 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:34,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:34,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482805600] [2024-12-02 07:58:34,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1482805600] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:34,039 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:34,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:34,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56198022] [2024-12-02 07:58:34,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:34,040 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:34,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:34,040 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:34,040 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:34,041 INFO L87 Difference]: Start difference. First operand 553 states and 819 transitions. Second operand has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:34,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:34,194 INFO L93 Difference]: Finished difference Result 1010 states and 1494 transitions. [2024-12-02 07:58:34,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:58:34,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 153 [2024-12-02 07:58:34,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:34,197 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 07:58:34,197 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:34,198 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:58:34,199 INFO L435 NwaCegarLoop]: 806 mSDtfsCounter, 705 mSDsluCounter, 1544 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 705 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:34,199 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [705 Valid, 2350 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:34,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:34,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:34,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4817518248175183) internal successors, (812), 548 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:34,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 818 transitions. [2024-12-02 07:58:34,214 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 818 transitions. Word has length 153 [2024-12-02 07:58:34,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:34,215 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 818 transitions. [2024-12-02 07:58:34,215 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:34,215 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 818 transitions. [2024-12-02 07:58:34,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-12-02 07:58:34,216 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:34,216 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:34,217 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 07:58:34,217 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:34,217 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:34,217 INFO L85 PathProgramCache]: Analyzing trace with hash 690807295, now seen corresponding path program 1 times [2024-12-02 07:58:34,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:34,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474327537] [2024-12-02 07:58:34,217 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:34,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:34,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:34,594 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:34,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:34,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474327537] [2024-12-02 07:58:34,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [474327537] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:34,595 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:34,595 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:34,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148295626] [2024-12-02 07:58:34,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:34,595 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:34,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:34,596 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:34,596 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:34,596 INFO L87 Difference]: Start difference. First operand 553 states and 818 transitions. Second operand has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:34,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:34,769 INFO L93 Difference]: Finished difference Result 1004 states and 1484 transitions. [2024-12-02 07:58:34,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:34,769 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 154 [2024-12-02 07:58:34,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:34,772 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:34,772 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:34,773 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:34,773 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 802 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 805 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:34,773 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [805 Valid, 1477 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:34,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:34,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:34,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.47992700729927) internal successors, (811), 548 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:34,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 817 transitions. [2024-12-02 07:58:34,788 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 817 transitions. Word has length 154 [2024-12-02 07:58:34,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:34,788 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 817 transitions. [2024-12-02 07:58:34,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:34,789 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 817 transitions. [2024-12-02 07:58:34,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-12-02 07:58:34,790 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:34,790 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:34,790 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 07:58:34,791 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:34,791 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:34,791 INFO L85 PathProgramCache]: Analyzing trace with hash -1444639353, now seen corresponding path program 1 times [2024-12-02 07:58:34,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:34,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752919013] [2024-12-02 07:58:34,791 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:34,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:34,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:35,149 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:35,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:35,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752919013] [2024-12-02 07:58:35,149 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1752919013] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:35,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:35,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:35,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097563078] [2024-12-02 07:58:35,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:35,150 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:35,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:35,151 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:35,151 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:35,151 INFO L87 Difference]: Start difference. First operand 553 states and 817 transitions. Second operand has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:35,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:35,317 INFO L93 Difference]: Finished difference Result 1004 states and 1482 transitions. [2024-12-02 07:58:35,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:35,318 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 155 [2024-12-02 07:58:35,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:35,320 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:35,320 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:35,321 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:35,321 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 798 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 801 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:35,322 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [801 Valid, 1477 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:35,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:35,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:35,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4781021897810218) internal successors, (810), 548 states have internal predecessors, (810), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:35,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 816 transitions. [2024-12-02 07:58:35,336 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 816 transitions. Word has length 155 [2024-12-02 07:58:35,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:35,337 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 816 transitions. [2024-12-02 07:58:35,337 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:35,337 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 816 transitions. [2024-12-02 07:58:35,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-12-02 07:58:35,339 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:35,339 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:35,339 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 07:58:35,339 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:35,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:35,340 INFO L85 PathProgramCache]: Analyzing trace with hash 457554086, now seen corresponding path program 1 times [2024-12-02 07:58:35,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:35,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775960627] [2024-12-02 07:58:35,340 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:35,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:35,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:35,710 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:35,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:35,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775960627] [2024-12-02 07:58:35,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775960627] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:35,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:35,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:35,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135760227] [2024-12-02 07:58:35,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:35,711 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:35,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:35,711 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:35,711 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:35,712 INFO L87 Difference]: Start difference. First operand 553 states and 816 transitions. Second operand has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:35,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:35,890 INFO L93 Difference]: Finished difference Result 1004 states and 1480 transitions. [2024-12-02 07:58:35,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:35,890 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 156 [2024-12-02 07:58:35,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:35,893 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:35,893 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:35,894 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:35,895 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 791 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 794 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:35,895 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [794 Valid, 1477 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:35,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:35,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:35,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4762773722627738) internal successors, (809), 548 states have internal predecessors, (809), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:35,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 815 transitions. [2024-12-02 07:58:35,916 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 815 transitions. Word has length 156 [2024-12-02 07:58:35,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:35,916 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 815 transitions. [2024-12-02 07:58:35,916 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:35,916 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 815 transitions. [2024-12-02 07:58:35,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-12-02 07:58:35,918 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:35,919 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:35,919 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 07:58:35,919 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:35,919 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:35,919 INFO L85 PathProgramCache]: Analyzing trace with hash -1750596921, now seen corresponding path program 1 times [2024-12-02 07:58:35,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:35,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683673187] [2024-12-02 07:58:35,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:35,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:36,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:36,318 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:36,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:36,318 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683673187] [2024-12-02 07:58:36,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683673187] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:36,318 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:36,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:36,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038302458] [2024-12-02 07:58:36,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:36,318 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:36,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:36,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:36,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:36,319 INFO L87 Difference]: Start difference. First operand 553 states and 815 transitions. Second operand has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:36,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:36,482 INFO L93 Difference]: Finished difference Result 1004 states and 1478 transitions. [2024-12-02 07:58:36,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:36,483 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 157 [2024-12-02 07:58:36,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:36,485 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:36,485 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:36,486 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:36,486 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1465 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1468 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:36,487 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1468 Valid, 1470 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:36,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:36,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:36,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4744525547445255) internal successors, (808), 548 states have internal predecessors, (808), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:36,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 814 transitions. [2024-12-02 07:58:36,502 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 814 transitions. Word has length 157 [2024-12-02 07:58:36,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:36,502 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 814 transitions. [2024-12-02 07:58:36,503 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:36,503 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 814 transitions. [2024-12-02 07:58:36,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-12-02 07:58:36,504 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:36,504 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:36,505 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 07:58:36,505 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:36,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:36,505 INFO L85 PathProgramCache]: Analyzing trace with hash -273443585, now seen corresponding path program 1 times [2024-12-02 07:58:36,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:36,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463565282] [2024-12-02 07:58:36,505 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:36,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:36,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:36,857 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:36,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:36,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463565282] [2024-12-02 07:58:36,858 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [463565282] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:36,858 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:36,858 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:36,858 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136561361] [2024-12-02 07:58:36,858 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:36,858 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:36,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:36,859 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:36,859 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:36,859 INFO L87 Difference]: Start difference. First operand 553 states and 814 transitions. Second operand has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:37,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:37,019 INFO L93 Difference]: Finished difference Result 1004 states and 1476 transitions. [2024-12-02 07:58:37,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:37,020 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 158 [2024-12-02 07:58:37,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:37,023 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:37,023 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:37,023 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:37,024 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1457 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1460 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:37,024 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1460 Valid, 1470 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:37,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:37,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:37,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4726277372262773) internal successors, (807), 548 states have internal predecessors, (807), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:37,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 813 transitions. [2024-12-02 07:58:37,039 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 813 transitions. Word has length 158 [2024-12-02 07:58:37,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:37,039 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 813 transitions. [2024-12-02 07:58:37,039 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:37,039 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 813 transitions. [2024-12-02 07:58:37,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-12-02 07:58:37,041 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:37,041 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:37,041 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 07:58:37,041 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:37,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:37,042 INFO L85 PathProgramCache]: Analyzing trace with hash -808870848, now seen corresponding path program 1 times [2024-12-02 07:58:37,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:37,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398943024] [2024-12-02 07:58:37,042 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:37,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:37,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:37,404 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:37,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:37,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398943024] [2024-12-02 07:58:37,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398943024] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:37,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:37,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:37,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905226381] [2024-12-02 07:58:37,405 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:37,405 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:37,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:37,406 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:37,406 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:37,406 INFO L87 Difference]: Start difference. First operand 553 states and 813 transitions. Second operand has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:37,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:37,565 INFO L93 Difference]: Finished difference Result 1004 states and 1474 transitions. [2024-12-02 07:58:37,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:37,565 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 159 [2024-12-02 07:58:37,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:37,568 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:37,568 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:37,569 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:37,569 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 779 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 782 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:37,569 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [782 Valid, 1477 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:37,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:37,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:37,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4708029197080292) internal successors, (806), 548 states have internal predecessors, (806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:37,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 812 transitions. [2024-12-02 07:58:37,584 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 812 transitions. Word has length 159 [2024-12-02 07:58:37,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:37,584 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 812 transitions. [2024-12-02 07:58:37,585 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:37,585 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 812 transitions. [2024-12-02 07:58:37,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-12-02 07:58:37,586 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:37,586 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:37,587 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 07:58:37,587 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:37,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:37,587 INFO L85 PathProgramCache]: Analyzing trace with hash -476571176, now seen corresponding path program 1 times [2024-12-02 07:58:37,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:37,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82469684] [2024-12-02 07:58:37,587 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:37,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:37,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:38,027 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:38,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:38,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82469684] [2024-12-02 07:58:38,027 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [82469684] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:38,028 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:38,028 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:38,028 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1229216214] [2024-12-02 07:58:38,028 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:38,028 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:38,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:38,029 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:38,029 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:38,029 INFO L87 Difference]: Start difference. First operand 553 states and 812 transitions. Second operand has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:38,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:38,149 INFO L93 Difference]: Finished difference Result 1004 states and 1472 transitions. [2024-12-02 07:58:38,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:38,149 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 160 [2024-12-02 07:58:38,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:38,152 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:38,152 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:38,152 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:38,153 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 694 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:38,153 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 1534 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:38,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:38,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:38,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.468978102189781) internal successors, (805), 548 states have internal predecessors, (805), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:38,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 811 transitions. [2024-12-02 07:58:38,168 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 811 transitions. Word has length 160 [2024-12-02 07:58:38,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:38,168 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 811 transitions. [2024-12-02 07:58:38,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:38,168 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 811 transitions. [2024-12-02 07:58:38,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-12-02 07:58:38,170 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:38,170 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:38,170 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 07:58:38,170 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:38,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:38,171 INFO L85 PathProgramCache]: Analyzing trace with hash -431893312, now seen corresponding path program 1 times [2024-12-02 07:58:38,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:38,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063735018] [2024-12-02 07:58:38,171 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:38,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:38,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:38,464 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:38,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:38,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063735018] [2024-12-02 07:58:38,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2063735018] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:38,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:38,465 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:38,465 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446536462] [2024-12-02 07:58:38,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:38,465 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:38,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:38,466 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:38,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:38,466 INFO L87 Difference]: Start difference. First operand 553 states and 811 transitions. Second operand has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:38,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:38,560 INFO L93 Difference]: Finished difference Result 1010 states and 1478 transitions. [2024-12-02 07:58:38,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:58:38,561 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 161 [2024-12-02 07:58:38,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:38,563 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 07:58:38,563 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:38,564 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:58:38,564 INFO L435 NwaCegarLoop]: 798 mSDtfsCounter, 705 mSDsluCounter, 1568 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 705 SdHoareTripleChecker+Valid, 2366 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:38,565 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [705 Valid, 2366 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:38,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:38,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:38,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.467153284671533) internal successors, (804), 548 states have internal predecessors, (804), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:38,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 810 transitions. [2024-12-02 07:58:38,580 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 810 transitions. Word has length 161 [2024-12-02 07:58:38,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:38,580 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 810 transitions. [2024-12-02 07:58:38,580 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:38,580 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 810 transitions. [2024-12-02 07:58:38,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-12-02 07:58:38,582 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:38,582 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:38,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 07:58:38,582 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:38,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:38,583 INFO L85 PathProgramCache]: Analyzing trace with hash 876306403, now seen corresponding path program 1 times [2024-12-02 07:58:38,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:38,583 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030926721] [2024-12-02 07:58:38,583 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:38,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:38,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:38,966 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:38,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:38,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030926721] [2024-12-02 07:58:38,966 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2030926721] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:38,966 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:38,967 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:38,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1456994135] [2024-12-02 07:58:38,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:38,967 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:38,967 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:38,968 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:38,968 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:38,968 INFO L87 Difference]: Start difference. First operand 553 states and 810 transitions. Second operand has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:39,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:39,080 INFO L93 Difference]: Finished difference Result 1004 states and 1468 transitions. [2024-12-02 07:58:39,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:39,081 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 162 [2024-12-02 07:58:39,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:39,083 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:39,083 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:39,084 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:39,084 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 1487 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1490 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:39,085 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1490 Valid, 1534 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:39,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:39,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:39,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4653284671532847) internal successors, (803), 548 states have internal predecessors, (803), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:39,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 809 transitions. [2024-12-02 07:58:39,103 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 809 transitions. Word has length 162 [2024-12-02 07:58:39,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:39,104 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 809 transitions. [2024-12-02 07:58:39,104 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:39,104 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 809 transitions. [2024-12-02 07:58:39,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-12-02 07:58:39,106 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:39,106 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:39,106 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 07:58:39,106 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:39,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:39,107 INFO L85 PathProgramCache]: Analyzing trace with hash -2138234105, now seen corresponding path program 1 times [2024-12-02 07:58:39,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:39,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006305974] [2024-12-02 07:58:39,107 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:39,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:39,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:39,421 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:39,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:39,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006305974] [2024-12-02 07:58:39,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006305974] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:39,421 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:39,421 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:39,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614259029] [2024-12-02 07:58:39,421 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:39,422 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:39,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:39,422 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:39,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:39,423 INFO L87 Difference]: Start difference. First operand 553 states and 809 transitions. Second operand has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:39,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:39,521 INFO L93 Difference]: Finished difference Result 1004 states and 1466 transitions. [2024-12-02 07:58:39,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:39,522 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 163 [2024-12-02 07:58:39,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:39,524 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:39,524 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:39,524 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:39,525 INFO L435 NwaCegarLoop]: 766 mSDtfsCounter, 790 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 793 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:39,525 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [793 Valid, 1541 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:39,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:39,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:39,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4635036496350364) internal successors, (802), 548 states have internal predecessors, (802), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:39,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 808 transitions. [2024-12-02 07:58:39,539 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 808 transitions. Word has length 163 [2024-12-02 07:58:39,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:39,539 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 808 transitions. [2024-12-02 07:58:39,540 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:39,540 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 808 transitions. [2024-12-02 07:58:39,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2024-12-02 07:58:39,541 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:39,541 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:39,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 07:58:39,542 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:39,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:39,542 INFO L85 PathProgramCache]: Analyzing trace with hash -1761805302, now seen corresponding path program 1 times [2024-12-02 07:58:39,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:39,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966656968] [2024-12-02 07:58:39,542 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:39,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:39,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:39,974 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:39,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:39,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966656968] [2024-12-02 07:58:39,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1966656968] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:39,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:39,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:39,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162006382] [2024-12-02 07:58:39,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:39,975 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:39,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:39,975 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:39,976 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:39,976 INFO L87 Difference]: Start difference. First operand 553 states and 808 transitions. Second operand has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:40,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:40,037 INFO L93 Difference]: Finished difference Result 1004 states and 1464 transitions. [2024-12-02 07:58:40,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:40,038 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 164 [2024-12-02 07:58:40,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:40,040 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:40,040 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:40,040 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:40,041 INFO L435 NwaCegarLoop]: 782 mSDtfsCounter, 699 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 699 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:40,041 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [699 Valid, 1566 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:40,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:40,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:40,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4598540145985401) internal successors, (800), 548 states have internal predecessors, (800), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:40,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 806 transitions. [2024-12-02 07:58:40,054 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 806 transitions. Word has length 164 [2024-12-02 07:58:40,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:40,055 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 806 transitions. [2024-12-02 07:58:40,055 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:40,055 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 806 transitions. [2024-12-02 07:58:40,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-12-02 07:58:40,056 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:40,057 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:40,057 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 07:58:40,057 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:40,057 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:40,057 INFO L85 PathProgramCache]: Analyzing trace with hash -540920697, now seen corresponding path program 1 times [2024-12-02 07:58:40,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:40,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708489921] [2024-12-02 07:58:40,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:40,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:40,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:40,398 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:40,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:40,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708489921] [2024-12-02 07:58:40,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708489921] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:40,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:40,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:40,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464819841] [2024-12-02 07:58:40,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:40,398 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:40,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:40,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:40,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:40,399 INFO L87 Difference]: Start difference. First operand 553 states and 806 transitions. Second operand has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:40,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:40,462 INFO L93 Difference]: Finished difference Result 1004 states and 1460 transitions. [2024-12-02 07:58:40,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:40,463 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 166 [2024-12-02 07:58:40,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:40,465 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:40,465 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:40,466 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:40,466 INFO L435 NwaCegarLoop]: 782 mSDtfsCounter, 1481 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1484 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:40,466 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1484 Valid, 1566 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:40,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:40,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:40,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4580291970802919) internal successors, (799), 548 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:40,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 805 transitions. [2024-12-02 07:58:40,479 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 805 transitions. Word has length 166 [2024-12-02 07:58:40,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:40,479 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 805 transitions. [2024-12-02 07:58:40,479 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:40,479 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 805 transitions. [2024-12-02 07:58:40,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-12-02 07:58:40,480 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:40,481 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:40,481 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 07:58:40,481 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:40,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:40,481 INFO L85 PathProgramCache]: Analyzing trace with hash 430318257, now seen corresponding path program 1 times [2024-12-02 07:58:40,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:40,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673156664] [2024-12-02 07:58:40,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:40,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:40,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:40,880 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:40,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:40,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673156664] [2024-12-02 07:58:40,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673156664] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:40,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:40,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:40,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000957703] [2024-12-02 07:58:40,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:40,881 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:40,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:40,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:40,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:40,882 INFO L87 Difference]: Start difference. First operand 553 states and 805 transitions. Second operand has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:40,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:40,940 INFO L93 Difference]: Finished difference Result 1004 states and 1458 transitions. [2024-12-02 07:58:40,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:40,941 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 167 [2024-12-02 07:58:40,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:40,943 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:40,943 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:40,944 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:40,944 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 734 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 736 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:40,944 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [736 Valid, 1572 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:40,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:40,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:40,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4562043795620438) internal successors, (798), 548 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:40,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 804 transitions. [2024-12-02 07:58:40,957 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 804 transitions. Word has length 167 [2024-12-02 07:58:40,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:40,957 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 804 transitions. [2024-12-02 07:58:40,958 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:40,958 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 804 transitions. [2024-12-02 07:58:40,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-12-02 07:58:40,959 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:40,959 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:40,959 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 07:58:40,959 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:40,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:40,960 INFO L85 PathProgramCache]: Analyzing trace with hash -274414691, now seen corresponding path program 1 times [2024-12-02 07:58:40,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:40,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211873320] [2024-12-02 07:58:40,960 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:40,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:41,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:41,398 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:41,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:41,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211873320] [2024-12-02 07:58:41,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211873320] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:41,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:41,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:41,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580352934] [2024-12-02 07:58:41,398 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:41,399 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:41,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:41,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:41,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:41,400 INFO L87 Difference]: Start difference. First operand 553 states and 804 transitions. Second operand has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:41,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:41,461 INFO L93 Difference]: Finished difference Result 1004 states and 1456 transitions. [2024-12-02 07:58:41,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:41,462 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 168 [2024-12-02 07:58:41,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:41,464 INFO L225 Difference]: With dead ends: 1004 [2024-12-02 07:58:41,464 INFO L226 Difference]: Without dead ends: 553 [2024-12-02 07:58:41,465 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:41,465 INFO L435 NwaCegarLoop]: 785 mSDtfsCounter, 732 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:41,465 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 1572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:58:41,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-12-02 07:58:41,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-12-02 07:58:41,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4543795620437956) internal successors, (797), 548 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:41,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 803 transitions. [2024-12-02 07:58:41,479 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 803 transitions. Word has length 168 [2024-12-02 07:58:41,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:41,479 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 803 transitions. [2024-12-02 07:58:41,479 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:58:41,479 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 803 transitions. [2024-12-02 07:58:41,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-12-02 07:58:41,480 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:41,480 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:41,480 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 07:58:41,480 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:41,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:41,481 INFO L85 PathProgramCache]: Analyzing trace with hash 848604686, now seen corresponding path program 1 times [2024-12-02 07:58:41,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:41,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287012479] [2024-12-02 07:58:41,482 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:41,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:41,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:42,196 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:42,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:42,196 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287012479] [2024-12-02 07:58:42,196 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [287012479] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:42,196 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:42,196 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:42,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264978378] [2024-12-02 07:58:42,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:42,197 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:42,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:42,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:42,197 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:42,198 INFO L87 Difference]: Start difference. First operand 553 states and 803 transitions. Second operand has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:42,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:42,421 INFO L93 Difference]: Finished difference Result 1010 states and 1462 transitions. [2024-12-02 07:58:42,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:58:42,422 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 169 [2024-12-02 07:58:42,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:42,425 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 07:58:42,425 INFO L226 Difference]: Without dead ends: 557 [2024-12-02 07:58:42,426 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:42,426 INFO L435 NwaCegarLoop]: 793 mSDtfsCounter, 2 mSDsluCounter, 2186 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2979 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:42,427 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2979 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 216 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:58:42,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-12-02 07:58:42,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555. [2024-12-02 07:58:42,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4527272727272726) internal successors, (799), 550 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:42,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 805 transitions. [2024-12-02 07:58:42,437 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 805 transitions. Word has length 169 [2024-12-02 07:58:42,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:42,437 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 805 transitions. [2024-12-02 07:58:42,437 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:42,437 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 805 transitions. [2024-12-02 07:58:42,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-12-02 07:58:42,438 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:42,439 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:42,439 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 07:58:42,439 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:42,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:42,439 INFO L85 PathProgramCache]: Analyzing trace with hash -2121667287, now seen corresponding path program 1 times [2024-12-02 07:58:42,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:42,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122551148] [2024-12-02 07:58:42,440 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:42,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:42,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:42,765 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:42,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:42,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122551148] [2024-12-02 07:58:42,765 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [122551148] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:42,765 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:42,765 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:42,765 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602598018] [2024-12-02 07:58:42,765 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:42,766 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:42,766 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:42,766 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:42,766 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:42,767 INFO L87 Difference]: Start difference. First operand 555 states and 805 transitions. Second operand has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:42,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:42,866 INFO L93 Difference]: Finished difference Result 1008 states and 1458 transitions. [2024-12-02 07:58:42,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:42,871 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 170 [2024-12-02 07:58:42,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:42,873 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:42,873 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:42,874 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:42,875 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 684 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 684 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:42,875 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [684 Valid, 1524 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:42,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:42,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:42,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.450909090909091) internal successors, (798), 550 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:42,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 804 transitions. [2024-12-02 07:58:42,888 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 804 transitions. Word has length 170 [2024-12-02 07:58:42,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:42,888 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 804 transitions. [2024-12-02 07:58:42,889 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:42,889 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 804 transitions. [2024-12-02 07:58:42,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-12-02 07:58:42,890 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:42,890 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:42,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 07:58:42,890 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:42,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:42,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1629691787, now seen corresponding path program 1 times [2024-12-02 07:58:42,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:42,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708893011] [2024-12-02 07:58:42,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:42,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:43,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:43,418 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:43,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:43,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708893011] [2024-12-02 07:58:43,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708893011] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:43,418 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:43,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:43,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613578392] [2024-12-02 07:58:43,418 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:43,419 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:43,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:43,419 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:43,419 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:43,419 INFO L87 Difference]: Start difference. First operand 555 states and 804 transitions. Second operand has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:43,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:43,530 INFO L93 Difference]: Finished difference Result 1008 states and 1456 transitions. [2024-12-02 07:58:43,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:43,531 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 171 [2024-12-02 07:58:43,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:43,533 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:43,533 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:43,533 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:43,534 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 1360 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1360 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:43,534 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1360 Valid, 1524 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:43,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:43,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:43,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.449090909090909) internal successors, (797), 550 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:43,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 803 transitions. [2024-12-02 07:58:43,547 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 803 transitions. Word has length 171 [2024-12-02 07:58:43,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:43,547 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 803 transitions. [2024-12-02 07:58:43,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:43,547 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 803 transitions. [2024-12-02 07:58:43,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2024-12-02 07:58:43,548 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:43,548 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:43,549 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 07:58:43,549 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:43,549 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:43,549 INFO L85 PathProgramCache]: Analyzing trace with hash -649195798, now seen corresponding path program 1 times [2024-12-02 07:58:43,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:43,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969096351] [2024-12-02 07:58:43,549 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:43,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:43,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:44,026 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:44,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:44,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969096351] [2024-12-02 07:58:44,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1969096351] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:44,026 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:44,026 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:44,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749220004] [2024-12-02 07:58:44,026 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:44,027 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:44,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:44,027 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:44,027 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:44,027 INFO L87 Difference]: Start difference. First operand 555 states and 803 transitions. Second operand has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:44,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:44,125 INFO L93 Difference]: Finished difference Result 1008 states and 1454 transitions. [2024-12-02 07:58:44,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:44,125 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 172 [2024-12-02 07:58:44,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:44,127 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:44,127 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:44,127 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:44,128 INFO L435 NwaCegarLoop]: 761 mSDtfsCounter, 681 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 681 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:44,128 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [681 Valid, 1531 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:44,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:44,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:44,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4472727272727273) internal successors, (796), 550 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:44,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 802 transitions. [2024-12-02 07:58:44,136 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 802 transitions. Word has length 172 [2024-12-02 07:58:44,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:44,137 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 802 transitions. [2024-12-02 07:58:44,137 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:44,137 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 802 transitions. [2024-12-02 07:58:44,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-12-02 07:58:44,137 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:44,138 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:44,138 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 07:58:44,138 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:44,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:44,138 INFO L85 PathProgramCache]: Analyzing trace with hash -63304310, now seen corresponding path program 1 times [2024-12-02 07:58:44,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:44,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389267462] [2024-12-02 07:58:44,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:44,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:44,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:44,416 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:44,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:44,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389267462] [2024-12-02 07:58:44,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389267462] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:44,416 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:44,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:44,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446361382] [2024-12-02 07:58:44,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:44,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:44,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:44,417 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:44,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:44,418 INFO L87 Difference]: Start difference. First operand 555 states and 802 transitions. Second operand has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:44,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:44,570 INFO L93 Difference]: Finished difference Result 1008 states and 1452 transitions. [2024-12-02 07:58:44,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:44,570 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173 [2024-12-02 07:58:44,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:44,571 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:44,571 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:44,572 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:44,572 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 666 mSDsluCounter, 724 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 666 SdHoareTripleChecker+Valid, 1446 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:44,572 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [666 Valid, 1446 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:44,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:44,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:44,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4454545454545455) internal successors, (795), 550 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:44,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 801 transitions. [2024-12-02 07:58:44,586 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 801 transitions. Word has length 173 [2024-12-02 07:58:44,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:44,586 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 801 transitions. [2024-12-02 07:58:44,586 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:44,586 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 801 transitions. [2024-12-02 07:58:44,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-12-02 07:58:44,587 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:44,588 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:44,588 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 07:58:44,588 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:44,588 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:44,588 INFO L85 PathProgramCache]: Analyzing trace with hash 310833802, now seen corresponding path program 1 times [2024-12-02 07:58:44,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:44,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193179289] [2024-12-02 07:58:44,589 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:44,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:44,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:45,062 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:45,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:45,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193179289] [2024-12-02 07:58:45,062 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193179289] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:45,062 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:45,062 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:45,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916309474] [2024-12-02 07:58:45,063 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:45,063 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:45,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:45,064 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:45,064 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:45,065 INFO L87 Difference]: Start difference. First operand 555 states and 801 transitions. Second operand has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:45,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:45,218 INFO L93 Difference]: Finished difference Result 1008 states and 1450 transitions. [2024-12-02 07:58:45,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:45,219 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 174 [2024-12-02 07:58:45,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:45,220 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:45,220 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:45,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:45,221 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 664 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 664 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:45,221 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [664 Valid, 1453 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:45,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:45,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:45,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4436363636363636) internal successors, (794), 550 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:45,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 800 transitions. [2024-12-02 07:58:45,230 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 800 transitions. Word has length 174 [2024-12-02 07:58:45,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:45,230 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 800 transitions. [2024-12-02 07:58:45,231 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:45,231 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 800 transitions. [2024-12-02 07:58:45,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2024-12-02 07:58:45,231 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:45,232 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:45,232 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 07:58:45,232 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:45,232 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:45,232 INFO L85 PathProgramCache]: Analyzing trace with hash -361759605, now seen corresponding path program 1 times [2024-12-02 07:58:45,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:45,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507987657] [2024-12-02 07:58:45,233 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:45,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:45,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:45,682 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:45,683 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:45,683 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507987657] [2024-12-02 07:58:45,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [507987657] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:45,683 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:45,683 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:45,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057608685] [2024-12-02 07:58:45,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:45,683 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:45,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:45,684 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:45,684 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:45,684 INFO L87 Difference]: Start difference. First operand 555 states and 800 transitions. Second operand has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:45,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:45,859 INFO L93 Difference]: Finished difference Result 1008 states and 1448 transitions. [2024-12-02 07:58:45,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:45,860 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 175 [2024-12-02 07:58:45,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:45,862 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:45,862 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:45,862 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:45,863 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 1318 mSDsluCounter, 724 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1318 SdHoareTripleChecker+Valid, 1446 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:45,863 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1318 Valid, 1446 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:45,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:45,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:45,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4418181818181819) internal successors, (793), 550 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:45,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 799 transitions. [2024-12-02 07:58:45,871 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 799 transitions. Word has length 175 [2024-12-02 07:58:45,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:45,872 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 799 transitions. [2024-12-02 07:58:45,872 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:45,872 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 799 transitions. [2024-12-02 07:58:45,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-12-02 07:58:45,873 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:45,873 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:45,873 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 07:58:45,873 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:45,873 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:45,873 INFO L85 PathProgramCache]: Analyzing trace with hash 204745545, now seen corresponding path program 1 times [2024-12-02 07:58:45,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:45,873 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333284923] [2024-12-02 07:58:45,873 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:45,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:45,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:46,194 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:46,194 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:46,194 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333284923] [2024-12-02 07:58:46,194 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [333284923] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:46,194 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:46,194 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:46,194 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416083658] [2024-12-02 07:58:46,194 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:46,195 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:46,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:46,195 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:46,195 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:46,195 INFO L87 Difference]: Start difference. First operand 555 states and 799 transitions. Second operand has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:46,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:46,352 INFO L93 Difference]: Finished difference Result 1008 states and 1446 transitions. [2024-12-02 07:58:46,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:46,352 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 176 [2024-12-02 07:58:46,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:46,354 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:46,355 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:46,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:46,355 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 662 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 662 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:46,356 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [662 Valid, 1453 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:46,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:46,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:46,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.44) internal successors, (792), 550 states have internal predecessors, (792), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:46,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 798 transitions. [2024-12-02 07:58:46,363 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 798 transitions. Word has length 176 [2024-12-02 07:58:46,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:46,364 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 798 transitions. [2024-12-02 07:58:46,364 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:46,364 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 798 transitions. [2024-12-02 07:58:46,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-12-02 07:58:46,364 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:46,365 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:46,365 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 07:58:46,365 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:46,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:46,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1282586636, now seen corresponding path program 1 times [2024-12-02 07:58:46,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:46,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085238808] [2024-12-02 07:58:46,365 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:46,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:46,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:46,685 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:46,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:46,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085238808] [2024-12-02 07:58:46,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1085238808] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:46,685 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:46,685 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:58:46,685 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1152206750] [2024-12-02 07:58:46,685 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:46,686 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:58:46,686 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:46,686 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:58:46,686 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:58:46,687 INFO L87 Difference]: Start difference. First operand 555 states and 798 transitions. Second operand has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:46,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:46,814 INFO L93 Difference]: Finished difference Result 1008 states and 1444 transitions. [2024-12-02 07:58:46,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:46,815 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 177 [2024-12-02 07:58:46,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:46,817 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:46,817 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:46,817 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:46,817 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 646 mSDsluCounter, 724 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 646 SdHoareTripleChecker+Valid, 1446 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:46,818 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [646 Valid, 1446 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:46,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:46,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:46,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4381818181818182) internal successors, (791), 550 states have internal predecessors, (791), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:46,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 797 transitions. [2024-12-02 07:58:46,825 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 797 transitions. Word has length 177 [2024-12-02 07:58:46,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:46,825 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 797 transitions. [2024-12-02 07:58:46,825 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.25) internal successors, (165), 4 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:46,825 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 797 transitions. [2024-12-02 07:58:46,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-12-02 07:58:46,826 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:46,826 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:46,826 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 07:58:46,826 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:46,827 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:46,827 INFO L85 PathProgramCache]: Analyzing trace with hash 77881224, now seen corresponding path program 1 times [2024-12-02 07:58:46,827 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:46,827 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247064901] [2024-12-02 07:58:46,827 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:46,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:46,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:47,219 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:47,220 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:47,220 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247064901] [2024-12-02 07:58:47,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1247064901] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:47,220 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:47,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:47,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010131301] [2024-12-02 07:58:47,220 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:47,220 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:47,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:47,221 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:47,221 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:47,221 INFO L87 Difference]: Start difference. First operand 555 states and 797 transitions. Second operand has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:47,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:47,346 INFO L93 Difference]: Finished difference Result 1008 states and 1442 transitions. [2024-12-02 07:58:47,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:47,347 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 178 [2024-12-02 07:58:47,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:47,348 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:47,348 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:47,349 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:47,349 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 660 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:47,349 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [660 Valid, 1453 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:47,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:47,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:47,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4363636363636363) internal successors, (790), 550 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:47,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 796 transitions. [2024-12-02 07:58:47,356 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 796 transitions. Word has length 178 [2024-12-02 07:58:47,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:47,356 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 796 transitions. [2024-12-02 07:58:47,357 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:47,357 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 796 transitions. [2024-12-02 07:58:47,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-12-02 07:58:47,357 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:47,358 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:47,358 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 07:58:47,358 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:47,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:47,358 INFO L85 PathProgramCache]: Analyzing trace with hash -2054770675, now seen corresponding path program 1 times [2024-12-02 07:58:47,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:47,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47618001] [2024-12-02 07:58:47,358 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:47,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:47,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:47,788 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:47,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:47,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47618001] [2024-12-02 07:58:47,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47618001] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:47,789 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:47,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:47,789 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834197987] [2024-12-02 07:58:47,789 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:47,789 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:47,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:47,790 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:47,790 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:47,790 INFO L87 Difference]: Start difference. First operand 555 states and 796 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:47,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:47,946 INFO L93 Difference]: Finished difference Result 1008 states and 1440 transitions. [2024-12-02 07:58:47,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:47,947 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 179 [2024-12-02 07:58:47,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:47,948 INFO L225 Difference]: With dead ends: 1008 [2024-12-02 07:58:47,948 INFO L226 Difference]: Without dead ends: 555 [2024-12-02 07:58:47,949 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:47,949 INFO L435 NwaCegarLoop]: 722 mSDtfsCounter, 659 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 659 SdHoareTripleChecker+Valid, 1453 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:47,950 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [659 Valid, 1453 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:47,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-12-02 07:58:47,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-12-02 07:58:47,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4345454545454546) internal successors, (789), 550 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:47,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 795 transitions. [2024-12-02 07:58:47,960 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 795 transitions. Word has length 179 [2024-12-02 07:58:47,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:47,961 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 795 transitions. [2024-12-02 07:58:47,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:47,961 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 795 transitions. [2024-12-02 07:58:47,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 07:58:47,962 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:47,962 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:47,962 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 07:58:47,962 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:47,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:47,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1540677817, now seen corresponding path program 1 times [2024-12-02 07:58:47,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:47,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444502163] [2024-12-02 07:58:47,963 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:47,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:48,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:48,528 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:48,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:48,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444502163] [2024-12-02 07:58:48,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [444502163] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:48,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:48,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:48,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886570536] [2024-12-02 07:58:48,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:48,529 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:48,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:48,529 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:48,529 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:48,529 INFO L87 Difference]: Start difference. First operand 555 states and 795 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:48,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:48,856 INFO L93 Difference]: Finished difference Result 1010 states and 1441 transitions. [2024-12-02 07:58:48,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:58:48,857 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-12-02 07:58:48,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:48,858 INFO L225 Difference]: With dead ends: 1010 [2024-12-02 07:58:48,858 INFO L226 Difference]: Without dead ends: 557 [2024-12-02 07:58:48,858 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:48,859 INFO L435 NwaCegarLoop]: 599 mSDtfsCounter, 690 mSDsluCounter, 1184 mSDsCounter, 0 mSdLazyCounter, 583 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 690 SdHoareTripleChecker+Valid, 1783 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 583 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:48,859 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [690 Valid, 1783 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 583 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:58:48,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-12-02 07:58:48,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 556. [2024-12-02 07:58:48,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4337568058076224) internal successors, (790), 551 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:48,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 796 transitions. [2024-12-02 07:58:48,869 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 796 transitions. Word has length 180 [2024-12-02 07:58:48,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:48,869 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 796 transitions. [2024-12-02 07:58:48,869 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:48,869 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 796 transitions. [2024-12-02 07:58:48,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-12-02 07:58:48,869 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:48,870 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:48,870 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 07:58:48,870 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:48,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:48,870 INFO L85 PathProgramCache]: Analyzing trace with hash 445710734, now seen corresponding path program 1 times [2024-12-02 07:58:48,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:48,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242774715] [2024-12-02 07:58:48,870 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:48,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:48,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:49,422 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:49,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:49,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242774715] [2024-12-02 07:58:49,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [242774715] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:49,423 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:49,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:58:49,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1530204412] [2024-12-02 07:58:49,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:49,423 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:58:49,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:49,423 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:58:49,424 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:49,424 INFO L87 Difference]: Start difference. First operand 556 states and 796 transitions. Second operand has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:49,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:49,717 INFO L93 Difference]: Finished difference Result 1079 states and 1515 transitions. [2024-12-02 07:58:49,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 07:58:49,718 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-12-02 07:58:49,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:49,719 INFO L225 Difference]: With dead ends: 1079 [2024-12-02 07:58:49,719 INFO L226 Difference]: Without dead ends: 621 [2024-12-02 07:58:49,720 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:58:49,720 INFO L435 NwaCegarLoop]: 830 mSDtfsCounter, 73 mSDsluCounter, 3055 mSDsCounter, 0 mSdLazyCounter, 325 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 3885 SdHoareTripleChecker+Invalid, 327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:49,721 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 3885 Invalid, 327 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 325 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:58:49,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2024-12-02 07:58:49,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 556. [2024-12-02 07:58:49,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4319419237749547) internal successors, (789), 551 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:58:49,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 795 transitions. [2024-12-02 07:58:49,731 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 795 transitions. Word has length 180 [2024-12-02 07:58:49,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:49,732 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 795 transitions. [2024-12-02 07:58:49,732 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.0) internal successors, (168), 6 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:49,732 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 795 transitions. [2024-12-02 07:58:49,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2024-12-02 07:58:49,733 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:49,733 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:49,733 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 07:58:49,733 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:49,733 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:49,733 INFO L85 PathProgramCache]: Analyzing trace with hash 203821865, now seen corresponding path program 1 times [2024-12-02 07:58:49,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:49,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616714120] [2024-12-02 07:58:49,734 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:49,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:49,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:50,552 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:58:50,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:50,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616714120] [2024-12-02 07:58:50,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [616714120] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:50,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:50,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:58:50,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [927676688] [2024-12-02 07:58:50,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:50,553 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:58:50,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:50,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:58:50,554 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:50,554 INFO L87 Difference]: Start difference. First operand 556 states and 795 transitions. Second operand has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:50,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:50,671 INFO L93 Difference]: Finished difference Result 1165 states and 1640 transitions. [2024-12-02 07:58:50,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:58:50,672 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 181 [2024-12-02 07:58:50,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:50,674 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:50,674 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:50,675 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:58:50,675 INFO L435 NwaCegarLoop]: 776 mSDtfsCounter, 1134 mSDsluCounter, 2322 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 3098 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:50,675 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 3098 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:50,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:50,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:50,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.399715504978663) internal successors, (984), 703 states have internal predecessors, (984), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:50,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 996 transitions. [2024-12-02 07:58:50,693 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 996 transitions. Word has length 181 [2024-12-02 07:58:50,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:50,693 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 996 transitions. [2024-12-02 07:58:50,693 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.166666666666668) internal successors, (169), 6 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:58:50,693 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 996 transitions. [2024-12-02 07:58:50,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 449 [2024-12-02 07:58:50,696 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:50,696 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:50,696 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 07:58:50,696 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:50,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:50,697 INFO L85 PathProgramCache]: Analyzing trace with hash -1787257894, now seen corresponding path program 1 times [2024-12-02 07:58:50,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:50,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832764601] [2024-12-02 07:58:50,697 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:50,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:50,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:51,591 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:51,592 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:51,592 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832764601] [2024-12-02 07:58:51,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1832764601] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:51,592 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:51,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:51,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034066219] [2024-12-02 07:58:51,592 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:51,593 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:51,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:51,593 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:51,594 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:51,594 INFO L87 Difference]: Start difference. First operand 711 states and 996 transitions. Second operand has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:51,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:51,721 INFO L93 Difference]: Finished difference Result 1165 states and 1639 transitions. [2024-12-02 07:58:51,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:51,722 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 448 [2024-12-02 07:58:51,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:51,723 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:51,723 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:51,724 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:51,724 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1325 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1328 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:51,724 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1328 Valid, 1444 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:51,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:51,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:51,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3982930298719773) internal successors, (983), 703 states have internal predecessors, (983), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:51,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 995 transitions. [2024-12-02 07:58:51,744 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 995 transitions. Word has length 448 [2024-12-02 07:58:51,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:51,744 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 995 transitions. [2024-12-02 07:58:51,744 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.2) internal successors, (421), 5 states have internal predecessors, (421), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:51,745 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 995 transitions. [2024-12-02 07:58:51,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 450 [2024-12-02 07:58:51,749 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:51,750 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:51,750 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 07:58:51,750 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:51,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:51,751 INFO L85 PathProgramCache]: Analyzing trace with hash 2025497410, now seen corresponding path program 1 times [2024-12-02 07:58:51,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:51,751 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834792480] [2024-12-02 07:58:51,751 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:51,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:52,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:52,479 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:52,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:52,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834792480] [2024-12-02 07:58:52,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834792480] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:52,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:52,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:52,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277322348] [2024-12-02 07:58:52,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:52,480 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:52,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:52,480 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:52,480 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:52,481 INFO L87 Difference]: Start difference. First operand 711 states and 995 transitions. Second operand has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:52,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:52,611 INFO L93 Difference]: Finished difference Result 1165 states and 1637 transitions. [2024-12-02 07:58:52,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:52,611 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 449 [2024-12-02 07:58:52,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:52,615 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:52,615 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:52,615 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:52,615 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 716 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 719 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:52,615 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [719 Valid, 1451 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:52,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:52,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:52,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3968705547652915) internal successors, (982), 703 states have internal predecessors, (982), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:52,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 994 transitions. [2024-12-02 07:58:52,626 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 994 transitions. Word has length 449 [2024-12-02 07:58:52,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:52,627 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 994 transitions. [2024-12-02 07:58:52,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.4) internal successors, (422), 5 states have internal predecessors, (422), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:52,627 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 994 transitions. [2024-12-02 07:58:52,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 451 [2024-12-02 07:58:52,628 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:52,628 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:52,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 07:58:52,629 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:52,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:52,629 INFO L85 PathProgramCache]: Analyzing trace with hash -19188593, now seen corresponding path program 1 times [2024-12-02 07:58:52,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:52,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054937213] [2024-12-02 07:58:52,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:52,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:52,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:53,202 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:53,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:53,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054937213] [2024-12-02 07:58:53,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054937213] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:53,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:53,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:53,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451654033] [2024-12-02 07:58:53,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:53,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:53,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:53,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:53,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:53,203 INFO L87 Difference]: Start difference. First operand 711 states and 994 transitions. Second operand has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:53,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:53,324 INFO L93 Difference]: Finished difference Result 1165 states and 1635 transitions. [2024-12-02 07:58:53,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:53,324 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 450 [2024-12-02 07:58:53,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:53,327 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:53,327 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:53,327 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:53,328 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 708 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 711 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:53,328 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [711 Valid, 1451 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:53,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:53,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:53,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.395448079658606) internal successors, (981), 703 states have internal predecessors, (981), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:53,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 993 transitions. [2024-12-02 07:58:53,338 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 993 transitions. Word has length 450 [2024-12-02 07:58:53,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:53,339 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 993 transitions. [2024-12-02 07:58:53,339 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:53,339 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 993 transitions. [2024-12-02 07:58:53,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2024-12-02 07:58:53,341 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:53,341 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:53,341 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 07:58:53,341 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:53,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:53,342 INFO L85 PathProgramCache]: Analyzing trace with hash -189619113, now seen corresponding path program 1 times [2024-12-02 07:58:53,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:53,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90040460] [2024-12-02 07:58:53,342 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:53,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:53,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:54,099 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:54,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:54,099 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90040460] [2024-12-02 07:58:54,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [90040460] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:54,099 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:54,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:54,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136360738] [2024-12-02 07:58:54,099 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:54,100 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:54,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:54,100 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:54,100 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:54,101 INFO L87 Difference]: Start difference. First operand 711 states and 993 transitions. Second operand has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:54,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:54,206 INFO L93 Difference]: Finished difference Result 1165 states and 1633 transitions. [2024-12-02 07:58:54,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:54,207 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 451 [2024-12-02 07:58:54,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:54,208 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:54,208 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:54,209 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:54,209 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1277 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1280 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:54,209 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1280 Valid, 1444 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:54,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:54,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:54,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3940256045519204) internal successors, (980), 703 states have internal predecessors, (980), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:54,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 992 transitions. [2024-12-02 07:58:54,225 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 992 transitions. Word has length 451 [2024-12-02 07:58:54,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:54,225 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 992 transitions. [2024-12-02 07:58:54,225 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:54,225 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 992 transitions. [2024-12-02 07:58:54,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 453 [2024-12-02 07:58:54,228 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:54,229 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:54,229 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 07:58:54,229 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:54,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:54,229 INFO L85 PathProgramCache]: Analyzing trace with hash -353435452, now seen corresponding path program 1 times [2024-12-02 07:58:54,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:54,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324859560] [2024-12-02 07:58:54,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:54,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:54,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:54,887 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:54,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:54,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324859560] [2024-12-02 07:58:54,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324859560] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:54,888 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:54,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:54,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292624327] [2024-12-02 07:58:54,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:54,888 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:54,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:54,889 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:54,889 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:54,889 INFO L87 Difference]: Start difference. First operand 711 states and 992 transitions. Second operand has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:54,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:54,996 INFO L93 Difference]: Finished difference Result 1165 states and 1631 transitions. [2024-12-02 07:58:54,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:54,997 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 452 [2024-12-02 07:58:54,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:54,998 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:54,998 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:54,999 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:54,999 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 692 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:54,999 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 1451 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:55,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:55,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:55,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3926031294452348) internal successors, (979), 703 states have internal predecessors, (979), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:55,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 991 transitions. [2024-12-02 07:58:55,010 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 991 transitions. Word has length 452 [2024-12-02 07:58:55,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:55,010 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 991 transitions. [2024-12-02 07:58:55,010 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:55,010 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 991 transitions. [2024-12-02 07:58:55,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 454 [2024-12-02 07:58:55,012 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:55,012 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:55,012 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 07:58:55,012 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:55,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:55,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1715196140, now seen corresponding path program 1 times [2024-12-02 07:58:55,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:55,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499041241] [2024-12-02 07:58:55,013 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:55,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:55,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:55,574 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:55,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:55,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499041241] [2024-12-02 07:58:55,574 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1499041241] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:55,574 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:55,574 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:55,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362574354] [2024-12-02 07:58:55,575 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:55,575 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:55,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:55,575 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:55,575 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:55,576 INFO L87 Difference]: Start difference. First operand 711 states and 991 transitions. Second operand has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:55,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:55,691 INFO L93 Difference]: Finished difference Result 1165 states and 1629 transitions. [2024-12-02 07:58:55,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:55,692 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 453 [2024-12-02 07:58:55,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:55,693 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:55,693 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:55,693 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:55,694 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1245 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1248 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:55,694 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1248 Valid, 1444 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:55,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:55,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:55,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.391180654338549) internal successors, (978), 703 states have internal predecessors, (978), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:55,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 990 transitions. [2024-12-02 07:58:55,703 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 990 transitions. Word has length 453 [2024-12-02 07:58:55,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:55,704 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 990 transitions. [2024-12-02 07:58:55,704 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:55,704 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 990 transitions. [2024-12-02 07:58:55,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2024-12-02 07:58:55,705 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:55,705 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:55,705 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 07:58:55,705 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:55,706 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:55,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1189986183, now seen corresponding path program 1 times [2024-12-02 07:58:55,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:55,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171039201] [2024-12-02 07:58:55,706 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:55,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:55,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:56,269 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:56,270 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:56,270 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171039201] [2024-12-02 07:58:56,270 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1171039201] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:56,270 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:56,270 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:56,270 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593766904] [2024-12-02 07:58:56,270 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:56,270 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:56,270 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:56,271 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:56,271 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:56,271 INFO L87 Difference]: Start difference. First operand 711 states and 990 transitions. Second operand has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:56,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:56,377 INFO L93 Difference]: Finished difference Result 1165 states and 1627 transitions. [2024-12-02 07:58:56,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:56,378 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 454 [2024-12-02 07:58:56,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:56,379 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:56,379 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:56,380 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:56,380 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1229 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1232 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:56,380 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1232 Valid, 1444 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:56,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:56,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:56,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3897581792318634) internal successors, (977), 703 states have internal predecessors, (977), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:56,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 989 transitions. [2024-12-02 07:58:56,390 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 989 transitions. Word has length 454 [2024-12-02 07:58:56,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:56,390 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 989 transitions. [2024-12-02 07:58:56,390 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:56,390 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 989 transitions. [2024-12-02 07:58:56,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 456 [2024-12-02 07:58:56,392 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:56,392 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:56,392 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 07:58:56,392 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:56,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:56,392 INFO L85 PathProgramCache]: Analyzing trace with hash 686713089, now seen corresponding path program 1 times [2024-12-02 07:58:56,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:56,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198287472] [2024-12-02 07:58:56,392 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:56,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:56,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:56,992 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:56,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:56,993 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198287472] [2024-12-02 07:58:56,993 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198287472] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:56,993 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:56,993 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:56,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1359204505] [2024-12-02 07:58:56,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:56,994 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:56,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:56,994 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:56,994 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:56,995 INFO L87 Difference]: Start difference. First operand 711 states and 989 transitions. Second operand has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:57,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:57,126 INFO L93 Difference]: Finished difference Result 1165 states and 1625 transitions. [2024-12-02 07:58:57,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:57,127 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 455 [2024-12-02 07:58:57,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:57,130 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:57,130 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:57,130 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:57,131 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 1213 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1216 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:57,131 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1216 Valid, 1444 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:57,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:57,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:57,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3883357041251778) internal successors, (976), 703 states have internal predecessors, (976), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:57,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 988 transitions. [2024-12-02 07:58:57,146 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 988 transitions. Word has length 455 [2024-12-02 07:58:57,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:57,146 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 988 transitions. [2024-12-02 07:58:57,147 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:57,147 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 988 transitions. [2024-12-02 07:58:57,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 457 [2024-12-02 07:58:57,150 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:57,150 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:57,150 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 07:58:57,150 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:57,151 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:57,151 INFO L85 PathProgramCache]: Analyzing trace with hash -188533842, now seen corresponding path program 1 times [2024-12-02 07:58:57,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:57,151 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43300818] [2024-12-02 07:58:57,151 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:57,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:57,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:57,891 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:57,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:57,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43300818] [2024-12-02 07:58:57,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43300818] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:57,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:57,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:57,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544063140] [2024-12-02 07:58:57,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:57,892 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:57,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:57,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:57,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:57,893 INFO L87 Difference]: Start difference. First operand 711 states and 988 transitions. Second operand has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:57,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:57,970 INFO L93 Difference]: Finished difference Result 1165 states and 1623 transitions. [2024-12-02 07:58:57,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:57,971 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 456 [2024-12-02 07:58:57,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:57,972 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:57,972 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:57,973 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:57,973 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 645 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 648 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:57,973 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [648 Valid, 1499 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:57,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:57,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:57,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3869132290184922) internal successors, (975), 703 states have internal predecessors, (975), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:57,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 987 transitions. [2024-12-02 07:58:57,983 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 987 transitions. Word has length 456 [2024-12-02 07:58:57,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:57,983 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 987 transitions. [2024-12-02 07:58:57,983 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:57,983 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 987 transitions. [2024-12-02 07:58:57,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 458 [2024-12-02 07:58:57,985 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:57,985 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:57,985 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 07:58:57,985 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:57,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:57,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1644342422, now seen corresponding path program 1 times [2024-12-02 07:58:57,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:57,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147862251] [2024-12-02 07:58:57,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:57,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:58,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:58,565 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:58,565 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:58,565 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147862251] [2024-12-02 07:58:58,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1147862251] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:58,565 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:58,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:58,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169113530] [2024-12-02 07:58:58,565 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:58,566 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:58,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:58,567 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:58,567 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:58,567 INFO L87 Difference]: Start difference. First operand 711 states and 987 transitions. Second operand has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:58,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:58,640 INFO L93 Difference]: Finished difference Result 1165 states and 1621 transitions. [2024-12-02 07:58:58,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:58,641 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 457 [2024-12-02 07:58:58,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:58,643 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:58,643 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:58,643 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:58,643 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 1166 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1169 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:58,644 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1169 Valid, 1492 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:58,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:58,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:58,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3854907539118066) internal successors, (974), 703 states have internal predecessors, (974), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:58,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 986 transitions. [2024-12-02 07:58:58,653 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 986 transitions. Word has length 457 [2024-12-02 07:58:58,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:58,653 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 986 transitions. [2024-12-02 07:58:58,653 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:58,653 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 986 transitions. [2024-12-02 07:58:58,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 459 [2024-12-02 07:58:58,654 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:58,655 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:58,655 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 07:58:58,655 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:58,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:58,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1436555875, now seen corresponding path program 1 times [2024-12-02 07:58:58,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:58,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141941540] [2024-12-02 07:58:58,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:58,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:58,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:59,216 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:59,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:59,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141941540] [2024-12-02 07:58:59,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141941540] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:59,217 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:59,217 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:59,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537724417] [2024-12-02 07:58:59,217 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:59,217 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:59,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:59,218 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:59,218 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:59,218 INFO L87 Difference]: Start difference. First operand 711 states and 986 transitions. Second operand has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:59,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:59,301 INFO L93 Difference]: Finished difference Result 1165 states and 1619 transitions. [2024-12-02 07:58:59,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:59,301 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 458 [2024-12-02 07:58:59,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:59,304 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:59,304 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:59,304 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:59,305 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 1150 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1153 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:59,305 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1153 Valid, 1492 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:59,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:59,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:59,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3840682788051208) internal successors, (973), 703 states have internal predecessors, (973), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:59,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 985 transitions. [2024-12-02 07:58:59,320 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 985 transitions. Word has length 458 [2024-12-02 07:58:59,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:59,320 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 985 transitions. [2024-12-02 07:58:59,321 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:59,321 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 985 transitions. [2024-12-02 07:58:59,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2024-12-02 07:58:59,323 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:59,323 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:59,323 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 07:58:59,323 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:59,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:59,324 INFO L85 PathProgramCache]: Analyzing trace with hash -1605313621, now seen corresponding path program 1 times [2024-12-02 07:58:59,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:59,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541666201] [2024-12-02 07:58:59,324 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:59,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:58:59,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:58:59,902 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:58:59,903 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:58:59,903 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541666201] [2024-12-02 07:58:59,903 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1541666201] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:58:59,903 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:58:59,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:58:59,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485637359] [2024-12-02 07:58:59,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:58:59,904 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:58:59,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:58:59,904 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:58:59,904 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:58:59,905 INFO L87 Difference]: Start difference. First operand 711 states and 985 transitions. Second operand has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:59,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:58:59,981 INFO L93 Difference]: Finished difference Result 1165 states and 1617 transitions. [2024-12-02 07:58:59,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:58:59,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 459 [2024-12-02 07:58:59,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:58:59,983 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:58:59,983 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:58:59,983 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:58:59,984 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 621 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 624 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:58:59,984 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [624 Valid, 1499 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:58:59,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:58:59,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:58:59,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3826458036984353) internal successors, (972), 703 states have internal predecessors, (972), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:58:59,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 984 transitions. [2024-12-02 07:58:59,993 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 984 transitions. Word has length 459 [2024-12-02 07:58:59,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:58:59,994 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 984 transitions. [2024-12-02 07:58:59,994 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:58:59,994 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 984 transitions. [2024-12-02 07:58:59,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 461 [2024-12-02 07:58:59,995 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:58:59,996 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:58:59,996 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 07:58:59,996 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:58:59,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:58:59,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1083755368, now seen corresponding path program 1 times [2024-12-02 07:58:59,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:58:59,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114722276] [2024-12-02 07:58:59,997 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:58:59,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:00,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:00,621 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:00,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:00,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114722276] [2024-12-02 07:59:00,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114722276] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:00,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:00,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:00,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225054022] [2024-12-02 07:59:00,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:00,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:00,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:00,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:00,622 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:00,622 INFO L87 Difference]: Start difference. First operand 711 states and 984 transitions. Second operand has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:00,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:00,671 INFO L93 Difference]: Finished difference Result 1165 states and 1615 transitions. [2024-12-02 07:59:00,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:00,672 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 460 [2024-12-02 07:59:00,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:00,673 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:00,673 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:00,674 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:00,674 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 1111 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1114 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:00,674 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1114 Valid, 1516 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:59:00,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:00,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:00,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3812233285917497) internal successors, (971), 703 states have internal predecessors, (971), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:00,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 983 transitions. [2024-12-02 07:59:00,684 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 983 transitions. Word has length 460 [2024-12-02 07:59:00,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:00,684 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 983 transitions. [2024-12-02 07:59:00,684 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:00,684 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 983 transitions. [2024-12-02 07:59:00,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 462 [2024-12-02 07:59:00,686 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:00,686 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:00,686 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 07:59:00,686 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:00,686 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:00,686 INFO L85 PathProgramCache]: Analyzing trace with hash 2085697088, now seen corresponding path program 1 times [2024-12-02 07:59:00,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:00,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769463218] [2024-12-02 07:59:00,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:00,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:00,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:01,319 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:01,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:01,320 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769463218] [2024-12-02 07:59:01,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1769463218] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:01,320 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:01,320 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:01,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1541386913] [2024-12-02 07:59:01,320 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:01,321 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:01,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:01,321 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:01,321 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:01,321 INFO L87 Difference]: Start difference. First operand 711 states and 983 transitions. Second operand has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:01,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:01,373 INFO L93 Difference]: Finished difference Result 1165 states and 1613 transitions. [2024-12-02 07:59:01,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:01,373 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 461 [2024-12-02 07:59:01,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:01,374 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:01,374 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:01,375 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:01,375 INFO L435 NwaCegarLoop]: 757 mSDtfsCounter, 1095 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1098 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:01,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1098 Valid, 1516 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:59:01,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:01,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:01,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.379800853485064) internal successors, (970), 703 states have internal predecessors, (970), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:01,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 982 transitions. [2024-12-02 07:59:01,386 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 982 transitions. Word has length 461 [2024-12-02 07:59:01,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:01,387 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 982 transitions. [2024-12-02 07:59:01,387 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:01,387 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 982 transitions. [2024-12-02 07:59:01,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 463 [2024-12-02 07:59:01,388 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:01,388 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:01,389 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 07:59:01,389 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:01,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:01,389 INFO L85 PathProgramCache]: Analyzing trace with hash 1106690637, now seen corresponding path program 1 times [2024-12-02 07:59:01,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:01,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395507220] [2024-12-02 07:59:01,389 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:01,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:01,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:02,176 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:02,177 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:02,177 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395507220] [2024-12-02 07:59:02,177 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395507220] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:02,177 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:02,177 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:02,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431249831] [2024-12-02 07:59:02,177 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:02,177 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:02,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:02,178 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:02,178 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:02,178 INFO L87 Difference]: Start difference. First operand 711 states and 982 transitions. Second operand has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:02,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:02,465 INFO L93 Difference]: Finished difference Result 1165 states and 1611 transitions. [2024-12-02 07:59:02,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:02,465 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 462 [2024-12-02 07:59:02,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:02,468 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:02,468 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:02,468 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:02,469 INFO L435 NwaCegarLoop]: 578 mSDtfsCounter, 1072 mSDsluCounter, 580 mSDsCounter, 0 mSdLazyCounter, 392 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1075 SdHoareTripleChecker+Valid, 1158 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 392 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:02,469 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1075 Valid, 1158 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 392 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:59:02,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:02,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:02,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3783783783783783) internal successors, (969), 703 states have internal predecessors, (969), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:02,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 981 transitions. [2024-12-02 07:59:02,494 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 981 transitions. Word has length 462 [2024-12-02 07:59:02,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:02,494 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 981 transitions. [2024-12-02 07:59:02,494 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:02,494 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 981 transitions. [2024-12-02 07:59:02,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 464 [2024-12-02 07:59:02,499 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:02,499 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:02,499 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 07:59:02,499 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:02,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:02,500 INFO L85 PathProgramCache]: Analyzing trace with hash 941358165, now seen corresponding path program 1 times [2024-12-02 07:59:02,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:02,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745018147] [2024-12-02 07:59:02,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:02,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:02,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:03,571 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:03,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:03,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745018147] [2024-12-02 07:59:03,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1745018147] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:03,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:03,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:59:03,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454774757] [2024-12-02 07:59:03,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:03,571 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:59:03,571 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:03,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:59:03,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:59:03,572 INFO L87 Difference]: Start difference. First operand 711 states and 981 transitions. Second operand has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:03,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:03,615 INFO L93 Difference]: Finished difference Result 1165 states and 1609 transitions. [2024-12-02 07:59:03,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:03,616 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 463 [2024-12-02 07:59:03,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:03,618 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:03,618 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:03,618 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:03,618 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 496 mSDsluCounter, 758 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 496 SdHoareTripleChecker+Valid, 1514 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:03,618 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [496 Valid, 1514 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:59:03,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:03,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:03,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3769559032716927) internal successors, (968), 703 states have internal predecessors, (968), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:03,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 980 transitions. [2024-12-02 07:59:03,628 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 980 transitions. Word has length 463 [2024-12-02 07:59:03,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:03,628 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 980 transitions. [2024-12-02 07:59:03,628 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.0) internal successors, (436), 4 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:03,628 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 980 transitions. [2024-12-02 07:59:03,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 465 [2024-12-02 07:59:03,630 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:03,630 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:03,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 07:59:03,630 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:03,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:03,631 INFO L85 PathProgramCache]: Analyzing trace with hash 2059983743, now seen corresponding path program 1 times [2024-12-02 07:59:03,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:03,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147530452] [2024-12-02 07:59:03,631 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:03,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:04,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:04,691 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:04,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:04,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147530452] [2024-12-02 07:59:04,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1147530452] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:04,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:04,691 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:04,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651319094] [2024-12-02 07:59:04,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:04,692 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:04,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:04,692 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:04,692 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:04,693 INFO L87 Difference]: Start difference. First operand 711 states and 980 transitions. Second operand has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:04,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:04,771 INFO L93 Difference]: Finished difference Result 1165 states and 1607 transitions. [2024-12-02 07:59:04,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:04,771 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 464 [2024-12-02 07:59:04,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:04,773 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:04,773 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:04,774 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:04,774 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 655 mSDsluCounter, 750 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 655 SdHoareTripleChecker+Valid, 1491 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:04,774 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [655 Valid, 1491 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:04,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:04,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:04,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3755334281650071) internal successors, (967), 703 states have internal predecessors, (967), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:04,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 979 transitions. [2024-12-02 07:59:04,784 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 979 transitions. Word has length 464 [2024-12-02 07:59:04,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:04,784 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 979 transitions. [2024-12-02 07:59:04,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:04,784 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 979 transitions. [2024-12-02 07:59:04,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 466 [2024-12-02 07:59:04,786 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:04,786 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:04,786 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 07:59:04,786 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:04,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:04,787 INFO L85 PathProgramCache]: Analyzing trace with hash 2072196053, now seen corresponding path program 1 times [2024-12-02 07:59:04,787 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:04,787 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055037728] [2024-12-02 07:59:04,787 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:04,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:05,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:05,954 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:05,954 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:05,954 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055037728] [2024-12-02 07:59:05,954 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055037728] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:05,954 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:05,954 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:05,954 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122126214] [2024-12-02 07:59:05,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:05,955 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:05,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:05,955 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:05,955 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:05,956 INFO L87 Difference]: Start difference. First operand 711 states and 979 transitions. Second operand has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:06,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:06,043 INFO L93 Difference]: Finished difference Result 1165 states and 1605 transitions. [2024-12-02 07:59:06,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:06,044 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 465 [2024-12-02 07:59:06,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:06,045 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:06,045 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:06,046 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:06,046 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 654 mSDsluCounter, 750 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 654 SdHoareTripleChecker+Valid, 1491 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:06,046 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [654 Valid, 1491 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:06,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:06,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:06,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3741109530583215) internal successors, (966), 703 states have internal predecessors, (966), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:06,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 978 transitions. [2024-12-02 07:59:06,055 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 978 transitions. Word has length 465 [2024-12-02 07:59:06,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:06,056 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 978 transitions. [2024-12-02 07:59:06,056 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.6) internal successors, (438), 5 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:06,056 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 978 transitions. [2024-12-02 07:59:06,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 467 [2024-12-02 07:59:06,057 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:06,057 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:06,057 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 07:59:06,058 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:06,058 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:06,058 INFO L85 PathProgramCache]: Analyzing trace with hash 512722894, now seen corresponding path program 1 times [2024-12-02 07:59:06,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:06,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770958527] [2024-12-02 07:59:06,058 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:06,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:06,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:07,234 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:07,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:07,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770958527] [2024-12-02 07:59:07,234 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [770958527] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:07,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:07,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:59:07,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285851385] [2024-12-02 07:59:07,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:07,235 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:59:07,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:07,236 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:59:07,236 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:59:07,236 INFO L87 Difference]: Start difference. First operand 711 states and 978 transitions. Second operand has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:07,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:07,313 INFO L93 Difference]: Finished difference Result 1165 states and 1603 transitions. [2024-12-02 07:59:07,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:07,314 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 466 [2024-12-02 07:59:07,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:07,315 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:07,315 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:07,315 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:07,316 INFO L435 NwaCegarLoop]: 741 mSDtfsCounter, 505 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:07,316 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 1484 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:07,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:07,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:07,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.372688477951636) internal successors, (965), 703 states have internal predecessors, (965), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:07,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 977 transitions. [2024-12-02 07:59:07,331 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 977 transitions. Word has length 466 [2024-12-02 07:59:07,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:07,332 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 977 transitions. [2024-12-02 07:59:07,332 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.75) internal successors, (439), 4 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:07,332 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 977 transitions. [2024-12-02 07:59:07,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2024-12-02 07:59:07,335 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:07,335 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:07,335 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 07:59:07,336 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:07,336 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:07,336 INFO L85 PathProgramCache]: Analyzing trace with hash 861938758, now seen corresponding path program 1 times [2024-12-02 07:59:07,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:07,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499317764] [2024-12-02 07:59:07,336 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:07,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:07,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:08,505 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:08,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:08,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499317764] [2024-12-02 07:59:08,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499317764] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:08,505 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:08,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:08,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76859943] [2024-12-02 07:59:08,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:08,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:08,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:08,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:08,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:08,507 INFO L87 Difference]: Start difference. First operand 711 states and 977 transitions. Second operand has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:08,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:08,638 INFO L93 Difference]: Finished difference Result 1165 states and 1601 transitions. [2024-12-02 07:59:08,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:08,638 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 467 [2024-12-02 07:59:08,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:08,640 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:08,640 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:08,640 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:08,640 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1212 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1212 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:08,640 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1212 Valid, 1422 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:08,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:08,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:08,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3712660028449501) internal successors, (964), 703 states have internal predecessors, (964), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:08,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 976 transitions. [2024-12-02 07:59:08,650 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 976 transitions. Word has length 467 [2024-12-02 07:59:08,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:08,650 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 976 transitions. [2024-12-02 07:59:08,650 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:08,650 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 976 transitions. [2024-12-02 07:59:08,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 469 [2024-12-02 07:59:08,652 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:08,652 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:08,652 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 07:59:08,652 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:08,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:08,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1901367216, now seen corresponding path program 1 times [2024-12-02 07:59:08,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:08,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907371814] [2024-12-02 07:59:08,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:08,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:09,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:09,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:09,693 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [907371814] [2024-12-02 07:59:09,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [907371814] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:09,693 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:09,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:09,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982824473] [2024-12-02 07:59:09,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:09,693 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:09,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:09,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:09,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:09,694 INFO L87 Difference]: Start difference. First operand 711 states and 976 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:09,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:09,804 INFO L93 Difference]: Finished difference Result 1165 states and 1599 transitions. [2024-12-02 07:59:09,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:09,805 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 468 [2024-12-02 07:59:09,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:09,806 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:09,806 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:09,806 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:09,806 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1202 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1202 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:09,807 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1202 Valid, 1422 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:09,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:09,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:09,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3698435277382646) internal successors, (963), 703 states have internal predecessors, (963), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:09,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 975 transitions. [2024-12-02 07:59:09,816 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 975 transitions. Word has length 468 [2024-12-02 07:59:09,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:09,816 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 975 transitions. [2024-12-02 07:59:09,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:09,816 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 975 transitions. [2024-12-02 07:59:09,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2024-12-02 07:59:09,818 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:09,818 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:09,818 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 07:59:09,818 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:09,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:09,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1536682647, now seen corresponding path program 1 times [2024-12-02 07:59:09,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:09,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958455827] [2024-12-02 07:59:09,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:09,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:10,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:10,953 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:10,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:10,954 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958455827] [2024-12-02 07:59:10,954 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958455827] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:10,954 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:10,954 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:59:10,954 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463633587] [2024-12-02 07:59:10,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:10,954 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:59:10,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:10,955 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:59:10,955 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:59:10,955 INFO L87 Difference]: Start difference. First operand 711 states and 975 transitions. Second operand has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:11,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:11,053 INFO L93 Difference]: Finished difference Result 1165 states and 1597 transitions. [2024-12-02 07:59:11,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:11,053 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 469 [2024-12-02 07:59:11,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:11,054 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:11,054 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:11,055 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:11,055 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 558 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:11,055 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1422 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:11,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:11,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:11,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.368421052631579) internal successors, (962), 703 states have internal predecessors, (962), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:11,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 974 transitions. [2024-12-02 07:59:11,064 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 974 transitions. Word has length 469 [2024-12-02 07:59:11,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:11,064 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 974 transitions. [2024-12-02 07:59:11,064 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 110.5) internal successors, (442), 4 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:11,065 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 974 transitions. [2024-12-02 07:59:11,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 471 [2024-12-02 07:59:11,066 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:11,066 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:11,066 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 07:59:11,066 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:11,067 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:11,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1546007711, now seen corresponding path program 1 times [2024-12-02 07:59:11,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:11,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381943097] [2024-12-02 07:59:11,067 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:11,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:11,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:12,144 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:12,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:12,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1381943097] [2024-12-02 07:59:12,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1381943097] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:12,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:12,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:12,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743227494] [2024-12-02 07:59:12,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:12,145 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:12,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:12,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:12,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:12,146 INFO L87 Difference]: Start difference. First operand 711 states and 974 transitions. Second operand has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:12,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:12,260 INFO L93 Difference]: Finished difference Result 1165 states and 1595 transitions. [2024-12-02 07:59:12,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:12,261 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 470 [2024-12-02 07:59:12,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:12,262 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:12,262 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:12,262 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:12,262 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1182 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1182 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:12,262 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1182 Valid, 1422 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:12,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:12,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:12,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3669985775248934) internal successors, (961), 703 states have internal predecessors, (961), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:12,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 973 transitions. [2024-12-02 07:59:12,271 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 973 transitions. Word has length 470 [2024-12-02 07:59:12,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:12,272 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 973 transitions. [2024-12-02 07:59:12,272 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:12,272 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 973 transitions. [2024-12-02 07:59:12,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 472 [2024-12-02 07:59:12,273 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:12,273 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:12,273 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 07:59:12,274 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:12,274 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:12,274 INFO L85 PathProgramCache]: Analyzing trace with hash 916407912, now seen corresponding path program 1 times [2024-12-02 07:59:12,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:12,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020574880] [2024-12-02 07:59:12,274 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:12,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:12,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:13,382 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:13,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:13,382 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020574880] [2024-12-02 07:59:13,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020574880] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:13,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:13,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:13,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947908898] [2024-12-02 07:59:13,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:13,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:13,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:13,384 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:13,384 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:13,384 INFO L87 Difference]: Start difference. First operand 711 states and 973 transitions. Second operand has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:13,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:13,496 INFO L93 Difference]: Finished difference Result 1165 states and 1593 transitions. [2024-12-02 07:59:13,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:13,496 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 471 [2024-12-02 07:59:13,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:13,498 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:13,498 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:13,499 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:13,499 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1172 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1172 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:13,499 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1172 Valid, 1422 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:13,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:13,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:13,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3655761024182076) internal successors, (960), 703 states have internal predecessors, (960), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:13,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 972 transitions. [2024-12-02 07:59:13,508 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 972 transitions. Word has length 471 [2024-12-02 07:59:13,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:13,508 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 972 transitions. [2024-12-02 07:59:13,508 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.8) internal successors, (444), 5 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:13,509 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 972 transitions. [2024-12-02 07:59:13,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 473 [2024-12-02 07:59:13,510 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:13,510 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:13,510 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 07:59:13,510 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:13,511 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:13,511 INFO L85 PathProgramCache]: Analyzing trace with hash -426939378, now seen corresponding path program 1 times [2024-12-02 07:59:13,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:13,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710693342] [2024-12-02 07:59:13,511 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:13,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:14,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:14,584 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:14,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:14,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710693342] [2024-12-02 07:59:14,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [710693342] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:14,584 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:14,584 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:14,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094376122] [2024-12-02 07:59:14,584 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:14,585 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:14,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:14,585 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:14,585 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:14,586 INFO L87 Difference]: Start difference. First operand 711 states and 972 transitions. Second operand has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:14,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:14,696 INFO L93 Difference]: Finished difference Result 1165 states and 1591 transitions. [2024-12-02 07:59:14,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:14,697 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 472 [2024-12-02 07:59:14,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:14,698 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:14,698 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:14,698 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:14,699 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 1162 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1162 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:14,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1162 Valid, 1422 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:14,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:14,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:14,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.364153627311522) internal successors, (959), 703 states have internal predecessors, (959), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:14,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 971 transitions. [2024-12-02 07:59:14,707 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 971 transitions. Word has length 472 [2024-12-02 07:59:14,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:14,708 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 971 transitions. [2024-12-02 07:59:14,708 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:14,708 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 971 transitions. [2024-12-02 07:59:14,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 474 [2024-12-02 07:59:14,709 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:14,709 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:14,710 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 07:59:14,710 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:14,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:14,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1135077305, now seen corresponding path program 1 times [2024-12-02 07:59:14,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:14,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361146658] [2024-12-02 07:59:14,710 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:14,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:15,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:15,749 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:15,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:15,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361146658] [2024-12-02 07:59:15,750 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361146658] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:15,750 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:15,750 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:59:15,750 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672603060] [2024-12-02 07:59:15,750 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:15,750 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:59:15,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:15,751 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:59:15,751 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:59:15,751 INFO L87 Difference]: Start difference. First operand 711 states and 971 transitions. Second operand has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:15,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:15,850 INFO L93 Difference]: Finished difference Result 1165 states and 1589 transitions. [2024-12-02 07:59:15,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:59:15,850 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 473 [2024-12-02 07:59:15,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:15,852 INFO L225 Difference]: With dead ends: 1165 [2024-12-02 07:59:15,852 INFO L226 Difference]: Without dead ends: 711 [2024-12-02 07:59:15,852 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:15,852 INFO L435 NwaCegarLoop]: 710 mSDtfsCounter, 522 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 522 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:15,853 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [522 Valid, 1422 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:15,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2024-12-02 07:59:15,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 711. [2024-12-02 07:59:15,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 711 states, 703 states have (on average 1.3627311522048364) internal successors, (958), 703 states have internal predecessors, (958), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:59:15,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 711 states to 711 states and 970 transitions. [2024-12-02 07:59:15,862 INFO L78 Accepts]: Start accepts. Automaton has 711 states and 970 transitions. Word has length 473 [2024-12-02 07:59:15,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:15,862 INFO L471 AbstractCegarLoop]: Abstraction has 711 states and 970 transitions. [2024-12-02 07:59:15,863 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 111.5) internal successors, (446), 4 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:15,863 INFO L276 IsEmpty]: Start isEmpty. Operand 711 states and 970 transitions. [2024-12-02 07:59:15,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 475 [2024-12-02 07:59:15,865 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:15,865 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:15,865 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 07:59:15,865 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:15,866 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:15,866 INFO L85 PathProgramCache]: Analyzing trace with hash 1287685629, now seen corresponding path program 1 times [2024-12-02 07:59:15,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:15,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281436778] [2024-12-02 07:59:15,866 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:15,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:16,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:17,313 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:17,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:17,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281436778] [2024-12-02 07:59:17,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281436778] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:17,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:17,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:17,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295163285] [2024-12-02 07:59:17,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:17,314 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:17,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:17,314 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:17,314 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:17,315 INFO L87 Difference]: Start difference. First operand 711 states and 970 transitions. Second operand has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:17,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:17,651 INFO L93 Difference]: Finished difference Result 1683 states and 2299 transitions. [2024-12-02 07:59:17,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:17,651 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 474 [2024-12-02 07:59:17,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:17,653 INFO L225 Difference]: With dead ends: 1683 [2024-12-02 07:59:17,653 INFO L226 Difference]: Without dead ends: 1229 [2024-12-02 07:59:17,654 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:59:17,654 INFO L435 NwaCegarLoop]: 671 mSDtfsCounter, 705 mSDsluCounter, 2148 mSDsCounter, 0 mSdLazyCounter, 571 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 708 SdHoareTripleChecker+Valid, 2819 SdHoareTripleChecker+Invalid, 579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 571 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:17,654 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [708 Valid, 2819 Invalid, 579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 571 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:59:17,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1229 states. [2024-12-02 07:59:17,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1229 to 1121. [2024-12-02 07:59:17,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1121 states, 1110 states have (on average 1.3567567567567567) internal successors, (1506), 1110 states have internal predecessors, (1506), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 07:59:17,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1121 states to 1121 states and 1524 transitions. [2024-12-02 07:59:17,672 INFO L78 Accepts]: Start accepts. Automaton has 1121 states and 1524 transitions. Word has length 474 [2024-12-02 07:59:17,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:17,672 INFO L471 AbstractCegarLoop]: Abstraction has 1121 states and 1524 transitions. [2024-12-02 07:59:17,672 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 74.5) internal successors, (447), 6 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:17,672 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 1524 transitions. [2024-12-02 07:59:17,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2024-12-02 07:59:17,674 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:17,674 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:17,674 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 07:59:17,674 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:17,675 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:17,675 INFO L85 PathProgramCache]: Analyzing trace with hash -642634531, now seen corresponding path program 1 times [2024-12-02 07:59:17,675 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:17,675 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401118771] [2024-12-02 07:59:17,675 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:17,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:18,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:19,494 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:59:19,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:19,494 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401118771] [2024-12-02 07:59:19,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [401118771] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:19,494 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:19,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:19,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515295203] [2024-12-02 07:59:19,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:19,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:19,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:19,495 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:19,495 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:19,495 INFO L87 Difference]: Start difference. First operand 1121 states and 1524 transitions. Second operand has 6 states, 6 states have (on average 74.66666666666667) internal successors, (448), 6 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:20,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:20,004 INFO L93 Difference]: Finished difference Result 1598 states and 2175 transitions. [2024-12-02 07:59:20,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:20,004 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 74.66666666666667) internal successors, (448), 6 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 475 [2024-12-02 07:59:20,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:20,007 INFO L225 Difference]: With dead ends: 1598 [2024-12-02 07:59:20,007 INFO L226 Difference]: Without dead ends: 1144 [2024-12-02 07:59:20,007 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:59:20,007 INFO L435 NwaCegarLoop]: 568 mSDtfsCounter, 1342 mSDsluCounter, 1681 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1345 SdHoareTripleChecker+Valid, 2249 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:20,007 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1345 Valid, 2249 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:59:20,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1144 states. [2024-12-02 07:59:20,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1144 to 1122. [2024-12-02 07:59:20,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1122 states, 1111 states have (on average 1.3564356435643565) internal successors, (1507), 1111 states have internal predecessors, (1507), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 07:59:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1122 states to 1122 states and 1525 transitions. [2024-12-02 07:59:20,032 INFO L78 Accepts]: Start accepts. Automaton has 1122 states and 1525 transitions. Word has length 475 [2024-12-02 07:59:20,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:20,032 INFO L471 AbstractCegarLoop]: Abstraction has 1122 states and 1525 transitions. [2024-12-02 07:59:20,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 74.66666666666667) internal successors, (448), 6 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:20,033 INFO L276 IsEmpty]: Start isEmpty. Operand 1122 states and 1525 transitions. [2024-12-02 07:59:20,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2024-12-02 07:59:20,035 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:20,036 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:20,036 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 07:59:20,036 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:20,036 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:20,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1544467892, now seen corresponding path program 1 times [2024-12-02 07:59:20,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:20,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219751868] [2024-12-02 07:59:20,037 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:20,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:20,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:21,716 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2024-12-02 07:59:21,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:21,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1219751868] [2024-12-02 07:59:21,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1219751868] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:21,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:21,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 07:59:21,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421823900] [2024-12-02 07:59:21,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:21,717 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 07:59:21,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:21,717 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 07:59:21,717 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:59:21,718 INFO L87 Difference]: Start difference. First operand 1122 states and 1525 transitions. Second operand has 7 states, 7 states have (on average 49.42857142857143) internal successors, (346), 7 states have internal predecessors, (346), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:59:22,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:22,149 INFO L93 Difference]: Finished difference Result 2117 states and 2861 transitions. [2024-12-02 07:59:22,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:22,150 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 49.42857142857143) internal successors, (346), 7 states have internal predecessors, (346), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 475 [2024-12-02 07:59:22,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:22,151 INFO L225 Difference]: With dead ends: 2117 [2024-12-02 07:59:22,151 INFO L226 Difference]: Without dead ends: 1134 [2024-12-02 07:59:22,152 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:59:22,152 INFO L435 NwaCegarLoop]: 561 mSDtfsCounter, 1446 mSDsluCounter, 1676 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1449 SdHoareTripleChecker+Valid, 2237 SdHoareTripleChecker+Invalid, 815 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:22,152 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1449 Valid, 2237 Invalid, 815 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:22,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1134 states. [2024-12-02 07:59:22,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1134 to 1128. [2024-12-02 07:59:22,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1128 states, 1117 states have (on average 1.35183527305282) internal successors, (1510), 1117 states have internal predecessors, (1510), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 07:59:22,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1128 states to 1128 states and 1528 transitions. [2024-12-02 07:59:22,166 INFO L78 Accepts]: Start accepts. Automaton has 1128 states and 1528 transitions. Word has length 475 [2024-12-02 07:59:22,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:22,167 INFO L471 AbstractCegarLoop]: Abstraction has 1128 states and 1528 transitions. [2024-12-02 07:59:22,167 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 49.42857142857143) internal successors, (346), 7 states have internal predecessors, (346), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:59:22,167 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1528 transitions. [2024-12-02 07:59:22,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-12-02 07:59:22,168 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:22,168 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:22,168 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 07:59:22,169 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:22,169 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:22,169 INFO L85 PathProgramCache]: Analyzing trace with hash -588614386, now seen corresponding path program 1 times [2024-12-02 07:59:22,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:22,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751574150] [2024-12-02 07:59:22,169 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:22,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:23,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:23,952 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2024-12-02 07:59:23,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:23,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751574150] [2024-12-02 07:59:23,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [751574150] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:23,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:23,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 07:59:23,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069810076] [2024-12-02 07:59:23,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:23,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:59:23,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:23,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:59:23,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:59:23,954 INFO L87 Difference]: Start difference. First operand 1128 states and 1528 transitions. Second operand has 8 states, 8 states have (on average 46.125) internal successors, (369), 8 states have internal predecessors, (369), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:24,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:24,100 INFO L93 Difference]: Finished difference Result 2547 states and 3436 transitions. [2024-12-02 07:59:24,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 07:59:24,100 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 46.125) internal successors, (369), 8 states have internal predecessors, (369), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-12-02 07:59:24,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:24,103 INFO L225 Difference]: With dead ends: 2547 [2024-12-02 07:59:24,103 INFO L226 Difference]: Without dead ends: 1986 [2024-12-02 07:59:24,104 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:59:24,104 INFO L435 NwaCegarLoop]: 1824 mSDtfsCounter, 1103 mSDsluCounter, 8579 mSDsCounter, 0 mSdLazyCounter, 163 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1106 SdHoareTripleChecker+Valid, 10403 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 163 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:24,104 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1106 Valid, 10403 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 163 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:59:24,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1986 states. [2024-12-02 07:59:24,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1986 to 1197. [2024-12-02 07:59:24,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1197 states, 1183 states have (on average 1.3541842772612003) internal successors, (1602), 1183 states have internal predecessors, (1602), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:59:24,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1197 states to 1197 states and 1626 transitions. [2024-12-02 07:59:24,125 INFO L78 Accepts]: Start accepts. Automaton has 1197 states and 1626 transitions. Word has length 477 [2024-12-02 07:59:24,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:24,125 INFO L471 AbstractCegarLoop]: Abstraction has 1197 states and 1626 transitions. [2024-12-02 07:59:24,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 46.125) internal successors, (369), 8 states have internal predecessors, (369), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:24,125 INFO L276 IsEmpty]: Start isEmpty. Operand 1197 states and 1626 transitions. [2024-12-02 07:59:24,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 479 [2024-12-02 07:59:24,127 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:24,127 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:24,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 07:59:24,127 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:24,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:24,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1436603636, now seen corresponding path program 1 times [2024-12-02 07:59:24,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:24,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037862389] [2024-12-02 07:59:24,128 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:24,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:25,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:26,292 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 109 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-12-02 07:59:26,292 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:26,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037862389] [2024-12-02 07:59:26,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2037862389] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:26,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:26,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:59:26,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30180901] [2024-12-02 07:59:26,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:26,293 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:59:26,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:26,293 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:59:26,293 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:26,293 INFO L87 Difference]: Start difference. First operand 1197 states and 1626 transitions. Second operand has 5 states, 5 states have (on average 89.6) internal successors, (448), 5 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:26,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:26,362 INFO L93 Difference]: Finished difference Result 2129 states and 2841 transitions. [2024-12-02 07:59:26,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:59:26,363 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.6) internal successors, (448), 5 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 478 [2024-12-02 07:59:26,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:26,365 INFO L225 Difference]: With dead ends: 2129 [2024-12-02 07:59:26,365 INFO L226 Difference]: Without dead ends: 1434 [2024-12-02 07:59:26,366 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:59:26,366 INFO L435 NwaCegarLoop]: 755 mSDtfsCounter, 19 mSDsluCounter, 2256 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 3011 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:26,366 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 3011 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:59:26,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1434 states. [2024-12-02 07:59:26,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1434 to 1428. [2024-12-02 07:59:26,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1428 states, 1414 states have (on average 1.3154172560113153) internal successors, (1860), 1414 states have internal predecessors, (1860), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:59:26,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 1884 transitions. [2024-12-02 07:59:26,411 INFO L78 Accepts]: Start accepts. Automaton has 1428 states and 1884 transitions. Word has length 478 [2024-12-02 07:59:26,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:26,411 INFO L471 AbstractCegarLoop]: Abstraction has 1428 states and 1884 transitions. [2024-12-02 07:59:26,411 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.6) internal successors, (448), 5 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:26,411 INFO L276 IsEmpty]: Start isEmpty. Operand 1428 states and 1884 transitions. [2024-12-02 07:59:26,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 481 [2024-12-02 07:59:26,416 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:26,416 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:26,416 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 07:59:26,416 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:26,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:26,416 INFO L85 PathProgramCache]: Analyzing trace with hash 949589088, now seen corresponding path program 1 times [2024-12-02 07:59:26,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:26,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420009772] [2024-12-02 07:59:26,417 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:26,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:27,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:28,393 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-12-02 07:59:28,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:28,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420009772] [2024-12-02 07:59:28,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1420009772] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:28,394 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:28,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 07:59:28,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309049634] [2024-12-02 07:59:28,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:28,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 07:59:28,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:28,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 07:59:28,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:59:28,395 INFO L87 Difference]: Start difference. First operand 1428 states and 1884 transitions. Second operand has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:59:28,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:28,836 INFO L93 Difference]: Finished difference Result 2646 states and 3467 transitions. [2024-12-02 07:59:28,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:28,836 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 480 [2024-12-02 07:59:28,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:28,839 INFO L225 Difference]: With dead ends: 2646 [2024-12-02 07:59:28,840 INFO L226 Difference]: Without dead ends: 1444 [2024-12-02 07:59:28,841 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:59:28,841 INFO L435 NwaCegarLoop]: 560 mSDtfsCounter, 749 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 751 SdHoareTripleChecker+Valid, 2240 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:28,841 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [751 Valid, 2240 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:28,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2024-12-02 07:59:28,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1436. [2024-12-02 07:59:28,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1436 states, 1422 states have (on average 1.310829817158931) internal successors, (1864), 1422 states have internal predecessors, (1864), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:59:28,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1436 states to 1436 states and 1888 transitions. [2024-12-02 07:59:28,885 INFO L78 Accepts]: Start accepts. Automaton has 1436 states and 1888 transitions. Word has length 480 [2024-12-02 07:59:28,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:28,886 INFO L471 AbstractCegarLoop]: Abstraction has 1436 states and 1888 transitions. [2024-12-02 07:59:28,886 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 51.57142857142857) internal successors, (361), 7 states have internal predecessors, (361), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:59:28,886 INFO L276 IsEmpty]: Start isEmpty. Operand 1436 states and 1888 transitions. [2024-12-02 07:59:28,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 483 [2024-12-02 07:59:28,888 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:28,888 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:28,888 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 07:59:28,888 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:28,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:28,889 INFO L85 PathProgramCache]: Analyzing trace with hash 1975318442, now seen corresponding path program 1 times [2024-12-02 07:59:28,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:28,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740341119] [2024-12-02 07:59:28,889 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:28,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:30,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:30,699 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2024-12-02 07:59:30,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:30,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740341119] [2024-12-02 07:59:30,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1740341119] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:30,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:30,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 07:59:30,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877796340] [2024-12-02 07:59:30,699 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:30,700 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 07:59:30,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:30,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 07:59:30,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:59:30,701 INFO L87 Difference]: Start difference. First operand 1436 states and 1888 transitions. Second operand has 7 states, 7 states have (on average 52.857142857142854) internal successors, (370), 7 states have internal predecessors, (370), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:59:31,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:31,168 INFO L93 Difference]: Finished difference Result 2614 states and 3409 transitions. [2024-12-02 07:59:31,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:31,169 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 52.857142857142854) internal successors, (370), 7 states have internal predecessors, (370), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 482 [2024-12-02 07:59:31,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:31,171 INFO L225 Difference]: With dead ends: 2614 [2024-12-02 07:59:31,171 INFO L226 Difference]: Without dead ends: 1452 [2024-12-02 07:59:31,171 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:59:31,172 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 1421 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1422 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 813 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:31,172 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1422 Valid, 2229 Invalid, 813 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:31,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1452 states. [2024-12-02 07:59:31,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1452 to 1444. [2024-12-02 07:59:31,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1444 states, 1430 states have (on average 1.3062937062937063) internal successors, (1868), 1430 states have internal predecessors, (1868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:59:31,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 1892 transitions. [2024-12-02 07:59:31,191 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 1892 transitions. Word has length 482 [2024-12-02 07:59:31,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:31,191 INFO L471 AbstractCegarLoop]: Abstraction has 1444 states and 1892 transitions. [2024-12-02 07:59:31,191 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 52.857142857142854) internal successors, (370), 7 states have internal predecessors, (370), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:59:31,191 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 1892 transitions. [2024-12-02 07:59:31,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-12-02 07:59:31,193 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:31,193 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:31,193 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 07:59:31,193 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:31,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:31,193 INFO L85 PathProgramCache]: Analyzing trace with hash 529239552, now seen corresponding path program 1 times [2024-12-02 07:59:31,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:31,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901244615] [2024-12-02 07:59:31,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:31,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:32,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:33,074 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 98 proven. 4 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-12-02 07:59:33,074 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:33,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901244615] [2024-12-02 07:59:33,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901244615] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:59:33,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [598282994] [2024-12-02 07:59:33,074 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:33,075 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:59:33,075 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:59:33,076 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:59:33,077 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 07:59:35,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:35,096 INFO L256 TraceCheckSpWp]: Trace formula consists of 2970 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 07:59:35,109 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:59:35,366 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 148 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 07:59:35,366 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:59:35,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [598282994] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:35,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:59:35,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [6] total 12 [2024-12-02 07:59:35,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [913983748] [2024-12-02 07:59:35,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:35,367 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:59:35,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:35,368 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:59:35,368 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-12-02 07:59:35,368 INFO L87 Difference]: Start difference. First operand 1444 states and 1892 transitions. Second operand has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:35,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:35,934 INFO L93 Difference]: Finished difference Result 3301 states and 4342 transitions. [2024-12-02 07:59:35,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 07:59:35,934 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 484 [2024-12-02 07:59:35,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:35,939 INFO L225 Difference]: With dead ends: 3301 [2024-12-02 07:59:35,939 INFO L226 Difference]: Without dead ends: 2525 [2024-12-02 07:59:35,941 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 494 GetRequests, 482 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2024-12-02 07:59:35,941 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 2353 mSDsluCounter, 2105 mSDsCounter, 0 mSdLazyCounter, 962 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2359 SdHoareTripleChecker+Valid, 2670 SdHoareTripleChecker+Invalid, 965 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 962 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:35,941 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2359 Valid, 2670 Invalid, 965 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 962 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:59:35,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2525 states. [2024-12-02 07:59:35,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2525 to 1987. [2024-12-02 07:59:35,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1964 states have (on average 1.2836048879837068) internal successors, (2521), 1964 states have internal predecessors, (2521), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 07:59:35,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2563 transitions. [2024-12-02 07:59:35,997 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2563 transitions. Word has length 484 [2024-12-02 07:59:35,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:35,997 INFO L471 AbstractCegarLoop]: Abstraction has 1987 states and 2563 transitions. [2024-12-02 07:59:35,997 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 57.125) internal successors, (457), 8 states have internal predecessors, (457), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:35,997 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2563 transitions. [2024-12-02 07:59:36,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-12-02 07:59:36,001 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:36,001 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:36,018 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 07:59:36,202 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable67 [2024-12-02 07:59:36,202 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:36,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:36,202 INFO L85 PathProgramCache]: Analyzing trace with hash -3753841, now seen corresponding path program 1 times [2024-12-02 07:59:36,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:36,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295504909] [2024-12-02 07:59:36,202 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:36,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:36,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:36,907 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2024-12-02 07:59:36,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:36,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295504909] [2024-12-02 07:59:36,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295504909] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:36,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:36,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:36,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145126210] [2024-12-02 07:59:36,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:36,908 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:36,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:36,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:36,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:36,909 INFO L87 Difference]: Start difference. First operand 1987 states and 2563 transitions. Second operand has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:36,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:36,958 INFO L93 Difference]: Finished difference Result 3171 states and 4093 transitions. [2024-12-02 07:59:36,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:59:36,959 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 484 [2024-12-02 07:59:36,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:36,961 INFO L225 Difference]: With dead ends: 3171 [2024-12-02 07:59:36,961 INFO L226 Difference]: Without dead ends: 2077 [2024-12-02 07:59:36,962 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:36,962 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 16 mSDsluCounter, 2256 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 3012 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:36,962 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 3012 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:59:36,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2077 states. [2024-12-02 07:59:37,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2077 to 2077. [2024-12-02 07:59:37,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2077 states, 2054 states have (on average 1.2906523855890943) internal successors, (2651), 2054 states have internal predecessors, (2651), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 07:59:37,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 2693 transitions. [2024-12-02 07:59:37,012 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 2693 transitions. Word has length 484 [2024-12-02 07:59:37,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:37,012 INFO L471 AbstractCegarLoop]: Abstraction has 2077 states and 2693 transitions. [2024-12-02 07:59:37,013 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 64.83333333333333) internal successors, (389), 6 states have internal predecessors, (389), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:59:37,013 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 2693 transitions. [2024-12-02 07:59:37,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 486 [2024-12-02 07:59:37,017 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:37,017 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:37,017 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 07:59:37,017 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:37,017 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:37,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1139381739, now seen corresponding path program 1 times [2024-12-02 07:59:37,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:37,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542877505] [2024-12-02 07:59:37,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:37,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:38,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:39,314 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2024-12-02 07:59:39,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:39,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542877505] [2024-12-02 07:59:39,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [542877505] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:39,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:39,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:39,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749195221] [2024-12-02 07:59:39,315 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:39,315 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:39,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:39,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:39,316 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:39,316 INFO L87 Difference]: Start difference. First operand 2077 states and 2693 transitions. Second operand has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:59:39,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:39,786 INFO L93 Difference]: Finished difference Result 3915 states and 5043 transitions. [2024-12-02 07:59:39,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:39,787 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 485 [2024-12-02 07:59:39,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:39,790 INFO L225 Difference]: With dead ends: 3915 [2024-12-02 07:59:39,790 INFO L226 Difference]: Without dead ends: 2091 [2024-12-02 07:59:39,791 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:59:39,792 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 703 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 706 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:39,792 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [706 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:39,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2091 states. [2024-12-02 07:59:39,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2091 to 2084. [2024-12-02 07:59:39,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2084 states, 2061 states have (on average 1.289665211062591) internal successors, (2658), 2061 states have internal predecessors, (2658), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 07:59:39,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2084 states to 2084 states and 2700 transitions. [2024-12-02 07:59:39,822 INFO L78 Accepts]: Start accepts. Automaton has 2084 states and 2700 transitions. Word has length 485 [2024-12-02 07:59:39,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:39,822 INFO L471 AbstractCegarLoop]: Abstraction has 2084 states and 2700 transitions. [2024-12-02 07:59:39,822 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:59:39,822 INFO L276 IsEmpty]: Start isEmpty. Operand 2084 states and 2700 transitions. [2024-12-02 07:59:39,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 488 [2024-12-02 07:59:39,825 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:39,825 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:39,825 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 07:59:39,825 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:39,825 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:39,826 INFO L85 PathProgramCache]: Analyzing trace with hash -498686621, now seen corresponding path program 1 times [2024-12-02 07:59:39,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:39,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817289539] [2024-12-02 07:59:39,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:39,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:41,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:41,877 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked. [2024-12-02 07:59:41,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:41,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1817289539] [2024-12-02 07:59:41,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1817289539] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:41,877 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:41,877 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:41,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709170259] [2024-12-02 07:59:41,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:41,877 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:41,877 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:41,878 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:41,878 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:41,878 INFO L87 Difference]: Start difference. First operand 2084 states and 2700 transitions. Second operand has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:59:42,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:42,337 INFO L93 Difference]: Finished difference Result 3803 states and 4895 transitions. [2024-12-02 07:59:42,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:42,338 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 487 [2024-12-02 07:59:42,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:42,340 INFO L225 Difference]: With dead ends: 3803 [2024-12-02 07:59:42,340 INFO L226 Difference]: Without dead ends: 2098 [2024-12-02 07:59:42,341 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:59:42,341 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 690 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 692 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:42,341 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [692 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:42,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2098 states. [2024-12-02 07:59:42,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2098 to 2091. [2024-12-02 07:59:42,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2091 states, 2068 states have (on average 1.2886847195357833) internal successors, (2665), 2068 states have internal predecessors, (2665), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 07:59:42,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2091 states to 2091 states and 2707 transitions. [2024-12-02 07:59:42,371 INFO L78 Accepts]: Start accepts. Automaton has 2091 states and 2707 transitions. Word has length 487 [2024-12-02 07:59:42,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:42,372 INFO L471 AbstractCegarLoop]: Abstraction has 2091 states and 2707 transitions. [2024-12-02 07:59:42,372 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 61.333333333333336) internal successors, (368), 6 states have internal predecessors, (368), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:59:42,372 INFO L276 IsEmpty]: Start isEmpty. Operand 2091 states and 2707 transitions. [2024-12-02 07:59:42,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 490 [2024-12-02 07:59:42,374 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:42,374 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:42,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 07:59:42,375 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:42,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:42,375 INFO L85 PathProgramCache]: Analyzing trace with hash -319512153, now seen corresponding path program 1 times [2024-12-02 07:59:42,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:42,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660265857] [2024-12-02 07:59:42,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:42,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:43,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:44,498 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-12-02 07:59:44,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:44,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660265857] [2024-12-02 07:59:44,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [660265857] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:44,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:44,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 07:59:44,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63752598] [2024-12-02 07:59:44,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:44,499 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:59:44,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:44,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:59:44,499 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:59:44,499 INFO L87 Difference]: Start difference. First operand 2091 states and 2707 transitions. Second operand has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:45,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:45,287 INFO L93 Difference]: Finished difference Result 5003 states and 6368 transitions. [2024-12-02 07:59:45,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 07:59:45,288 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 489 [2024-12-02 07:59:45,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:45,290 INFO L225 Difference]: With dead ends: 5003 [2024-12-02 07:59:45,290 INFO L226 Difference]: Without dead ends: 3713 [2024-12-02 07:59:45,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 07:59:45,291 INFO L435 NwaCegarLoop]: 1104 mSDtfsCounter, 1255 mSDsluCounter, 4787 mSDsCounter, 0 mSdLazyCounter, 1381 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 5891 SdHoareTripleChecker+Invalid, 1381 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1381 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:45,292 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 5891 Invalid, 1381 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1381 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 07:59:45,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3713 states. [2024-12-02 07:59:45,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3713 to 3702. [2024-12-02 07:59:45,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3702 states, 3670 states have (on average 1.2779291553133516) internal successors, (4690), 3670 states have internal predecessors, (4690), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-12-02 07:59:45,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3702 states to 3702 states and 4750 transitions. [2024-12-02 07:59:45,343 INFO L78 Accepts]: Start accepts. Automaton has 3702 states and 4750 transitions. Word has length 489 [2024-12-02 07:59:45,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:45,343 INFO L471 AbstractCegarLoop]: Abstraction has 3702 states and 4750 transitions. [2024-12-02 07:59:45,343 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 50.25) internal successors, (402), 8 states have internal predecessors, (402), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:45,343 INFO L276 IsEmpty]: Start isEmpty. Operand 3702 states and 4750 transitions. [2024-12-02 07:59:45,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 07:59:45,347 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:45,347 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:45,347 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 07:59:45,347 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:45,347 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:45,347 INFO L85 PathProgramCache]: Analyzing trace with hash -456250685, now seen corresponding path program 1 times [2024-12-02 07:59:45,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:45,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321428520] [2024-12-02 07:59:45,347 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:45,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:46,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:47,447 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-12-02 07:59:47,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:47,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321428520] [2024-12-02 07:59:47,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321428520] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:47,447 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:47,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:59:47,448 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451423336] [2024-12-02 07:59:47,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:47,448 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:59:47,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:47,449 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:59:47,449 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:59:47,449 INFO L87 Difference]: Start difference. First operand 3702 states and 4750 transitions. Second operand has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:59:47,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:47,932 INFO L93 Difference]: Finished difference Result 3715 states and 4761 transitions. [2024-12-02 07:59:47,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:59:47,933 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 491 [2024-12-02 07:59:47,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:47,935 INFO L225 Difference]: With dead ends: 3715 [2024-12-02 07:59:47,935 INFO L226 Difference]: Without dead ends: 2105 [2024-12-02 07:59:47,936 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:59:47,936 INFO L435 NwaCegarLoop]: 559 mSDtfsCounter, 681 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 682 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:47,936 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [682 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 07:59:47,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2105 states. [2024-12-02 07:59:47,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2105 to 2098. [2024-12-02 07:59:47,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2098 states, 2075 states have (on average 1.287710843373494) internal successors, (2672), 2075 states have internal predecessors, (2672), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21) [2024-12-02 07:59:47,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2098 states to 2098 states and 2714 transitions. [2024-12-02 07:59:47,965 INFO L78 Accepts]: Start accepts. Automaton has 2098 states and 2714 transitions. Word has length 491 [2024-12-02 07:59:47,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:47,965 INFO L471 AbstractCegarLoop]: Abstraction has 2098 states and 2714 transitions. [2024-12-02 07:59:47,965 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 63.166666666666664) internal successors, (379), 6 states have internal predecessors, (379), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:59:47,965 INFO L276 IsEmpty]: Start isEmpty. Operand 2098 states and 2714 transitions. [2024-12-02 07:59:47,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 07:59:47,967 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:47,968 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:47,968 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 07:59:47,968 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:47,968 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:47,968 INFO L85 PathProgramCache]: Analyzing trace with hash -522456701, now seen corresponding path program 1 times [2024-12-02 07:59:47,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:47,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782929403] [2024-12-02 07:59:47,968 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:47,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:49,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:50,677 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2024-12-02 07:59:50,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:50,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782929403] [2024-12-02 07:59:50,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1782929403] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:50,678 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:50,678 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 07:59:50,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225398918] [2024-12-02 07:59:50,678 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:50,678 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 07:59:50,678 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:50,679 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 07:59:50,679 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:59:50,679 INFO L87 Difference]: Start difference. First operand 2098 states and 2714 transitions. Second operand has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:51,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:51,972 INFO L93 Difference]: Finished difference Result 5188 states and 6594 transitions. [2024-12-02 07:59:51,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 07:59:51,973 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-12-02 07:59:51,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:51,975 INFO L225 Difference]: With dead ends: 5188 [2024-12-02 07:59:51,975 INFO L226 Difference]: Without dead ends: 3721 [2024-12-02 07:59:51,977 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-12-02 07:59:51,977 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1907 mSDsluCounter, 4085 mSDsCounter, 0 mSdLazyCounter, 2017 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1908 SdHoareTripleChecker+Valid, 4982 SdHoareTripleChecker+Invalid, 2022 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2017 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:51,977 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1908 Valid, 4982 Invalid, 2022 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2017 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 07:59:51,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3721 states. [2024-12-02 07:59:52,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3721 to 2347. [2024-12-02 07:59:52,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2347 states, 2317 states have (on average 1.2956409149762624) internal successors, (3002), 2317 states have internal predecessors, (3002), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-12-02 07:59:52,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2347 states to 2347 states and 3058 transitions. [2024-12-02 07:59:52,018 INFO L78 Accepts]: Start accepts. Automaton has 2347 states and 3058 transitions. Word has length 491 [2024-12-02 07:59:52,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:52,018 INFO L471 AbstractCegarLoop]: Abstraction has 2347 states and 3058 transitions. [2024-12-02 07:59:52,019 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:52,019 INFO L276 IsEmpty]: Start isEmpty. Operand 2347 states and 3058 transitions. [2024-12-02 07:59:52,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 07:59:52,044 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:52,045 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:52,045 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 07:59:52,045 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:52,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:52,046 INFO L85 PathProgramCache]: Analyzing trace with hash -79043197, now seen corresponding path program 1 times [2024-12-02 07:59:52,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:52,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326600867] [2024-12-02 07:59:52,046 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:52,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:53,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:59:55,992 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2024-12-02 07:59:55,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:59:55,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326600867] [2024-12-02 07:59:55,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1326600867] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:59:55,992 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:59:55,992 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 07:59:55,992 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080416739] [2024-12-02 07:59:55,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:59:55,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 07:59:55,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:59:55,993 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 07:59:55,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:59:55,993 INFO L87 Difference]: Start difference. First operand 2347 states and 3058 transitions. Second operand has 10 states, 10 states have (on average 38.7) internal successors, (387), 10 states have internal predecessors, (387), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:56,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:59:56,442 INFO L93 Difference]: Finished difference Result 4410 states and 5721 transitions. [2024-12-02 07:59:56,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-12-02 07:59:56,442 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 38.7) internal successors, (387), 10 states have internal predecessors, (387), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-12-02 07:59:56,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:59:56,445 INFO L225 Difference]: With dead ends: 4410 [2024-12-02 07:59:56,445 INFO L226 Difference]: Without dead ends: 3181 [2024-12-02 07:59:56,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2024-12-02 07:59:56,446 INFO L435 NwaCegarLoop]: 1210 mSDtfsCounter, 1769 mSDsluCounter, 7046 mSDsCounter, 0 mSdLazyCounter, 526 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1774 SdHoareTripleChecker+Valid, 8256 SdHoareTripleChecker+Invalid, 528 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 526 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:59:56,446 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1774 Valid, 8256 Invalid, 528 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 526 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:59:56,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3181 states. [2024-12-02 07:59:56,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3181 to 2489. [2024-12-02 07:59:56,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2489 states, 2453 states have (on average 1.2963717896453322) internal successors, (3180), 2453 states have internal predecessors, (3180), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-12-02 07:59:56,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2489 states to 2489 states and 3248 transitions. [2024-12-02 07:59:56,504 INFO L78 Accepts]: Start accepts. Automaton has 2489 states and 3248 transitions. Word has length 491 [2024-12-02 07:59:56,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:59:56,504 INFO L471 AbstractCegarLoop]: Abstraction has 2489 states and 3248 transitions. [2024-12-02 07:59:56,504 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 38.7) internal successors, (387), 10 states have internal predecessors, (387), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:59:56,504 INFO L276 IsEmpty]: Start isEmpty. Operand 2489 states and 3248 transitions. [2024-12-02 07:59:56,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-12-02 07:59:56,506 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:59:56,507 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:59:56,507 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 07:59:56,507 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:59:56,507 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:59:56,507 INFO L85 PathProgramCache]: Analyzing trace with hash -1606071517, now seen corresponding path program 1 times [2024-12-02 07:59:56,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:59:56,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474480332] [2024-12-02 07:59:56,507 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:59:56,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:59:59,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:05,293 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 81 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:05,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:05,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474480332] [2024-12-02 08:00:05,293 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474480332] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:05,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1886277972] [2024-12-02 08:00:05,293 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:05,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:05,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:00:05,295 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:00:05,295 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:00:07,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:07,762 INFO L256 TraceCheckSpWp]: Trace formula consists of 2979 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 08:00:07,769 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:00:08,020 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 113 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:08,020 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:00:08,386 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:08,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1886277972] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:08,386 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:00:08,386 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [20, 8] total 31 [2024-12-02 08:00:08,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351836634] [2024-12-02 08:00:08,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:08,387 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 08:00:08,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:08,388 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 08:00:08,388 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=832, Unknown=0, NotChecked=0, Total=930 [2024-12-02 08:00:08,388 INFO L87 Difference]: Start difference. First operand 2489 states and 3248 transitions. Second operand has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:08,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:08,547 INFO L93 Difference]: Finished difference Result 3689 states and 4837 transitions. [2024-12-02 08:00:08,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:00:08,548 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 491 [2024-12-02 08:00:08,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:08,551 INFO L225 Difference]: With dead ends: 3689 [2024-12-02 08:00:08,551 INFO L226 Difference]: Without dead ends: 3088 [2024-12-02 08:00:08,553 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1003 GetRequests, 972 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=949, Unknown=0, NotChecked=0, Total=1056 [2024-12-02 08:00:08,553 INFO L435 NwaCegarLoop]: 1342 mSDtfsCounter, 485 mSDsluCounter, 6098 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 7440 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:08,553 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 7440 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:00:08,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3088 states. [2024-12-02 08:00:08,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3088 to 2789. [2024-12-02 08:00:08,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2789 states, 2749 states have (on average 1.290651145871226) internal successors, (3548), 2749 states have internal predecessors, (3548), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:00:08,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2789 states to 2789 states and 3624 transitions. [2024-12-02 08:00:08,628 INFO L78 Accepts]: Start accepts. Automaton has 2789 states and 3624 transitions. Word has length 491 [2024-12-02 08:00:08,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:08,628 INFO L471 AbstractCegarLoop]: Abstraction has 2789 states and 3624 transitions. [2024-12-02 08:00:08,628 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:08,628 INFO L276 IsEmpty]: Start isEmpty. Operand 2789 states and 3624 transitions. [2024-12-02 08:00:08,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 493 [2024-12-02 08:00:08,631 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:08,631 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:08,647 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:00:08,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable75 [2024-12-02 08:00:08,831 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:08,832 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:08,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1429382752, now seen corresponding path program 1 times [2024-12-02 08:00:08,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:08,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497858859] [2024-12-02 08:00:08,832 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:08,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:10,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:12,389 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 4 proven. 116 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:12,389 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:12,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497858859] [2024-12-02 08:00:12,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497858859] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:12,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [809684553] [2024-12-02 08:00:12,389 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:12,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:12,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:00:12,391 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:00:12,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 08:00:14,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:14,891 INFO L256 TraceCheckSpWp]: Trace formula consists of 2982 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:00:14,898 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:00:14,948 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-12-02 08:00:14,948 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:00:14,948 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [809684553] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:14,948 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:00:14,948 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-12-02 08:00:14,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621168245] [2024-12-02 08:00:14,949 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:14,949 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:00:14,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:14,949 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:00:14,950 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:00:14,950 INFO L87 Difference]: Start difference. First operand 2789 states and 3624 transitions. Second operand has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:15,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:15,045 INFO L93 Difference]: Finished difference Result 4935 states and 6374 transitions. [2024-12-02 08:00:15,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:00:15,045 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 492 [2024-12-02 08:00:15,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:15,048 INFO L225 Difference]: With dead ends: 4935 [2024-12-02 08:00:15,049 INFO L226 Difference]: Without dead ends: 2789 [2024-12-02 08:00:15,051 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 489 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:00:15,051 INFO L435 NwaCegarLoop]: 756 mSDtfsCounter, 0 mSDsluCounter, 3005 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3761 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:15,051 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3761 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:00:15,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2789 states. [2024-12-02 08:00:15,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2789 to 2789. [2024-12-02 08:00:15,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2789 states, 2749 states have (on average 1.2833757730083666) internal successors, (3528), 2749 states have internal predecessors, (3528), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:00:15,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2789 states to 2789 states and 3604 transitions. [2024-12-02 08:00:15,109 INFO L78 Accepts]: Start accepts. Automaton has 2789 states and 3604 transitions. Word has length 492 [2024-12-02 08:00:15,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:15,109 INFO L471 AbstractCegarLoop]: Abstraction has 2789 states and 3604 transitions. [2024-12-02 08:00:15,109 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:15,109 INFO L276 IsEmpty]: Start isEmpty. Operand 2789 states and 3604 transitions. [2024-12-02 08:00:15,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:00:15,112 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:15,112 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:15,128 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 08:00:15,312 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable76 [2024-12-02 08:00:15,313 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:15,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:15,313 INFO L85 PathProgramCache]: Analyzing trace with hash -1395375228, now seen corresponding path program 1 times [2024-12-02 08:00:15,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:15,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244916552] [2024-12-02 08:00:15,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:15,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:16,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:18,294 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:18,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:18,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244916552] [2024-12-02 08:00:18,295 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [244916552] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:18,295 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:00:18,295 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 08:00:18,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880376016] [2024-12-02 08:00:18,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:18,295 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 08:00:18,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:18,296 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 08:00:18,296 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:00:18,296 INFO L87 Difference]: Start difference. First operand 2789 states and 3604 transitions. Second operand has 9 states, 9 states have (on average 51.888888888888886) internal successors, (467), 9 states have internal predecessors, (467), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:19,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:19,471 INFO L93 Difference]: Finished difference Result 5442 states and 6944 transitions. [2024-12-02 08:00:19,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:00:19,472 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 51.888888888888886) internal successors, (467), 9 states have internal predecessors, (467), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 494 [2024-12-02 08:00:19,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:19,475 INFO L225 Difference]: With dead ends: 5442 [2024-12-02 08:00:19,475 INFO L226 Difference]: Without dead ends: 4338 [2024-12-02 08:00:19,476 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-12-02 08:00:19,476 INFO L435 NwaCegarLoop]: 901 mSDtfsCounter, 1820 mSDsluCounter, 4111 mSDsCounter, 0 mSdLazyCounter, 1986 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1821 SdHoareTripleChecker+Valid, 5012 SdHoareTripleChecker+Invalid, 1990 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1986 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:19,476 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1821 Valid, 5012 Invalid, 1990 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1986 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-12-02 08:00:19,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4338 states. [2024-12-02 08:00:19,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4338 to 3892. [2024-12-02 08:00:19,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3892 states, 3852 states have (on average 1.2510384215991692) internal successors, (4819), 3852 states have internal predecessors, (4819), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:00:19,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3892 states to 3892 states and 4895 transitions. [2024-12-02 08:00:19,530 INFO L78 Accepts]: Start accepts. Automaton has 3892 states and 4895 transitions. Word has length 494 [2024-12-02 08:00:19,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:19,530 INFO L471 AbstractCegarLoop]: Abstraction has 3892 states and 4895 transitions. [2024-12-02 08:00:19,530 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 51.888888888888886) internal successors, (467), 9 states have internal predecessors, (467), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:19,530 INFO L276 IsEmpty]: Start isEmpty. Operand 3892 states and 4895 transitions. [2024-12-02 08:00:19,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:00:19,535 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:19,535 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:19,536 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 08:00:19,536 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:19,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:19,536 INFO L85 PathProgramCache]: Analyzing trace with hash 2004649571, now seen corresponding path program 1 times [2024-12-02 08:00:19,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:19,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89250847] [2024-12-02 08:00:19,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:19,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:21,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:23,214 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 4 proven. 115 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:23,214 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:23,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89250847] [2024-12-02 08:00:23,214 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89250847] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:23,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1353639214] [2024-12-02 08:00:23,214 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:23,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:23,214 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:00:23,215 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:00:23,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:00:26,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:26,768 INFO L256 TraceCheckSpWp]: Trace formula consists of 2988 conjuncts, 75 conjuncts are in the unsatisfiable core [2024-12-02 08:00:26,777 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:00:27,764 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 151 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 08:00:27,764 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:00:31,065 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 110 proven. 9 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:31,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1353639214] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:00:31,065 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:00:31,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 17] total 36 [2024-12-02 08:00:31,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485286298] [2024-12-02 08:00:31,065 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:00:31,101 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2024-12-02 08:00:31,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:31,102 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-12-02 08:00:31,102 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=1112, Unknown=0, NotChecked=0, Total=1260 [2024-12-02 08:00:31,103 INFO L87 Difference]: Start difference. First operand 3892 states and 4895 transitions. Second operand has 36 states, 36 states have (on average 35.80555555555556) internal successors, (1289), 36 states have internal predecessors, (1289), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:00:33,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:33,779 INFO L93 Difference]: Finished difference Result 5202 states and 6547 transitions. [2024-12-02 08:00:33,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-12-02 08:00:33,779 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 35.80555555555556) internal successors, (1289), 36 states have internal predecessors, (1289), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 494 [2024-12-02 08:00:33,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:33,782 INFO L225 Difference]: With dead ends: 5202 [2024-12-02 08:00:33,782 INFO L226 Difference]: Without dead ends: 3918 [2024-12-02 08:00:33,783 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1017 GetRequests, 963 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 560 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=468, Invalid=2612, Unknown=0, NotChecked=0, Total=3080 [2024-12-02 08:00:33,784 INFO L435 NwaCegarLoop]: 693 mSDtfsCounter, 1004 mSDsluCounter, 13620 mSDsCounter, 0 mSdLazyCounter, 5502 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1007 SdHoareTripleChecker+Valid, 14313 SdHoareTripleChecker+Invalid, 5508 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 5502 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:33,784 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1007 Valid, 14313 Invalid, 5508 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 5502 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2024-12-02 08:00:33,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3918 states. [2024-12-02 08:00:33,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3918 to 3898. [2024-12-02 08:00:33,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3898 states, 3858 states have (on average 1.2511664074650077) internal successors, (4827), 3858 states have internal predecessors, (4827), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:00:33,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3898 states to 3898 states and 4903 transitions. [2024-12-02 08:00:33,832 INFO L78 Accepts]: Start accepts. Automaton has 3898 states and 4903 transitions. Word has length 494 [2024-12-02 08:00:33,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:33,832 INFO L471 AbstractCegarLoop]: Abstraction has 3898 states and 4903 transitions. [2024-12-02 08:00:33,832 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 35.80555555555556) internal successors, (1289), 36 states have internal predecessors, (1289), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 08:00:33,832 INFO L276 IsEmpty]: Start isEmpty. Operand 3898 states and 4903 transitions. [2024-12-02 08:00:33,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:00:33,835 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:33,835 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:33,853 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:00:34,036 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78 [2024-12-02 08:00:34,036 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:34,036 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:34,036 INFO L85 PathProgramCache]: Analyzing trace with hash -1944273401, now seen corresponding path program 1 times [2024-12-02 08:00:34,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:34,036 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201431231] [2024-12-02 08:00:34,037 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:34,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:35,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:38,202 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 2 proven. 114 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:38,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:38,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201431231] [2024-12-02 08:00:38,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201431231] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:38,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1937433896] [2024-12-02 08:00:38,202 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:38,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:38,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:00:38,204 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:00:38,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 08:00:41,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:41,245 INFO L256 TraceCheckSpWp]: Trace formula consists of 2986 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:00:41,251 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:00:41,307 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-12-02 08:00:41,307 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:00:41,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1937433896] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:41,307 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:00:41,307 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-12-02 08:00:41,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603084263] [2024-12-02 08:00:41,307 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:41,307 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:00:41,307 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:41,308 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:00:41,308 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:00:41,308 INFO L87 Difference]: Start difference. First operand 3898 states and 4903 transitions. Second operand has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:00:41,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:41,396 INFO L93 Difference]: Finished difference Result 7389 states and 9246 transitions. [2024-12-02 08:00:41,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:00:41,396 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 494 [2024-12-02 08:00:41,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:41,400 INFO L225 Difference]: With dead ends: 7389 [2024-12-02 08:00:41,400 INFO L226 Difference]: Without dead ends: 3898 [2024-12-02 08:00:41,404 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 509 GetRequests, 493 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-12-02 08:00:41,404 INFO L435 NwaCegarLoop]: 755 mSDtfsCounter, 0 mSDsluCounter, 3001 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3756 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:41,404 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3756 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:00:41,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3898 states. [2024-12-02 08:00:41,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3898 to 3898. [2024-12-02 08:00:41,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3898 states, 3858 states have (on average 1.2485743908761016) internal successors, (4817), 3858 states have internal predecessors, (4817), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 08:00:41,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3898 states to 3898 states and 4893 transitions. [2024-12-02 08:00:41,453 INFO L78 Accepts]: Start accepts. Automaton has 3898 states and 4893 transitions. Word has length 494 [2024-12-02 08:00:41,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:41,453 INFO L471 AbstractCegarLoop]: Abstraction has 3898 states and 4893 transitions. [2024-12-02 08:00:41,453 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 08:00:41,453 INFO L276 IsEmpty]: Start isEmpty. Operand 3898 states and 4893 transitions. [2024-12-02 08:00:41,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:00:41,457 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:41,457 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:41,482 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 08:00:41,657 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable79 [2024-12-02 08:00:41,657 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:41,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:41,658 INFO L85 PathProgramCache]: Analyzing trace with hash 264429800, now seen corresponding path program 1 times [2024-12-02 08:00:41,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:41,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321762445] [2024-12-02 08:00:41,658 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:41,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:42,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:43,846 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 118 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:43,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:43,846 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321762445] [2024-12-02 08:00:43,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321762445] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:43,847 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:00:43,847 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:00:43,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866629067] [2024-12-02 08:00:43,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:43,847 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:00:43,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:43,848 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:00:43,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:00:43,848 INFO L87 Difference]: Start difference. First operand 3898 states and 4893 transitions. Second operand has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:44,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:44,777 INFO L93 Difference]: Finished difference Result 6452 states and 8108 transitions. [2024-12-02 08:00:44,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 08:00:44,778 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 494 [2024-12-02 08:00:44,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:44,781 INFO L225 Difference]: With dead ends: 6452 [2024-12-02 08:00:44,781 INFO L226 Difference]: Without dead ends: 5158 [2024-12-02 08:00:44,783 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:00:44,783 INFO L435 NwaCegarLoop]: 983 mSDtfsCounter, 1008 mSDsluCounter, 3870 mSDsCounter, 0 mSdLazyCounter, 1823 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1011 SdHoareTripleChecker+Valid, 4853 SdHoareTripleChecker+Invalid, 1824 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1823 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:44,784 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1011 Valid, 4853 Invalid, 1824 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1823 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 08:00:44,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5158 states. [2024-12-02 08:00:44,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5158 to 5139. [2024-12-02 08:00:44,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5139 states, 5091 states have (on average 1.2484777057552543) internal successors, (6356), 5091 states have internal predecessors, (6356), 46 states have call successors, (46), 1 states have call predecessors, (46), 1 states have return successors, (46), 46 states have call predecessors, (46), 46 states have call successors, (46) [2024-12-02 08:00:44,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5139 states to 5139 states and 6448 transitions. [2024-12-02 08:00:44,849 INFO L78 Accepts]: Start accepts. Automaton has 5139 states and 6448 transitions. Word has length 494 [2024-12-02 08:00:44,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:44,849 INFO L471 AbstractCegarLoop]: Abstraction has 5139 states and 6448 transitions. [2024-12-02 08:00:44,849 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 58.375) internal successors, (467), 8 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:44,849 INFO L276 IsEmpty]: Start isEmpty. Operand 5139 states and 6448 transitions. [2024-12-02 08:00:44,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-12-02 08:00:44,853 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:44,853 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:44,853 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 08:00:44,853 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:44,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:44,854 INFO L85 PathProgramCache]: Analyzing trace with hash -1612755833, now seen corresponding path program 1 times [2024-12-02 08:00:44,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:44,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [606509671] [2024-12-02 08:00:44,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:44,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:46,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:47,238 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 118 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:47,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:47,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [606509671] [2024-12-02 08:00:47,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [606509671] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:47,238 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:00:47,238 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:00:47,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212947891] [2024-12-02 08:00:47,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:47,239 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:00:47,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:47,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:00:47,239 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:00:47,239 INFO L87 Difference]: Start difference. First operand 5139 states and 6448 transitions. Second operand has 6 states, 6 states have (on average 77.83333333333333) internal successors, (467), 6 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:47,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:47,770 INFO L93 Difference]: Finished difference Result 6729 states and 8487 transitions. [2024-12-02 08:00:47,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:00:47,770 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 77.83333333333333) internal successors, (467), 6 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 494 [2024-12-02 08:00:47,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:47,774 INFO L225 Difference]: With dead ends: 6729 [2024-12-02 08:00:47,774 INFO L226 Difference]: Without dead ends: 5430 [2024-12-02 08:00:47,775 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 08:00:47,775 INFO L435 NwaCegarLoop]: 565 mSDtfsCounter, 1276 mSDsluCounter, 1652 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1279 SdHoareTripleChecker+Valid, 2217 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:47,775 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1279 Valid, 2217 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 08:00:47,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5430 states. [2024-12-02 08:00:47,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5430 to 4249. [2024-12-02 08:00:47,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4249 states, 4207 states have (on average 1.25837889232232) internal successors, (5294), 4207 states have internal predecessors, (5294), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:00:47,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4249 states to 4249 states and 5374 transitions. [2024-12-02 08:00:47,831 INFO L78 Accepts]: Start accepts. Automaton has 4249 states and 5374 transitions. Word has length 494 [2024-12-02 08:00:47,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:47,832 INFO L471 AbstractCegarLoop]: Abstraction has 4249 states and 5374 transitions. [2024-12-02 08:00:47,832 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 77.83333333333333) internal successors, (467), 6 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:47,832 INFO L276 IsEmpty]: Start isEmpty. Operand 4249 states and 5374 transitions. [2024-12-02 08:00:47,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2024-12-02 08:00:47,835 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:47,835 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:47,835 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 08:00:47,835 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:47,835 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:47,835 INFO L85 PathProgramCache]: Analyzing trace with hash 229984526, now seen corresponding path program 1 times [2024-12-02 08:00:47,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:47,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272413469] [2024-12-02 08:00:47,835 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:47,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:48,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:48,622 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2024-12-02 08:00:48,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:48,622 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272413469] [2024-12-02 08:00:48,622 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272413469] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:48,622 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:00:48,622 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 08:00:48,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550346871] [2024-12-02 08:00:48,623 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:48,623 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:00:48,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:48,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:00:48,624 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:00:48,624 INFO L87 Difference]: Start difference. First operand 4249 states and 5374 transitions. Second operand has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:49,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:49,037 INFO L93 Difference]: Finished difference Result 7587 states and 9517 transitions. [2024-12-02 08:00:49,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:00:49,037 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 495 [2024-12-02 08:00:49,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:49,040 INFO L225 Difference]: With dead ends: 7587 [2024-12-02 08:00:49,040 INFO L226 Difference]: Without dead ends: 4345 [2024-12-02 08:00:49,042 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 08:00:49,042 INFO L435 NwaCegarLoop]: 569 mSDtfsCounter, 714 mSDsluCounter, 1687 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 714 SdHoareTripleChecker+Valid, 2256 SdHoareTripleChecker+Invalid, 787 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:49,042 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [714 Valid, 2256 Invalid, 787 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-12-02 08:00:49,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4345 states. [2024-12-02 08:00:49,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4345 to 4297. [2024-12-02 08:00:49,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4297 states, 4255 states have (on average 1.255464159811986) internal successors, (5342), 4255 states have internal predecessors, (5342), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:00:49,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4297 states to 4297 states and 5422 transitions. [2024-12-02 08:00:49,118 INFO L78 Accepts]: Start accepts. Automaton has 4297 states and 5422 transitions. Word has length 495 [2024-12-02 08:00:49,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:49,118 INFO L471 AbstractCegarLoop]: Abstraction has 4297 states and 5422 transitions. [2024-12-02 08:00:49,119 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 65.83333333333333) internal successors, (395), 6 states have internal predecessors, (395), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:00:49,119 INFO L276 IsEmpty]: Start isEmpty. Operand 4297 states and 5422 transitions. [2024-12-02 08:00:49,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2024-12-02 08:00:49,122 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:49,122 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:49,122 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-02 08:00:49,122 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:49,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:49,122 INFO L85 PathProgramCache]: Analyzing trace with hash -1210291682, now seen corresponding path program 1 times [2024-12-02 08:00:49,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:49,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952088695] [2024-12-02 08:00:49,123 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:49,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:51,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:52,272 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 114 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:00:52,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:00:52,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952088695] [2024-12-02 08:00:52,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [952088695] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:00:52,273 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [545809221] [2024-12-02 08:00:52,273 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:52,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:52,273 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:00:52,274 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:00:52,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 08:00:55,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:00:55,924 INFO L256 TraceCheckSpWp]: Trace formula consists of 2989 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 08:00:55,930 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:00:55,976 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 152 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-12-02 08:00:55,976 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:00:55,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [545809221] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:00:55,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:00:55,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2024-12-02 08:00:55,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415701497] [2024-12-02 08:00:55,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:00:55,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 08:00:55,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:00:55,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 08:00:55,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:00:55,977 INFO L87 Difference]: Start difference. First operand 4297 states and 5422 transitions. Second operand has 6 states, 5 states have (on average 94.0) internal successors, (470), 6 states have internal predecessors, (470), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:56,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:00:56,073 INFO L93 Difference]: Finished difference Result 8281 states and 10399 transitions. [2024-12-02 08:00:56,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 08:00:56,074 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 94.0) internal successors, (470), 6 states have internal predecessors, (470), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 495 [2024-12-02 08:00:56,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:00:56,077 INFO L225 Difference]: With dead ends: 8281 [2024-12-02 08:00:56,077 INFO L226 Difference]: Without dead ends: 4297 [2024-12-02 08:00:56,079 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 492 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:00:56,080 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 2997 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3751 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:00:56,080 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3751 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:00:56,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4297 states. [2024-12-02 08:00:56,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4297 to 4297. [2024-12-02 08:00:56,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4297 states, 4255 states have (on average 1.2531139835487661) internal successors, (5332), 4255 states have internal predecessors, (5332), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 08:00:56,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4297 states to 4297 states and 5412 transitions. [2024-12-02 08:00:56,135 INFO L78 Accepts]: Start accepts. Automaton has 4297 states and 5412 transitions. Word has length 495 [2024-12-02 08:00:56,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:00:56,135 INFO L471 AbstractCegarLoop]: Abstraction has 4297 states and 5412 transitions. [2024-12-02 08:00:56,135 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 94.0) internal successors, (470), 6 states have internal predecessors, (470), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:00:56,136 INFO L276 IsEmpty]: Start isEmpty. Operand 4297 states and 5412 transitions. [2024-12-02 08:00:56,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-12-02 08:00:56,140 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:00:56,140 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:00:56,158 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 08:00:56,340 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:00:56,340 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:00:56,341 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:00:56,341 INFO L85 PathProgramCache]: Analyzing trace with hash 174471519, now seen corresponding path program 1 times [2024-12-02 08:00:56,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:00:56,341 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536752570] [2024-12-02 08:00:56,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:00:56,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:00:58,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:03,240 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 81 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-12-02 08:01:03,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:01:03,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536752570] [2024-12-02 08:01:03,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1536752570] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:01:03,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [16263612] [2024-12-02 08:01:03,240 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:01:03,240 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:01:03,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:01:03,242 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:01:03,242 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 08:01:07,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:01:07,735 INFO L256 TraceCheckSpWp]: Trace formula consists of 2992 conjuncts, 289 conjuncts are in the unsatisfiable core [2024-12-02 08:01:07,755 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:01:16,199 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 81 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:01:16,199 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:01:31,459 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 77 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:01:31,459 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [16263612] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:01:31,459 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:01:31,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 53, 37] total 103 [2024-12-02 08:01:31,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382426439] [2024-12-02 08:01:31,459 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:01:31,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 103 states [2024-12-02 08:01:31,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:01:31,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2024-12-02 08:01:31,461 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=9378, Unknown=0, NotChecked=0, Total=10506 [2024-12-02 08:01:31,462 INFO L87 Difference]: Start difference. First operand 4297 states and 5412 transitions. Second operand has 103 states, 103 states have (on average 11.951456310679612) internal successors, (1231), 103 states have internal predecessors, (1231), 14 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 14 states have call predecessors, (18), 14 states have call successors, (18) [2024-12-02 08:04:59,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:04:59,849 INFO L93 Difference]: Finished difference Result 127920 states and 159051 transitions. [2024-12-02 08:04:59,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 746 states. [2024-12-02 08:04:59,850 INFO L78 Accepts]: Start accepts. Automaton has has 103 states, 103 states have (on average 11.951456310679612) internal successors, (1231), 103 states have internal predecessors, (1231), 14 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 14 states have call predecessors, (18), 14 states have call successors, (18) Word has length 496 [2024-12-02 08:04:59,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:04:59,917 INFO L225 Difference]: With dead ends: 127920 [2024-12-02 08:04:59,917 INFO L226 Difference]: Without dead ends: 124542 [2024-12-02 08:04:59,953 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1741 GetRequests, 907 SyntacticMatches, 0 SemanticMatches, 834 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 300345 ImplicationChecksByTransitivity, 69.2s TimeCoverageRelationStatistics Valid=60577, Invalid=637483, Unknown=0, NotChecked=0, Total=698060 [2024-12-02 08:04:59,953 INFO L435 NwaCegarLoop]: 5289 mSDtfsCounter, 108724 mSDsluCounter, 250061 mSDsCounter, 0 mSdLazyCounter, 202604 mSolverCounterSat, 697 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 101.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108730 SdHoareTripleChecker+Valid, 255350 SdHoareTripleChecker+Invalid, 203301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.9s SdHoareTripleChecker+Time, 697 IncrementalHoareTripleChecker+Valid, 202604 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 116.7s IncrementalHoareTripleChecker+Time [2024-12-02 08:04:59,954 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [108730 Valid, 255350 Invalid, 203301 Unknown, 0 Unchecked, 0.9s Time], IncrementalHoareTripleChecker [697 Valid, 202604 Invalid, 0 Unknown, 0 Unchecked, 116.7s Time] [2024-12-02 08:04:59,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124542 states. [2024-12-02 08:05:00,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124542 to 20226. [2024-12-02 08:05:00,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20226 states, 20002 states have (on average 1.2477752224777523) internal successors, (24958), 20002 states have internal predecessors, (24958), 222 states have call successors, (222), 1 states have call predecessors, (222), 1 states have return successors, (222), 222 states have call predecessors, (222), 222 states have call successors, (222) [2024-12-02 08:05:00,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20226 states to 20226 states and 25402 transitions. [2024-12-02 08:05:00,648 INFO L78 Accepts]: Start accepts. Automaton has 20226 states and 25402 transitions. Word has length 496 [2024-12-02 08:05:00,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:00,648 INFO L471 AbstractCegarLoop]: Abstraction has 20226 states and 25402 transitions. [2024-12-02 08:05:00,648 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 103 states, 103 states have (on average 11.951456310679612) internal successors, (1231), 103 states have internal predecessors, (1231), 14 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 14 states have call predecessors, (18), 14 states have call successors, (18) [2024-12-02 08:05:00,648 INFO L276 IsEmpty]: Start isEmpty. Operand 20226 states and 25402 transitions. [2024-12-02 08:05:00,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:05:00,662 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:00,663 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:00,682 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-12-02 08:05:00,863 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:05:00,863 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:00,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:00,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1030967793, now seen corresponding path program 1 times [2024-12-02 08:05:00,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:00,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074793867] [2024-12-02 08:05:00,864 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:00,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:02,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:03,485 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:03,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:03,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074793867] [2024-12-02 08:05:03,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2074793867] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:03,485 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:03,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 08:05:03,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606872105] [2024-12-02 08:05:03,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:03,485 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 08:05:03,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:03,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 08:05:03,486 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-12-02 08:05:03,486 INFO L87 Difference]: Start difference. First operand 20226 states and 25402 transitions. Second operand has 8 states, 8 states have (on average 58.75) internal successors, (470), 8 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:04,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:04,773 INFO L93 Difference]: Finished difference Result 38454 states and 48411 transitions. [2024-12-02 08:05:04,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:05:04,773 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 58.75) internal successors, (470), 8 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 497 [2024-12-02 08:05:04,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:04,794 INFO L225 Difference]: With dead ends: 38454 [2024-12-02 08:05:04,794 INFO L226 Difference]: Without dead ends: 32025 [2024-12-02 08:05:04,803 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:05:04,803 INFO L435 NwaCegarLoop]: 825 mSDtfsCounter, 1231 mSDsluCounter, 3770 mSDsCounter, 0 mSdLazyCounter, 2013 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1234 SdHoareTripleChecker+Valid, 4595 SdHoareTripleChecker+Invalid, 2015 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2013 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:04,803 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1234 Valid, 4595 Invalid, 2015 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2013 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 08:05:04,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32025 states. [2024-12-02 08:05:05,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32025 to 30116. [2024-12-02 08:05:05,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30116 states, 29748 states have (on average 1.2379991932230738) internal successors, (36828), 29748 states have internal predecessors, (36828), 366 states have call successors, (366), 1 states have call predecessors, (366), 1 states have return successors, (366), 366 states have call predecessors, (366), 366 states have call successors, (366) [2024-12-02 08:05:05,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30116 states to 30116 states and 37560 transitions. [2024-12-02 08:05:05,384 INFO L78 Accepts]: Start accepts. Automaton has 30116 states and 37560 transitions. Word has length 497 [2024-12-02 08:05:05,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:05,385 INFO L471 AbstractCegarLoop]: Abstraction has 30116 states and 37560 transitions. [2024-12-02 08:05:05,385 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 58.75) internal successors, (470), 8 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 08:05:05,385 INFO L276 IsEmpty]: Start isEmpty. Operand 30116 states and 37560 transitions. [2024-12-02 08:05:05,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:05:05,405 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:05,405 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:05,405 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 08:05:05,405 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:05,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:05,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1081766301, now seen corresponding path program 1 times [2024-12-02 08:05:05,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:05,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644771838] [2024-12-02 08:05:05,406 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:05,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:07,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:10,088 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:10,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:10,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644771838] [2024-12-02 08:05:10,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644771838] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:05:10,089 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:05:10,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-12-02 08:05:10,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274110578] [2024-12-02 08:05:10,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:05:10,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-12-02 08:05:10,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:10,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-12-02 08:05:10,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2024-12-02 08:05:10,090 INFO L87 Difference]: Start difference. First operand 30116 states and 37560 transitions. Second operand has 11 states, 11 states have (on average 42.72727272727273) internal successors, (470), 11 states have internal predecessors, (470), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:11,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:05:11,798 INFO L93 Difference]: Finished difference Result 49344 states and 61477 transitions. [2024-12-02 08:05:11,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-12-02 08:05:11,798 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 42.72727272727273) internal successors, (470), 11 states have internal predecessors, (470), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 497 [2024-12-02 08:05:11,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:05:11,841 INFO L225 Difference]: With dead ends: 49344 [2024-12-02 08:05:11,841 INFO L226 Difference]: Without dead ends: 39287 [2024-12-02 08:05:11,854 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2024-12-02 08:05:11,854 INFO L435 NwaCegarLoop]: 557 mSDtfsCounter, 1824 mSDsluCounter, 3795 mSDsCounter, 0 mSdLazyCounter, 1921 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1826 SdHoareTripleChecker+Valid, 4352 SdHoareTripleChecker+Invalid, 1924 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1921 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:05:11,854 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1826 Valid, 4352 Invalid, 1924 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1921 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-12-02 08:05:11,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39287 states. [2024-12-02 08:05:12,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39287 to 39076. [2024-12-02 08:05:12,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39076 states, 38648 states have (on average 1.2358983647277997) internal successors, (47765), 38648 states have internal predecessors, (47765), 426 states have call successors, (426), 1 states have call predecessors, (426), 1 states have return successors, (426), 426 states have call predecessors, (426), 426 states have call successors, (426) [2024-12-02 08:05:12,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39076 states to 39076 states and 48617 transitions. [2024-12-02 08:05:12,714 INFO L78 Accepts]: Start accepts. Automaton has 39076 states and 48617 transitions. Word has length 497 [2024-12-02 08:05:12,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:05:12,714 INFO L471 AbstractCegarLoop]: Abstraction has 39076 states and 48617 transitions. [2024-12-02 08:05:12,714 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 42.72727272727273) internal successors, (470), 11 states have internal predecessors, (470), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:05:12,714 INFO L276 IsEmpty]: Start isEmpty. Operand 39076 states and 48617 transitions. [2024-12-02 08:05:12,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:05:12,739 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:05:12,739 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:05:12,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 08:05:12,739 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:05:12,739 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:05:12,739 INFO L85 PathProgramCache]: Analyzing trace with hash 768773700, now seen corresponding path program 1 times [2024-12-02 08:05:12,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:05:12,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699405533] [2024-12-02 08:05:12,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:12,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:05:15,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:17,762 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 08:05:17,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:05:17,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699405533] [2024-12-02 08:05:17,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1699405533] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:05:17,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349619580] [2024-12-02 08:05:17,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:05:17,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:05:17,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:05:17,764 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:05:17,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 08:05:22,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:05:22,478 INFO L256 TraceCheckSpWp]: Trace formula consists of 2995 conjuncts, 300 conjuncts are in the unsatisfiable core [2024-12-02 08:05:22,491 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:05:28,526 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 25 proven. 111 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:05:28,526 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:05:45,697 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 10 proven. 126 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:05:45,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349619580] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 08:05:45,697 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 08:05:45,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 60, 54] total 122 [2024-12-02 08:05:45,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035056807] [2024-12-02 08:05:45,697 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 08:05:45,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 122 states [2024-12-02 08:05:45,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:05:45,699 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2024-12-02 08:05:45,699 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=2075, Invalid=12687, Unknown=0, NotChecked=0, Total=14762 [2024-12-02 08:05:45,700 INFO L87 Difference]: Start difference. First operand 39076 states and 48617 transitions. Second operand has 122 states, 119 states have (on average 11.747899159663865) internal successors, (1398), 122 states have internal predecessors, (1398), 12 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-12-02 08:06:29,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:29,797 INFO L93 Difference]: Finished difference Result 139389 states and 173254 transitions. [2024-12-02 08:06:29,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 350 states. [2024-12-02 08:06:29,798 INFO L78 Accepts]: Start accepts. Automaton has has 122 states, 119 states have (on average 11.747899159663865) internal successors, (1398), 122 states have internal predecessors, (1398), 12 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) Word has length 497 [2024-12-02 08:06:29,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:29,863 INFO L225 Difference]: With dead ends: 139389 [2024-12-02 08:06:29,863 INFO L226 Difference]: Without dead ends: 108670 [2024-12-02 08:06:29,891 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1327 GetRequests, 886 SyntacticMatches, 2 SemanticMatches, 439 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62828 ImplicationChecksByTransitivity, 30.4s TimeCoverageRelationStatistics Valid=22290, Invalid=171750, Unknown=0, NotChecked=0, Total=194040 [2024-12-02 08:06:29,892 INFO L435 NwaCegarLoop]: 1072 mSDtfsCounter, 14000 mSDsluCounter, 58941 mSDsCounter, 0 mSdLazyCounter, 35901 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 15.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14013 SdHoareTripleChecker+Valid, 60013 SdHoareTripleChecker+Invalid, 35956 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 35901 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 18.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:29,892 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [14013 Valid, 60013 Invalid, 35956 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [55 Valid, 35901 Invalid, 0 Unknown, 0 Unchecked, 18.1s Time] [2024-12-02 08:06:29,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108670 states. [2024-12-02 08:06:30,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108670 to 51389. [2024-12-02 08:06:30,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51389 states, 50805 states have (on average 1.2375947249286487) internal successors, (62876), 50805 states have internal predecessors, (62876), 582 states have call successors, (582), 1 states have call predecessors, (582), 1 states have return successors, (582), 582 states have call predecessors, (582), 582 states have call successors, (582) [2024-12-02 08:06:31,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51389 states to 51389 states and 64040 transitions. [2024-12-02 08:06:31,004 INFO L78 Accepts]: Start accepts. Automaton has 51389 states and 64040 transitions. Word has length 497 [2024-12-02 08:06:31,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:31,004 INFO L471 AbstractCegarLoop]: Abstraction has 51389 states and 64040 transitions. [2024-12-02 08:06:31,004 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 122 states, 119 states have (on average 11.747899159663865) internal successors, (1398), 122 states have internal predecessors, (1398), 12 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-12-02 08:06:31,004 INFO L276 IsEmpty]: Start isEmpty. Operand 51389 states and 64040 transitions. [2024-12-02 08:06:31,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-12-02 08:06:31,035 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:31,036 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:31,056 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-12-02 08:06:31,236 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:31,236 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:31,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:31,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1385373554, now seen corresponding path program 1 times [2024-12-02 08:06:31,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:06:31,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998807926] [2024-12-02 08:06:31,237 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:31,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:06:31,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:32,086 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-12-02 08:06:32,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 08:06:32,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998807926] [2024-12-02 08:06:32,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1998807926] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:06:32,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 08:06:32,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 08:06:32,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559929653] [2024-12-02 08:06:32,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:06:32,086 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 08:06:32,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 08:06:32,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 08:06:32,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:06:32,087 INFO L87 Difference]: Start difference. First operand 51389 states and 64040 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:06:32,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:32,730 INFO L93 Difference]: Finished difference Result 93803 states and 116488 transitions. [2024-12-02 08:06:32,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:06:32,731 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 497 [2024-12-02 08:06:32,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:32,769 INFO L225 Difference]: With dead ends: 93803 [2024-12-02 08:06:32,769 INFO L226 Difference]: Without dead ends: 51419 [2024-12-02 08:06:32,794 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 08:06:32,794 INFO L435 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 2246 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3000 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:32,794 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3000 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 08:06:32,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51419 states. [2024-12-02 08:06:33,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51419 to 51419. [2024-12-02 08:06:33,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51419 states, 50835 states have (on average 1.233677584341497) internal successors, (62714), 50835 states have internal predecessors, (62714), 582 states have call successors, (582), 1 states have call predecessors, (582), 1 states have return successors, (582), 582 states have call predecessors, (582), 582 states have call successors, (582) [2024-12-02 08:06:33,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51419 states to 51419 states and 63878 transitions. [2024-12-02 08:06:33,747 INFO L78 Accepts]: Start accepts. Automaton has 51419 states and 63878 transitions. Word has length 497 [2024-12-02 08:06:33,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:33,747 INFO L471 AbstractCegarLoop]: Abstraction has 51419 states and 63878 transitions. [2024-12-02 08:06:33,747 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:06:33,747 INFO L276 IsEmpty]: Start isEmpty. Operand 51419 states and 63878 transitions. [2024-12-02 08:06:33,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-12-02 08:06:33,777 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:33,777 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:33,777 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 08:06:33,777 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:33,778 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:33,778 INFO L85 PathProgramCache]: Analyzing trace with hash -373273150, now seen corresponding path program 1 times [2024-12-02 08:06:33,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 08:06:33,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112501810] [2024-12-02 08:06:33,778 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:33,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 08:06:37,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:06:37,853 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 08:06:42,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 08:06:42,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 08:06:42,568 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 08:06:42,568 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 08:06:42,569 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-02 08:06:42,572 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:42,789 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 08:06:42,792 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 08:06:42 BoogieIcfgContainer [2024-12-02 08:06:42,792 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 08:06:42,792 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 08:06:42,792 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 08:06:42,793 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 08:06:42,793 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:58:28" (3/4) ... [2024-12-02 08:06:42,795 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 08:06:42,795 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 08:06:42,796 INFO L158 Benchmark]: Toolchain (without parser) took 497288.82ms. Allocated memory was 142.6MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 116.6MB in the beginning and 457.9MB in the end (delta: -341.4MB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB. [2024-12-02 08:06:42,796 INFO L158 Benchmark]: CDTParser took 0.35ms. Allocated memory is still 142.6MB. Free memory is still 83.0MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:06:42,796 INFO L158 Benchmark]: CACSL2BoogieTranslator took 440.23ms. Allocated memory is still 142.6MB. Free memory was 116.3MB in the beginning and 80.0MB in the end (delta: 36.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-12-02 08:06:42,796 INFO L158 Benchmark]: Boogie Procedure Inliner took 210.06ms. Allocated memory is still 142.6MB. Free memory was 79.7MB in the beginning and 87.7MB in the end (delta: -8.0MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. [2024-12-02 08:06:42,796 INFO L158 Benchmark]: Boogie Preprocessor took 210.98ms. Allocated memory is still 142.6MB. Free memory was 87.7MB in the beginning and 66.8MB in the end (delta: 20.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2024-12-02 08:06:42,797 INFO L158 Benchmark]: RCFGBuilder took 2394.98ms. Allocated memory was 142.6MB in the beginning and 293.6MB in the end (delta: 151.0MB). Free memory was 66.8MB in the beginning and 178.8MB in the end (delta: -112.0MB). Peak memory consumption was 155.6MB. Max. memory is 16.1GB. [2024-12-02 08:06:42,797 INFO L158 Benchmark]: TraceAbstraction took 494024.43ms. Allocated memory was 293.6MB in the beginning and 2.6GB in the end (delta: 2.3GB). Free memory was 178.8MB in the beginning and 458.1MB in the end (delta: -279.2MB). Peak memory consumption was 2.0GB. Max. memory is 16.1GB. [2024-12-02 08:06:42,797 INFO L158 Benchmark]: Witness Printer took 2.86ms. Allocated memory is still 2.6GB. Free memory was 458.1MB in the beginning and 457.9MB in the end (delta: 140.5kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:06:42,797 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.35ms. Allocated memory is still 142.6MB. Free memory is still 83.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 440.23ms. Allocated memory is still 142.6MB. Free memory was 116.3MB in the beginning and 80.0MB in the end (delta: 36.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 210.06ms. Allocated memory is still 142.6MB. Free memory was 79.7MB in the beginning and 87.7MB in the end (delta: -8.0MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 210.98ms. Allocated memory is still 142.6MB. Free memory was 87.7MB in the beginning and 66.8MB in the end (delta: 20.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * RCFGBuilder took 2394.98ms. Allocated memory was 142.6MB in the beginning and 293.6MB in the end (delta: 151.0MB). Free memory was 66.8MB in the beginning and 178.8MB in the end (delta: -112.0MB). Peak memory consumption was 155.6MB. Max. memory is 16.1GB. * TraceAbstraction took 494024.43ms. Allocated memory was 293.6MB in the beginning and 2.6GB in the end (delta: 2.3GB). Free memory was 178.8MB in the beginning and 458.1MB in the end (delta: -279.2MB). Peak memory consumption was 2.0GB. Max. memory is 16.1GB. * Witness Printer took 2.86ms. Allocated memory is still 2.6GB. Free memory was 458.1MB in the beginning and 457.9MB in the end (delta: 140.5kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 164, overapproximation of bitwiseOr at line 389, overapproximation of bitwiseAnd at line 540, overapproximation of bitwiseAnd at line 125, overapproximation of bitwiseAnd at line 635, overapproximation of bitwiseAnd at line 271, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 464, overapproximation of bitwiseAnd at line 502, overapproximation of bitwiseAnd at line 229, overapproximation of bitwiseAnd at line 301, overapproximation of bitwiseAnd at line 289, overapproximation of bitwiseAnd at line 295, overapproximation of bitwiseAnd at line 241, overapproximation of bitwiseAnd at line 692, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 654, overapproximation of bitwiseAnd at line 221, overapproximation of bitwiseAnd at line 247, overapproximation of bitwiseAnd at line 277, overapproximation of bitwiseAnd at line 616, overapproximation of bitwiseAnd at line 283, overapproximation of bitwiseAnd at line 521, overapproximation of bitwiseAnd at line 766, overapproximation of bitwiseAnd at line 398, overapproximation of bitwiseAnd at line 253, overapproximation of bitwiseAnd at line 483, overapproximation of bitwiseAnd at line 129, overapproximation of bitwiseAnd at line 578, overapproximation of bitwiseAnd at line 559. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 6); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (6 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 5); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (5 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 4); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (4 - 1); [L41] const SORT_60 mask_SORT_60 = (SORT_60)-1 >> (sizeof(SORT_60) * 8 - 3); [L42] const SORT_60 msb_SORT_60 = (SORT_60)1 << (3 - 1); [L44] const SORT_81 mask_SORT_81 = (SORT_81)-1 >> (sizeof(SORT_81) * 8 - 2); [L45] const SORT_81 msb_SORT_81 = (SORT_81)1 << (2 - 1); [L47] const SORT_13 var_15 = 16; [L48] const SORT_19 var_20 = 15; [L49] const SORT_19 var_25 = 14; [L50] const SORT_19 var_30 = 13; [L51] const SORT_19 var_35 = 12; [L52] const SORT_19 var_40 = 11; [L53] const SORT_19 var_45 = 10; [L54] const SORT_19 var_50 = 9; [L55] const SORT_19 var_55 = 8; [L56] const SORT_60 var_61 = 7; [L57] const SORT_60 var_66 = 6; [L58] const SORT_60 var_71 = 5; [L59] const SORT_60 var_76 = 4; [L60] const SORT_81 var_82 = 3; [L61] const SORT_81 var_87 = 2; [L62] const SORT_1 var_92 = 1; [L63] const SORT_13 var_105 = 17; [L64] const SORT_11 var_122 = 0; [L65] const SORT_1 var_152 = 0; [L66] const SORT_3 var_373 = 0; [L68] SORT_1 input_2; [L69] SORT_3 input_4; [L70] SORT_1 input_5; [L71] SORT_1 input_6; [L72] SORT_1 input_7; [L73] SORT_1 input_8; [L74] SORT_3 input_9; [L75] SORT_1 input_150; [L77] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L77] SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L78] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L79] SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L80] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L80] SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L81] SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L82] SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L83] SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L84] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L84] SORT_3 state_44 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L85] SORT_3 state_49 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L86] SORT_3 state_54 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L87] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L87] SORT_3 state_59 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L88] SORT_3 state_65 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L89] SORT_3 state_70 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L90] SORT_3 state_75 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L91] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L91] SORT_3 state_80 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L92] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L92] SORT_3 state_86 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L93] SORT_3 state_91 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L94] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L94] SORT_3 state_96 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L95] SORT_11 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L96] SORT_1 state_109 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L97] SORT_1 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L98] SORT_11 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L99] SORT_3 state_128 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L100] SORT_1 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L101] SORT_11 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L103] SORT_1 init_133_arg_1 = var_92; [L104] state_132 = init_133_arg_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ulong() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ulong() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=0] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=0] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=0] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=0] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=18446744073709551615U] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=0, var_155_arg_1=-256, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND FALSE !(!(cond)) [L401] RET __VERIFIER_assert(!(bad_156_arg_0)) [L403] SORT_11 var_186_arg_0 = state_185; [L404] SORT_13 var_186 = var_186_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] EXPR var_186 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] var_186 = var_186 & mask_SORT_13 [L406] SORT_13 var_236_arg_0 = var_186; [L407] SORT_13 var_236_arg_1 = var_15; [L408] SORT_1 var_236 = var_236_arg_0 == var_236_arg_1; [L409] SORT_1 var_237_arg_0 = input_6; [L410] SORT_1 var_237_arg_1 = var_236; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_237_arg_0=0, var_237_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] EXPR var_237_arg_0 & var_237_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] SORT_1 var_237 = var_237_arg_0 & var_237_arg_1; [L412] EXPR var_237 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L412] var_237 = var_237 & mask_SORT_1 [L413] SORT_1 var_372_arg_0 = var_237; [L414] SORT_3 var_372_arg_1 = input_4; [L415] SORT_3 var_372_arg_2 = state_10; [L416] SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2; [L417] SORT_1 var_374_arg_0 = input_7; [L418] SORT_3 var_374_arg_1 = var_373; [L419] SORT_3 var_374_arg_2 = var_372; [L420] SORT_3 var_374 = var_374_arg_0 ? var_374_arg_1 : var_374_arg_2; [L421] SORT_3 next_375_arg_1 = var_374; [L422] SORT_1 var_160_arg_0 = input_6; [L423] SORT_1 var_160_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_160_arg_0=0, var_160_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] EXPR var_160_arg_0 | var_160_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] SORT_1 var_160 = var_160_arg_0 | var_160_arg_1; [L425] SORT_1 var_161_arg_0 = var_160; [L426] SORT_1 var_161_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161_arg_0=0, var_161_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] EXPR var_161_arg_0 | var_161_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] SORT_1 var_161 = var_161_arg_0 | var_161_arg_1; [L428] EXPR var_161 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L428] var_161 = var_161 & mask_SORT_1 [L429] SORT_1 var_303_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_303_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] EXPR var_303_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L431] SORT_11 var_303 = var_303_arg_0; [L432] SORT_11 var_304_arg_0 = state_12; [L433] SORT_11 var_304_arg_1 = var_303; [L434] SORT_11 var_304 = var_304_arg_0 + var_304_arg_1; [L435] SORT_1 var_376_arg_0 = var_161; [L436] SORT_11 var_376_arg_1 = var_304; [L437] SORT_11 var_376_arg_2 = state_12; [L438] SORT_11 var_376 = var_376_arg_0 ? var_376_arg_1 : var_376_arg_2; [L439] SORT_1 var_377_arg_0 = input_7; [L440] SORT_11 var_377_arg_1 = var_122; [L441] SORT_11 var_377_arg_2 = var_376; [L442] SORT_11 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2; [L443] SORT_11 next_378_arg_1 = var_377; [L444] SORT_19 var_229_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_229_arg_0=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] EXPR var_229_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] var_229_arg_0 = var_229_arg_0 & mask_SORT_19 [L446] SORT_13 var_229 = var_229_arg_0; [L447] SORT_13 var_230_arg_0 = var_186; [L448] SORT_13 var_230_arg_1 = var_229; [L449] SORT_1 var_230 = var_230_arg_0 == var_230_arg_1; [L450] SORT_1 var_231_arg_0 = input_6; [L451] SORT_1 var_231_arg_1 = var_230; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_231_arg_0=0, var_231_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] EXPR var_231_arg_0 & var_231_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L453] EXPR var_231 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L453] var_231 = var_231 & mask_SORT_1 [L454] SORT_1 var_379_arg_0 = var_231; [L455] SORT_3 var_379_arg_1 = input_4; [L456] SORT_3 var_379_arg_2 = state_18; [L457] SORT_3 var_379 = var_379_arg_0 ? var_379_arg_1 : var_379_arg_2; [L458] SORT_1 var_380_arg_0 = input_7; [L459] SORT_3 var_380_arg_1 = var_373; [L460] SORT_3 var_380_arg_2 = var_379; [L461] SORT_3 var_380 = var_380_arg_0 ? var_380_arg_1 : var_380_arg_2; [L462] SORT_3 next_381_arg_1 = var_380; [L463] SORT_19 var_222_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_222_arg_0=14, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] EXPR var_222_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] var_222_arg_0 = var_222_arg_0 & mask_SORT_19 [L465] SORT_13 var_222 = var_222_arg_0; [L466] SORT_13 var_223_arg_0 = var_186; [L467] SORT_13 var_223_arg_1 = var_222; [L468] SORT_1 var_223 = var_223_arg_0 == var_223_arg_1; [L469] SORT_1 var_224_arg_0 = input_6; [L470] SORT_1 var_224_arg_1 = var_223; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_224_arg_0=0, var_224_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L472] EXPR var_224 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L472] var_224 = var_224 & mask_SORT_1 [L473] SORT_1 var_382_arg_0 = var_224; [L474] SORT_3 var_382_arg_1 = input_4; [L475] SORT_3 var_382_arg_2 = state_24; [L476] SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2; [L477] SORT_1 var_383_arg_0 = input_7; [L478] SORT_3 var_383_arg_1 = var_373; [L479] SORT_3 var_383_arg_2 = var_382; [L480] SORT_3 var_383 = var_383_arg_0 ? var_383_arg_1 : var_383_arg_2; [L481] SORT_3 next_384_arg_1 = var_383; [L482] SORT_19 var_215_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_215_arg_0=13, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] EXPR var_215_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] var_215_arg_0 = var_215_arg_0 & mask_SORT_19 [L484] SORT_13 var_215 = var_215_arg_0; [L485] SORT_13 var_216_arg_0 = var_186; [L486] SORT_13 var_216_arg_1 = var_215; [L487] SORT_1 var_216 = var_216_arg_0 == var_216_arg_1; [L488] SORT_1 var_217_arg_0 = input_6; [L489] SORT_1 var_217_arg_1 = var_216; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_217_arg_0=0, var_217_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] EXPR var_217_arg_0 & var_217_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L491] EXPR var_217 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L491] var_217 = var_217 & mask_SORT_1 [L492] SORT_1 var_385_arg_0 = var_217; [L493] SORT_3 var_385_arg_1 = input_4; [L494] SORT_3 var_385_arg_2 = state_29; [L495] SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2; [L496] SORT_1 var_386_arg_0 = input_7; [L497] SORT_3 var_386_arg_1 = var_373; [L498] SORT_3 var_386_arg_2 = var_385; [L499] SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; [L500] SORT_3 next_387_arg_1 = var_386; [L501] SORT_19 var_208_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_208_arg_0=12, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] EXPR var_208_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] var_208_arg_0 = var_208_arg_0 & mask_SORT_19 [L503] SORT_13 var_208 = var_208_arg_0; [L504] SORT_13 var_209_arg_0 = var_186; [L505] SORT_13 var_209_arg_1 = var_208; [L506] SORT_1 var_209 = var_209_arg_0 == var_209_arg_1; [L507] SORT_1 var_210_arg_0 = input_6; [L508] SORT_1 var_210_arg_1 = var_209; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_210_arg_0=0, var_210_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] EXPR var_210_arg_0 & var_210_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L510] EXPR var_210 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L510] var_210 = var_210 & mask_SORT_1 [L511] SORT_1 var_388_arg_0 = var_210; [L512] SORT_3 var_388_arg_1 = input_4; [L513] SORT_3 var_388_arg_2 = state_34; [L514] SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; [L515] SORT_1 var_389_arg_0 = input_7; [L516] SORT_3 var_389_arg_1 = var_373; [L517] SORT_3 var_389_arg_2 = var_388; [L518] SORT_3 var_389 = var_389_arg_0 ? var_389_arg_1 : var_389_arg_2; [L519] SORT_3 next_390_arg_1 = var_389; [L520] SORT_19 var_201_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_201_arg_0=11, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] EXPR var_201_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] var_201_arg_0 = var_201_arg_0 & mask_SORT_19 [L522] SORT_13 var_201 = var_201_arg_0; [L523] SORT_13 var_202_arg_0 = var_186; [L524] SORT_13 var_202_arg_1 = var_201; [L525] SORT_1 var_202 = var_202_arg_0 == var_202_arg_1; [L526] SORT_1 var_203_arg_0 = input_6; [L527] SORT_1 var_203_arg_1 = var_202; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_203_arg_0=0, var_203_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] EXPR var_203_arg_0 & var_203_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L529] EXPR var_203 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L529] var_203 = var_203 & mask_SORT_1 [L530] SORT_1 var_391_arg_0 = var_203; [L531] SORT_3 var_391_arg_1 = input_4; [L532] SORT_3 var_391_arg_2 = state_39; [L533] SORT_3 var_391 = var_391_arg_0 ? var_391_arg_1 : var_391_arg_2; [L534] SORT_1 var_392_arg_0 = input_7; [L535] SORT_3 var_392_arg_1 = var_373; [L536] SORT_3 var_392_arg_2 = var_391; [L537] SORT_3 var_392 = var_392_arg_0 ? var_392_arg_1 : var_392_arg_2; [L538] SORT_3 next_393_arg_1 = var_392; [L539] SORT_19 var_194_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_194_arg_0=10, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] EXPR var_194_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] var_194_arg_0 = var_194_arg_0 & mask_SORT_19 [L541] SORT_13 var_194 = var_194_arg_0; [L542] SORT_13 var_195_arg_0 = var_186; [L543] SORT_13 var_195_arg_1 = var_194; [L544] SORT_1 var_195 = var_195_arg_0 == var_195_arg_1; [L545] SORT_1 var_196_arg_0 = input_6; [L546] SORT_1 var_196_arg_1 = var_195; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_196_arg_0=0, var_196_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L548] EXPR var_196 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L548] var_196 = var_196 & mask_SORT_1 [L549] SORT_1 var_394_arg_0 = var_196; [L550] SORT_3 var_394_arg_1 = input_4; [L551] SORT_3 var_394_arg_2 = state_44; [L552] SORT_3 var_394 = var_394_arg_0 ? var_394_arg_1 : var_394_arg_2; [L553] SORT_1 var_395_arg_0 = input_7; [L554] SORT_3 var_395_arg_1 = var_373; [L555] SORT_3 var_395_arg_2 = var_394; [L556] SORT_3 var_395 = var_395_arg_0 ? var_395_arg_1 : var_395_arg_2; [L557] SORT_3 next_396_arg_1 = var_395; [L558] SORT_19 var_298_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_298_arg_0=9, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] EXPR var_298_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] var_298_arg_0 = var_298_arg_0 & mask_SORT_19 [L560] SORT_13 var_298 = var_298_arg_0; [L561] SORT_13 var_299_arg_0 = var_186; [L562] SORT_13 var_299_arg_1 = var_298; [L563] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L564] SORT_1 var_300_arg_0 = input_6; [L565] SORT_1 var_300_arg_1 = var_299; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_300_arg_0=0, var_300_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L567] EXPR var_300 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L567] var_300 = var_300 & mask_SORT_1 [L568] SORT_1 var_397_arg_0 = var_300; [L569] SORT_3 var_397_arg_1 = input_4; [L570] SORT_3 var_397_arg_2 = state_49; [L571] SORT_3 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2; [L572] SORT_1 var_398_arg_0 = input_7; [L573] SORT_3 var_398_arg_1 = var_373; [L574] SORT_3 var_398_arg_2 = var_397; [L575] SORT_3 var_398 = var_398_arg_0 ? var_398_arg_1 : var_398_arg_2; [L576] SORT_3 next_399_arg_1 = var_398; [L577] SORT_19 var_291_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_291_arg_0=8, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] EXPR var_291_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] var_291_arg_0 = var_291_arg_0 & mask_SORT_19 [L579] SORT_13 var_291 = var_291_arg_0; [L580] SORT_13 var_292_arg_0 = var_186; [L581] SORT_13 var_292_arg_1 = var_291; [L582] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L583] SORT_1 var_293_arg_0 = input_6; [L584] SORT_1 var_293_arg_1 = var_292; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_293_arg_0=0, var_293_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L586] EXPR var_293 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L586] var_293 = var_293 & mask_SORT_1 [L587] SORT_1 var_400_arg_0 = var_293; [L588] SORT_3 var_400_arg_1 = input_4; [L589] SORT_3 var_400_arg_2 = state_54; [L590] SORT_3 var_400 = var_400_arg_0 ? var_400_arg_1 : var_400_arg_2; [L591] SORT_1 var_401_arg_0 = input_7; [L592] SORT_3 var_401_arg_1 = var_373; [L593] SORT_3 var_401_arg_2 = var_400; [L594] SORT_3 var_401 = var_401_arg_0 ? var_401_arg_1 : var_401_arg_2; [L595] SORT_3 next_402_arg_1 = var_401; [L596] SORT_60 var_284_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_284_arg_0=7, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] EXPR var_284_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] var_284_arg_0 = var_284_arg_0 & mask_SORT_60 [L598] SORT_13 var_284 = var_284_arg_0; [L599] SORT_13 var_285_arg_0 = var_186; [L600] SORT_13 var_285_arg_1 = var_284; [L601] SORT_1 var_285 = var_285_arg_0 == var_285_arg_1; [L602] SORT_1 var_286_arg_0 = input_6; [L603] SORT_1 var_286_arg_1 = var_285; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_286_arg_0=0, var_286_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L605] EXPR var_286 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L605] var_286 = var_286 & mask_SORT_1 [L606] SORT_1 var_403_arg_0 = var_286; [L607] SORT_3 var_403_arg_1 = input_4; [L608] SORT_3 var_403_arg_2 = state_59; [L609] SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2; [L610] SORT_1 var_404_arg_0 = input_7; [L611] SORT_3 var_404_arg_1 = var_373; [L612] SORT_3 var_404_arg_2 = var_403; [L613] SORT_3 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2; [L614] SORT_3 next_405_arg_1 = var_404; [L615] SORT_60 var_277_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_277_arg_0=6, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] EXPR var_277_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] var_277_arg_0 = var_277_arg_0 & mask_SORT_60 [L617] SORT_13 var_277 = var_277_arg_0; [L618] SORT_13 var_278_arg_0 = var_186; [L619] SORT_13 var_278_arg_1 = var_277; [L620] SORT_1 var_278 = var_278_arg_0 == var_278_arg_1; [L621] SORT_1 var_279_arg_0 = input_6; [L622] SORT_1 var_279_arg_1 = var_278; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_279_arg_0=0, var_279_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] EXPR var_279_arg_0 & var_279_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L624] EXPR var_279 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L624] var_279 = var_279 & mask_SORT_1 [L625] SORT_1 var_406_arg_0 = var_279; [L626] SORT_3 var_406_arg_1 = input_4; [L627] SORT_3 var_406_arg_2 = state_65; [L628] SORT_3 var_406 = var_406_arg_0 ? var_406_arg_1 : var_406_arg_2; [L629] SORT_1 var_407_arg_0 = input_7; [L630] SORT_3 var_407_arg_1 = var_373; [L631] SORT_3 var_407_arg_2 = var_406; [L632] SORT_3 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2; [L633] SORT_3 next_408_arg_1 = var_407; [L634] SORT_60 var_270_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_270_arg_0=5, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] EXPR var_270_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] var_270_arg_0 = var_270_arg_0 & mask_SORT_60 [L636] SORT_13 var_270 = var_270_arg_0; [L637] SORT_13 var_271_arg_0 = var_186; [L638] SORT_13 var_271_arg_1 = var_270; [L639] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L640] SORT_1 var_272_arg_0 = input_6; [L641] SORT_1 var_272_arg_1 = var_271; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_272_arg_0=0, var_272_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] EXPR var_272_arg_0 & var_272_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] SORT_1 var_272 = var_272_arg_0 & var_272_arg_1; [L643] EXPR var_272 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L643] var_272 = var_272 & mask_SORT_1 [L644] SORT_1 var_409_arg_0 = var_272; [L645] SORT_3 var_409_arg_1 = input_4; [L646] SORT_3 var_409_arg_2 = state_70; [L647] SORT_3 var_409 = var_409_arg_0 ? var_409_arg_1 : var_409_arg_2; [L648] SORT_1 var_410_arg_0 = input_7; [L649] SORT_3 var_410_arg_1 = var_373; [L650] SORT_3 var_410_arg_2 = var_409; [L651] SORT_3 var_410 = var_410_arg_0 ? var_410_arg_1 : var_410_arg_2; [L652] SORT_3 next_411_arg_1 = var_410; [L653] SORT_60 var_263_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_263_arg_0=4, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] EXPR var_263_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] var_263_arg_0 = var_263_arg_0 & mask_SORT_60 [L655] SORT_13 var_263 = var_263_arg_0; [L656] SORT_13 var_264_arg_0 = var_186; [L657] SORT_13 var_264_arg_1 = var_263; [L658] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L659] SORT_1 var_265_arg_0 = input_6; [L660] SORT_1 var_265_arg_1 = var_264; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_265_arg_0=0, var_265_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] EXPR var_265_arg_0 & var_265_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L662] EXPR var_265 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L662] var_265 = var_265 & mask_SORT_1 [L663] SORT_1 var_412_arg_0 = var_265; [L664] SORT_3 var_412_arg_1 = input_4; [L665] SORT_3 var_412_arg_2 = state_75; [L666] SORT_3 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2; [L667] SORT_1 var_413_arg_0 = input_7; [L668] SORT_3 var_413_arg_1 = var_373; [L669] SORT_3 var_413_arg_2 = var_412; [L670] SORT_3 var_413 = var_413_arg_0 ? var_413_arg_1 : var_413_arg_2; [L671] SORT_3 next_414_arg_1 = var_413; [L672] SORT_81 var_256_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_256_arg_0=3, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] EXPR var_256_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] var_256_arg_0 = var_256_arg_0 & mask_SORT_81 [L674] SORT_13 var_256 = var_256_arg_0; [L675] SORT_13 var_257_arg_0 = var_186; [L676] SORT_13 var_257_arg_1 = var_256; [L677] SORT_1 var_257 = var_257_arg_0 == var_257_arg_1; [L678] SORT_1 var_258_arg_0 = input_6; [L679] SORT_1 var_258_arg_1 = var_257; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_258_arg_0=0, var_258_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] EXPR var_258_arg_0 & var_258_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L681] EXPR var_258 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L681] var_258 = var_258 & mask_SORT_1 [L682] SORT_1 var_415_arg_0 = var_258; [L683] SORT_3 var_415_arg_1 = input_4; [L684] SORT_3 var_415_arg_2 = state_80; [L685] SORT_3 var_415 = var_415_arg_0 ? var_415_arg_1 : var_415_arg_2; [L686] SORT_1 var_416_arg_0 = input_7; [L687] SORT_3 var_416_arg_1 = var_373; [L688] SORT_3 var_416_arg_2 = var_415; [L689] SORT_3 var_416 = var_416_arg_0 ? var_416_arg_1 : var_416_arg_2; [L690] SORT_3 next_417_arg_1 = var_416; [L691] SORT_81 var_249_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_249_arg_0=2, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] EXPR var_249_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] var_249_arg_0 = var_249_arg_0 & mask_SORT_81 [L693] SORT_13 var_249 = var_249_arg_0; [L694] SORT_13 var_250_arg_0 = var_186; [L695] SORT_13 var_250_arg_1 = var_249; [L696] SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; [L697] SORT_1 var_251_arg_0 = input_6; [L698] SORT_1 var_251_arg_1 = var_250; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_251_arg_0=0, var_251_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] EXPR var_251_arg_0 & var_251_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L700] EXPR var_251 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L700] var_251 = var_251 & mask_SORT_1 [L701] SORT_1 var_418_arg_0 = var_251; [L702] SORT_3 var_418_arg_1 = input_4; [L703] SORT_3 var_418_arg_2 = state_86; [L704] SORT_3 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L705] SORT_1 var_419_arg_0 = input_7; [L706] SORT_3 var_419_arg_1 = var_373; [L707] SORT_3 var_419_arg_2 = var_418; [L708] SORT_3 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2; [L709] SORT_3 next_420_arg_1 = var_419; [L710] SORT_1 var_242_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_242_arg_0=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] EXPR var_242_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] var_242_arg_0 = var_242_arg_0 & mask_SORT_1 [L712] SORT_13 var_242 = var_242_arg_0; [L713] SORT_13 var_243_arg_0 = var_186; [L714] SORT_13 var_243_arg_1 = var_242; [L715] SORT_1 var_243 = var_243_arg_0 == var_243_arg_1; [L716] SORT_1 var_244_arg_0 = input_6; [L717] SORT_1 var_244_arg_1 = var_243; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_244_arg_0=0, var_244_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] EXPR var_244_arg_0 & var_244_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L719] EXPR var_244 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L719] var_244 = var_244 & mask_SORT_1 [L720] SORT_1 var_421_arg_0 = var_244; [L721] SORT_3 var_421_arg_1 = input_4; [L722] SORT_3 var_421_arg_2 = state_91; [L723] SORT_3 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; [L724] SORT_1 var_422_arg_0 = input_7; [L725] SORT_3 var_422_arg_1 = var_373; [L726] SORT_3 var_422_arg_2 = var_421; [L727] SORT_3 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2; [L728] SORT_3 next_423_arg_1 = var_422; [L729] SORT_13 var_187_arg_0 = var_186; [L730] SORT_1 var_187 = var_187_arg_0 != 0; [L731] SORT_1 var_188_arg_0 = var_187; [L732] SORT_1 var_188 = ~var_188_arg_0; [L733] SORT_1 var_189_arg_0 = input_6; [L734] SORT_1 var_189_arg_1 = var_188; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_189_arg_0=0, var_189_arg_1=-1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L736] EXPR var_189 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L736] var_189 = var_189 & mask_SORT_1 [L737] SORT_1 var_424_arg_0 = var_189; [L738] SORT_3 var_424_arg_1 = input_4; [L739] SORT_3 var_424_arg_2 = state_96; [L740] SORT_3 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2; [L741] SORT_1 var_425_arg_0 = input_7; [L742] SORT_3 var_425_arg_1 = var_373; [L743] SORT_3 var_425_arg_2 = var_424; [L744] SORT_3 var_425 = var_425_arg_0 ? var_425_arg_1 : var_425_arg_2; [L745] SORT_3 next_426_arg_1 = var_425; [L746] SORT_1 var_427_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_427_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] EXPR var_427_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] var_427_arg_0 = var_427_arg_0 & mask_SORT_1 [L748] SORT_11 var_427 = var_427_arg_0; [L749] SORT_11 var_428_arg_0 = state_101; [L750] SORT_11 var_428_arg_1 = var_427; [L751] SORT_11 var_428 = var_428_arg_0 + var_428_arg_1; [L752] SORT_1 var_429_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_429_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] EXPR var_429_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] var_429_arg_0 = var_429_arg_0 & mask_SORT_1 [L754] SORT_11 var_429 = var_429_arg_0; [L755] SORT_11 var_430_arg_0 = var_428; [L756] SORT_11 var_430_arg_1 = var_429; [L757] SORT_11 var_430 = var_430_arg_0 - var_430_arg_1; [L758] SORT_1 var_431_arg_0 = input_7; [L759] SORT_11 var_431_arg_1 = var_122; [L760] SORT_11 var_431_arg_2 = var_430; [L761] SORT_11 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_431=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] EXPR var_431 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] var_431 = var_431 & mask_SORT_11 [L763] SORT_11 next_432_arg_1 = var_431; [L764] SORT_1 var_333_arg_0 = state_109; [L765] SORT_1 var_333 = ~var_333_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=-1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] EXPR var_333 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] var_333 = var_333 & mask_SORT_1 [L767] SORT_1 var_329_arg_0 = input_8; [L768] SORT_1 var_329_arg_1 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329_arg_0=0, var_329_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] EXPR var_329_arg_0 & var_329_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] SORT_1 var_329 = var_329_arg_0 & var_329_arg_1; [L770] SORT_1 var_330_arg_0 = state_109; [L771] SORT_1 var_330_arg_1 = var_329; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_330_arg_0=0, var_330_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] EXPR var_330_arg_0 | var_330_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] SORT_1 var_330 = var_330_arg_0 | var_330_arg_1; [L773] SORT_1 var_433_arg_0 = var_333; [L774] SORT_1 var_433_arg_1 = var_330; [L775] SORT_1 var_433_arg_2 = state_109; [L776] SORT_1 var_433 = var_433_arg_0 ? var_433_arg_1 : var_433_arg_2; [L777] SORT_1 var_434_arg_0 = input_7; [L778] SORT_1 var_434_arg_1 = var_152; [L779] SORT_1 var_434_arg_2 = var_433; [L780] SORT_1 var_434 = var_434_arg_0 ? var_434_arg_1 : var_434_arg_2; [L781] SORT_1 next_435_arg_1 = var_434; [L782] SORT_1 var_341_arg_0 = var_126; [L783] SORT_1 var_341_arg_1 = state_110; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_341_arg_0=0, var_341_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] EXPR var_341_arg_0 | var_341_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; [L785] SORT_1 var_436_arg_0 = var_92; [L786] SORT_1 var_436_arg_1 = var_341; [L787] SORT_1 var_436_arg_2 = state_110; [L788] SORT_1 var_436 = var_436_arg_0 ? var_436_arg_1 : var_436_arg_2; [L789] SORT_1 var_437_arg_0 = input_7; [L790] SORT_1 var_437_arg_1 = var_152; [L791] SORT_1 var_437_arg_2 = var_436; [L792] SORT_1 var_437 = var_437_arg_0 ? var_437_arg_1 : var_437_arg_2; [L793] SORT_1 next_438_arg_1 = var_437; [L794] SORT_1 var_353_arg_0 = input_6; [L795] SORT_1 var_353_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_353_arg_0=0, var_353_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] EXPR var_353_arg_0 | var_353_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L797] SORT_1 var_354_arg_0 = var_353; [L798] SORT_1 var_354_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_354_arg_0=0, var_354_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] EXPR var_354_arg_0 | var_354_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L800] SORT_1 var_355_arg_0 = var_354; [L801] SORT_1 var_355_arg_1 = state_109; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_355_arg_0=0, var_355_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] EXPR var_355_arg_0 | var_355_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L803] EXPR var_355 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L803] var_355 = var_355 & mask_SORT_1 [L804] SORT_1 var_439_arg_0 = var_355; [L805] SORT_11 var_439_arg_1 = var_123; [L806] SORT_11 var_439_arg_2 = state_113; [L807] SORT_11 var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2; [L808] SORT_1 var_440_arg_0 = input_7; [L809] SORT_11 var_440_arg_1 = var_122; [L810] SORT_11 var_440_arg_2 = var_439; [L811] SORT_11 var_440 = var_440_arg_0 ? var_440_arg_1 : var_440_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_440=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] EXPR var_440 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] var_440 = var_440 & mask_SORT_11 [L813] SORT_11 next_441_arg_1 = var_440; [L814] SORT_1 var_338_arg_0 = var_329; [L815] SORT_1 var_338_arg_1 = var_333; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_338_arg_0=0, var_338_arg_1=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] EXPR var_338_arg_0 & var_338_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L817] EXPR var_338 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L817] var_338 = var_338 & mask_SORT_1 [L818] SORT_1 var_442_arg_0 = var_338; [L819] SORT_3 var_442_arg_1 = input_4; [L820] SORT_3 var_442_arg_2 = state_128; [L821] SORT_3 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2; [L822] SORT_1 var_443_arg_0 = input_7; [L823] SORT_3 var_443_arg_1 = var_373; [L824] SORT_3 var_443_arg_2 = var_442; [L825] SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_443=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] EXPR var_443 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] var_443 = var_443 & mask_SORT_3 [L827] SORT_3 next_444_arg_1 = var_443; [L828] SORT_1 next_445_arg_1 = var_152; [L829] SORT_1 var_309_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_309_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] EXPR var_309_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L831] SORT_11 var_309 = var_309_arg_0; [L832] SORT_11 var_310_arg_0 = state_185; [L833] SORT_11 var_310_arg_1 = var_309; [L834] SORT_11 var_310 = var_310_arg_0 + var_310_arg_1; [L835] SORT_1 var_446_arg_0 = var_161; [L836] SORT_11 var_446_arg_1 = var_310; [L837] SORT_11 var_446_arg_2 = state_185; [L838] SORT_11 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2; [L839] SORT_1 var_447_arg_0 = input_7; [L840] SORT_11 var_447_arg_1 = var_122; [L841] SORT_11 var_447_arg_2 = var_446; [L842] SORT_11 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2; [L843] SORT_11 next_448_arg_1 = var_447; [L845] state_10 = next_375_arg_1 [L846] state_12 = next_378_arg_1 [L847] state_18 = next_381_arg_1 [L848] state_24 = next_384_arg_1 [L849] state_29 = next_387_arg_1 [L850] state_34 = next_390_arg_1 [L851] state_39 = next_393_arg_1 [L852] state_44 = next_396_arg_1 [L853] state_49 = next_399_arg_1 [L854] state_54 = next_402_arg_1 [L855] state_59 = next_405_arg_1 [L856] state_65 = next_408_arg_1 [L857] state_70 = next_411_arg_1 [L858] state_75 = next_414_arg_1 [L859] state_80 = next_417_arg_1 [L860] state_86 = next_420_arg_1 [L861] state_91 = next_423_arg_1 [L862] state_96 = next_426_arg_1 [L863] state_101 = next_432_arg_1 [L864] state_109 = next_435_arg_1 [L865] state_110 = next_438_arg_1 [L866] state_113 = next_441_arg_1 [L867] state_128 = next_444_arg_1 [L868] state_132 = next_445_arg_1 [L869] state_185 = next_448_arg_1 [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ulong() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ulong() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=254, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=257, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=1, var_155_arg_1=-1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 552 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 493.7s, OverallIterations: 90, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 277.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 199309 SdHoareTripleChecker+Valid, 153.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 199160 mSDsluCounter, 529466 SdHoareTripleChecker+Invalid, 133.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 457339 mSDsCounter, 875 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 271958 IncrementalHoareTripleChecker+Invalid, 272833 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 875 mSolverCounterUnsat, 72127 mSDtfsCounter, 271958 mSolverCounterSat, 1.6s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7841 GetRequests, 6046 SyntacticMatches, 3 SemanticMatches, 1792 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364287 ImplicationChecksByTransitivity, 103.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=51419occurred in iteration=89, InterpolantAutomatonStates: 1556, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.0s AutomataMinimizationTime, 89 MinimizatonAttempts, 169381 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 63.8s SatisfiabilityAnalysisTime, 116.9s InterpolantComputationTime, 36342 NumberOfCodeBlocks, 36342 NumberOfCodeBlocksAsserted, 99 NumberOfCheckSat, 37720 ConstructedInterpolants, 0 QuantifiedInterpolants, 246324 SizeOfPredicates, 72 NumberOfNonLiveVariables, 24810 ConjunctsInSsa, 742 ConjunctsInUnsatCore, 102 InterpolantComputations, 86 PerfectInterpolantSequences, 11375/12260 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 08:06:42,839 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 08:06:44,843 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 08:06:44,918 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 08:06:44,924 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 08:06:44,925 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 08:06:44,948 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 08:06:44,949 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 08:06:44,949 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 08:06:44,949 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 08:06:44,950 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 08:06:44,950 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 08:06:44,950 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 08:06:44,950 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 08:06:44,951 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:06:44,951 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:06:44,952 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 08:06:44,952 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:06:44,953 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 08:06:44,953 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 [2024-12-02 08:06:45,181 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 08:06:45,189 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 08:06:45,192 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 08:06:45,193 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 08:06:45,194 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 08:06:45,195 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 08:06:48,022 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/9de4a9608/558d3f5690504592ba4db3ec0f788219/FLAG09c5d736f [2024-12-02 08:06:48,253 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 08:06:48,254 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 08:06:48,263 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/9de4a9608/558d3f5690504592ba4db3ec0f788219/FLAG09c5d736f [2024-12-02 08:06:48,275 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/data/9de4a9608/558d3f5690504592ba4db3ec0f788219 [2024-12-02 08:06:48,277 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 08:06:48,278 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 08:06:48,279 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 08:06:48,279 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 08:06:48,283 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 08:06:48,284 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,284 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@62db7778 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48, skipping insertion in model container [2024-12-02 08:06:48,285 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,312 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 08:06:48,434 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-12-02 08:06:48,600 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:06:48,611 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 08:06:48,618 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-12-02 08:06:48,703 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 08:06:48,715 INFO L204 MainTranslator]: Completed translation [2024-12-02 08:06:48,715 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48 WrapperNode [2024-12-02 08:06:48,715 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 08:06:48,716 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 08:06:48,716 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 08:06:48,716 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 08:06:48,720 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,738 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,782 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 912 [2024-12-02 08:06:48,783 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 08:06:48,783 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 08:06:48,783 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 08:06:48,783 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 08:06:48,792 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,792 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,799 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,821 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 08:06:48,821 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,821 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,843 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,845 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,849 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,853 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,857 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,865 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 08:06:48,865 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 08:06:48,866 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 08:06:48,866 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 08:06:48,867 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (1/1) ... [2024-12-02 08:06:48,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 08:06:48,882 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:48,892 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 08:06:48,895 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 08:06:48,913 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 08:06:48,914 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 08:06:48,914 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 08:06:48,914 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 08:06:48,914 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 08:06:48,914 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 08:06:49,100 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 08:06:49,102 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 08:06:49,778 INFO L? ?]: Removed 271 outVars from TransFormulas that were not future-live. [2024-12-02 08:06:49,778 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 08:06:49,787 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 08:06:49,787 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 08:06:49,787 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:06:49 BoogieIcfgContainer [2024-12-02 08:06:49,788 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 08:06:49,790 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 08:06:49,790 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 08:06:49,794 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 08:06:49,795 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 08:06:48" (1/3) ... [2024-12-02 08:06:49,795 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f6fd0df and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:06:49, skipping insertion in model container [2024-12-02 08:06:49,795 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 08:06:48" (2/3) ... [2024-12-02 08:06:49,795 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f6fd0df and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 08:06:49, skipping insertion in model container [2024-12-02 08:06:49,796 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 08:06:49" (3/3) ... [2024-12-02 08:06:49,797 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-12-02 08:06:49,812 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 08:06:49,813 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 08:06:49,857 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 08:06:49,867 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7c3c05c5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 08:06:49,867 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 08:06:49,871 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 08:06:49,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 08:06:49,877 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:49,878 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:49,878 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:49,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:49,883 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 08:06:49,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:06:49,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1927914657] [2024-12-02 08:06:49,895 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:49,895 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:49,895 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:49,897 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:06:49,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 08:06:50,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:50,284 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 08:06:50,293 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:50,565 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 08:06:50,566 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:06:50,724 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:06:50,724 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1927914657] [2024-12-02 08:06:50,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1927914657] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:06:50,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1658712770] [2024-12-02 08:06:50,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:50,725 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:06:50,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:06:50,728 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:06:50,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 08:06:51,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:51,326 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 08:06:51,331 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:51,417 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 08:06:51,417 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 08:06:51,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1658712770] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 08:06:51,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 08:06:51,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 08:06:51,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138193243] [2024-12-02 08:06:51,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 08:06:51,422 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 08:06:51,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:06:51,436 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 08:06:51,436 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:06:51,437 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:06:51,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:51,573 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 08:06:51,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 08:06:51,575 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 08:06:51,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:51,579 INFO L225 Difference]: With dead ends: 43 [2024-12-02 08:06:51,579 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 08:06:51,581 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 08:06:51,584 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:51,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 08:06:51,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 08:06:51,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 08:06:51,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 08:06:51,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 08:06:51,615 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 08:06:51,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:51,616 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 08:06:51,616 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 08:06:51,616 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 08:06:51,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 08:06:51,618 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:51,618 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 08:06:51,623 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 08:06:51,824 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 08:06:52,019 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:52,019 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:52,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:52,019 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 08:06:52,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:06:52,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1768668352] [2024-12-02 08:06:52,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:52,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:52,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:52,022 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:06:52,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 08:06:52,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:52,479 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 08:06:52,489 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:52,972 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:06:52,972 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:06:53,119 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:06:53,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1768668352] [2024-12-02 08:06:53,119 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1768668352] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:06:53,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1021924414] [2024-12-02 08:06:53,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 08:06:53,119 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 08:06:53,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 08:06:53,121 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 08:06:53,122 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 08:06:54,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 08:06:54,135 INFO L256 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 08:06:54,144 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:54,451 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 08:06:54,451 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:06:54,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1021924414] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 08:06:54,591 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 08:06:54,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 08:06:54,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171188643] [2024-12-02 08:06:54,592 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 08:06:54,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 08:06:54,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 08:06:54,593 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 08:06:54,593 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 08:06:54,593 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:54,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 08:06:54,971 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 08:06:54,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 08:06:54,972 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 08:06:54,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 08:06:54,972 INFO L225 Difference]: With dead ends: 36 [2024-12-02 08:06:54,972 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 08:06:54,973 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 08:06:54,973 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 08:06:54,973 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 08:06:54,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 08:06:54,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 08:06:54,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 08:06:54,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 08:06:54,980 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 08:06:54,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 08:06:54,980 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 08:06:54,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 08:06:54,980 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 08:06:54,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 08:06:54,981 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 08:06:54,981 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 08:06:54,988 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 08:06:55,187 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-12-02 08:06:55,382 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 08:06:55,382 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 08:06:55,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 08:06:55,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 08:06:55,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 08:06:55,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [124493824] [2024-12-02 08:06:55,384 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 08:06:55,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:06:55,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 08:06:55,385 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 08:06:55,386 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 08:06:56,098 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 08:06:56,098 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 08:06:56,108 INFO L256 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 08:06:56,119 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 08:06:59,295 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 08:06:59,295 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 08:07:08,892 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-12-02 08:07:08,893 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-12-02 08:07:08,893 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 08:07:08,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [124493824] [2024-12-02 08:07:08,894 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2024-12-02 08:07:08,901 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 08:07:09,094 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 08:07:09,095 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:555) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:325) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:181) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:210) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:121) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:317) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:428) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:314) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:275) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:132) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 45 more [2024-12-02 08:07:09,099 INFO L158 Benchmark]: Toolchain (without parser) took 20820.20ms. Allocated memory was 92.3MB in the beginning and 427.8MB in the end (delta: 335.5MB). Free memory was 68.5MB in the beginning and 285.7MB in the end (delta: -217.3MB). Peak memory consumption was 120.5MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,099 INFO L158 Benchmark]: CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 47.4MB. There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 08:07:09,099 INFO L158 Benchmark]: CACSL2BoogieTranslator took 436.12ms. Allocated memory is still 92.3MB. Free memory was 68.3MB in the beginning and 63.3MB in the end (delta: 5.0MB). Peak memory consumption was 40.1MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,099 INFO L158 Benchmark]: Boogie Procedure Inliner took 66.96ms. Allocated memory is still 92.3MB. Free memory was 63.3MB in the beginning and 56.3MB in the end (delta: 7.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,100 INFO L158 Benchmark]: Boogie Preprocessor took 81.63ms. Allocated memory is still 92.3MB. Free memory was 56.3MB in the beginning and 48.8MB in the end (delta: 7.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,100 INFO L158 Benchmark]: RCFGBuilder took 922.38ms. Allocated memory was 92.3MB in the beginning and 134.2MB in the end (delta: 41.9MB). Free memory was 48.8MB in the beginning and 58.6MB in the end (delta: -9.8MB). Peak memory consumption was 35.5MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,101 INFO L158 Benchmark]: TraceAbstraction took 19308.12ms. Allocated memory was 134.2MB in the beginning and 427.8MB in the end (delta: 293.6MB). Free memory was 57.5MB in the beginning and 285.7MB in the end (delta: -228.2MB). Peak memory consumption was 67.2MB. Max. memory is 16.1GB. [2024-12-02 08:07:09,102 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.42ms. Allocated memory is still 83.9MB. Free memory is still 47.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 436.12ms. Allocated memory is still 92.3MB. Free memory was 68.3MB in the beginning and 63.3MB in the end (delta: 5.0MB). Peak memory consumption was 40.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 66.96ms. Allocated memory is still 92.3MB. Free memory was 63.3MB in the beginning and 56.3MB in the end (delta: 7.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 81.63ms. Allocated memory is still 92.3MB. Free memory was 56.3MB in the beginning and 48.8MB in the end (delta: 7.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 922.38ms. Allocated memory was 92.3MB in the beginning and 134.2MB in the end (delta: 41.9MB). Free memory was 48.8MB in the beginning and 58.6MB in the end (delta: -9.8MB). Peak memory consumption was 35.5MB. Max. memory is 16.1GB. * TraceAbstraction took 19308.12ms. Allocated memory was 134.2MB in the beginning and 427.8MB in the end (delta: 293.6MB). Free memory was 57.5MB in the beginning and 285.7MB in the end (delta: -228.2MB). Peak memory consumption was 67.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3a94c38c-e72e-4ce2-b370-22ce010c88a6/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")