./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version d790fecc Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 096bd3f2a021fa47b1c02d78a0aae6264c2c575942ed4c9ecbbbcad808039ae8 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 07:41:34,918 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 07:41:34,974 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-12-02 07:41:34,978 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 07:41:34,979 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 07:41:35,000 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 07:41:35,001 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 07:41:35,001 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 07:41:35,001 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 07:41:35,002 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 07:41:35,002 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 07:41:35,002 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 07:41:35,002 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 07:41:35,002 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 07:41:35,002 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 07:41:35,002 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 07:41:35,003 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:41:35,003 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:41:35,004 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:41:35,004 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 07:41:35,004 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 07:41:35,005 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 096bd3f2a021fa47b1c02d78a0aae6264c2c575942ed4c9ecbbbcad808039ae8 [2024-12-02 07:41:35,243 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 07:41:35,251 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 07:41:35,253 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 07:41:35,255 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 07:41:35,255 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 07:41:35,256 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:41:37,863 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/2928e3567/442747862d8d4274925aac0800858920/FLAGbba72dbdb [2024-12-02 07:41:38,146 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 07:41:38,146 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:41:38,158 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/2928e3567/442747862d8d4274925aac0800858920/FLAGbba72dbdb [2024-12-02 07:41:38,172 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/2928e3567/442747862d8d4274925aac0800858920 [2024-12-02 07:41:38,174 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 07:41:38,175 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 07:41:38,177 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 07:41:38,177 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 07:41:38,181 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 07:41:38,181 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:38,182 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@43e24805 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38, skipping insertion in model container [2024-12-02 07:41:38,182 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:38,219 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 07:41:38,370 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c[1280,1293] [2024-12-02 07:41:38,584 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:41:38,593 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 07:41:38,603 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c[1280,1293] [2024-12-02 07:41:38,705 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:41:38,716 INFO L204 MainTranslator]: Completed translation [2024-12-02 07:41:38,717 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38 WrapperNode [2024-12-02 07:41:38,717 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 07:41:38,718 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 07:41:38,718 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 07:41:38,718 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 07:41:38,724 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:38,751 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:38,976 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3162 [2024-12-02 07:41:38,976 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 07:41:38,976 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 07:41:38,977 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 07:41:38,977 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 07:41:38,986 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:38,986 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,023 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,127 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 07:41:39,128 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,128 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,185 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,191 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,202 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,223 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,233 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,277 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 07:41:39,277 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 07:41:39,277 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 07:41:39,278 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 07:41:39,278 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (1/1) ... [2024-12-02 07:41:39,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:41:39,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:41:39,305 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 07:41:39,308 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 07:41:39,333 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 07:41:39,333 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 07:41:39,333 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 07:41:39,333 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-12-02 07:41:39,333 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 07:41:39,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 07:41:39,601 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 07:41:39,603 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 07:41:42,576 INFO L? ?]: Removed 1764 outVars from TransFormulas that were not future-live. [2024-12-02 07:41:42,576 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 07:41:42,600 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 07:41:42,600 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 07:41:42,600 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:41:42 BoogieIcfgContainer [2024-12-02 07:41:42,600 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 07:41:42,602 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 07:41:42,602 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 07:41:42,606 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 07:41:42,606 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 07:41:38" (1/3) ... [2024-12-02 07:41:42,607 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2fc57bd1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:41:42, skipping insertion in model container [2024-12-02 07:41:42,607 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:41:38" (2/3) ... [2024-12-02 07:41:42,607 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2fc57bd1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:41:42, skipping insertion in model container [2024-12-02 07:41:42,607 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:41:42" (3/3) ... [2024-12-02 07:41:42,608 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:41:42,619 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 07:41:42,621 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c that has 2 procedures, 872 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 07:41:42,678 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 07:41:42,687 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@26325cd, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 07:41:42,687 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 07:41:42,693 INFO L276 IsEmpty]: Start isEmpty. Operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:42,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 07:41:42,706 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:42,706 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:42,707 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:42,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:42,711 INFO L85 PathProgramCache]: Analyzing trace with hash -684669181, now seen corresponding path program 1 times [2024-12-02 07:41:42,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:42,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444306142] [2024-12-02 07:41:42,717 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:42,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:42,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:43,162 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 07:41:43,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:43,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1444306142] [2024-12-02 07:41:43,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1444306142] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:41:43,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1417560144] [2024-12-02 07:41:43,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:43,164 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:41:43,164 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:41:43,166 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:41:43,171 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 07:41:43,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:43,854 INFO L256 TraceCheckSpWp]: Trace formula consists of 1413 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-12-02 07:41:43,865 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:41:43,890 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-12-02 07:41:43,890 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:41:43,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1417560144] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:43,891 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:41:43,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2024-12-02 07:41:43,893 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170982487] [2024-12-02 07:41:43,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:43,897 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-12-02 07:41:43,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:43,916 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-12-02 07:41:43,916 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 07:41:43,920 INFO L87 Difference]: Start difference. First operand has 872 states, 866 states have (on average 1.4965357967667436) internal successors, (1296), 867 states have internal predecessors, (1296), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:41:43,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:43,980 INFO L93 Difference]: Finished difference Result 1575 states and 2357 transitions. [2024-12-02 07:41:43,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-12-02 07:41:43,982 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 213 [2024-12-02 07:41:43,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:43,994 INFO L225 Difference]: With dead ends: 1575 [2024-12-02 07:41:43,994 INFO L226 Difference]: Without dead ends: 869 [2024-12-02 07:41:43,998 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-12-02 07:41:44,000 INFO L435 NwaCegarLoop]: 1297 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:44,000 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:41:44,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2024-12-02 07:41:44,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 869. [2024-12-02 07:41:44,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 869 states, 864 states have (on average 1.494212962962963) internal successors, (1291), 864 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:44,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 869 states to 869 states and 1297 transitions. [2024-12-02 07:41:44,059 INFO L78 Accepts]: Start accepts. Automaton has 869 states and 1297 transitions. Word has length 213 [2024-12-02 07:41:44,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:44,060 INFO L471 AbstractCegarLoop]: Abstraction has 869 states and 1297 transitions. [2024-12-02 07:41:44,060 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 101.5) internal successors, (203), 2 states have internal predecessors, (203), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:41:44,060 INFO L276 IsEmpty]: Start isEmpty. Operand 869 states and 1297 transitions. [2024-12-02 07:41:44,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-12-02 07:41:44,063 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:44,063 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:44,072 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 07:41:44,264 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2024-12-02 07:41:44,264 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:44,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:44,265 INFO L85 PathProgramCache]: Analyzing trace with hash 275406397, now seen corresponding path program 1 times [2024-12-02 07:41:44,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:44,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825094721] [2024-12-02 07:41:44,265 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:44,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:44,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:45,793 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:45,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:45,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825094721] [2024-12-02 07:41:45,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825094721] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:45,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:45,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:41:45,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [108459437] [2024-12-02 07:41:45,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:45,795 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:41:45,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:45,796 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:41:45,796 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:45,797 INFO L87 Difference]: Start difference. First operand 869 states and 1297 transitions. Second operand has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:45,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:45,850 INFO L93 Difference]: Finished difference Result 873 states and 1301 transitions. [2024-12-02 07:41:45,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:45,850 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 213 [2024-12-02 07:41:45,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:45,855 INFO L225 Difference]: With dead ends: 873 [2024-12-02 07:41:45,855 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 07:41:45,855 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:45,856 INFO L435 NwaCegarLoop]: 1295 mSDtfsCounter, 0 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3879 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:45,856 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3879 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:41:45,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 07:41:45,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 07:41:45,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.4930715935334873) internal successors, (1293), 866 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:45,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1299 transitions. [2024-12-02 07:41:45,879 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1299 transitions. Word has length 213 [2024-12-02 07:41:45,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:45,881 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1299 transitions. [2024-12-02 07:41:45,881 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.25) internal successors, (201), 4 states have internal predecessors, (201), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:45,881 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1299 transitions. [2024-12-02 07:41:45,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-12-02 07:41:45,884 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:45,884 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:45,884 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-12-02 07:41:45,885 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:45,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:45,885 INFO L85 PathProgramCache]: Analyzing trace with hash -50639891, now seen corresponding path program 1 times [2024-12-02 07:41:45,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:45,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886435906] [2024-12-02 07:41:45,885 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:45,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:46,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:46,603 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:46,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:46,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886435906] [2024-12-02 07:41:46,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886435906] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:46,603 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:46,603 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:46,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705165580] [2024-12-02 07:41:46,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:46,604 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:46,604 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:46,605 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:46,605 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:46,605 INFO L87 Difference]: Start difference. First operand 871 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:47,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:47,221 INFO L93 Difference]: Finished difference Result 2171 states and 3241 transitions. [2024-12-02 07:41:47,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:41:47,222 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 214 [2024-12-02 07:41:47,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:47,226 INFO L225 Difference]: With dead ends: 2171 [2024-12-02 07:41:47,226 INFO L226 Difference]: Without dead ends: 871 [2024-12-02 07:41:47,228 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:41:47,228 INFO L435 NwaCegarLoop]: 1325 mSDtfsCounter, 2674 mSDsluCounter, 2354 mSDsCounter, 0 mSdLazyCounter, 414 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2674 SdHoareTripleChecker+Valid, 3679 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 414 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:47,228 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2674 Valid, 3679 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 414 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:41:47,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 871 states. [2024-12-02 07:41:47,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 871 to 871. [2024-12-02 07:41:47,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 871 states, 866 states have (on average 1.491916859122402) internal successors, (1292), 866 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:47,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 871 states to 871 states and 1298 transitions. [2024-12-02 07:41:47,251 INFO L78 Accepts]: Start accepts. Automaton has 871 states and 1298 transitions. Word has length 214 [2024-12-02 07:41:47,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:47,251 INFO L471 AbstractCegarLoop]: Abstraction has 871 states and 1298 transitions. [2024-12-02 07:41:47,252 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 40.4) internal successors, (202), 5 states have internal predecessors, (202), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:47,252 INFO L276 IsEmpty]: Start isEmpty. Operand 871 states and 1298 transitions. [2024-12-02 07:41:47,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-12-02 07:41:47,254 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:47,254 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:47,255 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-12-02 07:41:47,255 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:47,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:47,255 INFO L85 PathProgramCache]: Analyzing trace with hash -125930801, now seen corresponding path program 1 times [2024-12-02 07:41:47,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:47,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891988512] [2024-12-02 07:41:47,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:47,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:47,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:47,666 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:47,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:47,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891988512] [2024-12-02 07:41:47,667 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [891988512] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:47,667 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:47,667 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:41:47,667 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56896386] [2024-12-02 07:41:47,667 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:47,667 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:41:47,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:47,668 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:41:47,668 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:47,668 INFO L87 Difference]: Start difference. First operand 871 states and 1298 transitions. Second operand has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:47,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:47,704 INFO L93 Difference]: Finished difference Result 1578 states and 2351 transitions. [2024-12-02 07:41:47,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:47,705 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 215 [2024-12-02 07:41:47,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:47,707 INFO L225 Difference]: With dead ends: 1578 [2024-12-02 07:41:47,707 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:47,708 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:47,709 INFO L435 NwaCegarLoop]: 1294 mSDtfsCounter, 0 mSDsluCounter, 2578 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3872 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:47,709 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3872 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:41:47,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:47,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:47,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4907834101382489) internal successors, (1294), 868 states have internal predecessors, (1294), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:47,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1300 transitions. [2024-12-02 07:41:47,725 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1300 transitions. Word has length 215 [2024-12-02 07:41:47,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:47,725 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1300 transitions. [2024-12-02 07:41:47,725 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 50.75) internal successors, (203), 4 states have internal predecessors, (203), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:47,726 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1300 transitions. [2024-12-02 07:41:47,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-12-02 07:41:47,727 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:47,727 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:47,728 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-12-02 07:41:47,728 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:47,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:47,728 INFO L85 PathProgramCache]: Analyzing trace with hash -706852236, now seen corresponding path program 1 times [2024-12-02 07:41:47,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:47,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745901440] [2024-12-02 07:41:47,728 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:47,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:47,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:48,504 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:48,504 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:48,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745901440] [2024-12-02 07:41:48,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745901440] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:48,505 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:48,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:41:48,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861229550] [2024-12-02 07:41:48,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:48,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:41:48,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:48,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:41:48,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:48,507 INFO L87 Difference]: Start difference. First operand 873 states and 1300 transitions. Second operand has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:48,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:48,820 INFO L93 Difference]: Finished difference Result 1580 states and 2352 transitions. [2024-12-02 07:41:48,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:48,821 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 216 [2024-12-02 07:41:48,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:48,824 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:48,824 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:48,825 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:48,826 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1130 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 324 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:48,826 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 2270 Invalid, 324 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:48,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:48,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:48,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.48963133640553) internal successors, (1293), 868 states have internal predecessors, (1293), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:48,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1299 transitions. [2024-12-02 07:41:48,848 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1299 transitions. Word has length 216 [2024-12-02 07:41:48,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:48,848 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1299 transitions. [2024-12-02 07:41:48,848 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 51.0) internal successors, (204), 4 states have internal predecessors, (204), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:48,848 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1299 transitions. [2024-12-02 07:41:48,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-12-02 07:41:48,851 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:48,851 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:48,851 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-12-02 07:41:48,851 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:48,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:48,852 INFO L85 PathProgramCache]: Analyzing trace with hash 1177044582, now seen corresponding path program 1 times [2024-12-02 07:41:48,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:48,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281718530] [2024-12-02 07:41:48,852 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:48,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:49,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:49,342 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:49,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:49,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281718530] [2024-12-02 07:41:49,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [281718530] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:49,342 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:49,342 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:49,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479156917] [2024-12-02 07:41:49,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:49,343 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:49,343 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:49,343 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:49,343 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:49,344 INFO L87 Difference]: Start difference. First operand 873 states and 1299 transitions. Second operand has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:49,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:49,588 INFO L93 Difference]: Finished difference Result 1582 states and 2352 transitions. [2024-12-02 07:41:49,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:41:49,589 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 217 [2024-12-02 07:41:49,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:49,592 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 07:41:49,592 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:49,593 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:41:49,593 INFO L435 NwaCegarLoop]: 1288 mSDtfsCounter, 1133 mSDsluCounter, 2426 mSDsCounter, 0 mSdLazyCounter, 174 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1133 SdHoareTripleChecker+Valid, 3714 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:49,594 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1133 Valid, 3714 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 174 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:49,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:49,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:49,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4884792626728112) internal successors, (1292), 868 states have internal predecessors, (1292), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:49,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1298 transitions. [2024-12-02 07:41:49,610 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1298 transitions. Word has length 217 [2024-12-02 07:41:49,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:49,610 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1298 transitions. [2024-12-02 07:41:49,610 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.0) internal successors, (205), 5 states have internal predecessors, (205), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:49,610 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1298 transitions. [2024-12-02 07:41:49,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-12-02 07:41:49,612 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:49,612 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:49,612 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-12-02 07:41:49,612 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:49,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:49,613 INFO L85 PathProgramCache]: Analyzing trace with hash 67362509, now seen corresponding path program 1 times [2024-12-02 07:41:49,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:49,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [88152455] [2024-12-02 07:41:49,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:49,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:49,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:49,956 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:49,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:49,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [88152455] [2024-12-02 07:41:49,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [88152455] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:49,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:49,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:49,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313066312] [2024-12-02 07:41:49,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:49,957 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:49,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:49,958 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:49,958 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:49,958 INFO L87 Difference]: Start difference. First operand 873 states and 1298 transitions. Second operand has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:50,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:50,265 INFO L93 Difference]: Finished difference Result 1580 states and 2348 transitions. [2024-12-02 07:41:50,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:50,266 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 218 [2024-12-02 07:41:50,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:50,269 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:50,269 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:50,270 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:50,270 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2401 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2404 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:50,271 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2404 Valid, 2270 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:50,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:50,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:50,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.487327188940092) internal successors, (1291), 868 states have internal predecessors, (1291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:50,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1297 transitions. [2024-12-02 07:41:50,295 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1297 transitions. Word has length 218 [2024-12-02 07:41:50,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:50,296 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1297 transitions. [2024-12-02 07:41:50,296 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.2) internal successors, (206), 5 states have internal predecessors, (206), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:50,296 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1297 transitions. [2024-12-02 07:41:50,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-12-02 07:41:50,297 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:50,297 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:50,298 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-12-02 07:41:50,298 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:50,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:50,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1444744026, now seen corresponding path program 1 times [2024-12-02 07:41:50,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:50,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620427216] [2024-12-02 07:41:50,299 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:50,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:50,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:50,620 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:50,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:50,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620427216] [2024-12-02 07:41:50,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1620427216] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:50,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:50,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:50,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400505464] [2024-12-02 07:41:50,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:50,621 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:50,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:50,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:50,622 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:50,622 INFO L87 Difference]: Start difference. First operand 873 states and 1297 transitions. Second operand has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:50,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:50,922 INFO L93 Difference]: Finished difference Result 1580 states and 2346 transitions. [2024-12-02 07:41:50,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:50,923 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 219 [2024-12-02 07:41:50,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:50,926 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:50,926 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:50,927 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:50,927 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2393 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2396 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 319 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:50,927 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2396 Valid, 2270 Invalid, 319 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:50,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:50,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:50,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4861751152073732) internal successors, (1290), 868 states have internal predecessors, (1290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:50,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1296 transitions. [2024-12-02 07:41:50,941 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1296 transitions. Word has length 219 [2024-12-02 07:41:50,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:50,942 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1296 transitions. [2024-12-02 07:41:50,942 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.4) internal successors, (207), 5 states have internal predecessors, (207), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:50,942 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1296 transitions. [2024-12-02 07:41:50,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-12-02 07:41:50,944 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:50,944 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:50,944 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-12-02 07:41:50,944 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:50,945 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:50,945 INFO L85 PathProgramCache]: Analyzing trace with hash 769514406, now seen corresponding path program 1 times [2024-12-02 07:41:50,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:50,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988682359] [2024-12-02 07:41:50,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:50,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:51,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:51,282 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:51,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:51,282 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988682359] [2024-12-02 07:41:51,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988682359] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:51,283 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:51,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:51,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315276280] [2024-12-02 07:41:51,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:51,283 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:51,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:51,284 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:51,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:51,284 INFO L87 Difference]: Start difference. First operand 873 states and 1296 transitions. Second operand has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:51,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:51,576 INFO L93 Difference]: Finished difference Result 1580 states and 2344 transitions. [2024-12-02 07:41:51,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:51,577 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 220 [2024-12-02 07:41:51,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:51,580 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:51,580 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:51,581 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:51,581 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2385 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 316 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2388 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 316 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:51,581 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2388 Valid, 2270 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 316 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:51,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:51,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:51,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4850230414746544) internal successors, (1289), 868 states have internal predecessors, (1289), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:51,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1295 transitions. [2024-12-02 07:41:51,596 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1295 transitions. Word has length 220 [2024-12-02 07:41:51,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:51,596 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1295 transitions. [2024-12-02 07:41:51,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.6) internal successors, (208), 5 states have internal predecessors, (208), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:51,596 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1295 transitions. [2024-12-02 07:41:51,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-12-02 07:41:51,598 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:51,598 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:51,598 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-12-02 07:41:51,598 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:51,599 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:51,599 INFO L85 PathProgramCache]: Analyzing trace with hash 626929823, now seen corresponding path program 1 times [2024-12-02 07:41:51,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:51,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618618217] [2024-12-02 07:41:51,599 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:51,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:51,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:51,929 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:51,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:51,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618618217] [2024-12-02 07:41:51,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1618618217] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:51,929 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:51,929 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:51,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102611895] [2024-12-02 07:41:51,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:51,930 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:51,930 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:51,931 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:51,931 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:51,931 INFO L87 Difference]: Start difference. First operand 873 states and 1295 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:52,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:52,217 INFO L93 Difference]: Finished difference Result 1580 states and 2342 transitions. [2024-12-02 07:41:52,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:52,217 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 221 [2024-12-02 07:41:52,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:52,220 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:52,220 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:52,221 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:52,221 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1267 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1270 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:52,221 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1270 Valid, 2277 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:52,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:52,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:52,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4838709677419355) internal successors, (1288), 868 states have internal predecessors, (1288), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:52,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1294 transitions. [2024-12-02 07:41:52,234 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1294 transitions. Word has length 221 [2024-12-02 07:41:52,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:52,234 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1294 transitions. [2024-12-02 07:41:52,235 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:52,235 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1294 transitions. [2024-12-02 07:41:52,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-12-02 07:41:52,236 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:52,236 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:52,236 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-12-02 07:41:52,237 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:52,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:52,237 INFO L85 PathProgramCache]: Analyzing trace with hash 1873772799, now seen corresponding path program 1 times [2024-12-02 07:41:52,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:52,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235083450] [2024-12-02 07:41:52,237 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:52,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:52,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:52,572 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:52,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:52,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235083450] [2024-12-02 07:41:52,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235083450] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:52,572 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:52,572 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:52,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278500840] [2024-12-02 07:41:52,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:52,573 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:52,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:52,574 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:52,574 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:52,574 INFO L87 Difference]: Start difference. First operand 873 states and 1294 transitions. Second operand has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:52,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:52,883 INFO L93 Difference]: Finished difference Result 1580 states and 2340 transitions. [2024-12-02 07:41:52,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:52,883 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 222 [2024-12-02 07:41:52,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:52,887 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:52,887 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:52,888 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:52,889 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1263 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1266 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:52,889 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1266 Valid, 2277 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:41:52,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:52,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:52,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4827188940092166) internal successors, (1287), 868 states have internal predecessors, (1287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:52,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1293 transitions. [2024-12-02 07:41:52,916 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1293 transitions. Word has length 222 [2024-12-02 07:41:52,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:52,917 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1293 transitions. [2024-12-02 07:41:52,917 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.0) internal successors, (210), 5 states have internal predecessors, (210), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:52,917 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1293 transitions. [2024-12-02 07:41:52,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-12-02 07:41:52,921 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:52,921 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:52,921 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-12-02 07:41:52,921 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:52,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:52,922 INFO L85 PathProgramCache]: Analyzing trace with hash -241337064, now seen corresponding path program 1 times [2024-12-02 07:41:52,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:52,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212812544] [2024-12-02 07:41:52,922 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:52,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:53,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:53,433 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:53,433 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:53,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212812544] [2024-12-02 07:41:53,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [212812544] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:53,433 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:53,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:53,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613507778] [2024-12-02 07:41:53,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:53,434 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:53,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:53,434 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:53,434 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:53,435 INFO L87 Difference]: Start difference. First operand 873 states and 1293 transitions. Second operand has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:53,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:53,718 INFO L93 Difference]: Finished difference Result 1580 states and 2338 transitions. [2024-12-02 07:41:53,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:53,718 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 223 [2024-12-02 07:41:53,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:53,721 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:53,721 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:53,721 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:53,722 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2361 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:53,722 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 2270 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:53,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:53,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:53,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4815668202764978) internal successors, (1286), 868 states have internal predecessors, (1286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:53,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1292 transitions. [2024-12-02 07:41:53,735 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1292 transitions. Word has length 223 [2024-12-02 07:41:53,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:53,735 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1292 transitions. [2024-12-02 07:41:53,736 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.2) internal successors, (211), 5 states have internal predecessors, (211), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:53,736 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1292 transitions. [2024-12-02 07:41:53,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-12-02 07:41:53,737 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:53,738 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:53,738 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-12-02 07:41:53,738 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:53,738 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:53,738 INFO L85 PathProgramCache]: Analyzing trace with hash -962851112, now seen corresponding path program 1 times [2024-12-02 07:41:53,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:53,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389561365] [2024-12-02 07:41:53,738 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:53,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:53,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:54,051 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:54,052 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:54,052 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389561365] [2024-12-02 07:41:54,052 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1389561365] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:54,052 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:54,052 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:54,052 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385714911] [2024-12-02 07:41:54,052 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:54,053 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:54,053 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:54,053 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:54,054 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:54,054 INFO L87 Difference]: Start difference. First operand 873 states and 1292 transitions. Second operand has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:54,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:54,333 INFO L93 Difference]: Finished difference Result 1580 states and 2336 transitions. [2024-12-02 07:41:54,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:54,334 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 224 [2024-12-02 07:41:54,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:54,336 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:54,337 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:54,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:54,338 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1255 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:54,338 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 2277 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 308 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:54,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:54,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:54,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4804147465437787) internal successors, (1285), 868 states have internal predecessors, (1285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:54,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1291 transitions. [2024-12-02 07:41:54,351 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1291 transitions. Word has length 224 [2024-12-02 07:41:54,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:54,351 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1291 transitions. [2024-12-02 07:41:54,352 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.4) internal successors, (212), 5 states have internal predecessors, (212), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:54,352 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1291 transitions. [2024-12-02 07:41:54,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-12-02 07:41:54,353 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:54,353 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:54,353 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-12-02 07:41:54,353 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:54,353 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:54,353 INFO L85 PathProgramCache]: Analyzing trace with hash -308143599, now seen corresponding path program 1 times [2024-12-02 07:41:54,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:54,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959956761] [2024-12-02 07:41:54,354 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:54,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:54,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:54,713 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:54,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:54,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959956761] [2024-12-02 07:41:54,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959956761] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:54,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:54,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:54,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1657664653] [2024-12-02 07:41:54,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:54,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:54,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:54,715 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:54,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:54,715 INFO L87 Difference]: Start difference. First operand 873 states and 1291 transitions. Second operand has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:54,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:54,989 INFO L93 Difference]: Finished difference Result 1580 states and 2334 transitions. [2024-12-02 07:41:54,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:54,990 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 225 [2024-12-02 07:41:54,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:54,993 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:54,993 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:54,994 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:54,994 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2345 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2348 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 307 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:54,994 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2348 Valid, 2270 Invalid, 307 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 306 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:54,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:55,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:55,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4792626728110598) internal successors, (1284), 868 states have internal predecessors, (1284), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:55,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1290 transitions. [2024-12-02 07:41:55,011 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1290 transitions. Word has length 225 [2024-12-02 07:41:55,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:55,012 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1290 transitions. [2024-12-02 07:41:55,012 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.6) internal successors, (213), 5 states have internal predecessors, (213), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:55,012 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1290 transitions. [2024-12-02 07:41:55,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-12-02 07:41:55,013 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:55,013 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:55,014 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-12-02 07:41:55,014 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:55,014 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:55,014 INFO L85 PathProgramCache]: Analyzing trace with hash 816235825, now seen corresponding path program 1 times [2024-12-02 07:41:55,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:55,014 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488019768] [2024-12-02 07:41:55,014 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:55,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:55,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:55,454 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:55,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:55,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488019768] [2024-12-02 07:41:55,454 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [488019768] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:55,454 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:55,454 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:55,454 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350469591] [2024-12-02 07:41:55,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:55,455 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:55,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:55,455 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:55,455 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:55,455 INFO L87 Difference]: Start difference. First operand 873 states and 1290 transitions. Second operand has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:55,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:55,726 INFO L93 Difference]: Finished difference Result 1580 states and 2332 transitions. [2024-12-02 07:41:55,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:55,727 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 226 [2024-12-02 07:41:55,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:55,729 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:55,730 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:55,731 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:55,731 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2337 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2340 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 305 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:55,731 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2340 Valid, 2270 Invalid, 305 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:55,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:55,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:55,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.478110599078341) internal successors, (1283), 868 states have internal predecessors, (1283), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:55,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1289 transitions. [2024-12-02 07:41:55,746 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1289 transitions. Word has length 226 [2024-12-02 07:41:55,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:55,746 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1289 transitions. [2024-12-02 07:41:55,747 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 42.8) internal successors, (214), 5 states have internal predecessors, (214), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:55,747 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1289 transitions. [2024-12-02 07:41:55,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-12-02 07:41:55,748 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:55,748 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:55,748 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-12-02 07:41:55,748 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:55,749 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:55,749 INFO L85 PathProgramCache]: Analyzing trace with hash 1707952010, now seen corresponding path program 1 times [2024-12-02 07:41:55,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:55,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373942906] [2024-12-02 07:41:55,749 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:55,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:55,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:56,202 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:56,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:56,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373942906] [2024-12-02 07:41:56,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373942906] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:56,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:56,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:56,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041441992] [2024-12-02 07:41:56,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:56,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:56,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:56,204 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:56,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:56,204 INFO L87 Difference]: Start difference. First operand 873 states and 1289 transitions. Second operand has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:56,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:56,451 INFO L93 Difference]: Finished difference Result 1580 states and 2330 transitions. [2024-12-02 07:41:56,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:56,451 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 227 [2024-12-02 07:41:56,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:56,453 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:56,453 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:56,454 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:56,454 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1243 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:56,454 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2277 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:56,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:56,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:56,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.476958525345622) internal successors, (1282), 868 states have internal predecessors, (1282), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:56,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1288 transitions. [2024-12-02 07:41:56,469 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1288 transitions. Word has length 227 [2024-12-02 07:41:56,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:56,469 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1288 transitions. [2024-12-02 07:41:56,470 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.0) internal successors, (215), 5 states have internal predecessors, (215), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:56,470 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1288 transitions. [2024-12-02 07:41:56,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-12-02 07:41:56,471 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:56,471 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:56,471 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-12-02 07:41:56,471 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:56,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:56,472 INFO L85 PathProgramCache]: Analyzing trace with hash -860691446, now seen corresponding path program 1 times [2024-12-02 07:41:56,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:56,472 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415560268] [2024-12-02 07:41:56,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:56,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:56,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:56,910 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:56,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:56,910 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415560268] [2024-12-02 07:41:56,910 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1415560268] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:56,910 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:56,910 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:56,910 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352871528] [2024-12-02 07:41:56,910 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:56,911 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:56,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:56,911 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:56,912 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:56,912 INFO L87 Difference]: Start difference. First operand 873 states and 1288 transitions. Second operand has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:57,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:57,178 INFO L93 Difference]: Finished difference Result 1580 states and 2328 transitions. [2024-12-02 07:41:57,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:57,179 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 228 [2024-12-02 07:41:57,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:57,182 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:57,182 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:57,183 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:57,183 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1239 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1242 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:57,183 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1242 Valid, 2277 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:57,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:57,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:57,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4758064516129032) internal successors, (1281), 868 states have internal predecessors, (1281), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:57,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1287 transitions. [2024-12-02 07:41:57,204 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1287 transitions. Word has length 228 [2024-12-02 07:41:57,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:57,205 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1287 transitions. [2024-12-02 07:41:57,205 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.2) internal successors, (216), 5 states have internal predecessors, (216), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:57,205 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1287 transitions. [2024-12-02 07:41:57,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-12-02 07:41:57,207 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:57,207 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:57,207 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-12-02 07:41:57,207 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:57,208 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:57,208 INFO L85 PathProgramCache]: Analyzing trace with hash 333464963, now seen corresponding path program 1 times [2024-12-02 07:41:57,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:57,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193200366] [2024-12-02 07:41:57,208 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:57,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:57,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:57,618 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:57,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:57,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193200366] [2024-12-02 07:41:57,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193200366] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:57,619 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:57,619 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:57,619 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422448514] [2024-12-02 07:41:57,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:57,620 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:57,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:57,620 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:57,620 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:57,620 INFO L87 Difference]: Start difference. First operand 873 states and 1287 transitions. Second operand has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:57,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:57,845 INFO L93 Difference]: Finished difference Result 1580 states and 2326 transitions. [2024-12-02 07:41:57,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:57,846 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 229 [2024-12-02 07:41:57,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:57,848 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:57,848 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:57,848 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:57,849 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1235 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1238 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 299 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:57,849 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1238 Valid, 2277 Invalid, 299 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:57,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:57,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:57,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4746543778801844) internal successors, (1280), 868 states have internal predecessors, (1280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:57,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1286 transitions. [2024-12-02 07:41:57,858 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1286 transitions. Word has length 229 [2024-12-02 07:41:57,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:57,859 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1286 transitions. [2024-12-02 07:41:57,859 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.4) internal successors, (217), 5 states have internal predecessors, (217), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:57,859 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1286 transitions. [2024-12-02 07:41:57,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-12-02 07:41:57,860 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:57,860 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:57,860 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-12-02 07:41:57,860 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:57,861 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:57,861 INFO L85 PathProgramCache]: Analyzing trace with hash -92034205, now seen corresponding path program 1 times [2024-12-02 07:41:57,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:57,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656762149] [2024-12-02 07:41:57,861 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:57,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:57,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:58,234 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:58,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:58,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656762149] [2024-12-02 07:41:58,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656762149] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:58,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:58,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:58,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808688189] [2024-12-02 07:41:58,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:58,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:58,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:58,236 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:58,236 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:58,236 INFO L87 Difference]: Start difference. First operand 873 states and 1286 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:58,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:58,467 INFO L93 Difference]: Finished difference Result 1580 states and 2324 transitions. [2024-12-02 07:41:58,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:58,468 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 230 [2024-12-02 07:41:58,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:58,469 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:58,469 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:58,470 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:58,470 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 2305 mSDsluCounter, 1136 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2308 SdHoareTripleChecker+Valid, 2270 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:58,470 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2308 Valid, 2270 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:58,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:58,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:58,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4735023041474655) internal successors, (1279), 868 states have internal predecessors, (1279), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:58,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1285 transitions. [2024-12-02 07:41:58,481 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1285 transitions. Word has length 230 [2024-12-02 07:41:58,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:58,482 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1285 transitions. [2024-12-02 07:41:58,482 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:58,482 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1285 transitions. [2024-12-02 07:41:58,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-12-02 07:41:58,484 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:58,484 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:58,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-12-02 07:41:58,484 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:58,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:58,484 INFO L85 PathProgramCache]: Analyzing trace with hash 519853052, now seen corresponding path program 1 times [2024-12-02 07:41:58,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:58,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [667783255] [2024-12-02 07:41:58,485 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:58,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:58,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:58,834 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:58,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:58,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [667783255] [2024-12-02 07:41:58,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [667783255] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:58,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:58,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:41:58,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302660182] [2024-12-02 07:41:58,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:58,834 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:41:58,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:58,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:41:58,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:58,835 INFO L87 Difference]: Start difference. First operand 873 states and 1285 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:59,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:59,043 INFO L93 Difference]: Finished difference Result 1580 states and 2322 transitions. [2024-12-02 07:41:59,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:59,044 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 231 [2024-12-02 07:41:59,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:59,046 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:59,046 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:59,047 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:41:59,047 INFO L435 NwaCegarLoop]: 1134 mSDtfsCounter, 1227 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 294 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 2277 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 294 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:59,047 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 2277 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 294 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:41:59,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:59,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:59,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4723502304147464) internal successors, (1278), 868 states have internal predecessors, (1278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:59,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1284 transitions. [2024-12-02 07:41:59,060 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1284 transitions. Word has length 231 [2024-12-02 07:41:59,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:59,061 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1284 transitions. [2024-12-02 07:41:59,061 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:59,061 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1284 transitions. [2024-12-02 07:41:59,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-12-02 07:41:59,062 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:59,062 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:59,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-12-02 07:41:59,062 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:59,063 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:59,063 INFO L85 PathProgramCache]: Analyzing trace with hash 2059164476, now seen corresponding path program 1 times [2024-12-02 07:41:59,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:59,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032022493] [2024-12-02 07:41:59,063 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:59,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:59,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:41:59,541 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:41:59,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:41:59,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032022493] [2024-12-02 07:41:59,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1032022493] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:41:59,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:41:59,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:41:59,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431501755] [2024-12-02 07:41:59,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:41:59,542 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:41:59,542 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:41:59,543 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:41:59,543 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:41:59,543 INFO L87 Difference]: Start difference. First operand 873 states and 1284 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:59,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:41:59,698 INFO L93 Difference]: Finished difference Result 1580 states and 2320 transitions. [2024-12-02 07:41:59,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:41:59,698 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 232 [2024-12-02 07:41:59,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:41:59,701 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:41:59,701 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:41:59,702 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:41:59,702 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1126 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:41:59,703 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2398 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:41:59,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:41:59,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:41:59,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4711981566820276) internal successors, (1277), 868 states have internal predecessors, (1277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:41:59,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1283 transitions. [2024-12-02 07:41:59,716 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1283 transitions. Word has length 232 [2024-12-02 07:41:59,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:41:59,717 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1283 transitions. [2024-12-02 07:41:59,717 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:41:59,717 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1283 transitions. [2024-12-02 07:41:59,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-12-02 07:41:59,719 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:41:59,719 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:41:59,719 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-12-02 07:41:59,719 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:41:59,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:41:59,720 INFO L85 PathProgramCache]: Analyzing trace with hash 150776216, now seen corresponding path program 1 times [2024-12-02 07:41:59,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:41:59,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958005654] [2024-12-02 07:41:59,720 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:41:59,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:41:59,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:00,144 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:00,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:00,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958005654] [2024-12-02 07:42:00,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958005654] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:00,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:00,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:00,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436551905] [2024-12-02 07:42:00,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:00,145 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:00,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:00,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:00,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:00,147 INFO L87 Difference]: Start difference. First operand 873 states and 1283 transitions. Second operand has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:00,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:00,262 INFO L93 Difference]: Finished difference Result 1586 states and 2326 transitions. [2024-12-02 07:42:00,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:42:00,263 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 233 [2024-12-02 07:42:00,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:00,265 INFO L225 Difference]: With dead ends: 1586 [2024-12-02 07:42:00,265 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:00,266 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:42:00,267 INFO L435 NwaCegarLoop]: 1270 mSDtfsCounter, 1137 mSDsluCounter, 2472 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1137 SdHoareTripleChecker+Valid, 3742 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:00,267 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1137 Valid, 3742 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:00,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:00,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:00,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4700460829493087) internal successors, (1276), 868 states have internal predecessors, (1276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:00,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1282 transitions. [2024-12-02 07:42:00,280 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1282 transitions. Word has length 233 [2024-12-02 07:42:00,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:00,280 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1282 transitions. [2024-12-02 07:42:00,281 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.2) internal successors, (221), 5 states have internal predecessors, (221), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:00,281 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1282 transitions. [2024-12-02 07:42:00,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-12-02 07:42:00,282 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:00,282 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:00,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-12-02 07:42:00,282 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:00,283 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:00,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1802296377, now seen corresponding path program 1 times [2024-12-02 07:42:00,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:00,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398379421] [2024-12-02 07:42:00,283 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:00,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:00,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:00,576 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:00,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:00,576 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398379421] [2024-12-02 07:42:00,576 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1398379421] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:00,576 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:00,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:00,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455994009] [2024-12-02 07:42:00,577 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:00,577 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:00,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:00,578 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:00,578 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:00,578 INFO L87 Difference]: Start difference. First operand 873 states and 1282 transitions. Second operand has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:00,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:00,713 INFO L93 Difference]: Finished difference Result 1580 states and 2316 transitions. [2024-12-02 07:42:00,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:00,713 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 234 [2024-12-02 07:42:00,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:00,715 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:00,715 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:00,716 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:00,716 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2391 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2394 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:00,716 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2394 Valid, 2398 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:00,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:00,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:00,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4688940092165899) internal successors, (1275), 868 states have internal predecessors, (1275), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:00,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1281 transitions. [2024-12-02 07:42:00,724 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1281 transitions. Word has length 234 [2024-12-02 07:42:00,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:00,724 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1281 transitions. [2024-12-02 07:42:00,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.4) internal successors, (222), 5 states have internal predecessors, (222), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:00,724 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1281 transitions. [2024-12-02 07:42:00,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-12-02 07:42:00,725 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:00,725 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:00,725 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-12-02 07:42:00,725 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:00,725 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:00,725 INFO L85 PathProgramCache]: Analyzing trace with hash -1699971745, now seen corresponding path program 1 times [2024-12-02 07:42:00,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:00,726 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263657396] [2024-12-02 07:42:00,726 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:00,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:00,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:01,089 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:01,089 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:01,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263657396] [2024-12-02 07:42:01,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263657396] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:01,089 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:01,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:01,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004542935] [2024-12-02 07:42:01,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:01,090 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:01,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:01,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:01,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:01,091 INFO L87 Difference]: Start difference. First operand 873 states and 1281 transitions. Second operand has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:01,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:01,237 INFO L93 Difference]: Finished difference Result 1580 states and 2314 transitions. [2024-12-02 07:42:01,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:01,238 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 235 [2024-12-02 07:42:01,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:01,240 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:01,240 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:01,240 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:01,241 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2383 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2386 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:01,241 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2386 Valid, 2398 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:01,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:01,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:01,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.467741935483871) internal successors, (1274), 868 states have internal predecessors, (1274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:01,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1280 transitions. [2024-12-02 07:42:01,252 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1280 transitions. Word has length 235 [2024-12-02 07:42:01,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:01,253 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1280 transitions. [2024-12-02 07:42:01,253 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.6) internal successors, (223), 5 states have internal predecessors, (223), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:01,253 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1280 transitions. [2024-12-02 07:42:01,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2024-12-02 07:42:01,254 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:01,254 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:01,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-12-02 07:42:01,254 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:01,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:01,255 INFO L85 PathProgramCache]: Analyzing trace with hash 1030173294, now seen corresponding path program 1 times [2024-12-02 07:42:01,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:01,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905385135] [2024-12-02 07:42:01,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:01,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:01,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:01,590 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:01,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:01,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905385135] [2024-12-02 07:42:01,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1905385135] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:01,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:01,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:01,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517808383] [2024-12-02 07:42:01,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:01,590 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:01,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:01,591 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:01,591 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:01,591 INFO L87 Difference]: Start difference. First operand 873 states and 1280 transitions. Second operand has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:01,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:01,716 INFO L93 Difference]: Finished difference Result 1580 states and 2312 transitions. [2024-12-02 07:42:01,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:01,717 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 236 [2024-12-02 07:42:01,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:01,718 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:01,718 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:01,719 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:01,719 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 2369 mSDsluCounter, 1200 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2372 SdHoareTripleChecker+Valid, 2398 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:01,719 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2372 Valid, 2398 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:01,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:01,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:01,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4665898617511521) internal successors, (1273), 868 states have internal predecessors, (1273), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:01,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1279 transitions. [2024-12-02 07:42:01,727 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1279 transitions. Word has length 236 [2024-12-02 07:42:01,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:01,727 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1279 transitions. [2024-12-02 07:42:01,727 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 44.8) internal successors, (224), 5 states have internal predecessors, (224), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:01,727 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1279 transitions. [2024-12-02 07:42:01,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2024-12-02 07:42:01,728 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:01,728 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:01,728 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-12-02 07:42:01,728 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:01,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:01,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1233850209, now seen corresponding path program 1 times [2024-12-02 07:42:01,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:01,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882383182] [2024-12-02 07:42:01,729 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:01,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:01,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:02,073 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:02,074 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:02,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882383182] [2024-12-02 07:42:02,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [882383182] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:02,074 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:02,074 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:02,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441016817] [2024-12-02 07:42:02,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:02,075 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:02,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:02,075 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:02,075 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:02,075 INFO L87 Difference]: Start difference. First operand 873 states and 1279 transitions. Second operand has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:02,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:02,220 INFO L93 Difference]: Finished difference Result 1580 states and 2310 transitions. [2024-12-02 07:42:02,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:02,220 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 237 [2024-12-02 07:42:02,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:02,223 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:02,223 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:02,223 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:02,224 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1251 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1254 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:02,224 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1254 Valid, 2405 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:02,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:02,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:02,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4654377880184333) internal successors, (1272), 868 states have internal predecessors, (1272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:02,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1278 transitions. [2024-12-02 07:42:02,233 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1278 transitions. Word has length 237 [2024-12-02 07:42:02,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:02,233 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1278 transitions. [2024-12-02 07:42:02,233 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.0) internal successors, (225), 5 states have internal predecessors, (225), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:02,233 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1278 transitions. [2024-12-02 07:42:02,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2024-12-02 07:42:02,243 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:02,243 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:02,244 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-12-02 07:42:02,244 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:02,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:02,244 INFO L85 PathProgramCache]: Analyzing trace with hash -396961081, now seen corresponding path program 1 times [2024-12-02 07:42:02,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:02,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744212427] [2024-12-02 07:42:02,245 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:02,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:02,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:02,528 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:02,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:02,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744212427] [2024-12-02 07:42:02,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744212427] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:02,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:02,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:02,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350277523] [2024-12-02 07:42:02,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:02,529 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:02,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:02,530 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:02,530 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:02,530 INFO L87 Difference]: Start difference. First operand 873 states and 1278 transitions. Second operand has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:02,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:02,662 INFO L93 Difference]: Finished difference Result 1580 states and 2308 transitions. [2024-12-02 07:42:02,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:02,663 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 238 [2024-12-02 07:42:02,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:02,664 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:02,664 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:02,665 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:02,665 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1247 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1250 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:02,665 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1250 Valid, 2405 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:02,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:02,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:02,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4642857142857142) internal successors, (1271), 868 states have internal predecessors, (1271), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:02,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1277 transitions. [2024-12-02 07:42:02,674 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1277 transitions. Word has length 238 [2024-12-02 07:42:02,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:02,674 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1277 transitions. [2024-12-02 07:42:02,674 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.2) internal successors, (226), 5 states have internal predecessors, (226), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:02,675 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1277 transitions. [2024-12-02 07:42:02,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2024-12-02 07:42:02,675 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:02,675 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:02,675 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-12-02 07:42:02,675 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:02,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:02,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1254052376, now seen corresponding path program 1 times [2024-12-02 07:42:02,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:02,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045948828] [2024-12-02 07:42:02,676 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:02,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:02,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:02,981 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:02,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:02,981 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045948828] [2024-12-02 07:42:02,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2045948828] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:02,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:02,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:02,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003486984] [2024-12-02 07:42:02,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:02,982 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:02,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:02,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:02,983 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:02,983 INFO L87 Difference]: Start difference. First operand 873 states and 1277 transitions. Second operand has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:03,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:03,105 INFO L93 Difference]: Finished difference Result 1580 states and 2306 transitions. [2024-12-02 07:42:03,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:03,106 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 239 [2024-12-02 07:42:03,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:03,108 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:03,108 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:03,108 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:03,109 INFO L435 NwaCegarLoop]: 1198 mSDtfsCounter, 1243 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1246 SdHoareTripleChecker+Valid, 2405 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:03,109 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1246 Valid, 2405 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:03,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:03,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:03,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4631336405529953) internal successors, (1270), 868 states have internal predecessors, (1270), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:03,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1276 transitions. [2024-12-02 07:42:03,117 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1276 transitions. Word has length 239 [2024-12-02 07:42:03,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:03,117 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1276 transitions. [2024-12-02 07:42:03,117 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.4) internal successors, (227), 5 states have internal predecessors, (227), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:03,118 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1276 transitions. [2024-12-02 07:42:03,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2024-12-02 07:42:03,118 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:03,118 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:03,118 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-12-02 07:42:03,119 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:03,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:03,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1194218592, now seen corresponding path program 1 times [2024-12-02 07:42:03,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:03,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598943996] [2024-12-02 07:42:03,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:03,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:03,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:03,592 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:03,592 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:03,592 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598943996] [2024-12-02 07:42:03,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [598943996] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:03,592 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:03,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:03,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258613126] [2024-12-02 07:42:03,592 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:03,593 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:03,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:03,593 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:03,593 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:03,593 INFO L87 Difference]: Start difference. First operand 873 states and 1276 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:03,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:03,655 INFO L93 Difference]: Finished difference Result 1580 states and 2304 transitions. [2024-12-02 07:42:03,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:03,655 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 240 [2024-12-02 07:42:03,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:03,658 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:03,658 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:03,659 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:03,660 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 1135 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1135 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:03,660 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1135 Valid, 2502 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:03,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:03,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:03,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4608294930875576) internal successors, (1268), 868 states have internal predecessors, (1268), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:03,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1274 transitions. [2024-12-02 07:42:03,677 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1274 transitions. Word has length 240 [2024-12-02 07:42:03,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:03,677 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1274 transitions. [2024-12-02 07:42:03,677 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:03,677 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1274 transitions. [2024-12-02 07:42:03,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2024-12-02 07:42:03,678 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:03,678 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:03,679 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-12-02 07:42:03,679 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:03,679 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:03,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1191452317, now seen corresponding path program 1 times [2024-12-02 07:42:03,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:03,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572917348] [2024-12-02 07:42:03,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:03,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:03,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:04,083 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:04,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:04,083 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572917348] [2024-12-02 07:42:04,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572917348] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:04,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:04,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:04,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781459432] [2024-12-02 07:42:04,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:04,084 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:04,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:04,085 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:04,085 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:04,085 INFO L87 Difference]: Start difference. First operand 873 states and 1274 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:04,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:04,140 INFO L93 Difference]: Finished difference Result 1580 states and 2300 transitions. [2024-12-02 07:42:04,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:04,140 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 242 [2024-12-02 07:42:04,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:04,143 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:04,143 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:04,144 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:04,144 INFO L435 NwaCegarLoop]: 1250 mSDtfsCounter, 2385 mSDsluCounter, 1252 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2388 SdHoareTripleChecker+Valid, 2502 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:04,145 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2388 Valid, 2502 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:04,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:04,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:04,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4596774193548387) internal successors, (1267), 868 states have internal predecessors, (1267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:04,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1273 transitions. [2024-12-02 07:42:04,157 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1273 transitions. Word has length 242 [2024-12-02 07:42:04,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:04,157 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1273 transitions. [2024-12-02 07:42:04,158 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:04,158 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1273 transitions. [2024-12-02 07:42:04,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2024-12-02 07:42:04,159 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:04,159 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:04,159 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-12-02 07:42:04,159 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:04,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:04,159 INFO L85 PathProgramCache]: Analyzing trace with hash 864928727, now seen corresponding path program 1 times [2024-12-02 07:42:04,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:04,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029758612] [2024-12-02 07:42:04,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:04,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:04,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:04,675 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:04,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:04,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029758612] [2024-12-02 07:42:04,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2029758612] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:04,675 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:04,675 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:04,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980575049] [2024-12-02 07:42:04,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:04,675 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:04,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:04,676 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:04,676 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:04,676 INFO L87 Difference]: Start difference. First operand 873 states and 1273 transitions. Second operand has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:04,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:04,746 INFO L93 Difference]: Finished difference Result 1580 states and 2298 transitions. [2024-12-02 07:42:04,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:04,747 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 243 [2024-12-02 07:42:04,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:04,750 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:04,750 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:04,750 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:04,751 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1126 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1126 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:04,751 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1126 Valid, 2456 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:04,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:04,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:04,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4585253456221199) internal successors, (1266), 868 states have internal predecessors, (1266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:04,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1272 transitions. [2024-12-02 07:42:04,764 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1272 transitions. Word has length 243 [2024-12-02 07:42:04,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:04,765 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1272 transitions. [2024-12-02 07:42:04,765 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.75) internal successors, (231), 4 states have internal predecessors, (231), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:04,765 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1272 transitions. [2024-12-02 07:42:04,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2024-12-02 07:42:04,766 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:04,766 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:04,766 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-12-02 07:42:04,766 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:04,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:04,767 INFO L85 PathProgramCache]: Analyzing trace with hash 243720918, now seen corresponding path program 1 times [2024-12-02 07:42:04,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:04,767 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077201194] [2024-12-02 07:42:04,767 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:04,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:04,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:05,157 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:05,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:05,157 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077201194] [2024-12-02 07:42:05,158 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077201194] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:05,158 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:05,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:05,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399498078] [2024-12-02 07:42:05,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:05,158 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:05,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:05,159 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:05,159 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:05,159 INFO L87 Difference]: Start difference. First operand 873 states and 1272 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:05,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:05,261 INFO L93 Difference]: Finished difference Result 1580 states and 2296 transitions. [2024-12-02 07:42:05,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:05,262 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 244 [2024-12-02 07:42:05,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:05,264 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:05,264 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:05,265 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:05,265 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2376 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2379 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:05,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2379 Valid, 2456 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:05,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:05,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:05,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.457373271889401) internal successors, (1265), 868 states have internal predecessors, (1265), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:05,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1271 transitions. [2024-12-02 07:42:05,278 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1271 transitions. Word has length 244 [2024-12-02 07:42:05,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:05,279 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1271 transitions. [2024-12-02 07:42:05,279 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:05,279 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1271 transitions. [2024-12-02 07:42:05,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-12-02 07:42:05,280 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:05,280 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:05,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-12-02 07:42:05,280 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:05,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:05,281 INFO L85 PathProgramCache]: Analyzing trace with hash -1180390672, now seen corresponding path program 1 times [2024-12-02 07:42:05,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:05,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87182825] [2024-12-02 07:42:05,281 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:05,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:05,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:05,644 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:05,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:05,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87182825] [2024-12-02 07:42:05,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87182825] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:05,644 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:05,644 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:05,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074564610] [2024-12-02 07:42:05,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:05,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:05,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:05,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:05,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:05,645 INFO L87 Difference]: Start difference. First operand 873 states and 1271 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:05,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:05,730 INFO L93 Difference]: Finished difference Result 1580 states and 2294 transitions. [2024-12-02 07:42:05,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:05,730 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 245 [2024-12-02 07:42:05,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:05,731 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:05,731 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:05,732 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:05,732 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 1252 mSDsluCounter, 1236 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1255 SdHoareTripleChecker+Valid, 2463 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:05,732 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1255 Valid, 2463 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:05,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:05,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:05,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.456221198156682) internal successors, (1264), 868 states have internal predecessors, (1264), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:05,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1270 transitions. [2024-12-02 07:42:05,743 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1270 transitions. Word has length 245 [2024-12-02 07:42:05,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:05,743 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1270 transitions. [2024-12-02 07:42:05,743 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:05,743 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1270 transitions. [2024-12-02 07:42:05,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2024-12-02 07:42:05,745 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:05,745 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:05,745 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-12-02 07:42:05,745 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:05,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:05,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1988978575, now seen corresponding path program 1 times [2024-12-02 07:42:05,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:05,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018875124] [2024-12-02 07:42:05,745 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:05,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:05,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:06,140 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:06,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:06,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018875124] [2024-12-02 07:42:06,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1018875124] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:06,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:06,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:06,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1566878485] [2024-12-02 07:42:06,140 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:06,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:06,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:06,141 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:06,141 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:06,141 INFO L87 Difference]: Start difference. First operand 873 states and 1270 transitions. Second operand has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:06,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:06,231 INFO L93 Difference]: Finished difference Result 1580 states and 2292 transitions. [2024-12-02 07:42:06,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:06,232 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 246 [2024-12-02 07:42:06,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:06,233 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:06,233 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:06,233 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:06,234 INFO L435 NwaCegarLoop]: 1227 mSDtfsCounter, 2360 mSDsluCounter, 1229 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2363 SdHoareTripleChecker+Valid, 2456 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:06,234 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2363 Valid, 2456 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:06,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:06,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:06,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.455069124423963) internal successors, (1263), 868 states have internal predecessors, (1263), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:06,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1269 transitions. [2024-12-02 07:42:06,242 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1269 transitions. Word has length 246 [2024-12-02 07:42:06,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:06,242 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1269 transitions. [2024-12-02 07:42:06,242 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.8) internal successors, (234), 5 states have internal predecessors, (234), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:06,242 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1269 transitions. [2024-12-02 07:42:06,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2024-12-02 07:42:06,243 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:06,243 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:06,243 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-12-02 07:42:06,243 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:06,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:06,243 INFO L85 PathProgramCache]: Analyzing trace with hash -180499831, now seen corresponding path program 1 times [2024-12-02 07:42:06,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:06,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184344404] [2024-12-02 07:42:06,244 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:06,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:06,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:06,808 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:06,808 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:06,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184344404] [2024-12-02 07:42:06,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184344404] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:06,808 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:06,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:06,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141829474] [2024-12-02 07:42:06,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:06,809 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:06,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:06,809 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:06,809 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:06,809 INFO L87 Difference]: Start difference. First operand 873 states and 1269 transitions. Second operand has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:42:06,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:06,871 INFO L93 Difference]: Finished difference Result 1580 states and 2290 transitions. [2024-12-02 07:42:06,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:06,872 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 247 [2024-12-02 07:42:06,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:06,874 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:06,874 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:06,874 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:06,875 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1166 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1168 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:06,875 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1168 Valid, 2500 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:06,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:06,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:06,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4539170506912442) internal successors, (1262), 868 states have internal predecessors, (1262), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:06,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1268 transitions. [2024-12-02 07:42:06,889 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1268 transitions. Word has length 247 [2024-12-02 07:42:06,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:06,889 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1268 transitions. [2024-12-02 07:42:06,889 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.75) internal successors, (235), 4 states have internal predecessors, (235), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:42:06,889 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1268 transitions. [2024-12-02 07:42:06,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 249 [2024-12-02 07:42:06,890 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:06,890 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:06,890 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-12-02 07:42:06,891 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:06,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:06,891 INFO L85 PathProgramCache]: Analyzing trace with hash 51167845, now seen corresponding path program 1 times [2024-12-02 07:42:06,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:06,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712594920] [2024-12-02 07:42:06,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:06,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:07,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:07,415 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:07,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:07,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712594920] [2024-12-02 07:42:07,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [712594920] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:07,415 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:07,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:07,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681449932] [2024-12-02 07:42:07,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:07,416 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:07,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:07,416 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:07,416 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:07,417 INFO L87 Difference]: Start difference. First operand 873 states and 1268 transitions. Second operand has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:42:07,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:07,464 INFO L93 Difference]: Finished difference Result 1580 states and 2288 transitions. [2024-12-02 07:42:07,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:07,464 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 248 [2024-12-02 07:42:07,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:07,466 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:07,466 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:07,466 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:07,466 INFO L435 NwaCegarLoop]: 1249 mSDtfsCounter, 1164 mSDsluCounter, 1251 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 2500 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:07,467 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 2500 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:07,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:07,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:07,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4527649769585254) internal successors, (1261), 868 states have internal predecessors, (1261), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:07,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1267 transitions. [2024-12-02 07:42:07,477 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1267 transitions. Word has length 248 [2024-12-02 07:42:07,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:07,478 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1267 transitions. [2024-12-02 07:42:07,478 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 59.0) internal successors, (236), 4 states have internal predecessors, (236), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-12-02 07:42:07,478 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1267 transitions. [2024-12-02 07:42:07,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-12-02 07:42:07,478 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:07,478 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:07,479 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-12-02 07:42:07,479 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:07,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:07,479 INFO L85 PathProgramCache]: Analyzing trace with hash -594336282, now seen corresponding path program 1 times [2024-12-02 07:42:07,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:07,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35722829] [2024-12-02 07:42:07,479 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:07,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:07,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:08,005 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:08,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:08,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35722829] [2024-12-02 07:42:08,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [35722829] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:08,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:08,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:08,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800674694] [2024-12-02 07:42:08,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:08,006 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:08,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:08,006 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:08,006 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:08,006 INFO L87 Difference]: Start difference. First operand 873 states and 1267 transitions. Second operand has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:08,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:08,115 INFO L93 Difference]: Finished difference Result 1580 states and 2286 transitions. [2024-12-02 07:42:08,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:08,115 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 249 [2024-12-02 07:42:08,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:08,117 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:08,117 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:08,117 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:08,117 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1118 mSDsluCounter, 2447 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1118 SdHoareTripleChecker+Valid, 3672 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:08,118 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1118 Valid, 3672 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:08,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:08,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:08,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4516129032258065) internal successors, (1260), 868 states have internal predecessors, (1260), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:08,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1266 transitions. [2024-12-02 07:42:08,127 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1266 transitions. Word has length 249 [2024-12-02 07:42:08,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:08,127 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1266 transitions. [2024-12-02 07:42:08,127 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.4) internal successors, (237), 5 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:08,127 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1266 transitions. [2024-12-02 07:42:08,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2024-12-02 07:42:08,128 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:08,128 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:08,128 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-12-02 07:42:08,128 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:08,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:08,129 INFO L85 PathProgramCache]: Analyzing trace with hash -592829682, now seen corresponding path program 1 times [2024-12-02 07:42:08,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:08,129 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857458600] [2024-12-02 07:42:08,129 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:08,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:08,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:08,633 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:08,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:08,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857458600] [2024-12-02 07:42:08,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857458600] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:08,634 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:08,634 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:08,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452439431] [2024-12-02 07:42:08,634 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:08,635 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:08,635 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:08,635 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:08,635 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:08,635 INFO L87 Difference]: Start difference. First operand 873 states and 1266 transitions. Second operand has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:08,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:08,731 INFO L93 Difference]: Finished difference Result 1580 states and 2284 transitions. [2024-12-02 07:42:08,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:08,731 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 250 [2024-12-02 07:42:08,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:08,733 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:08,733 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:08,733 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:08,734 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1115 mSDsluCounter, 1234 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1115 SdHoareTripleChecker+Valid, 2459 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:08,734 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1115 Valid, 2459 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:08,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:08,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:08,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4504608294930876) internal successors, (1259), 868 states have internal predecessors, (1259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:08,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1265 transitions. [2024-12-02 07:42:08,754 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1265 transitions. Word has length 250 [2024-12-02 07:42:08,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:08,755 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1265 transitions. [2024-12-02 07:42:08,755 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.6) internal successors, (238), 5 states have internal predecessors, (238), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:08,755 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1265 transitions. [2024-12-02 07:42:08,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2024-12-02 07:42:08,757 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:08,757 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:08,757 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-12-02 07:42:08,757 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:08,758 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:08,758 INFO L85 PathProgramCache]: Analyzing trace with hash -142001561, now seen corresponding path program 1 times [2024-12-02 07:42:08,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:08,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627455038] [2024-12-02 07:42:08,758 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:08,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:09,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:09,306 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:09,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:09,306 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627455038] [2024-12-02 07:42:09,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627455038] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:09,306 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:09,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:09,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680460637] [2024-12-02 07:42:09,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:09,306 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:09,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:09,307 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:09,307 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:09,307 INFO L87 Difference]: Start difference. First operand 873 states and 1265 transitions. Second operand has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:09,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:09,405 INFO L93 Difference]: Finished difference Result 1580 states and 2282 transitions. [2024-12-02 07:42:09,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:09,406 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 251 [2024-12-02 07:42:09,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:09,407 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:09,407 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:09,408 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:09,408 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 2220 mSDsluCounter, 1227 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2220 SdHoareTripleChecker+Valid, 2452 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:09,408 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2220 Valid, 2452 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:09,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:09,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:09,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4493087557603688) internal successors, (1258), 868 states have internal predecessors, (1258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:09,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1264 transitions. [2024-12-02 07:42:09,417 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1264 transitions. Word has length 251 [2024-12-02 07:42:09,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:09,417 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1264 transitions. [2024-12-02 07:42:09,417 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.8) internal successors, (239), 5 states have internal predecessors, (239), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:09,417 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1264 transitions. [2024-12-02 07:42:09,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2024-12-02 07:42:09,418 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:09,418 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:09,418 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-12-02 07:42:09,418 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:09,419 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:09,419 INFO L85 PathProgramCache]: Analyzing trace with hash 488879693, now seen corresponding path program 1 times [2024-12-02 07:42:09,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:09,419 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895442479] [2024-12-02 07:42:09,419 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:09,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:09,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:09,868 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:09,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:09,868 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895442479] [2024-12-02 07:42:09,868 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895442479] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:09,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:09,868 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:09,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027492706] [2024-12-02 07:42:09,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:09,868 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:09,868 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:09,868 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:09,868 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:09,869 INFO L87 Difference]: Start difference. First operand 873 states and 1264 transitions. Second operand has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:10,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:10,024 INFO L93 Difference]: Finished difference Result 1580 states and 2280 transitions. [2024-12-02 07:42:10,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:10,024 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 252 [2024-12-02 07:42:10,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:10,025 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:10,025 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:10,026 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:10,026 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1100 mSDsluCounter, 2369 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1100 SdHoareTripleChecker+Valid, 3555 SdHoareTripleChecker+Invalid, 223 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:10,026 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1100 Valid, 3555 Invalid, 223 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:10,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:10,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:10,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4481566820276497) internal successors, (1257), 868 states have internal predecessors, (1257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:10,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1263 transitions. [2024-12-02 07:42:10,036 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1263 transitions. Word has length 252 [2024-12-02 07:42:10,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:10,036 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1263 transitions. [2024-12-02 07:42:10,036 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.0) internal successors, (240), 5 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:10,036 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1263 transitions. [2024-12-02 07:42:10,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2024-12-02 07:42:10,037 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:10,037 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:10,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-12-02 07:42:10,038 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:10,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:10,038 INFO L85 PathProgramCache]: Analyzing trace with hash -1768421689, now seen corresponding path program 1 times [2024-12-02 07:42:10,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:10,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541346673] [2024-12-02 07:42:10,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:10,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:10,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:10,497 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:10,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:10,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541346673] [2024-12-02 07:42:10,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [541346673] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:10,498 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:10,498 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:10,498 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [989414758] [2024-12-02 07:42:10,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:10,498 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:10,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:10,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:10,499 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:10,499 INFO L87 Difference]: Start difference. First operand 873 states and 1263 transitions. Second operand has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:10,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:10,654 INFO L93 Difference]: Finished difference Result 1580 states and 2278 transitions. [2024-12-02 07:42:10,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:10,654 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 253 [2024-12-02 07:42:10,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:10,656 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:10,656 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:10,657 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:10,657 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2190 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2190 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:10,657 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2190 Valid, 2374 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:10,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:10,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:10,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4470046082949308) internal successors, (1256), 868 states have internal predecessors, (1256), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:10,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1262 transitions. [2024-12-02 07:42:10,666 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1262 transitions. Word has length 253 [2024-12-02 07:42:10,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:10,666 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1262 transitions. [2024-12-02 07:42:10,666 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.2) internal successors, (241), 5 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:10,667 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1262 transitions. [2024-12-02 07:42:10,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-12-02 07:42:10,667 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:10,667 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:10,668 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-12-02 07:42:10,668 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:10,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:10,668 INFO L85 PathProgramCache]: Analyzing trace with hash -262754674, now seen corresponding path program 1 times [2024-12-02 07:42:10,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:10,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432637947] [2024-12-02 07:42:10,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:10,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:10,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:11,133 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:11,133 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:11,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432637947] [2024-12-02 07:42:11,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432637947] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:11,133 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:11,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:11,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [159958518] [2024-12-02 07:42:11,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:11,133 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:11,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:11,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:11,134 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:11,134 INFO L87 Difference]: Start difference. First operand 873 states and 1262 transitions. Second operand has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:11,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:11,282 INFO L93 Difference]: Finished difference Result 1580 states and 2276 transitions. [2024-12-02 07:42:11,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:11,283 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 254 [2024-12-02 07:42:11,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:11,284 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:11,284 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:11,285 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:11,285 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1096 mSDsluCounter, 1195 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1096 SdHoareTripleChecker+Valid, 2381 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:11,285 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1096 Valid, 2381 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:11,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:11,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:11,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.445852534562212) internal successors, (1255), 868 states have internal predecessors, (1255), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:11,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1261 transitions. [2024-12-02 07:42:11,295 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1261 transitions. Word has length 254 [2024-12-02 07:42:11,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:11,295 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1261 transitions. [2024-12-02 07:42:11,295 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.4) internal successors, (242), 5 states have internal predecessors, (242), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:11,295 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1261 transitions. [2024-12-02 07:42:11,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2024-12-02 07:42:11,296 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:11,296 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:11,296 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-12-02 07:42:11,296 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:11,297 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:11,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1822400070, now seen corresponding path program 1 times [2024-12-02 07:42:11,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:11,297 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657310551] [2024-12-02 07:42:11,297 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:11,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:11,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:11,725 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:11,726 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:11,726 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1657310551] [2024-12-02 07:42:11,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1657310551] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:11,726 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:11,726 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:11,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938745739] [2024-12-02 07:42:11,726 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:11,726 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:11,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:11,726 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:11,727 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:11,727 INFO L87 Difference]: Start difference. First operand 873 states and 1261 transitions. Second operand has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:11,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:11,865 INFO L93 Difference]: Finished difference Result 1580 states and 2274 transitions. [2024-12-02 07:42:11,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:11,866 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 255 [2024-12-02 07:42:11,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:11,867 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:11,867 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:11,868 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:11,868 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2178 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2178 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:11,868 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2178 Valid, 2374 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:11,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:11,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:11,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.444700460829493) internal successors, (1254), 868 states have internal predecessors, (1254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:11,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1260 transitions. [2024-12-02 07:42:11,880 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1260 transitions. Word has length 255 [2024-12-02 07:42:11,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:11,881 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1260 transitions. [2024-12-02 07:42:11,881 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 48.6) internal successors, (243), 5 states have internal predecessors, (243), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:11,881 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1260 transitions. [2024-12-02 07:42:11,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2024-12-02 07:42:11,882 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:11,882 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:11,882 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-12-02 07:42:11,882 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:11,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:11,883 INFO L85 PathProgramCache]: Analyzing trace with hash -449010865, now seen corresponding path program 1 times [2024-12-02 07:42:11,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:11,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487602689] [2024-12-02 07:42:11,883 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:11,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:12,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:12,517 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:12,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:12,517 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487602689] [2024-12-02 07:42:12,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1487602689] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:12,517 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:12,518 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:12,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825306886] [2024-12-02 07:42:12,518 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:12,518 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:12,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:12,518 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:12,518 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:12,519 INFO L87 Difference]: Start difference. First operand 873 states and 1260 transitions. Second operand has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:12,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:12,616 INFO L93 Difference]: Finished difference Result 1580 states and 2272 transitions. [2024-12-02 07:42:12,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:12,617 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 256 [2024-12-02 07:42:12,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:12,618 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:12,618 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:12,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:12,619 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 1079 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:12,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2374 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:12,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:12,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:12,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4435483870967742) internal successors, (1253), 868 states have internal predecessors, (1253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:12,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1259 transitions. [2024-12-02 07:42:12,629 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1259 transitions. Word has length 256 [2024-12-02 07:42:12,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:12,629 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1259 transitions. [2024-12-02 07:42:12,629 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.0) internal successors, (244), 4 states have internal predecessors, (244), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:12,629 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1259 transitions. [2024-12-02 07:42:12,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2024-12-02 07:42:12,630 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:12,630 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:12,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-12-02 07:42:12,630 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:12,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:12,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1710883141, now seen corresponding path program 1 times [2024-12-02 07:42:12,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:12,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368047817] [2024-12-02 07:42:12,631 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:12,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:12,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:13,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:13,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:13,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368047817] [2024-12-02 07:42:13,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1368047817] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:13,087 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:13,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:13,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476862859] [2024-12-02 07:42:13,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:13,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:13,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:13,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:13,088 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:13,088 INFO L87 Difference]: Start difference. First operand 873 states and 1259 transitions. Second operand has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:13,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:13,223 INFO L93 Difference]: Finished difference Result 1580 states and 2270 transitions. [2024-12-02 07:42:13,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:13,223 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 257 [2024-12-02 07:42:13,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:13,225 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:13,225 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:13,225 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:13,226 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2166 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2166 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:13,226 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2166 Valid, 2374 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:13,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:13,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:13,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4423963133640554) internal successors, (1252), 868 states have internal predecessors, (1252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:13,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1258 transitions. [2024-12-02 07:42:13,234 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1258 transitions. Word has length 257 [2024-12-02 07:42:13,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:13,234 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1258 transitions. [2024-12-02 07:42:13,234 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.0) internal successors, (245), 5 states have internal predecessors, (245), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:13,234 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1258 transitions. [2024-12-02 07:42:13,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2024-12-02 07:42:13,235 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:13,235 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:13,235 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-12-02 07:42:13,235 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:13,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:13,236 INFO L85 PathProgramCache]: Analyzing trace with hash 1726874768, now seen corresponding path program 1 times [2024-12-02 07:42:13,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:13,236 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935030919] [2024-12-02 07:42:13,236 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:13,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:13,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:13,704 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:13,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:13,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935030919] [2024-12-02 07:42:13,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935030919] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:13,705 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:13,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:13,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770391017] [2024-12-02 07:42:13,705 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:13,705 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:13,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:13,706 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:13,706 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:13,706 INFO L87 Difference]: Start difference. First operand 873 states and 1258 transitions. Second operand has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:13,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:13,828 INFO L93 Difference]: Finished difference Result 1580 states and 2268 transitions. [2024-12-02 07:42:13,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:13,829 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 258 [2024-12-02 07:42:13,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:13,831 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:13,831 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:13,832 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:13,832 INFO L435 NwaCegarLoop]: 1186 mSDtfsCounter, 2160 mSDsluCounter, 1188 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2160 SdHoareTripleChecker+Valid, 2374 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:13,832 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2160 Valid, 2374 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:13,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:13,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:13,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4412442396313363) internal successors, (1251), 868 states have internal predecessors, (1251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:13,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1257 transitions. [2024-12-02 07:42:13,841 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1257 transitions. Word has length 258 [2024-12-02 07:42:13,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:13,841 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1257 transitions. [2024-12-02 07:42:13,841 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.2) internal successors, (246), 5 states have internal predecessors, (246), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:13,841 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1257 transitions. [2024-12-02 07:42:13,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2024-12-02 07:42:13,842 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:13,842 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:13,842 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-12-02 07:42:13,842 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:13,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:13,843 INFO L85 PathProgramCache]: Analyzing trace with hash 564576196, now seen corresponding path program 1 times [2024-12-02 07:42:13,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:13,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130065963] [2024-12-02 07:42:13,843 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:13,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:14,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:14,266 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:14,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:14,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130065963] [2024-12-02 07:42:14,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1130065963] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:14,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:14,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:14,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265240558] [2024-12-02 07:42:14,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:14,267 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:14,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:14,267 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:14,268 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:14,268 INFO L87 Difference]: Start difference. First operand 873 states and 1257 transitions. Second operand has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:14,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:14,516 INFO L93 Difference]: Finished difference Result 1580 states and 2266 transitions. [2024-12-02 07:42:14,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:14,517 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 259 [2024-12-02 07:42:14,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:14,518 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:14,518 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:14,519 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:14,519 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1061 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1061 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:14,519 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1061 Valid, 2216 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:14,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:14,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:14,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4400921658986174) internal successors, (1250), 868 states have internal predecessors, (1250), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:14,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1256 transitions. [2024-12-02 07:42:14,534 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1256 transitions. Word has length 259 [2024-12-02 07:42:14,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:14,534 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1256 transitions. [2024-12-02 07:42:14,534 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 61.75) internal successors, (247), 4 states have internal predecessors, (247), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:14,534 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1256 transitions. [2024-12-02 07:42:14,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2024-12-02 07:42:14,535 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:14,535 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:14,536 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-12-02 07:42:14,536 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:14,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:14,536 INFO L85 PathProgramCache]: Analyzing trace with hash -1317954896, now seen corresponding path program 1 times [2024-12-02 07:42:14,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:14,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943529736] [2024-12-02 07:42:14,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:14,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:14,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:14,992 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:14,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:14,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943529736] [2024-12-02 07:42:14,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943529736] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:14,992 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:14,992 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:14,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388992275] [2024-12-02 07:42:14,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:14,993 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:14,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:14,993 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:14,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:14,993 INFO L87 Difference]: Start difference. First operand 873 states and 1256 transitions. Second operand has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:15,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:15,222 INFO L93 Difference]: Finished difference Result 1580 states and 2264 transitions. [2024-12-02 07:42:15,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:15,223 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 260 [2024-12-02 07:42:15,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:15,224 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:15,225 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:15,225 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:15,226 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1059 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1059 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 290 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:15,226 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1059 Valid, 2223 Invalid, 290 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:15,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:15,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:15,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4389400921658986) internal successors, (1249), 868 states have internal predecessors, (1249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:15,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1255 transitions. [2024-12-02 07:42:15,240 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1255 transitions. Word has length 260 [2024-12-02 07:42:15,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:15,240 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1255 transitions. [2024-12-02 07:42:15,241 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.6) internal successors, (248), 5 states have internal predecessors, (248), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:15,241 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1255 transitions. [2024-12-02 07:42:15,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2024-12-02 07:42:15,242 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:15,242 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:15,242 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-12-02 07:42:15,242 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:15,242 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:15,243 INFO L85 PathProgramCache]: Analyzing trace with hash -1332823739, now seen corresponding path program 1 times [2024-12-02 07:42:15,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:15,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778542417] [2024-12-02 07:42:15,243 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:15,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:15,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:15,709 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:15,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:15,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778542417] [2024-12-02 07:42:15,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778542417] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:15,709 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:15,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:15,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2098463000] [2024-12-02 07:42:15,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:15,710 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:15,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:15,710 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:15,711 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:15,711 INFO L87 Difference]: Start difference. First operand 873 states and 1255 transitions. Second operand has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:15,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:15,962 INFO L93 Difference]: Finished difference Result 1580 states and 2262 transitions. [2024-12-02 07:42:15,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:15,962 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 261 [2024-12-02 07:42:15,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:15,963 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:15,964 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:15,964 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:15,964 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2108 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 288 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2108 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 288 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:15,965 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2108 Valid, 2216 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 288 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:15,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:15,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:15,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4377880184331797) internal successors, (1248), 868 states have internal predecessors, (1248), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:15,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1254 transitions. [2024-12-02 07:42:15,974 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1254 transitions. Word has length 261 [2024-12-02 07:42:15,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:15,974 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1254 transitions. [2024-12-02 07:42:15,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 49.8) internal successors, (249), 5 states have internal predecessors, (249), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:15,974 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1254 transitions. [2024-12-02 07:42:15,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2024-12-02 07:42:15,975 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:15,975 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:15,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-12-02 07:42:15,975 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:15,975 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:15,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1161378031, now seen corresponding path program 1 times [2024-12-02 07:42:15,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:15,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491605196] [2024-12-02 07:42:15,975 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:15,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:16,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:16,455 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:16,455 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:16,456 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491605196] [2024-12-02 07:42:16,456 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491605196] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:16,456 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:16,456 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:16,456 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434378955] [2024-12-02 07:42:16,456 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:16,456 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:16,456 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:16,457 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:16,457 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:16,457 INFO L87 Difference]: Start difference. First operand 873 states and 1254 transitions. Second operand has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:16,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:16,711 INFO L93 Difference]: Finished difference Result 1580 states and 2260 transitions. [2024-12-02 07:42:16,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:16,711 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 262 [2024-12-02 07:42:16,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:16,713 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:16,713 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:16,713 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:16,714 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2102 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2102 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:16,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2102 Valid, 2216 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:16,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:16,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:16,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4366359447004609) internal successors, (1247), 868 states have internal predecessors, (1247), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:16,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1253 transitions. [2024-12-02 07:42:16,722 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1253 transitions. Word has length 262 [2024-12-02 07:42:16,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:16,723 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1253 transitions. [2024-12-02 07:42:16,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.0) internal successors, (250), 5 states have internal predecessors, (250), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:16,723 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1253 transitions. [2024-12-02 07:42:16,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2024-12-02 07:42:16,723 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:16,723 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:16,724 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-12-02 07:42:16,724 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:16,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:16,724 INFO L85 PathProgramCache]: Analyzing trace with hash 940351302, now seen corresponding path program 1 times [2024-12-02 07:42:16,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:16,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486372770] [2024-12-02 07:42:16,724 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:16,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:16,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:17,161 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:17,161 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:17,161 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486372770] [2024-12-02 07:42:17,161 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486372770] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:17,161 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:17,161 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:17,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022998365] [2024-12-02 07:42:17,161 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:17,161 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:17,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:17,161 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:17,161 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:17,161 INFO L87 Difference]: Start difference. First operand 873 states and 1253 transitions. Second operand has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:17,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:17,370 INFO L93 Difference]: Finished difference Result 1580 states and 2258 transitions. [2024-12-02 07:42:17,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:17,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 263 [2024-12-02 07:42:17,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:17,373 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:17,373 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:17,374 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:17,374 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1056 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 284 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:17,374 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2223 Invalid, 284 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:17,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:17,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:17,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.435483870967742) internal successors, (1246), 868 states have internal predecessors, (1246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:17,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1252 transitions. [2024-12-02 07:42:17,385 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1252 transitions. Word has length 263 [2024-12-02 07:42:17,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:17,385 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1252 transitions. [2024-12-02 07:42:17,385 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.2) internal successors, (251), 5 states have internal predecessors, (251), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:17,385 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1252 transitions. [2024-12-02 07:42:17,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 265 [2024-12-02 07:42:17,386 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:17,386 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:17,386 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-12-02 07:42:17,386 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:17,386 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:17,386 INFO L85 PathProgramCache]: Analyzing trace with hash 2062987950, now seen corresponding path program 1 times [2024-12-02 07:42:17,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:17,386 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96173950] [2024-12-02 07:42:17,386 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:17,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:17,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:17,991 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:17,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:17,991 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96173950] [2024-12-02 07:42:17,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96173950] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:17,991 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:17,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:17,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959235382] [2024-12-02 07:42:17,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:17,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:17,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:17,992 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:17,992 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:17,992 INFO L87 Difference]: Start difference. First operand 873 states and 1252 transitions. Second operand has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:18,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:18,231 INFO L93 Difference]: Finished difference Result 1580 states and 2256 transitions. [2024-12-02 07:42:18,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:18,231 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 264 [2024-12-02 07:42:18,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:18,233 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:18,233 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:18,233 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:18,234 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2090 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 282 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2090 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 282 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:18,234 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2090 Valid, 2216 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 282 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:18,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:18,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:18,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4343317972350231) internal successors, (1245), 868 states have internal predecessors, (1245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:18,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1251 transitions. [2024-12-02 07:42:18,244 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1251 transitions. Word has length 264 [2024-12-02 07:42:18,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:18,245 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1251 transitions. [2024-12-02 07:42:18,245 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.4) internal successors, (252), 5 states have internal predecessors, (252), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:18,245 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1251 transitions. [2024-12-02 07:42:18,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 266 [2024-12-02 07:42:18,246 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:18,246 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:18,246 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-12-02 07:42:18,247 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:18,247 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:18,247 INFO L85 PathProgramCache]: Analyzing trace with hash -101916217, now seen corresponding path program 1 times [2024-12-02 07:42:18,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:18,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877283214] [2024-12-02 07:42:18,247 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:18,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:18,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:18,754 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:18,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:18,755 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877283214] [2024-12-02 07:42:18,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [877283214] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:18,755 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:18,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:18,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770126974] [2024-12-02 07:42:18,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:18,755 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:18,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:18,755 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:18,755 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:18,755 INFO L87 Difference]: Start difference. First operand 873 states and 1251 transitions. Second operand has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:18,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:18,997 INFO L93 Difference]: Finished difference Result 1580 states and 2254 transitions. [2024-12-02 07:42:18,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:18,997 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 265 [2024-12-02 07:42:18,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:18,998 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:18,998 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:18,999 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:18,999 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1054 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 280 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1054 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 280 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:18,999 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1054 Valid, 2223 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 280 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:19,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:19,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:19,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.433179723502304) internal successors, (1244), 868 states have internal predecessors, (1244), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:19,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1250 transitions. [2024-12-02 07:42:19,008 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1250 transitions. Word has length 265 [2024-12-02 07:42:19,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:19,009 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1250 transitions. [2024-12-02 07:42:19,009 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.6) internal successors, (253), 5 states have internal predecessors, (253), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:19,009 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1250 transitions. [2024-12-02 07:42:19,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 267 [2024-12-02 07:42:19,010 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:19,010 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:19,010 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-12-02 07:42:19,010 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:19,010 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:19,010 INFO L85 PathProgramCache]: Analyzing trace with hash -277506067, now seen corresponding path program 1 times [2024-12-02 07:42:19,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:19,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517770260] [2024-12-02 07:42:19,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:19,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:19,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:19,458 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:19,458 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:19,458 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517770260] [2024-12-02 07:42:19,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1517770260] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:19,458 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:19,458 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:19,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751583004] [2024-12-02 07:42:19,459 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:19,459 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:19,459 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:19,459 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:19,459 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:19,459 INFO L87 Difference]: Start difference. First operand 873 states and 1250 transitions. Second operand has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:19,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:19,662 INFO L93 Difference]: Finished difference Result 1580 states and 2252 transitions. [2024-12-02 07:42:19,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:19,662 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 266 [2024-12-02 07:42:19,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:19,663 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:19,663 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:19,664 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:19,664 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2078 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2078 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:19,664 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2078 Valid, 2216 Invalid, 278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:19,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:19,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:19,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4320276497695852) internal successors, (1243), 868 states have internal predecessors, (1243), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:19,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1249 transitions. [2024-12-02 07:42:19,673 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1249 transitions. Word has length 266 [2024-12-02 07:42:19,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:19,673 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1249 transitions. [2024-12-02 07:42:19,673 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 50.8) internal successors, (254), 5 states have internal predecessors, (254), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:19,673 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1249 transitions. [2024-12-02 07:42:19,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2024-12-02 07:42:19,674 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:19,674 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:19,674 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-12-02 07:42:19,674 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:19,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:19,674 INFO L85 PathProgramCache]: Analyzing trace with hash 2047602888, now seen corresponding path program 1 times [2024-12-02 07:42:19,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:19,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253235334] [2024-12-02 07:42:19,674 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:19,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:19,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:20,116 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:20,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:20,116 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253235334] [2024-12-02 07:42:20,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [253235334] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:20,117 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:20,117 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:20,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722229289] [2024-12-02 07:42:20,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:20,117 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:20,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:20,117 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:20,117 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:20,117 INFO L87 Difference]: Start difference. First operand 873 states and 1249 transitions. Second operand has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:20,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:20,359 INFO L93 Difference]: Finished difference Result 1580 states and 2250 transitions. [2024-12-02 07:42:20,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:20,359 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 267 [2024-12-02 07:42:20,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:20,360 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:20,360 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:20,361 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:20,361 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2072 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 276 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2072 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 276 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:20,361 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2072 Valid, 2216 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 276 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:20,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:20,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:20,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4308755760368663) internal successors, (1242), 868 states have internal predecessors, (1242), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:20,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1248 transitions. [2024-12-02 07:42:20,370 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1248 transitions. Word has length 267 [2024-12-02 07:42:20,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:20,370 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1248 transitions. [2024-12-02 07:42:20,371 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.0) internal successors, (255), 5 states have internal predecessors, (255), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:20,371 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1248 transitions. [2024-12-02 07:42:20,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2024-12-02 07:42:20,371 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:20,371 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:20,372 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-12-02 07:42:20,372 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:20,372 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:20,372 INFO L85 PathProgramCache]: Analyzing trace with hash 1324447916, now seen corresponding path program 1 times [2024-12-02 07:42:20,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:20,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552495700] [2024-12-02 07:42:20,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:20,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:20,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:20,817 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:20,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:20,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552495700] [2024-12-02 07:42:20,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552495700] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:20,818 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:20,818 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:20,818 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180863848] [2024-12-02 07:42:20,818 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:20,818 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:20,818 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:20,819 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:20,819 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:20,819 INFO L87 Difference]: Start difference. First operand 873 states and 1248 transitions. Second operand has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:21,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:21,053 INFO L93 Difference]: Finished difference Result 1580 states and 2248 transitions. [2024-12-02 07:42:21,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:21,053 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 268 [2024-12-02 07:42:21,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:21,054 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:21,054 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:21,055 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:21,055 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2066 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2066 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:21,055 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2066 Valid, 2216 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:21,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:21,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:21,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4297235023041475) internal successors, (1241), 868 states have internal predecessors, (1241), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:21,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1247 transitions. [2024-12-02 07:42:21,064 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1247 transitions. Word has length 268 [2024-12-02 07:42:21,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:21,065 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1247 transitions. [2024-12-02 07:42:21,065 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.2) internal successors, (256), 5 states have internal predecessors, (256), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:21,065 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1247 transitions. [2024-12-02 07:42:21,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 270 [2024-12-02 07:42:21,065 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:21,065 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:21,065 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-12-02 07:42:21,066 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:21,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:21,066 INFO L85 PathProgramCache]: Analyzing trace with hash 995507273, now seen corresponding path program 1 times [2024-12-02 07:42:21,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:21,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607693731] [2024-12-02 07:42:21,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:21,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:21,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:21,535 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:21,535 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:21,535 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607693731] [2024-12-02 07:42:21,535 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [607693731] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:21,535 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:21,535 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:21,535 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362173592] [2024-12-02 07:42:21,535 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:21,535 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:21,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:21,536 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:21,536 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:21,536 INFO L87 Difference]: Start difference. First operand 873 states and 1247 transitions. Second operand has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:21,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:21,772 INFO L93 Difference]: Finished difference Result 1580 states and 2246 transitions. [2024-12-02 07:42:21,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:21,772 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 269 [2024-12-02 07:42:21,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:21,773 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:21,773 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:21,774 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:21,774 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1050 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 272 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1050 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 272 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:21,774 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1050 Valid, 2223 Invalid, 272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 272 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:21,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:21,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:21,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4285714285714286) internal successors, (1240), 868 states have internal predecessors, (1240), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:21,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1246 transitions. [2024-12-02 07:42:21,784 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1246 transitions. Word has length 269 [2024-12-02 07:42:21,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:21,784 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1246 transitions. [2024-12-02 07:42:21,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.4) internal successors, (257), 5 states have internal predecessors, (257), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:21,784 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1246 transitions. [2024-12-02 07:42:21,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-12-02 07:42:21,785 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:21,785 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:21,785 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-12-02 07:42:21,785 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:21,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:21,786 INFO L85 PathProgramCache]: Analyzing trace with hash -669653781, now seen corresponding path program 1 times [2024-12-02 07:42:21,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:21,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639949683] [2024-12-02 07:42:21,786 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:21,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:21,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:22,223 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:22,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:22,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639949683] [2024-12-02 07:42:22,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [639949683] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:22,223 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:22,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:22,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102155802] [2024-12-02 07:42:22,223 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:22,223 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:22,223 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:22,224 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:22,224 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:22,224 INFO L87 Difference]: Start difference. First operand 873 states and 1246 transitions. Second operand has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:22,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:22,471 INFO L93 Difference]: Finished difference Result 1580 states and 2244 transitions. [2024-12-02 07:42:22,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:22,472 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 270 [2024-12-02 07:42:22,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:22,473 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:22,473 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:22,474 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:22,474 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1049 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1049 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:22,474 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1049 Valid, 2223 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:22,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:22,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:22,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4274193548387097) internal successors, (1239), 868 states have internal predecessors, (1239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:22,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1245 transitions. [2024-12-02 07:42:22,484 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1245 transitions. Word has length 270 [2024-12-02 07:42:22,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:22,484 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1245 transitions. [2024-12-02 07:42:22,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.6) internal successors, (258), 5 states have internal predecessors, (258), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:22,484 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1245 transitions. [2024-12-02 07:42:22,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2024-12-02 07:42:22,485 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:22,485 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:22,485 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-12-02 07:42:22,485 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:22,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:22,486 INFO L85 PathProgramCache]: Analyzing trace with hash -53988278, now seen corresponding path program 1 times [2024-12-02 07:42:22,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:22,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139791106] [2024-12-02 07:42:22,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:22,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:22,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:22,954 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:22,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:22,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139791106] [2024-12-02 07:42:22,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [139791106] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:22,955 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:22,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:22,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594977795] [2024-12-02 07:42:22,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:22,955 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:22,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:22,955 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:22,955 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:22,955 INFO L87 Difference]: Start difference. First operand 873 states and 1245 transitions. Second operand has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:23,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:23,185 INFO L93 Difference]: Finished difference Result 1580 states and 2242 transitions. [2024-12-02 07:42:23,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:23,186 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 271 [2024-12-02 07:42:23,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:23,187 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:23,187 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:23,187 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:23,188 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 2048 mSDsluCounter, 1109 mSDsCounter, 0 mSdLazyCounter, 268 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2048 SdHoareTripleChecker+Valid, 2216 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:23,188 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2048 Valid, 2216 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 268 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:23,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:23,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:23,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4262672811059909) internal successors, (1238), 868 states have internal predecessors, (1238), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:23,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1244 transitions. [2024-12-02 07:42:23,197 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1244 transitions. Word has length 271 [2024-12-02 07:42:23,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:23,198 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1244 transitions. [2024-12-02 07:42:23,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 51.8) internal successors, (259), 5 states have internal predecessors, (259), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:23,198 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1244 transitions. [2024-12-02 07:42:23,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-12-02 07:42:23,199 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:23,199 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:23,199 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-12-02 07:42:23,199 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:23,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:23,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1593732266, now seen corresponding path program 1 times [2024-12-02 07:42:23,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:23,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384032821] [2024-12-02 07:42:23,200 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:23,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:23,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:23,636 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:23,636 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:23,636 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384032821] [2024-12-02 07:42:23,636 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384032821] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:23,636 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:23,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:23,636 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766737033] [2024-12-02 07:42:23,636 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:23,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:23,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:23,637 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:23,637 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:23,637 INFO L87 Difference]: Start difference. First operand 873 states and 1244 transitions. Second operand has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:23,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:23,842 INFO L93 Difference]: Finished difference Result 1580 states and 2240 transitions. [2024-12-02 07:42:23,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:23,843 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 272 [2024-12-02 07:42:23,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:23,844 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:23,844 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:23,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:23,844 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1047 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:23,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 2223 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:23,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:23,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:23,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.4251152073732718) internal successors, (1237), 868 states have internal predecessors, (1237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:23,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1243 transitions. [2024-12-02 07:42:23,860 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1243 transitions. Word has length 272 [2024-12-02 07:42:23,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:23,861 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1243 transitions. [2024-12-02 07:42:23,861 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.0) internal successors, (260), 5 states have internal predecessors, (260), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:23,861 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1243 transitions. [2024-12-02 07:42:23,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-12-02 07:42:23,862 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:23,862 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:23,862 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-12-02 07:42:23,862 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:23,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:23,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1986939083, now seen corresponding path program 1 times [2024-12-02 07:42:23,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:23,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518858090] [2024-12-02 07:42:23,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:23,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:24,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:24,336 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:24,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:24,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518858090] [2024-12-02 07:42:24,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1518858090] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:24,336 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:24,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:24,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558166520] [2024-12-02 07:42:24,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:24,337 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:24,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:24,337 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:24,337 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:24,337 INFO L87 Difference]: Start difference. First operand 873 states and 1243 transitions. Second operand has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:24,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:24,558 INFO L93 Difference]: Finished difference Result 1580 states and 2238 transitions. [2024-12-02 07:42:24,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:24,558 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 273 [2024-12-02 07:42:24,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:24,559 INFO L225 Difference]: With dead ends: 1580 [2024-12-02 07:42:24,559 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:24,560 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:24,560 INFO L435 NwaCegarLoop]: 1107 mSDtfsCounter, 1046 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1046 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:24,560 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1046 Valid, 2223 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:24,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:24,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:24,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.423963133640553) internal successors, (1236), 868 states have internal predecessors, (1236), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:24,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1242 transitions. [2024-12-02 07:42:24,570 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1242 transitions. Word has length 273 [2024-12-02 07:42:24,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:24,570 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1242 transitions. [2024-12-02 07:42:24,570 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.2) internal successors, (261), 5 states have internal predecessors, (261), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:24,570 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1242 transitions. [2024-12-02 07:42:24,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2024-12-02 07:42:24,571 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:24,571 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:24,571 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-12-02 07:42:24,571 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:24,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:24,571 INFO L85 PathProgramCache]: Analyzing trace with hash -801726487, now seen corresponding path program 1 times [2024-12-02 07:42:24,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:24,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315689451] [2024-12-02 07:42:24,572 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:24,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:24,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:25,003 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:25,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:25,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315689451] [2024-12-02 07:42:25,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315689451] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:25,003 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:25,003 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:42:25,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561693275] [2024-12-02 07:42:25,003 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:25,004 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:42:25,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:25,004 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:42:25,004 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:25,004 INFO L87 Difference]: Start difference. First operand 873 states and 1242 transitions. Second operand has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:25,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:25,248 INFO L93 Difference]: Finished difference Result 1582 states and 2238 transitions. [2024-12-02 07:42:25,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:25,248 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 274 [2024-12-02 07:42:25,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:25,249 INFO L225 Difference]: With dead ends: 1582 [2024-12-02 07:42:25,249 INFO L226 Difference]: Without dead ends: 873 [2024-12-02 07:42:25,250 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:42:25,250 INFO L435 NwaCegarLoop]: 1233 mSDtfsCounter, 2 mSDsluCounter, 2196 mSDsCounter, 0 mSdLazyCounter, 281 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 3429 SdHoareTripleChecker+Invalid, 281 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 281 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:25,250 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 3429 Invalid, 281 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 281 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:25,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2024-12-02 07:42:25,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 873. [2024-12-02 07:42:25,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.422811059907834) internal successors, (1235), 868 states have internal predecessors, (1235), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:25,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1241 transitions. [2024-12-02 07:42:25,259 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1241 transitions. Word has length 274 [2024-12-02 07:42:25,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:25,259 INFO L471 AbstractCegarLoop]: Abstraction has 873 states and 1241 transitions. [2024-12-02 07:42:25,260 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 65.5) internal successors, (262), 4 states have internal predecessors, (262), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:25,260 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1241 transitions. [2024-12-02 07:42:25,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2024-12-02 07:42:25,261 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:25,261 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:25,261 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-12-02 07:42:25,261 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:25,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:25,262 INFO L85 PathProgramCache]: Analyzing trace with hash -98183874, now seen corresponding path program 1 times [2024-12-02 07:42:25,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:25,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375332280] [2024-12-02 07:42:25,262 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:25,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:25,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:26,088 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:26,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:26,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375332280] [2024-12-02 07:42:26,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1375332280] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:26,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:26,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:26,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645492165] [2024-12-02 07:42:26,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:26,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:26,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:26,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:26,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:26,089 INFO L87 Difference]: Start difference. First operand 873 states and 1241 transitions. Second operand has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:26,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:26,139 INFO L93 Difference]: Finished difference Result 1720 states and 2386 transitions. [2024-12-02 07:42:26,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:42:26,140 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 275 [2024-12-02 07:42:26,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:26,143 INFO L225 Difference]: With dead ends: 1720 [2024-12-02 07:42:26,143 INFO L226 Difference]: Without dead ends: 1013 [2024-12-02 07:42:26,143 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:26,144 INFO L435 NwaCegarLoop]: 1231 mSDtfsCounter, 22 mSDsluCounter, 3684 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 4915 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:26,144 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 4915 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:26,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1013 states. [2024-12-02 07:42:26,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1013 to 1011. [2024-12-02 07:42:26,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 1006 states have (on average 1.374751491053678) internal successors, (1383), 1006 states have internal predecessors, (1383), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:42:26,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1389 transitions. [2024-12-02 07:42:26,163 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1389 transitions. Word has length 275 [2024-12-02 07:42:26,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:26,163 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1389 transitions. [2024-12-02 07:42:26,164 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 52.6) internal successors, (263), 5 states have internal predecessors, (263), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:26,164 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1389 transitions. [2024-12-02 07:42:26,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2024-12-02 07:42:26,164 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:26,165 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:26,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-12-02 07:42:26,165 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:26,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:26,165 INFO L85 PathProgramCache]: Analyzing trace with hash -2134812052, now seen corresponding path program 1 times [2024-12-02 07:42:26,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:26,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484116995] [2024-12-02 07:42:26,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:26,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:26,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:27,255 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:42:27,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:27,255 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484116995] [2024-12-02 07:42:27,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [484116995] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:27,256 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:27,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-12-02 07:42:27,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920893924] [2024-12-02 07:42:27,256 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:27,256 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 07:42:27,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:27,257 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 07:42:27,257 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:42:27,257 INFO L87 Difference]: Start difference. First operand 1011 states and 1389 transitions. Second operand has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:27,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:27,397 INFO L93 Difference]: Finished difference Result 2210 states and 2942 transitions. [2024-12-02 07:42:27,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:42:27,398 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 276 [2024-12-02 07:42:27,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:27,399 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:27,399 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:27,400 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:42:27,400 INFO L435 NwaCegarLoop]: 1225 mSDtfsCounter, 1683 mSDsluCounter, 4888 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1686 SdHoareTripleChecker+Valid, 6113 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:27,401 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1686 Valid, 6113 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:27,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:27,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:27,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3176123802505526) internal successors, (1788), 1357 states have internal predecessors, (1788), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:27,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1800 transitions. [2024-12-02 07:42:27,424 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1800 transitions. Word has length 276 [2024-12-02 07:42:27,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:27,425 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1800 transitions. [2024-12-02 07:42:27,425 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 37.714285714285715) internal successors, (264), 7 states have internal predecessors, (264), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:42:27,425 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1800 transitions. [2024-12-02 07:42:27,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 703 [2024-12-02 07:42:27,428 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:27,428 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:27,429 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-12-02 07:42:27,429 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:27,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:27,429 INFO L85 PathProgramCache]: Analyzing trace with hash -1200623010, now seen corresponding path program 1 times [2024-12-02 07:42:27,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:27,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091560829] [2024-12-02 07:42:27,430 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:27,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:27,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:28,549 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:28,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:28,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091560829] [2024-12-02 07:42:28,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091560829] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:28,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:28,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:28,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089130846] [2024-12-02 07:42:28,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:28,551 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:28,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:28,552 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:28,552 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:28,552 INFO L87 Difference]: Start difference. First operand 1365 states and 1800 transitions. Second operand has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:28,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:28,773 INFO L93 Difference]: Finished difference Result 2210 states and 2941 transitions. [2024-12-02 07:42:28,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:28,774 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 702 [2024-12-02 07:42:28,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:28,775 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:28,775 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:28,776 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:28,777 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2095 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2098 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:28,777 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2098 Valid, 2214 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:28,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:28,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:28,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3168754605747974) internal successors, (1787), 1357 states have internal predecessors, (1787), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:28,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1799 transitions. [2024-12-02 07:42:28,797 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1799 transitions. Word has length 702 [2024-12-02 07:42:28,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:28,797 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1799 transitions. [2024-12-02 07:42:28,797 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.0) internal successors, (675), 5 states have internal predecessors, (675), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:28,797 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1799 transitions. [2024-12-02 07:42:28,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 704 [2024-12-02 07:42:28,801 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:28,801 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:28,801 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-12-02 07:42:28,801 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:28,802 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:28,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1043857648, now seen corresponding path program 1 times [2024-12-02 07:42:28,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:28,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105115151] [2024-12-02 07:42:28,802 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:28,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:29,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:29,728 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:29,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:29,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105115151] [2024-12-02 07:42:29,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105115151] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:29,729 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:29,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:29,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793497841] [2024-12-02 07:42:29,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:29,729 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:29,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:29,730 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:29,730 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:29,730 INFO L87 Difference]: Start difference. First operand 1365 states and 1799 transitions. Second operand has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:29,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:29,903 INFO L93 Difference]: Finished difference Result 2210 states and 2939 transitions. [2024-12-02 07:42:29,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:29,904 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 703 [2024-12-02 07:42:29,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:29,905 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:29,905 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:29,906 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:29,906 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2079 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2082 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:29,906 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2082 Valid, 2214 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:29,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:29,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:29,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.316138540899042) internal successors, (1786), 1357 states have internal predecessors, (1786), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:29,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1798 transitions. [2024-12-02 07:42:29,925 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1798 transitions. Word has length 703 [2024-12-02 07:42:29,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:29,925 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1798 transitions. [2024-12-02 07:42:29,925 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.2) internal successors, (676), 5 states have internal predecessors, (676), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:29,926 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1798 transitions. [2024-12-02 07:42:29,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 705 [2024-12-02 07:42:29,928 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:29,929 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:29,929 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-12-02 07:42:29,929 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:29,929 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:29,929 INFO L85 PathProgramCache]: Analyzing trace with hash 1924280905, now seen corresponding path program 1 times [2024-12-02 07:42:29,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:29,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654239209] [2024-12-02 07:42:29,929 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:29,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:30,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:30,869 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:30,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:30,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654239209] [2024-12-02 07:42:30,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1654239209] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:30,869 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:30,870 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:30,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201522157] [2024-12-02 07:42:30,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:30,870 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:30,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:30,871 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:30,871 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:30,871 INFO L87 Difference]: Start difference. First operand 1365 states and 1798 transitions. Second operand has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:31,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:31,057 INFO L93 Difference]: Finished difference Result 2210 states and 2937 transitions. [2024-12-02 07:42:31,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:31,057 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 704 [2024-12-02 07:42:31,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:31,058 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:31,058 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:31,059 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:31,059 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2063 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 258 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2066 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 258 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:31,059 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2066 Valid, 2214 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 258 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:31,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:31,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:31,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3154016212232866) internal successors, (1785), 1357 states have internal predecessors, (1785), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:31,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1797 transitions. [2024-12-02 07:42:31,077 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1797 transitions. Word has length 704 [2024-12-02 07:42:31,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:31,077 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1797 transitions. [2024-12-02 07:42:31,077 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.4) internal successors, (677), 5 states have internal predecessors, (677), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:31,078 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1797 transitions. [2024-12-02 07:42:31,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 706 [2024-12-02 07:42:31,080 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:31,081 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:31,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-12-02 07:42:31,081 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:31,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:31,081 INFO L85 PathProgramCache]: Analyzing trace with hash -1402931717, now seen corresponding path program 1 times [2024-12-02 07:42:31,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:31,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803836621] [2024-12-02 07:42:31,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:31,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:31,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:32,011 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:32,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:32,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803836621] [2024-12-02 07:42:32,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803836621] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:32,011 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:32,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:32,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28202805] [2024-12-02 07:42:32,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:32,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:32,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:32,012 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:32,012 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:32,012 INFO L87 Difference]: Start difference. First operand 1365 states and 1797 transitions. Second operand has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:32,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:32,195 INFO L93 Difference]: Finished difference Result 2210 states and 2935 transitions. [2024-12-02 07:42:32,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:32,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 705 [2024-12-02 07:42:32,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:32,197 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:32,197 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:32,197 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:32,197 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1116 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1119 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:32,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1119 Valid, 2221 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:32,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:32,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:32,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3146647015475312) internal successors, (1784), 1357 states have internal predecessors, (1784), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:32,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1796 transitions. [2024-12-02 07:42:32,215 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1796 transitions. Word has length 705 [2024-12-02 07:42:32,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:32,216 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1796 transitions. [2024-12-02 07:42:32,216 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.6) internal successors, (678), 5 states have internal predecessors, (678), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:32,216 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1796 transitions. [2024-12-02 07:42:32,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 707 [2024-12-02 07:42:32,219 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:32,219 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:32,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-12-02 07:42:32,219 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:32,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:32,219 INFO L85 PathProgramCache]: Analyzing trace with hash 1947860660, now seen corresponding path program 1 times [2024-12-02 07:42:32,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:32,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636657500] [2024-12-02 07:42:32,220 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:32,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:32,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:33,327 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:33,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:33,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [636657500] [2024-12-02 07:42:33,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [636657500] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:33,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:33,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:33,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [604164750] [2024-12-02 07:42:33,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:33,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:33,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:33,330 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:33,330 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:33,330 INFO L87 Difference]: Start difference. First operand 1365 states and 1796 transitions. Second operand has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:33,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:33,530 INFO L93 Difference]: Finished difference Result 2210 states and 2933 transitions. [2024-12-02 07:42:33,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:33,530 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 706 [2024-12-02 07:42:33,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:33,532 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:33,532 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:33,533 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:33,533 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2031 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2034 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:33,533 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2034 Valid, 2214 Invalid, 255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:33,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:33,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:33,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.313927781871776) internal successors, (1783), 1357 states have internal predecessors, (1783), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:33,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1795 transitions. [2024-12-02 07:42:33,561 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1795 transitions. Word has length 706 [2024-12-02 07:42:33,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:33,561 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1795 transitions. [2024-12-02 07:42:33,561 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 135.8) internal successors, (679), 5 states have internal predecessors, (679), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:33,561 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1795 transitions. [2024-12-02 07:42:33,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-12-02 07:42:33,567 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:33,568 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:33,568 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-12-02 07:42:33,568 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:33,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:33,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1244405638, now seen corresponding path program 1 times [2024-12-02 07:42:33,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:33,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095859427] [2024-12-02 07:42:33,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:33,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:33,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:34,549 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:34,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:34,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095859427] [2024-12-02 07:42:34,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095859427] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:34,549 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:34,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:34,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433691800] [2024-12-02 07:42:34,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:34,550 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:34,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:34,551 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:34,551 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:34,551 INFO L87 Difference]: Start difference. First operand 1365 states and 1795 transitions. Second operand has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:34,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:34,745 INFO L93 Difference]: Finished difference Result 2210 states and 2931 transitions. [2024-12-02 07:42:34,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:34,746 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 707 [2024-12-02 07:42:34,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:34,747 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:34,747 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:34,748 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:34,748 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1100 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1103 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 253 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:34,748 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1103 Valid, 2221 Invalid, 253 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:34,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:34,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:34,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3131908621960207) internal successors, (1782), 1357 states have internal predecessors, (1782), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:34,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1794 transitions. [2024-12-02 07:42:34,764 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1794 transitions. Word has length 707 [2024-12-02 07:42:34,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:34,764 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1794 transitions. [2024-12-02 07:42:34,764 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.0) internal successors, (680), 5 states have internal predecessors, (680), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:34,764 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1794 transitions. [2024-12-02 07:42:34,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-12-02 07:42:34,767 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:34,767 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:34,767 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-12-02 07:42:34,768 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:34,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:34,768 INFO L85 PathProgramCache]: Analyzing trace with hash -520808545, now seen corresponding path program 1 times [2024-12-02 07:42:34,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:34,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338848643] [2024-12-02 07:42:34,768 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:34,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:35,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:35,699 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:35,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:35,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338848643] [2024-12-02 07:42:35,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [338848643] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:35,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:35,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:35,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471567079] [2024-12-02 07:42:35,699 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:35,700 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:35,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:35,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:35,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:35,700 INFO L87 Difference]: Start difference. First operand 1365 states and 1794 transitions. Second operand has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:35,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:35,884 INFO L93 Difference]: Finished difference Result 2210 states and 2929 transitions. [2024-12-02 07:42:35,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:35,885 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 708 [2024-12-02 07:42:35,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:35,886 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:35,886 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:35,887 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:35,887 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1092 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1095 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:35,887 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1095 Valid, 2221 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:35,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:35,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:35,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3124539425202653) internal successors, (1781), 1357 states have internal predecessors, (1781), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:35,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1793 transitions. [2024-12-02 07:42:35,904 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1793 transitions. Word has length 708 [2024-12-02 07:42:35,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:35,904 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1793 transitions. [2024-12-02 07:42:35,904 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.2) internal successors, (681), 5 states have internal predecessors, (681), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:35,904 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1793 transitions. [2024-12-02 07:42:35,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 710 [2024-12-02 07:42:35,907 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:35,907 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:35,907 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-12-02 07:42:35,907 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:35,907 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:35,908 INFO L85 PathProgramCache]: Analyzing trace with hash -804962927, now seen corresponding path program 1 times [2024-12-02 07:42:35,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:35,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496937982] [2024-12-02 07:42:35,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:35,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:36,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:36,858 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:36,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:36,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496937982] [2024-12-02 07:42:36,858 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [496937982] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:36,858 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:36,858 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:36,858 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040577397] [2024-12-02 07:42:36,858 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:36,859 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:36,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:36,860 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:36,860 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:36,860 INFO L87 Difference]: Start difference. First operand 1365 states and 1793 transitions. Second operand has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:37,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:37,047 INFO L93 Difference]: Finished difference Result 2210 states and 2927 transitions. [2024-12-02 07:42:37,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:37,047 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 709 [2024-12-02 07:42:37,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:37,049 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:37,049 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:37,049 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:37,050 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1983 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 248 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1986 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 248 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:37,050 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1986 Valid, 2214 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 248 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:37,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:37,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:37,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3117170228445099) internal successors, (1780), 1357 states have internal predecessors, (1780), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:37,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1792 transitions. [2024-12-02 07:42:37,068 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1792 transitions. Word has length 709 [2024-12-02 07:42:37,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:37,069 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1792 transitions. [2024-12-02 07:42:37,069 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.4) internal successors, (682), 5 states have internal predecessors, (682), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:37,069 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1792 transitions. [2024-12-02 07:42:37,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 711 [2024-12-02 07:42:37,071 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:37,072 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:37,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-12-02 07:42:37,072 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:37,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:37,072 INFO L85 PathProgramCache]: Analyzing trace with hash 544292106, now seen corresponding path program 1 times [2024-12-02 07:42:37,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:37,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382152044] [2024-12-02 07:42:37,072 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:37,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:37,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:38,108 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:38,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:38,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382152044] [2024-12-02 07:42:38,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382152044] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:38,109 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:38,109 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:38,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276571387] [2024-12-02 07:42:38,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:38,110 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:38,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:38,111 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:38,111 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:38,111 INFO L87 Difference]: Start difference. First operand 1365 states and 1792 transitions. Second operand has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:38,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:38,295 INFO L93 Difference]: Finished difference Result 2210 states and 2925 transitions. [2024-12-02 07:42:38,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:38,296 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 710 [2024-12-02 07:42:38,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:38,297 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:38,297 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:38,298 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:38,298 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1967 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1970 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:38,298 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1970 Valid, 2214 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:38,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:38,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:38,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3109801031687547) internal successors, (1779), 1357 states have internal predecessors, (1779), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:38,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1791 transitions. [2024-12-02 07:42:38,315 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1791 transitions. Word has length 710 [2024-12-02 07:42:38,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:38,316 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1791 transitions. [2024-12-02 07:42:38,316 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.6) internal successors, (683), 5 states have internal predecessors, (683), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:38,316 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1791 transitions. [2024-12-02 07:42:38,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 712 [2024-12-02 07:42:38,321 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:38,321 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:38,321 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-12-02 07:42:38,322 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:38,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:38,322 INFO L85 PathProgramCache]: Analyzing trace with hash 1706561564, now seen corresponding path program 1 times [2024-12-02 07:42:38,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:38,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593539915] [2024-12-02 07:42:38,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:38,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:38,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:39,241 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:39,241 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:39,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593539915] [2024-12-02 07:42:39,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593539915] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:39,241 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:39,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:39,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736673953] [2024-12-02 07:42:39,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:39,242 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:39,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:39,243 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:39,243 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:39,243 INFO L87 Difference]: Start difference. First operand 1365 states and 1791 transitions. Second operand has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:39,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:39,410 INFO L93 Difference]: Finished difference Result 2210 states and 2923 transitions. [2024-12-02 07:42:39,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:39,411 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 711 [2024-12-02 07:42:39,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:39,412 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:39,412 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:39,413 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:39,413 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1951 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1954 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 245 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:39,413 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1954 Valid, 2214 Invalid, 245 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:39,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:39,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:39,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3102431834929993) internal successors, (1778), 1357 states have internal predecessors, (1778), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:39,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1790 transitions. [2024-12-02 07:42:39,429 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1790 transitions. Word has length 711 [2024-12-02 07:42:39,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:39,429 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1790 transitions. [2024-12-02 07:42:39,429 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 136.8) internal successors, (684), 5 states have internal predecessors, (684), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:39,429 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1790 transitions. [2024-12-02 07:42:39,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 713 [2024-12-02 07:42:39,432 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:39,432 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:39,432 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-12-02 07:42:39,433 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:39,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:39,433 INFO L85 PathProgramCache]: Analyzing trace with hash 479997685, now seen corresponding path program 1 times [2024-12-02 07:42:39,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:39,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818650127] [2024-12-02 07:42:39,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:39,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:39,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:40,376 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:40,376 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:40,376 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818650127] [2024-12-02 07:42:40,376 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1818650127] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:40,376 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:40,376 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:40,376 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705017252] [2024-12-02 07:42:40,376 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:40,377 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:40,377 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:40,378 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:40,378 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:40,378 INFO L87 Difference]: Start difference. First operand 1365 states and 1790 transitions. Second operand has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:40,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:40,572 INFO L93 Difference]: Finished difference Result 2210 states and 2921 transitions. [2024-12-02 07:42:40,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:40,572 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 712 [2024-12-02 07:42:40,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:40,574 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:40,574 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:40,574 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:40,574 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1935 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1938 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:40,575 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1938 Valid, 2214 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:40,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:40,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:40,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3095062638172439) internal successors, (1777), 1357 states have internal predecessors, (1777), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:40,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1789 transitions. [2024-12-02 07:42:40,590 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1789 transitions. Word has length 712 [2024-12-02 07:42:40,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:40,590 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1789 transitions. [2024-12-02 07:42:40,591 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.0) internal successors, (685), 5 states have internal predecessors, (685), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:40,591 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1789 transitions. [2024-12-02 07:42:40,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 714 [2024-12-02 07:42:40,594 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:40,594 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:40,594 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-12-02 07:42:40,594 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:40,594 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:40,594 INFO L85 PathProgramCache]: Analyzing trace with hash -1032825049, now seen corresponding path program 1 times [2024-12-02 07:42:40,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:40,594 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855174406] [2024-12-02 07:42:40,595 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:40,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:40,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:41,544 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:41,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:41,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855174406] [2024-12-02 07:42:41,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855174406] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:41,545 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:41,545 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:41,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764668866] [2024-12-02 07:42:41,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:41,545 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:41,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:41,545 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:41,546 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:41,546 INFO L87 Difference]: Start difference. First operand 1365 states and 1789 transitions. Second operand has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:41,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:41,737 INFO L93 Difference]: Finished difference Result 2210 states and 2919 transitions. [2024-12-02 07:42:41,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:41,738 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 713 [2024-12-02 07:42:41,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:41,739 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:41,739 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:41,739 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:41,740 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1919 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1922 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:41,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1922 Valid, 2214 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:41,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:41,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:41,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3087693441414885) internal successors, (1776), 1357 states have internal predecessors, (1776), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:41,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1788 transitions. [2024-12-02 07:42:41,755 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1788 transitions. Word has length 713 [2024-12-02 07:42:41,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:41,755 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1788 transitions. [2024-12-02 07:42:41,755 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.2) internal successors, (686), 5 states have internal predecessors, (686), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:41,755 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1788 transitions. [2024-12-02 07:42:41,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-12-02 07:42:41,758 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:41,758 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:41,759 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-12-02 07:42:41,759 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:41,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:41,759 INFO L85 PathProgramCache]: Analyzing trace with hash -2107396768, now seen corresponding path program 1 times [2024-12-02 07:42:41,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:41,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656555257] [2024-12-02 07:42:41,759 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:41,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:42,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:42,887 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:42,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:42,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656555257] [2024-12-02 07:42:42,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656555257] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:42,888 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:42,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:42,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350159488] [2024-12-02 07:42:42,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:42,889 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:42,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:42,890 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:42,890 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:42,890 INFO L87 Difference]: Start difference. First operand 1365 states and 1788 transitions. Second operand has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:43,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:43,102 INFO L93 Difference]: Finished difference Result 2210 states and 2917 transitions. [2024-12-02 07:42:43,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:43,103 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 714 [2024-12-02 07:42:43,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:43,104 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:43,104 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:43,105 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:43,105 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1903 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1906 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:43,105 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1906 Valid, 2214 Invalid, 239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:43,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:43,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:43,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3080324244657333) internal successors, (1775), 1357 states have internal predecessors, (1775), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:43,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1787 transitions. [2024-12-02 07:42:43,133 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1787 transitions. Word has length 714 [2024-12-02 07:42:43,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:43,133 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1787 transitions. [2024-12-02 07:42:43,133 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.4) internal successors, (687), 5 states have internal predecessors, (687), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:43,133 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1787 transitions. [2024-12-02 07:42:43,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-12-02 07:42:43,140 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:43,140 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:43,140 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-12-02 07:42:43,140 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:43,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:43,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1287246514, now seen corresponding path program 1 times [2024-12-02 07:42:43,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:43,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651828017] [2024-12-02 07:42:43,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:43,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:43,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:44,256 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:44,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:44,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651828017] [2024-12-02 07:42:44,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651828017] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:44,256 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:44,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:44,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44948551] [2024-12-02 07:42:44,256 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:44,257 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:44,257 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:44,258 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:44,258 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:44,258 INFO L87 Difference]: Start difference. First operand 1365 states and 1787 transitions. Second operand has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:44,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:44,439 INFO L93 Difference]: Finished difference Result 2210 states and 2915 transitions. [2024-12-02 07:42:44,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:44,439 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 715 [2024-12-02 07:42:44,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:44,441 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:44,441 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:44,441 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:44,441 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1036 mSDsluCounter, 1115 mSDsCounter, 0 mSdLazyCounter, 236 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1039 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 237 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 236 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:44,441 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1039 Valid, 2221 Invalid, 237 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 236 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:44,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:44,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:44,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.307295504789978) internal successors, (1774), 1357 states have internal predecessors, (1774), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:44,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1786 transitions. [2024-12-02 07:42:44,458 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1786 transitions. Word has length 715 [2024-12-02 07:42:44,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:44,458 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1786 transitions. [2024-12-02 07:42:44,458 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.6) internal successors, (688), 5 states have internal predecessors, (688), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:44,458 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1786 transitions. [2024-12-02 07:42:44,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 717 [2024-12-02 07:42:44,461 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:44,461 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:44,461 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77 [2024-12-02 07:42:44,462 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:44,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:44,462 INFO L85 PathProgramCache]: Analyzing trace with hash 26572875, now seen corresponding path program 1 times [2024-12-02 07:42:44,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:44,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27303869] [2024-12-02 07:42:44,462 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:44,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:44,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:45,402 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:45,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:45,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27303869] [2024-12-02 07:42:45,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27303869] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:45,402 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:45,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:45,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182070982] [2024-12-02 07:42:45,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:45,403 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:45,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:45,404 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:45,404 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:45,404 INFO L87 Difference]: Start difference. First operand 1365 states and 1786 transitions. Second operand has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:45,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:45,570 INFO L93 Difference]: Finished difference Result 2210 states and 2913 transitions. [2024-12-02 07:42:45,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:45,571 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 716 [2024-12-02 07:42:45,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:45,572 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:45,572 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:45,573 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:45,573 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1871 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 234 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1874 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 235 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 234 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:45,573 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1874 Valid, 2214 Invalid, 235 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 234 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:45,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:45,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:45,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3065585851142225) internal successors, (1773), 1357 states have internal predecessors, (1773), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:45,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1785 transitions. [2024-12-02 07:42:45,597 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1785 transitions. Word has length 716 [2024-12-02 07:42:45,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:45,597 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1785 transitions. [2024-12-02 07:42:45,598 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 137.8) internal successors, (689), 5 states have internal predecessors, (689), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:45,598 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1785 transitions. [2024-12-02 07:42:45,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 718 [2024-12-02 07:42:45,603 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:45,603 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:45,603 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78 [2024-12-02 07:42:45,603 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:45,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:45,604 INFO L85 PathProgramCache]: Analyzing trace with hash 981484221, now seen corresponding path program 1 times [2024-12-02 07:42:45,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:45,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413979140] [2024-12-02 07:42:45,604 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:45,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:45,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:46,592 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:46,592 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:46,592 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413979140] [2024-12-02 07:42:46,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413979140] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:46,592 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:46,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:46,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476243730] [2024-12-02 07:42:46,593 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:46,593 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:46,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:46,594 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:46,594 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:46,594 INFO L87 Difference]: Start difference. First operand 1365 states and 1785 transitions. Second operand has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:46,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:46,797 INFO L93 Difference]: Finished difference Result 2210 states and 2911 transitions. [2024-12-02 07:42:46,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:46,798 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 717 [2024-12-02 07:42:46,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:46,799 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:46,799 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:46,800 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:46,800 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 1855 mSDsluCounter, 1108 mSDsCounter, 0 mSdLazyCounter, 232 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1858 SdHoareTripleChecker+Valid, 2214 SdHoareTripleChecker+Invalid, 233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 232 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:46,800 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1858 Valid, 2214 Invalid, 233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 232 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:42:46,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:46,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:46,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3058216654384671) internal successors, (1772), 1357 states have internal predecessors, (1772), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:46,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1784 transitions. [2024-12-02 07:42:46,816 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1784 transitions. Word has length 717 [2024-12-02 07:42:46,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:46,816 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1784 transitions. [2024-12-02 07:42:46,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.0) internal successors, (690), 5 states have internal predecessors, (690), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:46,816 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1784 transitions. [2024-12-02 07:42:46,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 719 [2024-12-02 07:42:46,819 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:46,820 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:46,820 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-12-02 07:42:46,820 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:46,820 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:46,820 INFO L85 PathProgramCache]: Analyzing trace with hash -1931522122, now seen corresponding path program 1 times [2024-12-02 07:42:46,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:46,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246783670] [2024-12-02 07:42:46,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:46,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:47,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:47,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:47,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246783670] [2024-12-02 07:42:47,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1246783670] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:47,841 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:47,841 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:47,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597755885] [2024-12-02 07:42:47,842 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:47,842 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:47,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:47,842 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:47,842 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:47,843 INFO L87 Difference]: Start difference. First operand 1365 states and 1784 transitions. Second operand has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:47,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:47,956 INFO L93 Difference]: Finished difference Result 2210 states and 2909 transitions. [2024-12-02 07:42:47,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:47,957 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 718 [2024-12-02 07:42:47,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:47,958 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:47,958 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:47,958 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:47,958 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1808 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1811 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:47,959 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1811 Valid, 2310 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:47,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:47,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:47,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.305084745762712) internal successors, (1771), 1357 states have internal predecessors, (1771), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:47,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1783 transitions. [2024-12-02 07:42:47,973 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1783 transitions. Word has length 718 [2024-12-02 07:42:47,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:47,974 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1783 transitions. [2024-12-02 07:42:47,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.2) internal successors, (691), 5 states have internal predecessors, (691), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:47,974 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1783 transitions. [2024-12-02 07:42:47,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 720 [2024-12-02 07:42:47,976 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:47,977 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:47,977 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-12-02 07:42:47,977 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:47,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:47,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1324390584, now seen corresponding path program 1 times [2024-12-02 07:42:47,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:47,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646733676] [2024-12-02 07:42:47,977 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:47,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:48,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:48,967 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:48,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:48,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646733676] [2024-12-02 07:42:48,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646733676] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:48,967 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:48,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:48,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424144387] [2024-12-02 07:42:48,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:48,968 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:48,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:48,969 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:48,969 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:48,969 INFO L87 Difference]: Start difference. First operand 1365 states and 1783 transitions. Second operand has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:49,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:49,083 INFO L93 Difference]: Finished difference Result 2210 states and 2907 transitions. [2024-12-02 07:42:49,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:49,084 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 719 [2024-12-02 07:42:49,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:49,085 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:49,085 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:49,086 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:49,086 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1792 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1795 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:49,086 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1795 Valid, 2310 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:49,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:49,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:49,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3043478260869565) internal successors, (1770), 1357 states have internal predecessors, (1770), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:49,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1782 transitions. [2024-12-02 07:42:49,101 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1782 transitions. Word has length 719 [2024-12-02 07:42:49,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:49,101 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1782 transitions. [2024-12-02 07:42:49,101 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.4) internal successors, (692), 5 states have internal predecessors, (692), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:49,101 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1782 transitions. [2024-12-02 07:42:49,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 721 [2024-12-02 07:42:49,104 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:49,104 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:49,104 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-12-02 07:42:49,104 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:49,105 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:49,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1714490463, now seen corresponding path program 1 times [2024-12-02 07:42:49,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:49,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151003662] [2024-12-02 07:42:49,105 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:49,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:50,117 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:50,117 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:50,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151003662] [2024-12-02 07:42:50,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1151003662] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:50,117 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:50,117 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:50,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1748301222] [2024-12-02 07:42:50,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:50,118 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:50,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:50,119 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:50,119 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:50,119 INFO L87 Difference]: Start difference. First operand 1365 states and 1782 transitions. Second operand has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:50,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:50,233 INFO L93 Difference]: Finished difference Result 2210 states and 2905 transitions. [2024-12-02 07:42:50,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:50,233 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 720 [2024-12-02 07:42:50,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:50,234 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:50,235 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:50,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:50,235 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1776 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1779 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:50,236 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1779 Valid, 2310 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:50,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:50,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:50,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3036109064112011) internal successors, (1769), 1357 states have internal predecessors, (1769), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:50,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1781 transitions. [2024-12-02 07:42:50,250 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1781 transitions. Word has length 720 [2024-12-02 07:42:50,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:50,251 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1781 transitions. [2024-12-02 07:42:50,251 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.6) internal successors, (693), 5 states have internal predecessors, (693), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:50,251 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1781 transitions. [2024-12-02 07:42:50,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 722 [2024-12-02 07:42:50,254 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:50,254 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:50,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-12-02 07:42:50,254 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:50,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:50,255 INFO L85 PathProgramCache]: Analyzing trace with hash -451739565, now seen corresponding path program 1 times [2024-12-02 07:42:50,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:50,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449978657] [2024-12-02 07:42:50,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:50,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:50,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:51,387 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:51,387 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:51,387 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449978657] [2024-12-02 07:42:51,387 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449978657] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:51,387 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:51,387 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:51,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215763350] [2024-12-02 07:42:51,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:51,388 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:51,388 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:51,388 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:51,388 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:51,388 INFO L87 Difference]: Start difference. First operand 1365 states and 1781 transitions. Second operand has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:51,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:51,479 INFO L93 Difference]: Finished difference Result 2210 states and 2903 transitions. [2024-12-02 07:42:51,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:51,479 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 721 [2024-12-02 07:42:51,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:51,480 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:51,480 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:51,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:51,481 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1760 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1763 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:51,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1763 Valid, 2310 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:51,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:51,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:51,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3028739867354457) internal successors, (1768), 1357 states have internal predecessors, (1768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:51,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1780 transitions. [2024-12-02 07:42:51,496 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1780 transitions. Word has length 721 [2024-12-02 07:42:51,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:51,496 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1780 transitions. [2024-12-02 07:42:51,496 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 138.8) internal successors, (694), 5 states have internal predecessors, (694), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:51,496 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1780 transitions. [2024-12-02 07:42:51,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 723 [2024-12-02 07:42:51,524 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:51,524 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:51,524 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-12-02 07:42:51,525 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:51,526 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:51,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1624384524, now seen corresponding path program 1 times [2024-12-02 07:42:51,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:51,526 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104259762] [2024-12-02 07:42:51,526 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:51,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:51,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:52,522 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:52,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:52,523 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104259762] [2024-12-02 07:42:52,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104259762] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:52,523 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:52,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:52,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857449915] [2024-12-02 07:42:52,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:52,523 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:52,523 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:52,524 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:52,524 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:52,524 INFO L87 Difference]: Start difference. First operand 1365 states and 1780 transitions. Second operand has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:52,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:52,650 INFO L93 Difference]: Finished difference Result 2210 states and 2901 transitions. [2024-12-02 07:42:52,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:52,650 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 722 [2024-12-02 07:42:52,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:52,651 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:52,651 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:52,652 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:52,652 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1744 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1747 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:52,652 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1747 Valid, 2310 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:52,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:52,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:52,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3021370670596906) internal successors, (1767), 1357 states have internal predecessors, (1767), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:52,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1779 transitions. [2024-12-02 07:42:52,667 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1779 transitions. Word has length 722 [2024-12-02 07:42:52,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:52,667 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1779 transitions. [2024-12-02 07:42:52,668 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.0) internal successors, (695), 5 states have internal predecessors, (695), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:52,668 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1779 transitions. [2024-12-02 07:42:52,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-12-02 07:42:52,670 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:52,671 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:52,671 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-12-02 07:42:52,671 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:52,671 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:52,671 INFO L85 PathProgramCache]: Analyzing trace with hash 982961630, now seen corresponding path program 1 times [2024-12-02 07:42:52,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:52,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013192836] [2024-12-02 07:42:52,671 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:52,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:53,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:53,690 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:53,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:53,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013192836] [2024-12-02 07:42:53,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1013192836] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:53,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:53,691 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:53,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112690582] [2024-12-02 07:42:53,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:53,692 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:53,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:53,693 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:53,693 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:53,693 INFO L87 Difference]: Start difference. First operand 1365 states and 1779 transitions. Second operand has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:53,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:53,801 INFO L93 Difference]: Finished difference Result 2210 states and 2899 transitions. [2024-12-02 07:42:53,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:53,801 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 723 [2024-12-02 07:42:53,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:53,803 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:53,803 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:53,803 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:53,803 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1728 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1731 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:53,804 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1731 Valid, 2310 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:53,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:53,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:53,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3014001473839352) internal successors, (1766), 1357 states have internal predecessors, (1766), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:53,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1778 transitions. [2024-12-02 07:42:53,819 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1778 transitions. Word has length 723 [2024-12-02 07:42:53,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:53,819 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1778 transitions. [2024-12-02 07:42:53,819 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.2) internal successors, (696), 5 states have internal predecessors, (696), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:53,819 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1778 transitions. [2024-12-02 07:42:53,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 725 [2024-12-02 07:42:53,823 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:53,823 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:53,823 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-12-02 07:42:53,823 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:53,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:53,823 INFO L85 PathProgramCache]: Analyzing trace with hash 490119415, now seen corresponding path program 1 times [2024-12-02 07:42:53,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:53,823 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651607885] [2024-12-02 07:42:53,823 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:53,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:54,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:54,873 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:54,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:54,873 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651607885] [2024-12-02 07:42:54,873 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1651607885] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:54,873 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:54,873 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:54,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424481927] [2024-12-02 07:42:54,873 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:54,874 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:54,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:54,875 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:54,875 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:54,875 INFO L87 Difference]: Start difference. First operand 1365 states and 1778 transitions. Second operand has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:54,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:54,999 INFO L93 Difference]: Finished difference Result 2210 states and 2897 transitions. [2024-12-02 07:42:54,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:55,000 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 724 [2024-12-02 07:42:55,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:55,001 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:55,002 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:55,002 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:55,003 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 1712 mSDsluCounter, 1156 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1715 SdHoareTripleChecker+Valid, 2310 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:55,003 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1715 Valid, 2310 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:55,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:55,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:55,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.3006632277081798) internal successors, (1765), 1357 states have internal predecessors, (1765), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:55,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1777 transitions. [2024-12-02 07:42:55,031 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1777 transitions. Word has length 724 [2024-12-02 07:42:55,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:55,031 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1777 transitions. [2024-12-02 07:42:55,031 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.4) internal successors, (697), 5 states have internal predecessors, (697), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:55,031 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1777 transitions. [2024-12-02 07:42:55,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-12-02 07:42:55,038 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:55,038 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:55,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-12-02 07:42:55,039 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:55,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:55,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1694928873, now seen corresponding path program 1 times [2024-12-02 07:42:55,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:55,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153018132] [2024-12-02 07:42:55,039 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:55,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:55,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:56,271 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:56,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:56,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153018132] [2024-12-02 07:42:56,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [153018132] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:56,272 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:56,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:56,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [515135915] [2024-12-02 07:42:56,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:56,273 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:56,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:56,274 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:56,274 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:56,274 INFO L87 Difference]: Start difference. First operand 1365 states and 1777 transitions. Second operand has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:56,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:56,389 INFO L93 Difference]: Finished difference Result 2210 states and 2895 transitions. [2024-12-02 07:42:56,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:56,390 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 725 [2024-12-02 07:42:56,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:56,391 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:56,391 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:56,392 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:56,392 INFO L435 NwaCegarLoop]: 1154 mSDtfsCounter, 925 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 928 SdHoareTripleChecker+Valid, 2317 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:56,392 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [928 Valid, 2317 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:56,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:56,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:56,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2999263080324244) internal successors, (1764), 1357 states have internal predecessors, (1764), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:56,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1776 transitions. [2024-12-02 07:42:56,407 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1776 transitions. Word has length 725 [2024-12-02 07:42:56,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:56,407 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1776 transitions. [2024-12-02 07:42:56,407 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.6) internal successors, (698), 5 states have internal predecessors, (698), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:56,407 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1776 transitions. [2024-12-02 07:42:56,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 727 [2024-12-02 07:42:56,410 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:56,410 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:56,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-12-02 07:42:56,410 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:56,411 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:56,411 INFO L85 PathProgramCache]: Analyzing trace with hash 1294608994, now seen corresponding path program 1 times [2024-12-02 07:42:56,411 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:56,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389533722] [2024-12-02 07:42:56,411 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:56,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:56,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:57,439 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:57,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:57,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389533722] [2024-12-02 07:42:57,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1389533722] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:57,440 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:57,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:57,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216995253] [2024-12-02 07:42:57,440 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:57,440 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:57,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:57,440 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:57,440 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:57,441 INFO L87 Difference]: Start difference. First operand 1365 states and 1776 transitions. Second operand has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:57,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:57,518 INFO L93 Difference]: Finished difference Result 2210 states and 2893 transitions. [2024-12-02 07:42:57,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:57,519 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 726 [2024-12-02 07:42:57,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:57,520 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:57,520 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:57,521 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:57,521 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 902 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 905 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:57,521 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [905 Valid, 2365 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:57,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:57,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:57,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2991893883566692) internal successors, (1763), 1357 states have internal predecessors, (1763), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:57,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1775 transitions. [2024-12-02 07:42:57,536 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1775 transitions. Word has length 726 [2024-12-02 07:42:57,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:57,537 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1775 transitions. [2024-12-02 07:42:57,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 139.8) internal successors, (699), 5 states have internal predecessors, (699), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:57,537 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1775 transitions. [2024-12-02 07:42:57,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 728 [2024-12-02 07:42:57,540 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:57,540 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:57,540 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88 [2024-12-02 07:42:57,540 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:57,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:57,540 INFO L85 PathProgramCache]: Analyzing trace with hash -2027026828, now seen corresponding path program 1 times [2024-12-02 07:42:57,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:57,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235214796] [2024-12-02 07:42:57,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:57,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:57,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:58,544 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:58,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:58,544 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235214796] [2024-12-02 07:42:58,544 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235214796] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:58,544 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:58,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:58,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676810802] [2024-12-02 07:42:58,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:58,545 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:58,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:58,545 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:58,545 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:58,545 INFO L87 Difference]: Start difference. First operand 1365 states and 1775 transitions. Second operand has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:58,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:58,613 INFO L93 Difference]: Finished difference Result 2210 states and 2891 transitions. [2024-12-02 07:42:58,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:58,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 727 [2024-12-02 07:42:58,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:58,615 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:58,615 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:58,616 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:58,616 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1649 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1652 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:58,616 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1652 Valid, 2358 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:42:58,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:58,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:58,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2984524686809138) internal successors, (1762), 1357 states have internal predecessors, (1762), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:58,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1774 transitions. [2024-12-02 07:42:58,631 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1774 transitions. Word has length 727 [2024-12-02 07:42:58,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:58,631 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1774 transitions. [2024-12-02 07:42:58,631 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.0) internal successors, (700), 5 states have internal predecessors, (700), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:58,631 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1774 transitions. [2024-12-02 07:42:58,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 729 [2024-12-02 07:42:58,634 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:58,634 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:58,634 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-12-02 07:42:58,634 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:58,635 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:58,635 INFO L85 PathProgramCache]: Analyzing trace with hash -239435699, now seen corresponding path program 1 times [2024-12-02 07:42:58,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:58,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787566742] [2024-12-02 07:42:58,635 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:58,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:42:59,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:42:59,674 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:42:59,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:42:59,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787566742] [2024-12-02 07:42:59,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787566742] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:42:59,675 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:42:59,675 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:42:59,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610903423] [2024-12-02 07:42:59,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:42:59,675 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:42:59,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:42:59,675 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:42:59,675 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:42:59,676 INFO L87 Difference]: Start difference. First operand 1365 states and 1774 transitions. Second operand has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:59,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:42:59,758 INFO L93 Difference]: Finished difference Result 2210 states and 2889 transitions. [2024-12-02 07:42:59,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:42:59,759 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 728 [2024-12-02 07:42:59,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:42:59,760 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:42:59,760 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:42:59,761 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:42:59,761 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 886 mSDsluCounter, 1187 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 889 SdHoareTripleChecker+Valid, 2365 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:42:59,761 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [889 Valid, 2365 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:42:59,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:42:59,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:42:59,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2977155490051584) internal successors, (1761), 1357 states have internal predecessors, (1761), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:42:59,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1773 transitions. [2024-12-02 07:42:59,776 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1773 transitions. Word has length 728 [2024-12-02 07:42:59,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:42:59,776 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1773 transitions. [2024-12-02 07:42:59,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.2) internal successors, (701), 5 states have internal predecessors, (701), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:42:59,776 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1773 transitions. [2024-12-02 07:42:59,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 730 [2024-12-02 07:42:59,779 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:42:59,779 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:42:59,779 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90 [2024-12-02 07:42:59,779 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:42:59,780 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:42:59,780 INFO L85 PathProgramCache]: Analyzing trace with hash 1396240767, now seen corresponding path program 1 times [2024-12-02 07:42:59,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:42:59,780 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301658343] [2024-12-02 07:42:59,780 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:42:59,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:00,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:00,813 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:00,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:00,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301658343] [2024-12-02 07:43:00,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301658343] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:00,813 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:00,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:00,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785135195] [2024-12-02 07:43:00,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:00,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:00,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:00,815 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:00,815 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:00,815 INFO L87 Difference]: Start difference. First operand 1365 states and 1773 transitions. Second operand has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:00,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:00,894 INFO L93 Difference]: Finished difference Result 2210 states and 2887 transitions. [2024-12-02 07:43:00,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:00,895 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 729 [2024-12-02 07:43:00,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:00,896 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:00,896 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:00,896 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:00,897 INFO L435 NwaCegarLoop]: 1178 mSDtfsCounter, 1617 mSDsluCounter, 1180 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1620 SdHoareTripleChecker+Valid, 2358 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:00,897 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1620 Valid, 2358 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:00,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:00,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:00,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.296978629329403) internal successors, (1760), 1357 states have internal predecessors, (1760), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:00,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1772 transitions. [2024-12-02 07:43:00,911 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1772 transitions. Word has length 729 [2024-12-02 07:43:00,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:00,911 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1772 transitions. [2024-12-02 07:43:00,912 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.4) internal successors, (702), 5 states have internal predecessors, (702), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:00,912 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1772 transitions. [2024-12-02 07:43:00,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 731 [2024-12-02 07:43:00,914 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:00,915 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:00,915 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-12-02 07:43:00,915 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:00,915 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:00,915 INFO L85 PathProgramCache]: Analyzing trace with hash -824876360, now seen corresponding path program 1 times [2024-12-02 07:43:00,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:00,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608052437] [2024-12-02 07:43:00,915 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:00,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:01,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:02,043 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:02,043 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:02,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608052437] [2024-12-02 07:43:02,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608052437] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:02,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:02,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:02,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603889628] [2024-12-02 07:43:02,044 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:02,045 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:02,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:02,045 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:02,045 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:02,045 INFO L87 Difference]: Start difference. First operand 1365 states and 1772 transitions. Second operand has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:02,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:02,103 INFO L93 Difference]: Finished difference Result 2210 states and 2885 transitions. [2024-12-02 07:43:02,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:02,103 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 730 [2024-12-02 07:43:02,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:02,105 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:02,105 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:02,105 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:02,105 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 1594 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1597 SdHoareTripleChecker+Valid, 2382 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:02,106 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1597 Valid, 2382 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:43:02,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:02,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:02,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2962417096536478) internal successors, (1759), 1357 states have internal predecessors, (1759), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:02,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1771 transitions. [2024-12-02 07:43:02,120 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1771 transitions. Word has length 730 [2024-12-02 07:43:02,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:02,120 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1771 transitions. [2024-12-02 07:43:02,120 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.6) internal successors, (703), 5 states have internal predecessors, (703), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:02,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1771 transitions. [2024-12-02 07:43:02,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2024-12-02 07:43:02,123 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:02,123 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:02,123 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-12-02 07:43:02,124 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:02,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:02,124 INFO L85 PathProgramCache]: Analyzing trace with hash 716378378, now seen corresponding path program 1 times [2024-12-02 07:43:02,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:02,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663851220] [2024-12-02 07:43:02,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:02,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:02,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:03,274 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:03,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:03,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663851220] [2024-12-02 07:43:03,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1663851220] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:03,274 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:03,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:03,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629915001] [2024-12-02 07:43:03,274 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:03,275 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:03,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:03,276 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:03,276 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:03,276 INFO L87 Difference]: Start difference. First operand 1365 states and 1771 transitions. Second operand has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:03,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:03,335 INFO L93 Difference]: Finished difference Result 2210 states and 2883 transitions. [2024-12-02 07:43:03,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:03,335 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 731 [2024-12-02 07:43:03,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:03,336 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:03,336 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:03,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:03,337 INFO L435 NwaCegarLoop]: 1190 mSDtfsCounter, 1578 mSDsluCounter, 1192 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1581 SdHoareTripleChecker+Valid, 2382 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:03,337 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1581 Valid, 2382 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:43:03,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:03,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:03,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2955047899778924) internal successors, (1758), 1357 states have internal predecessors, (1758), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:03,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1770 transitions. [2024-12-02 07:43:03,352 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1770 transitions. Word has length 731 [2024-12-02 07:43:03,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:03,352 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1770 transitions. [2024-12-02 07:43:03,352 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 140.8) internal successors, (704), 5 states have internal predecessors, (704), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:03,352 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1770 transitions. [2024-12-02 07:43:03,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 733 [2024-12-02 07:43:03,355 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:03,355 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:03,355 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-12-02 07:43:03,355 INFO L396 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:03,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:03,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1421307485, now seen corresponding path program 1 times [2024-12-02 07:43:03,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:03,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326015971] [2024-12-02 07:43:03,356 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:03,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:03,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:04,477 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:04,477 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:04,477 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326015971] [2024-12-02 07:43:04,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326015971] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:04,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:04,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:04,478 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88465968] [2024-12-02 07:43:04,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:04,478 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:04,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:04,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:04,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:04,479 INFO L87 Difference]: Start difference. First operand 1365 states and 1770 transitions. Second operand has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:04,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:04,839 INFO L93 Difference]: Finished difference Result 2210 states and 2881 transitions. [2024-12-02 07:43:04,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:04,839 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 732 [2024-12-02 07:43:04,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:04,841 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:04,841 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:04,841 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:04,842 INFO L435 NwaCegarLoop]: 931 mSDtfsCounter, 1556 mSDsluCounter, 933 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1559 SdHoareTripleChecker+Valid, 1864 SdHoareTripleChecker+Invalid, 553 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:04,842 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1559 Valid, 1864 Invalid, 553 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 552 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:43:04,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:04,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:04,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.294767870302137) internal successors, (1757), 1357 states have internal predecessors, (1757), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:04,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1769 transitions. [2024-12-02 07:43:04,868 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1769 transitions. Word has length 732 [2024-12-02 07:43:04,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:04,868 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1769 transitions. [2024-12-02 07:43:04,868 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.0) internal successors, (705), 5 states have internal predecessors, (705), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:04,869 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1769 transitions. [2024-12-02 07:43:04,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-12-02 07:43:04,873 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:04,874 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:04,874 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94 [2024-12-02 07:43:04,874 INFO L396 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:04,874 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:04,874 INFO L85 PathProgramCache]: Analyzing trace with hash 1049109781, now seen corresponding path program 1 times [2024-12-02 07:43:04,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:04,875 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112641829] [2024-12-02 07:43:04,875 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:04,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:06,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:07,193 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:07,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:07,193 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112641829] [2024-12-02 07:43:07,193 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [112641829] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:07,193 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:07,193 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:43:07,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299868643] [2024-12-02 07:43:07,193 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:07,193 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:43:07,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:07,194 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:43:07,194 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:43:07,194 INFO L87 Difference]: Start difference. First operand 1365 states and 1769 transitions. Second operand has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:07,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:07,244 INFO L93 Difference]: Finished difference Result 2210 states and 2879 transitions. [2024-12-02 07:43:07,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:07,245 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 733 [2024-12-02 07:43:07,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:07,246 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:07,246 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:07,247 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:07,247 INFO L435 NwaCegarLoop]: 1189 mSDtfsCounter, 722 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 722 SdHoareTripleChecker+Valid, 2380 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:07,247 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [722 Valid, 2380 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:43:07,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:07,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:07,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2940309506263816) internal successors, (1756), 1357 states have internal predecessors, (1756), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:07,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1768 transitions. [2024-12-02 07:43:07,297 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1768 transitions. Word has length 733 [2024-12-02 07:43:07,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:07,297 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1768 transitions. [2024-12-02 07:43:07,297 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 176.5) internal successors, (706), 4 states have internal predecessors, (706), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:07,297 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1768 transitions. [2024-12-02 07:43:07,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-12-02 07:43:07,300 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:07,300 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:07,300 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95 [2024-12-02 07:43:07,300 INFO L396 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:07,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:07,301 INFO L85 PathProgramCache]: Analyzing trace with hash 1275586929, now seen corresponding path program 1 times [2024-12-02 07:43:07,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:07,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758845891] [2024-12-02 07:43:07,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:07,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:08,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:09,367 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:09,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:09,368 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1758845891] [2024-12-02 07:43:09,368 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1758845891] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:09,368 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:09,368 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:09,368 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [142485204] [2024-12-02 07:43:09,368 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:09,368 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:09,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:09,369 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:09,369 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:09,369 INFO L87 Difference]: Start difference. First operand 1365 states and 1768 transitions. Second operand has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:09,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:09,468 INFO L93 Difference]: Finished difference Result 2210 states and 2877 transitions. [2024-12-02 07:43:09,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:09,468 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 734 [2024-12-02 07:43:09,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:09,470 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:09,470 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:09,470 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:09,471 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1805 mSDsluCounter, 1176 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1805 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:09,471 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1805 Valid, 2350 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:09,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:09,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:09,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2932940309506264) internal successors, (1755), 1357 states have internal predecessors, (1755), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:09,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1767 transitions. [2024-12-02 07:43:09,487 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1767 transitions. Word has length 734 [2024-12-02 07:43:09,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:09,487 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1767 transitions. [2024-12-02 07:43:09,488 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.4) internal successors, (707), 5 states have internal predecessors, (707), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:09,488 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1767 transitions. [2024-12-02 07:43:09,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 736 [2024-12-02 07:43:09,491 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:09,491 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:09,491 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96 [2024-12-02 07:43:09,491 INFO L396 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:09,491 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:09,492 INFO L85 PathProgramCache]: Analyzing trace with hash 517215829, now seen corresponding path program 1 times [2024-12-02 07:43:09,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:09,492 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914027413] [2024-12-02 07:43:09,492 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:09,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:10,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:11,652 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:11,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:11,652 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914027413] [2024-12-02 07:43:11,652 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1914027413] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:11,652 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:11,652 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:11,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [969910763] [2024-12-02 07:43:11,652 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:11,653 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:11,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:11,654 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:11,654 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:11,654 INFO L87 Difference]: Start difference. First operand 1365 states and 1767 transitions. Second operand has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:11,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:11,735 INFO L93 Difference]: Finished difference Result 2210 states and 2875 transitions. [2024-12-02 07:43:11,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:11,736 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 735 [2024-12-02 07:43:11,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:11,737 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:11,737 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:11,737 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:11,738 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 1056 mSDsluCounter, 1183 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1056 SdHoareTripleChecker+Valid, 2357 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:11,738 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1056 Valid, 2357 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:11,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:11,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:11,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.292557111274871) internal successors, (1754), 1357 states have internal predecessors, (1754), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:11,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1766 transitions. [2024-12-02 07:43:11,753 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1766 transitions. Word has length 735 [2024-12-02 07:43:11,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:11,753 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1766 transitions. [2024-12-02 07:43:11,753 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 141.6) internal successors, (708), 5 states have internal predecessors, (708), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:11,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1766 transitions. [2024-12-02 07:43:11,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 737 [2024-12-02 07:43:11,756 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:11,756 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:11,757 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable97 [2024-12-02 07:43:11,757 INFO L396 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:11,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:11,757 INFO L85 PathProgramCache]: Analyzing trace with hash 290647682, now seen corresponding path program 1 times [2024-12-02 07:43:11,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:11,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486126275] [2024-12-02 07:43:11,757 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:11,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:12,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:13,604 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:13,604 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:13,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486126275] [2024-12-02 07:43:13,604 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486126275] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:13,604 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:13,604 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:43:13,604 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532322327] [2024-12-02 07:43:13,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:13,605 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:43:13,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:13,605 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:43:13,605 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:43:13,605 INFO L87 Difference]: Start difference. First operand 1365 states and 1766 transitions. Second operand has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:13,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:13,672 INFO L93 Difference]: Finished difference Result 2210 states and 2873 transitions. [2024-12-02 07:43:13,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:13,673 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 736 [2024-12-02 07:43:13,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:13,674 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:13,674 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:13,675 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:13,675 INFO L435 NwaCegarLoop]: 1174 mSDtfsCounter, 731 mSDsluCounter, 1176 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 731 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:13,675 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [731 Valid, 2350 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:43:13,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:13,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:13,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2918201915991157) internal successors, (1753), 1357 states have internal predecessors, (1753), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:13,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1765 transitions. [2024-12-02 07:43:13,690 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1765 transitions. Word has length 736 [2024-12-02 07:43:13,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:13,690 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1765 transitions. [2024-12-02 07:43:13,690 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 177.25) internal successors, (709), 4 states have internal predecessors, (709), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:13,690 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1765 transitions. [2024-12-02 07:43:13,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 738 [2024-12-02 07:43:13,693 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:13,693 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:13,693 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable98 [2024-12-02 07:43:13,693 INFO L396 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:13,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:13,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1703199876, now seen corresponding path program 1 times [2024-12-02 07:43:13,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:13,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311756411] [2024-12-02 07:43:13,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:13,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:14,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:15,610 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:15,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:15,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311756411] [2024-12-02 07:43:15,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1311756411] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:15,610 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:15,610 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:15,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041053250] [2024-12-02 07:43:15,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:15,611 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:15,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:15,612 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:15,612 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:15,612 INFO L87 Difference]: Start difference. First operand 1365 states and 1765 transitions. Second operand has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:15,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:15,737 INFO L93 Difference]: Finished difference Result 2210 states and 2871 transitions. [2024-12-02 07:43:15,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:15,738 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 737 [2024-12-02 07:43:15,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:15,739 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:15,739 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:15,740 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:15,740 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1840 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1840 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:15,740 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1840 Valid, 2288 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:15,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:15,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:15,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2910832719233603) internal successors, (1752), 1357 states have internal predecessors, (1752), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:15,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1764 transitions. [2024-12-02 07:43:15,756 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1764 transitions. Word has length 737 [2024-12-02 07:43:15,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:15,756 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1764 transitions. [2024-12-02 07:43:15,756 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.0) internal successors, (710), 5 states have internal predecessors, (710), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:15,756 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1764 transitions. [2024-12-02 07:43:15,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-12-02 07:43:15,759 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:15,759 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:15,760 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable99 [2024-12-02 07:43:15,760 INFO L396 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:15,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:15,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1741512288, now seen corresponding path program 1 times [2024-12-02 07:43:15,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:15,760 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50652830] [2024-12-02 07:43:15,760 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:15,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:16,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:17,636 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:17,636 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:17,636 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [50652830] [2024-12-02 07:43:17,636 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [50652830] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:17,636 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:17,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:17,636 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1069454774] [2024-12-02 07:43:17,637 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:17,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:17,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:17,638 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:17,638 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:17,638 INFO L87 Difference]: Start difference. First operand 1365 states and 1764 transitions. Second operand has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:17,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:17,772 INFO L93 Difference]: Finished difference Result 2210 states and 2869 transitions. [2024-12-02 07:43:17,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:17,773 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 738 [2024-12-02 07:43:17,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:17,774 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:17,774 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:17,775 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:17,775 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1830 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1830 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:17,775 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1830 Valid, 2288 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:17,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:17,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:17,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.290346352247605) internal successors, (1751), 1357 states have internal predecessors, (1751), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:17,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1763 transitions. [2024-12-02 07:43:17,791 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1763 transitions. Word has length 738 [2024-12-02 07:43:17,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:17,791 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1763 transitions. [2024-12-02 07:43:17,791 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.2) internal successors, (711), 5 states have internal predecessors, (711), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:17,791 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1763 transitions. [2024-12-02 07:43:17,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2024-12-02 07:43:17,794 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:17,794 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:17,794 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100 [2024-12-02 07:43:17,794 INFO L396 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:17,795 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:17,795 INFO L85 PathProgramCache]: Analyzing trace with hash -484429613, now seen corresponding path program 1 times [2024-12-02 07:43:17,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:17,795 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677003959] [2024-12-02 07:43:17,795 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:17,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:19,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:19,931 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:19,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:19,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677003959] [2024-12-02 07:43:19,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1677003959] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:19,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:19,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:43:19,932 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142036272] [2024-12-02 07:43:19,932 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:19,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:43:19,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:19,933 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:43:19,933 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:43:19,933 INFO L87 Difference]: Start difference. First operand 1365 states and 1763 transitions. Second operand has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:20,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:20,018 INFO L93 Difference]: Finished difference Result 2210 states and 2867 transitions. [2024-12-02 07:43:20,019 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:20,019 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 739 [2024-12-02 07:43:20,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:20,020 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:20,020 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:20,021 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:20,021 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 784 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 784 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:20,021 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [784 Valid, 2288 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:20,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:20,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:20,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2896094325718497) internal successors, (1750), 1357 states have internal predecessors, (1750), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:20,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1762 transitions. [2024-12-02 07:43:20,036 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1762 transitions. Word has length 739 [2024-12-02 07:43:20,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:20,036 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1762 transitions. [2024-12-02 07:43:20,036 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 178.0) internal successors, (712), 4 states have internal predecessors, (712), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:20,036 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1762 transitions. [2024-12-02 07:43:20,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 741 [2024-12-02 07:43:20,039 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:20,039 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:20,039 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable101 [2024-12-02 07:43:20,039 INFO L396 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:20,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:20,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1334082065, now seen corresponding path program 1 times [2024-12-02 07:43:20,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:20,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988334450] [2024-12-02 07:43:20,040 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:20,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:21,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:22,017 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:22,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:22,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988334450] [2024-12-02 07:43:22,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988334450] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:22,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:22,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:22,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292346095] [2024-12-02 07:43:22,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:22,018 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:22,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:22,018 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:22,018 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:22,018 INFO L87 Difference]: Start difference. First operand 1365 states and 1762 transitions. Second operand has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:22,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:22,146 INFO L93 Difference]: Finished difference Result 2210 states and 2865 transitions. [2024-12-02 07:43:22,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:22,146 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 740 [2024-12-02 07:43:22,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:22,148 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:22,148 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:22,148 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:22,149 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1810 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1810 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:22,149 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1810 Valid, 2288 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:22,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:22,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:22,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2888725128960943) internal successors, (1749), 1357 states have internal predecessors, (1749), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:22,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1761 transitions. [2024-12-02 07:43:22,164 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1761 transitions. Word has length 740 [2024-12-02 07:43:22,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:22,165 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1761 transitions. [2024-12-02 07:43:22,165 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.6) internal successors, (713), 5 states have internal predecessors, (713), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:22,165 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1761 transitions. [2024-12-02 07:43:22,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-12-02 07:43:22,168 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:22,168 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:22,168 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102 [2024-12-02 07:43:22,168 INFO L396 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:22,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:22,168 INFO L85 PathProgramCache]: Analyzing trace with hash 2118395810, now seen corresponding path program 1 times [2024-12-02 07:43:22,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:22,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895032379] [2024-12-02 07:43:22,169 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:22,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:23,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:24,088 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:24,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:24,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895032379] [2024-12-02 07:43:24,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895032379] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:24,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:24,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:24,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370389470] [2024-12-02 07:43:24,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:24,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:24,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:24,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:24,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:24,089 INFO L87 Difference]: Start difference. First operand 1365 states and 1761 transitions. Second operand has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:24,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:24,209 INFO L93 Difference]: Finished difference Result 2210 states and 2863 transitions. [2024-12-02 07:43:24,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:24,210 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 741 [2024-12-02 07:43:24,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:24,211 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:24,211 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:24,211 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:24,211 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1800 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1800 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:24,212 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1800 Valid, 2288 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:24,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:24,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:24,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2881355932203389) internal successors, (1748), 1357 states have internal predecessors, (1748), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:24,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1760 transitions. [2024-12-02 07:43:24,227 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1760 transitions. Word has length 741 [2024-12-02 07:43:24,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:24,227 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1760 transitions. [2024-12-02 07:43:24,227 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 142.8) internal successors, (714), 5 states have internal predecessors, (714), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:24,227 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1760 transitions. [2024-12-02 07:43:24,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 743 [2024-12-02 07:43:24,230 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:24,230 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:24,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable103 [2024-12-02 07:43:24,230 INFO L396 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:24,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:24,231 INFO L85 PathProgramCache]: Analyzing trace with hash -713187326, now seen corresponding path program 1 times [2024-12-02 07:43:24,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:24,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81814007] [2024-12-02 07:43:24,231 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:24,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:25,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:26,265 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:26,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:26,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81814007] [2024-12-02 07:43:26,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [81814007] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:26,265 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:26,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:26,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1913606686] [2024-12-02 07:43:26,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:26,265 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:26,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:26,266 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:26,266 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:26,266 INFO L87 Difference]: Start difference. First operand 1365 states and 1760 transitions. Second operand has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:26,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:26,391 INFO L93 Difference]: Finished difference Result 2210 states and 2861 transitions. [2024-12-02 07:43:26,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:26,392 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 742 [2024-12-02 07:43:26,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:26,393 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:26,393 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:26,394 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:26,394 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 1034 mSDsluCounter, 1152 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1034 SdHoareTripleChecker+Valid, 2295 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:26,394 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1034 Valid, 2295 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:26,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:26,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:26,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2873986735445837) internal successors, (1747), 1357 states have internal predecessors, (1747), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:26,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1759 transitions. [2024-12-02 07:43:26,409 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1759 transitions. Word has length 742 [2024-12-02 07:43:26,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:26,409 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1759 transitions. [2024-12-02 07:43:26,409 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.0) internal successors, (715), 5 states have internal predecessors, (715), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:26,410 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1759 transitions. [2024-12-02 07:43:26,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 744 [2024-12-02 07:43:26,412 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:26,412 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:26,413 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104 [2024-12-02 07:43:26,413 INFO L396 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:26,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:26,413 INFO L85 PathProgramCache]: Analyzing trace with hash 2119497969, now seen corresponding path program 1 times [2024-12-02 07:43:26,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:26,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98334125] [2024-12-02 07:43:26,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:26,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:27,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:28,478 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:28,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:28,478 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98334125] [2024-12-02 07:43:28,478 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98334125] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:28,478 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:28,478 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-12-02 07:43:28,478 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480383530] [2024-12-02 07:43:28,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:28,479 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:43:28,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:28,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:43:28,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-12-02 07:43:28,480 INFO L87 Difference]: Start difference. First operand 1365 states and 1759 transitions. Second operand has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:28,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:28,582 INFO L93 Difference]: Finished difference Result 2210 states and 2859 transitions. [2024-12-02 07:43:28,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:28,583 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 743 [2024-12-02 07:43:28,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:28,584 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:28,584 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:28,585 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:28,585 INFO L435 NwaCegarLoop]: 1143 mSDtfsCounter, 748 mSDsluCounter, 1145 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 748 SdHoareTripleChecker+Valid, 2288 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:28,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [748 Valid, 2288 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:43:28,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:28,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:28,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2866617538688283) internal successors, (1746), 1357 states have internal predecessors, (1746), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:28,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1758 transitions. [2024-12-02 07:43:28,600 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1758 transitions. Word has length 743 [2024-12-02 07:43:28,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:28,600 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1758 transitions. [2024-12-02 07:43:28,600 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 179.0) internal successors, (716), 4 states have internal predecessors, (716), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:28,600 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1758 transitions. [2024-12-02 07:43:28,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 745 [2024-12-02 07:43:28,603 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:28,603 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:28,603 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable105 [2024-12-02 07:43:28,603 INFO L396 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:28,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:28,604 INFO L85 PathProgramCache]: Analyzing trace with hash 466731891, now seen corresponding path program 1 times [2024-12-02 07:43:28,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:28,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788159506] [2024-12-02 07:43:28,604 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:28,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:29,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:30,671 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:30,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:30,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788159506] [2024-12-02 07:43:30,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788159506] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:30,671 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:30,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:30,671 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062008840] [2024-12-02 07:43:30,671 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:30,672 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:30,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:30,672 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:30,673 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:30,673 INFO L87 Difference]: Start difference. First operand 1365 states and 1758 transitions. Second operand has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:30,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:30,891 INFO L93 Difference]: Finished difference Result 2210 states and 2857 transitions. [2024-12-02 07:43:30,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:30,892 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 744 [2024-12-02 07:43:30,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:30,893 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:30,893 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:30,893 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:30,894 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1907 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1907 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:30,894 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1907 Valid, 2162 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:30,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:30,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:30,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.285924834193073) internal successors, (1745), 1357 states have internal predecessors, (1745), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:30,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1757 transitions. [2024-12-02 07:43:30,912 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1757 transitions. Word has length 744 [2024-12-02 07:43:30,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:30,913 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1757 transitions. [2024-12-02 07:43:30,913 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.4) internal successors, (717), 5 states have internal predecessors, (717), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:30,913 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1757 transitions. [2024-12-02 07:43:30,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 746 [2024-12-02 07:43:30,915 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:30,916 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:30,916 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106 [2024-12-02 07:43:30,916 INFO L396 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:30,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:30,916 INFO L85 PathProgramCache]: Analyzing trace with hash -313473577, now seen corresponding path program 1 times [2024-12-02 07:43:30,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:30,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746510582] [2024-12-02 07:43:30,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:30,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:32,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:32,926 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:32,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:32,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1746510582] [2024-12-02 07:43:32,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1746510582] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:32,927 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:32,927 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:32,927 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875985207] [2024-12-02 07:43:32,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:32,927 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:32,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:32,927 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:32,928 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:32,928 INFO L87 Difference]: Start difference. First operand 1365 states and 1757 transitions. Second operand has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:33,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:33,149 INFO L93 Difference]: Finished difference Result 2210 states and 2855 transitions. [2024-12-02 07:43:33,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:33,149 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 745 [2024-12-02 07:43:33,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:33,151 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:33,151 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:33,151 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:33,151 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1000 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1000 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:33,151 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1000 Valid, 2169 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:33,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:33,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:33,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2851879145173175) internal successors, (1744), 1357 states have internal predecessors, (1744), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:33,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1756 transitions. [2024-12-02 07:43:33,167 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1756 transitions. Word has length 745 [2024-12-02 07:43:33,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:33,167 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1756 transitions. [2024-12-02 07:43:33,167 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.6) internal successors, (718), 5 states have internal predecessors, (718), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:33,167 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1756 transitions. [2024-12-02 07:43:33,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2024-12-02 07:43:33,170 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:33,170 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:33,170 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107 [2024-12-02 07:43:33,170 INFO L396 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:33,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:33,170 INFO L85 PathProgramCache]: Analyzing trace with hash 2070102596, now seen corresponding path program 1 times [2024-12-02 07:43:33,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:33,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37089115] [2024-12-02 07:43:33,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:33,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:34,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:35,281 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:35,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:35,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37089115] [2024-12-02 07:43:35,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [37089115] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:35,281 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:35,281 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:35,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016928450] [2024-12-02 07:43:35,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:35,282 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:35,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:35,282 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:35,282 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:35,282 INFO L87 Difference]: Start difference. First operand 1365 states and 1756 transitions. Second operand has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:35,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:35,478 INFO L93 Difference]: Finished difference Result 2210 states and 2853 transitions. [2024-12-02 07:43:35,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:35,479 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 746 [2024-12-02 07:43:35,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:35,480 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:35,480 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:35,481 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:35,481 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 999 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 999 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:35,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [999 Valid, 2169 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:35,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:35,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:35,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2844509948415623) internal successors, (1743), 1357 states have internal predecessors, (1743), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:35,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1755 transitions. [2024-12-02 07:43:35,496 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1755 transitions. Word has length 746 [2024-12-02 07:43:35,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:35,496 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1755 transitions. [2024-12-02 07:43:35,496 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 143.8) internal successors, (719), 5 states have internal predecessors, (719), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:35,496 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1755 transitions. [2024-12-02 07:43:35,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2024-12-02 07:43:35,499 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:35,499 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:35,500 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable108 [2024-12-02 07:43:35,500 INFO L396 AbstractCegarLoop]: === Iteration 110 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:35,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:35,500 INFO L85 PathProgramCache]: Analyzing trace with hash 980789830, now seen corresponding path program 1 times [2024-12-02 07:43:35,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:35,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805372307] [2024-12-02 07:43:35,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:35,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:36,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:37,525 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:37,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:37,526 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805372307] [2024-12-02 07:43:37,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805372307] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:37,526 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:37,526 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:37,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565612571] [2024-12-02 07:43:37,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:37,526 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:37,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:37,527 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:37,527 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:37,527 INFO L87 Difference]: Start difference. First operand 1365 states and 1755 transitions. Second operand has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:37,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:37,735 INFO L93 Difference]: Finished difference Result 2210 states and 2851 transitions. [2024-12-02 07:43:37,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:37,736 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 747 [2024-12-02 07:43:37,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:37,737 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:37,737 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:37,737 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:37,737 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 998 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 224 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 998 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 224 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:37,738 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [998 Valid, 2169 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 224 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:37,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:37,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:37,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.283714075165807) internal successors, (1742), 1357 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:37,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1754 transitions. [2024-12-02 07:43:37,752 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1754 transitions. Word has length 747 [2024-12-02 07:43:37,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:37,753 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1754 transitions. [2024-12-02 07:43:37,753 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.0) internal successors, (720), 5 states have internal predecessors, (720), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:37,753 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1754 transitions. [2024-12-02 07:43:37,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 749 [2024-12-02 07:43:37,755 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:37,756 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:37,756 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable109 [2024-12-02 07:43:37,756 INFO L396 AbstractCegarLoop]: === Iteration 111 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:37,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:37,756 INFO L85 PathProgramCache]: Analyzing trace with hash 1130260117, now seen corresponding path program 1 times [2024-12-02 07:43:37,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:37,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155161632] [2024-12-02 07:43:37,756 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:37,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:39,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:40,018 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:40,018 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:40,018 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [155161632] [2024-12-02 07:43:40,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [155161632] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:40,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:40,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:40,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882838017] [2024-12-02 07:43:40,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:40,019 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:40,019 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:40,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:40,020 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:40,020 INFO L87 Difference]: Start difference. First operand 1365 states and 1754 transitions. Second operand has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:40,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:40,219 INFO L93 Difference]: Finished difference Result 2210 states and 2849 transitions. [2024-12-02 07:43:40,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:40,220 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 748 [2024-12-02 07:43:40,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:40,221 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:40,221 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:40,222 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:40,222 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1867 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 222 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1867 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 222 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 222 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:40,222 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1867 Valid, 2162 Invalid, 222 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 222 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:40,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:40,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:40,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2829771554900515) internal successors, (1741), 1357 states have internal predecessors, (1741), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:40,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1753 transitions. [2024-12-02 07:43:40,237 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1753 transitions. Word has length 748 [2024-12-02 07:43:40,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:40,237 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1753 transitions. [2024-12-02 07:43:40,237 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.2) internal successors, (721), 5 states have internal predecessors, (721), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:40,237 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1753 transitions. [2024-12-02 07:43:40,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-12-02 07:43:40,240 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:40,240 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:40,240 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable110 [2024-12-02 07:43:40,241 INFO L396 AbstractCegarLoop]: === Iteration 112 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:40,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:40,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1546776267, now seen corresponding path program 1 times [2024-12-02 07:43:40,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:40,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745927207] [2024-12-02 07:43:40,241 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:40,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:41,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:42,357 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:42,357 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:42,357 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745927207] [2024-12-02 07:43:42,357 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745927207] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:42,357 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:42,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:42,358 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1129960059] [2024-12-02 07:43:42,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:42,358 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:42,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:42,359 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:42,359 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:42,359 INFO L87 Difference]: Start difference. First operand 1365 states and 1753 transitions. Second operand has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:42,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:42,558 INFO L93 Difference]: Finished difference Result 2210 states and 2847 transitions. [2024-12-02 07:43:42,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:42,559 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 749 [2024-12-02 07:43:42,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:42,560 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:42,560 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:42,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:42,561 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 1857 mSDsluCounter, 1082 mSDsCounter, 0 mSdLazyCounter, 220 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1857 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 220 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 220 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:42,561 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1857 Valid, 2162 Invalid, 220 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 220 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:42,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:42,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:42,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.2822402358142961) internal successors, (1740), 1357 states have internal predecessors, (1740), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:42,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1752 transitions. [2024-12-02 07:43:42,580 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1752 transitions. Word has length 749 [2024-12-02 07:43:42,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:42,580 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1752 transitions. [2024-12-02 07:43:42,580 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.4) internal successors, (722), 5 states have internal predecessors, (722), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:42,580 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1752 transitions. [2024-12-02 07:43:42,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 751 [2024-12-02 07:43:42,583 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:42,583 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:42,583 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable111 [2024-12-02 07:43:42,583 INFO L396 AbstractCegarLoop]: === Iteration 113 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:42,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:42,583 INFO L85 PathProgramCache]: Analyzing trace with hash 507830374, now seen corresponding path program 1 times [2024-12-02 07:43:42,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:42,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908234938] [2024-12-02 07:43:42,584 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:42,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:43,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:44,737 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:44,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:44,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908234938] [2024-12-02 07:43:44,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1908234938] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:44,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:44,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:44,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956368374] [2024-12-02 07:43:44,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:44,738 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:44,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:44,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:44,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:44,739 INFO L87 Difference]: Start difference. First operand 1365 states and 1752 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:44,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:44,949 INFO L93 Difference]: Finished difference Result 2210 states and 2845 transitions. [2024-12-02 07:43:44,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:44,950 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 750 [2024-12-02 07:43:44,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:44,951 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:44,951 INFO L226 Difference]: Without dead ends: 1365 [2024-12-02 07:43:44,952 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:43:44,952 INFO L435 NwaCegarLoop]: 1080 mSDtfsCounter, 995 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 995 SdHoareTripleChecker+Valid, 2169 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-12-02 07:43:44,952 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [995 Valid, 2169 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-12-02 07:43:44,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-12-02 07:43:44,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-12-02 07:43:44,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1357 states have (on average 1.281503316138541) internal successors, (1739), 1357 states have internal predecessors, (1739), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:43:44,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1751 transitions. [2024-12-02 07:43:44,967 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1751 transitions. Word has length 750 [2024-12-02 07:43:44,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:43:44,967 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1751 transitions. [2024-12-02 07:43:44,967 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:44,967 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1751 transitions. [2024-12-02 07:43:44,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 752 [2024-12-02 07:43:44,970 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:43:44,970 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:43:44,970 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable112 [2024-12-02 07:43:44,970 INFO L396 AbstractCegarLoop]: === Iteration 114 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:43:44,971 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:43:44,971 INFO L85 PathProgramCache]: Analyzing trace with hash 1790986916, now seen corresponding path program 1 times [2024-12-02 07:43:44,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:43:44,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509700766] [2024-12-02 07:43:44,971 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:43:44,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:43:46,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:43:47,273 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 177 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:43:47,273 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:43:47,273 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509700766] [2024-12-02 07:43:47,273 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509700766] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:43:47,273 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:43:47,273 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:43:47,273 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443030856] [2024-12-02 07:43:47,273 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:43:47,274 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:43:47,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:43:47,274 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:43:47,274 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:43:47,274 INFO L87 Difference]: Start difference. First operand 1365 states and 1751 transitions. Second operand has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:43:47,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:43:47,435 INFO L93 Difference]: Finished difference Result 2210 states and 2843 transitions. [2024-12-02 07:43:47,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:43:47,436 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.8) internal successors, (724), 5 states have internal predecessors, (724), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 751 [2024-12-02 07:43:47,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:43:47,437 INFO L225 Difference]: With dead ends: 2210 [2024-12-02 07:43:47,437 INFO L226 Difference]: Without dead ends: 1365 WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [2024-12-02 07:44:32,158 INFO L396 AbstractCegarLoop]: === Iteration 129 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:44:32,158 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:44:32,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1935522237, now seen corresponding path program 1 times [2024-12-02 07:44:32,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:44:32,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976067596] [2024-12-02 07:44:32,158 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:32,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:44:35,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:44:36,558 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2024-12-02 07:44:36,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:44:36,558 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976067596] [2024-12-02 07:44:36,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976067596] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:44:36,558 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:44:36,559 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:44:36,559 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043524630] [2024-12-02 07:44:36,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:44:36,559 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:44:36,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:44:36,560 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:44:36,560 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:44:36,560 INFO L87 Difference]: Start difference. First operand 2276 states and 2892 transitions. Second operand has 6 states, 6 states have (on average 99.0) internal successors, (594), 6 states have internal predecessors, (594), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:44:37,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:44:37,223 INFO L93 Difference]: Finished difference Result 4204 states and 5288 transitions. [2024-12-02 07:44:37,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:44:37,224 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 99.0) internal successors, (594), 6 states have internal predecessors, (594), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 769 [2024-12-02 07:44:37,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:44:37,226 INFO L225 Difference]: With dead ends: 4204 [2024-12-02 07:44:37,226 INFO L226 Difference]: Without dead ends: 2284 [2024-12-02 07:44:37,227 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:44:37,227 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1069 mSDsluCounter, 2684 mSDsCounter, 0 mSdLazyCounter, 1130 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1070 SdHoareTripleChecker+Valid, 3581 SdHoareTripleChecker+Invalid, 1130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-12-02 07:44:37,227 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1070 Valid, 3581 Invalid, 1130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1130 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-12-02 07:44:37,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2284 states. [2024-12-02 07:44:37,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2284 to 2280. [2024-12-02 07:44:37,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2280 states, 2266 states have (on average 1.267431597528685) internal successors, (2872), 2266 states have internal predecessors, (2872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:44:37,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2280 states to 2280 states and 2896 transitions. [2024-12-02 07:44:37,256 INFO L78 Accepts]: Start accepts. Automaton has 2280 states and 2896 transitions. Word has length 769 [2024-12-02 07:44:37,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:44:37,257 INFO L471 AbstractCegarLoop]: Abstraction has 2280 states and 2896 transitions. [2024-12-02 07:44:37,257 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 99.0) internal successors, (594), 6 states have internal predecessors, (594), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-12-02 07:44:37,257 INFO L276 IsEmpty]: Start isEmpty. Operand 2280 states and 2896 transitions. [2024-12-02 07:44:37,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-12-02 07:44:37,260 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:44:37,260 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:44:37,260 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable128 [2024-12-02 07:44:37,261 INFO L396 AbstractCegarLoop]: === Iteration 130 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:44:37,261 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:44:37,261 INFO L85 PathProgramCache]: Analyzing trace with hash -1714667567, now seen corresponding path program 1 times [2024-12-02 07:44:37,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:44:37,261 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562681752] [2024-12-02 07:44:37,261 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:37,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:44:39,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:44:41,088 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 175 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-12-02 07:44:41,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:44:41,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562681752] [2024-12-02 07:44:41,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [562681752] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:44:41,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1915426240] [2024-12-02 07:44:41,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:41,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:44:41,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:44:41,090 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:44:41,123 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-12-02 07:44:45,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:44:45,788 INFO L256 TraceCheckSpWp]: Trace formula consists of 4797 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-12-02 07:44:45,806 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:44:46,132 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2024-12-02 07:44:46,132 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:44:46,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1915426240] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:44:46,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:44:46,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2024-12-02 07:44:46,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272953531] [2024-12-02 07:44:46,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:44:46,133 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:44:46,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:44:46,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:44:46,134 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:44:46,134 INFO L87 Difference]: Start difference. First operand 2280 states and 2896 transitions. Second operand has 6 states, 6 states have (on average 98.33333333333333) internal successors, (590), 6 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:44:46,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:44:46,723 INFO L93 Difference]: Finished difference Result 4260 states and 5362 transitions. [2024-12-02 07:44:46,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:44:46,723 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 98.33333333333333) internal successors, (590), 6 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 771 [2024-12-02 07:44:46,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:44:46,725 INFO L225 Difference]: With dead ends: 4260 [2024-12-02 07:44:46,725 INFO L226 Difference]: Without dead ends: 2288 [2024-12-02 07:44:46,726 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 779 GetRequests, 772 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:44:46,726 INFO L435 NwaCegarLoop]: 897 mSDtfsCounter, 1071 mSDsluCounter, 2670 mSDsCounter, 0 mSdLazyCounter, 1130 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1073 SdHoareTripleChecker+Valid, 3567 SdHoareTripleChecker+Invalid, 1130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:44:46,727 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1073 Valid, 3567 Invalid, 1130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1130 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:44:46,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2288 states. [2024-12-02 07:44:46,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2288 to 2284. [2024-12-02 07:44:46,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2284 states, 2270 states have (on average 1.2669603524229074) internal successors, (2876), 2270 states have internal predecessors, (2876), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:44:46,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2284 states to 2284 states and 2900 transitions. [2024-12-02 07:44:46,767 INFO L78 Accepts]: Start accepts. Automaton has 2284 states and 2900 transitions. Word has length 771 [2024-12-02 07:44:46,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:44:46,768 INFO L471 AbstractCegarLoop]: Abstraction has 2284 states and 2900 transitions. [2024-12-02 07:44:46,768 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 98.33333333333333) internal successors, (590), 6 states have internal predecessors, (590), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:44:46,768 INFO L276 IsEmpty]: Start isEmpty. Operand 2284 states and 2900 transitions. [2024-12-02 07:44:46,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 774 [2024-12-02 07:44:46,774 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:44:46,774 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:44:46,809 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-12-02 07:44:46,974 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable129 [2024-12-02 07:44:46,974 INFO L396 AbstractCegarLoop]: === Iteration 131 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:44:46,975 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:44:46,975 INFO L85 PathProgramCache]: Analyzing trace with hash 842631645, now seen corresponding path program 1 times [2024-12-02 07:44:46,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:44:46,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791297135] [2024-12-02 07:44:46,975 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:46,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:44:49,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:44:50,979 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 187 trivial. 0 not checked. [2024-12-02 07:44:50,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:44:50,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791297135] [2024-12-02 07:44:50,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [791297135] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:44:50,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:44:50,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 07:44:50,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439427447] [2024-12-02 07:44:50,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:44:50,980 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:44:50,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:44:50,981 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:44:50,981 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:44:50,981 INFO L87 Difference]: Start difference. First operand 2284 states and 2900 transitions. Second operand has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:44:51,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:44:51,957 INFO L93 Difference]: Finished difference Result 6124 states and 7663 transitions. [2024-12-02 07:44:51,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 07:44:51,958 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 773 [2024-12-02 07:44:51,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:44:51,961 INFO L225 Difference]: With dead ends: 6124 [2024-12-02 07:44:51,961 INFO L226 Difference]: Without dead ends: 4326 [2024-12-02 07:44:51,963 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-12-02 07:44:51,963 INFO L435 NwaCegarLoop]: 922 mSDtfsCounter, 1964 mSDsluCounter, 4537 mSDsCounter, 0 mSdLazyCounter, 1690 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1967 SdHoareTripleChecker+Valid, 5459 SdHoareTripleChecker+Invalid, 1690 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1690 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 07:44:51,963 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1967 Valid, 5459 Invalid, 1690 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1690 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 07:44:51,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4326 states. [2024-12-02 07:44:52,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4326 to 4318. [2024-12-02 07:44:52,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4318 states, 4292 states have (on average 1.254892823858341) internal successors, (5386), 4292 states have internal predecessors, (5386), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-12-02 07:44:52,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4318 states to 4318 states and 5434 transitions. [2024-12-02 07:44:52,040 INFO L78 Accepts]: Start accepts. Automaton has 4318 states and 5434 transitions. Word has length 773 [2024-12-02 07:44:52,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:44:52,040 INFO L471 AbstractCegarLoop]: Abstraction has 4318 states and 5434 transitions. [2024-12-02 07:44:52,040 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.75) internal successors, (622), 8 states have internal predecessors, (622), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:44:52,040 INFO L276 IsEmpty]: Start isEmpty. Operand 4318 states and 5434 transitions. [2024-12-02 07:44:52,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 07:44:52,044 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:44:52,044 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:44:52,045 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable130 [2024-12-02 07:44:52,045 INFO L396 AbstractCegarLoop]: === Iteration 132 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:44:52,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:44:52,045 INFO L85 PathProgramCache]: Analyzing trace with hash 890888803, now seen corresponding path program 1 times [2024-12-02 07:44:52,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:44:52,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387062045] [2024-12-02 07:44:52,045 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:52,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:44:54,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:44:56,033 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 177 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-12-02 07:44:56,033 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:44:56,033 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387062045] [2024-12-02 07:44:56,033 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1387062045] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:44:56,033 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2071789974] [2024-12-02 07:44:56,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:44:56,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:44:56,034 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:44:56,035 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:44:56,036 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 07:45:00,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:00,790 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-12-02 07:45:00,801 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:45:01,159 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 92 proven. 0 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2024-12-02 07:45:01,159 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:45:01,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2071789974] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:45:01,159 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:45:01,160 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-12-02 07:45:01,160 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549224772] [2024-12-02 07:45:01,160 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:45:01,160 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:45:01,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:45:01,161 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:45:01,161 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:45:01,161 INFO L87 Difference]: Start difference. First operand 4318 states and 5434 transitions. Second operand has 4 states, 4 states have (on average 156.5) internal successors, (626), 4 states have internal predecessors, (626), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:45:01,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:45:01,556 INFO L93 Difference]: Finished difference Result 6211 states and 7778 transitions. [2024-12-02 07:45:01,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:45:01,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 156.5) internal successors, (626), 4 states have internal predecessors, (626), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 775 [2024-12-02 07:45:01,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:45:01,559 INFO L225 Difference]: With dead ends: 6211 [2024-12-02 07:45:01,559 INFO L226 Difference]: Without dead ends: 2282 [2024-12-02 07:45:01,560 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 784 GetRequests, 778 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:45:01,560 INFO L435 NwaCegarLoop]: 902 mSDtfsCounter, 1032 mSDsluCounter, 904 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1032 SdHoareTripleChecker+Valid, 1806 SdHoareTripleChecker+Invalid, 549 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:45:01,561 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1032 Valid, 1806 Invalid, 549 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:45:01,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2282 states. [2024-12-02 07:45:01,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2282 to 2282. [2024-12-02 07:45:01,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2282 states, 2268 states have (on average 1.2645502645502646) internal successors, (2868), 2268 states have internal predecessors, (2868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-12-02 07:45:01,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2282 states to 2282 states and 2892 transitions. [2024-12-02 07:45:01,592 INFO L78 Accepts]: Start accepts. Automaton has 2282 states and 2892 transitions. Word has length 775 [2024-12-02 07:45:01,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:45:01,592 INFO L471 AbstractCegarLoop]: Abstraction has 2282 states and 2892 transitions. [2024-12-02 07:45:01,592 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 156.5) internal successors, (626), 4 states have internal predecessors, (626), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:45:01,592 INFO L276 IsEmpty]: Start isEmpty. Operand 2282 states and 2892 transitions. [2024-12-02 07:45:01,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 07:45:01,598 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:45:01,598 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:45:01,634 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 07:45:01,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable131,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:45:01,798 INFO L396 AbstractCegarLoop]: === Iteration 133 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:45:01,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:45:01,799 INFO L85 PathProgramCache]: Analyzing trace with hash -1784286067, now seen corresponding path program 1 times [2024-12-02 07:45:01,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:45:01,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593797974] [2024-12-02 07:45:01,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:01,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:45:04,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:07,325 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2024-12-02 07:45:07,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:45:07,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593797974] [2024-12-02 07:45:07,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593797974] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:45:07,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:45:07,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-12-02 07:45:07,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780508886] [2024-12-02 07:45:07,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:45:07,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-12-02 07:45:07,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:45:07,326 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-12-02 07:45:07,326 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:45:07,327 INFO L87 Difference]: Start difference. First operand 2282 states and 2892 transitions. Second operand has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:45:09,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:45:09,159 INFO L93 Difference]: Finished difference Result 6035 states and 7520 transitions. [2024-12-02 07:45:09,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 07:45:09,160 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-02 07:45:09,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:45:09,162 INFO L225 Difference]: With dead ends: 6035 [2024-12-02 07:45:09,162 INFO L226 Difference]: Without dead ends: 4166 [2024-12-02 07:45:09,164 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-12-02 07:45:09,164 INFO L435 NwaCegarLoop]: 1477 mSDtfsCounter, 3026 mSDsluCounter, 6750 mSDsCounter, 0 mSdLazyCounter, 2875 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3027 SdHoareTripleChecker+Valid, 8227 SdHoareTripleChecker+Invalid, 2880 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 2875 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2024-12-02 07:45:09,164 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3027 Valid, 8227 Invalid, 2880 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 2875 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2024-12-02 07:45:09,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4166 states. [2024-12-02 07:45:09,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4166 to 2398. [2024-12-02 07:45:09,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2398 states, 2380 states have (on average 1.26890756302521) internal successors, (3020), 2380 states have internal predecessors, (3020), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-12-02 07:45:09,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2398 states to 2398 states and 3052 transitions. [2024-12-02 07:45:09,203 INFO L78 Accepts]: Start accepts. Automaton has 2398 states and 3052 transitions. Word has length 775 [2024-12-02 07:45:09,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:45:09,204 INFO L471 AbstractCegarLoop]: Abstraction has 2398 states and 3052 transitions. [2024-12-02 07:45:09,204 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 67.88888888888889) internal successors, (611), 9 states have internal predecessors, (611), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:45:09,204 INFO L276 IsEmpty]: Start isEmpty. Operand 2398 states and 3052 transitions. [2024-12-02 07:45:09,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 07:45:09,209 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:45:09,210 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:45:09,210 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable132 [2024-12-02 07:45:09,210 INFO L396 AbstractCegarLoop]: === Iteration 134 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:45:09,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:45:09,210 INFO L85 PathProgramCache]: Analyzing trace with hash -708444211, now seen corresponding path program 1 times [2024-12-02 07:45:09,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:45:09,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287649589] [2024-12-02 07:45:09,211 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:09,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:45:12,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:15,975 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-12-02 07:45:15,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:45:15,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287649589] [2024-12-02 07:45:15,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [287649589] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:45:15,975 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:45:15,975 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-12-02 07:45:15,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [892349906] [2024-12-02 07:45:15,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:45:15,976 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 07:45:15,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:45:15,976 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 07:45:15,976 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-12-02 07:45:15,976 INFO L87 Difference]: Start difference. First operand 2398 states and 3052 transitions. Second operand has 10 states, 10 states have (on average 60.7) internal successors, (607), 10 states have internal predecessors, (607), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:45:16,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:45:16,665 INFO L93 Difference]: Finished difference Result 4865 states and 6177 transitions. [2024-12-02 07:45:16,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-12-02 07:45:16,666 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 60.7) internal successors, (607), 10 states have internal predecessors, (607), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 775 [2024-12-02 07:45:16,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:45:16,668 INFO L225 Difference]: With dead ends: 4865 [2024-12-02 07:45:16,668 INFO L226 Difference]: Without dead ends: 3241 [2024-12-02 07:45:16,669 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2024-12-02 07:45:16,670 INFO L435 NwaCegarLoop]: 1909 mSDtfsCounter, 3705 mSDsluCounter, 11653 mSDsCounter, 0 mSdLazyCounter, 665 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3710 SdHoareTripleChecker+Valid, 13562 SdHoareTripleChecker+Invalid, 669 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 665 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:45:16,670 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3710 Valid, 13562 Invalid, 669 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 665 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:45:16,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3241 states. [2024-12-02 07:45:16,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3241 to 2458. [2024-12-02 07:45:16,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2458 states, 2437 states have (on average 1.270004103405827) internal successors, (3095), 2437 states have internal predecessors, (3095), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 07:45:16,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2458 states to 2458 states and 3133 transitions. [2024-12-02 07:45:16,709 INFO L78 Accepts]: Start accepts. Automaton has 2458 states and 3133 transitions. Word has length 775 [2024-12-02 07:45:16,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:45:16,709 INFO L471 AbstractCegarLoop]: Abstraction has 2458 states and 3133 transitions. [2024-12-02 07:45:16,710 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 60.7) internal successors, (607), 10 states have internal predecessors, (607), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:45:16,710 INFO L276 IsEmpty]: Start isEmpty. Operand 2458 states and 3133 transitions. [2024-12-02 07:45:16,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-12-02 07:45:16,713 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:45:16,713 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:45:16,713 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable133 [2024-12-02 07:45:16,713 INFO L396 AbstractCegarLoop]: === Iteration 135 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:45:16,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:45:16,714 INFO L85 PathProgramCache]: Analyzing trace with hash 77673837, now seen corresponding path program 1 times [2024-12-02 07:45:16,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:45:16,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930595872] [2024-12-02 07:45:16,714 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:16,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:45:22,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:29,189 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 144 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:45:29,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:45:29,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930595872] [2024-12-02 07:45:29,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [930595872] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:45:29,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491736861] [2024-12-02 07:45:29,189 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:29,190 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:45:29,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:45:29,191 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:45:29,192 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-12-02 07:45:34,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:34,893 INFO L256 TraceCheckSpWp]: Trace formula consists of 4801 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 07:45:34,904 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:45:34,970 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 167 proven. 0 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-12-02 07:45:34,970 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:45:34,970 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491736861] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:45:34,970 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:45:34,970 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-12-02 07:45:34,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238468233] [2024-12-02 07:45:34,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:45:34,971 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:45:34,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:45:34,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:45:34,971 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-02 07:45:34,971 INFO L87 Difference]: Start difference. First operand 2458 states and 3133 transitions. Second operand has 6 states, 5 states have (on average 145.2) internal successors, (726), 6 states have internal predecessors, (726), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:45:35,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:45:35,067 INFO L93 Difference]: Finished difference Result 4480 states and 5657 transitions. [2024-12-02 07:45:35,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:45:35,068 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 145.2) internal successors, (726), 6 states have internal predecessors, (726), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 775 [2024-12-02 07:45:35,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:45:35,071 INFO L225 Difference]: With dead ends: 4480 [2024-12-02 07:45:35,071 INFO L226 Difference]: Without dead ends: 2458 [2024-12-02 07:45:35,072 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 792 GetRequests, 772 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2024-12-02 07:45:35,072 INFO L435 NwaCegarLoop]: 1172 mSDtfsCounter, 0 mSDsluCounter, 4669 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5841 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:45:35,072 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5841 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:45:35,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2458 states. [2024-12-02 07:45:35,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2458 to 2458. [2024-12-02 07:45:35,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2458 states, 2437 states have (on average 1.2659006975789906) internal successors, (3085), 2437 states have internal predecessors, (3085), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 07:45:35,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2458 states to 2458 states and 3123 transitions. [2024-12-02 07:45:35,137 INFO L78 Accepts]: Start accepts. Automaton has 2458 states and 3123 transitions. Word has length 775 [2024-12-02 07:45:35,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:45:35,137 INFO L471 AbstractCegarLoop]: Abstraction has 2458 states and 3123 transitions. [2024-12-02 07:45:35,137 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 145.2) internal successors, (726), 6 states have internal predecessors, (726), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-12-02 07:45:35,137 INFO L276 IsEmpty]: Start isEmpty. Operand 2458 states and 3123 transitions. [2024-12-02 07:45:35,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 07:45:35,140 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:45:35,141 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:45:35,180 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-12-02 07:45:35,341 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable134 [2024-12-02 07:45:35,341 INFO L396 AbstractCegarLoop]: === Iteration 136 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:45:35,341 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:45:35,341 INFO L85 PathProgramCache]: Analyzing trace with hash 1037339293, now seen corresponding path program 1 times [2024-12-02 07:45:35,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:45:35,341 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276886680] [2024-12-02 07:45:35,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:35,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:45:39,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:42,301 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 4 proven. 179 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:45:42,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:45:42,301 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276886680] [2024-12-02 07:45:42,301 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [276886680] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:45:42,301 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1535734723] [2024-12-02 07:45:42,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:42,301 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:45:42,301 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:45:42,303 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:45:42,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 07:45:48,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:45:48,484 INFO L256 TraceCheckSpWp]: Trace formula consists of 4807 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-12-02 07:45:48,499 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:45:51,038 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 219 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 07:45:51,039 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:45:51,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1535734723] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:45:51,039 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:45:51,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14 [2024-12-02 07:45:51,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2099515298] [2024-12-02 07:45:51,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:45:51,040 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:45:51,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:45:51,040 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:45:51,040 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2024-12-02 07:45:51,041 INFO L87 Difference]: Start difference. First operand 2458 states and 3123 transitions. Second operand has 6 states, 6 states have (on average 125.5) internal successors, (753), 6 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:45:52,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:45:52,083 INFO L93 Difference]: Finished difference Result 5109 states and 6411 transitions. [2024-12-02 07:45:52,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:45:52,083 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.5) internal successors, (753), 6 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 777 [2024-12-02 07:45:52,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:45:52,087 INFO L225 Difference]: With dead ends: 5109 [2024-12-02 07:45:52,087 INFO L226 Difference]: Without dead ends: 4210 [2024-12-02 07:45:52,089 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 788 GetRequests, 775 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2024-12-02 07:45:52,089 INFO L435 NwaCegarLoop]: 1467 mSDtfsCounter, 1410 mSDsluCounter, 3795 mSDsCounter, 0 mSdLazyCounter, 1734 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1410 SdHoareTripleChecker+Valid, 5262 SdHoareTripleChecker+Invalid, 1735 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1734 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-12-02 07:45:52,089 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1410 Valid, 5262 Invalid, 1735 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1734 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-12-02 07:45:52,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4210 states. [2024-12-02 07:45:52,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4210 to 4180. [2024-12-02 07:45:52,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4180 states, 4159 states have (on average 1.2459725895647993) internal successors, (5182), 4159 states have internal predecessors, (5182), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19) [2024-12-02 07:45:52,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4180 states to 4180 states and 5220 transitions. [2024-12-02 07:45:52,145 INFO L78 Accepts]: Start accepts. Automaton has 4180 states and 5220 transitions. Word has length 777 [2024-12-02 07:45:52,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:45:52,146 INFO L471 AbstractCegarLoop]: Abstraction has 4180 states and 5220 transitions. [2024-12-02 07:45:52,146 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.5) internal successors, (753), 6 states have internal predecessors, (753), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:45:52,146 INFO L276 IsEmpty]: Start isEmpty. Operand 4180 states and 5220 transitions. [2024-12-02 07:45:52,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 07:45:52,150 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:45:52,150 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:45:52,195 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-12-02 07:45:52,350 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable135 [2024-12-02 07:45:52,351 INFO L396 AbstractCegarLoop]: === Iteration 137 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:45:52,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:45:52,351 INFO L85 PathProgramCache]: Analyzing trace with hash 882685662, now seen corresponding path program 1 times [2024-12-02 07:45:52,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:45:52,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98017676] [2024-12-02 07:45:52,351 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:45:52,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:45:58,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:01,817 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 4 proven. 177 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:46:01,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:46:01,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98017676] [2024-12-02 07:46:01,818 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98017676] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:46:01,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1257773900] [2024-12-02 07:46:01,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:01,818 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:46:01,818 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:46:01,819 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:46:01,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-12-02 07:46:10,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:10,197 INFO L256 TraceCheckSpWp]: Trace formula consists of 4807 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-12-02 07:46:10,208 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:46:10,512 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 175 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:46:10,513 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:46:10,963 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 181 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:46:10,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1257773900] provided 1 perfect and 1 imperfect interpolant sequences [2024-12-02 07:46:10,964 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-12-02 07:46:10,964 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10, 8] total 21 [2024-12-02 07:46:10,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188780902] [2024-12-02 07:46:10,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:46:10,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-12-02 07:46:10,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:46:10,965 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-12-02 07:46:10,965 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=370, Unknown=0, NotChecked=0, Total=420 [2024-12-02 07:46:10,965 INFO L87 Difference]: Start difference. First operand 4180 states and 5220 transitions. Second operand has 7 states, 7 states have (on average 107.14285714285714) internal successors, (750), 7 states have internal predecessors, (750), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:46:11,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:46:11,123 INFO L93 Difference]: Finished difference Result 7403 states and 9292 transitions. [2024-12-02 07:46:11,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 07:46:11,124 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 107.14285714285714) internal successors, (750), 7 states have internal predecessors, (750), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 777 [2024-12-02 07:46:11,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:46:11,128 INFO L225 Difference]: With dead ends: 7403 [2024-12-02 07:46:11,128 INFO L226 Difference]: Without dead ends: 5793 [2024-12-02 07:46:11,130 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1566 GetRequests, 1545 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2024-12-02 07:46:11,130 INFO L435 NwaCegarLoop]: 2066 mSDtfsCounter, 740 mSDsluCounter, 9409 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 740 SdHoareTripleChecker+Valid, 11475 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-12-02 07:46:11,130 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [740 Valid, 11475 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-12-02 07:46:11,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5793 states. [2024-12-02 07:46:11,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5793 to 4863. [2024-12-02 07:46:11,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4863 states, 4838 states have (on average 1.2277800744109135) internal successors, (5940), 4838 states have internal predecessors, (5940), 23 states have call successors, (23), 1 states have call predecessors, (23), 1 states have return successors, (23), 23 states have call predecessors, (23), 23 states have call successors, (23) [2024-12-02 07:46:11,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4863 states to 4863 states and 5986 transitions. [2024-12-02 07:46:11,190 INFO L78 Accepts]: Start accepts. Automaton has 4863 states and 5986 transitions. Word has length 777 [2024-12-02 07:46:11,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:46:11,191 INFO L471 AbstractCegarLoop]: Abstraction has 4863 states and 5986 transitions. [2024-12-02 07:46:11,191 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 107.14285714285714) internal successors, (750), 7 states have internal predecessors, (750), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:46:11,191 INFO L276 IsEmpty]: Start isEmpty. Operand 4863 states and 5986 transitions. [2024-12-02 07:46:11,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 778 [2024-12-02 07:46:11,196 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:46:11,196 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:46:11,238 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-12-02 07:46:11,396 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable136 [2024-12-02 07:46:11,396 INFO L396 AbstractCegarLoop]: === Iteration 138 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:46:11,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:46:11,397 INFO L85 PathProgramCache]: Analyzing trace with hash 829488787, now seen corresponding path program 1 times [2024-12-02 07:46:11,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:46:11,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549117764] [2024-12-02 07:46:11,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:11,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:46:11,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:12,803 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 145 proven. 0 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2024-12-02 07:46:12,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:46:12,804 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549117764] [2024-12-02 07:46:12,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549117764] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:46:12,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:46:12,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-12-02 07:46:12,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572841624] [2024-12-02 07:46:12,804 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:46:12,804 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-12-02 07:46:12,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:46:12,804 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-12-02 07:46:12,804 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:46:12,805 INFO L87 Difference]: Start difference. First operand 4863 states and 5986 transitions. Second operand has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:46:12,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:46:12,910 INFO L93 Difference]: Finished difference Result 8726 states and 10769 transitions. [2024-12-02 07:46:12,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-12-02 07:46:12,910 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 777 [2024-12-02 07:46:12,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:46:12,914 INFO L225 Difference]: With dead ends: 8726 [2024-12-02 07:46:12,914 INFO L226 Difference]: Without dead ends: 5003 [2024-12-02 07:46:12,916 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-12-02 07:46:12,916 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 15 mSDsluCounter, 3501 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 4672 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:46:12,916 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 4672 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:46:12,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5003 states. [2024-12-02 07:46:12,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5003 to 5003. [2024-12-02 07:46:12,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5003 states, 4978 states have (on average 1.232623543591804) internal successors, (6136), 4978 states have internal predecessors, (6136), 23 states have call successors, (23), 1 states have call predecessors, (23), 1 states have return successors, (23), 23 states have call predecessors, (23), 23 states have call successors, (23) [2024-12-02 07:46:12,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5003 states to 5003 states and 6182 transitions. [2024-12-02 07:46:12,976 INFO L78 Accepts]: Start accepts. Automaton has 5003 states and 6182 transitions. Word has length 777 [2024-12-02 07:46:12,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:46:12,976 INFO L471 AbstractCegarLoop]: Abstraction has 5003 states and 6182 transitions. [2024-12-02 07:46:12,976 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 144.6) internal successors, (723), 5 states have internal predecessors, (723), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:46:12,976 INFO L276 IsEmpty]: Start isEmpty. Operand 5003 states and 6182 transitions. [2024-12-02 07:46:12,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-12-02 07:46:12,981 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:46:12,981 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:46:12,981 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable137 [2024-12-02 07:46:12,981 INFO L396 AbstractCegarLoop]: === Iteration 139 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:46:12,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:46:12,981 INFO L85 PathProgramCache]: Analyzing trace with hash -1587321115, now seen corresponding path program 1 times [2024-12-02 07:46:12,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:46:12,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484761007] [2024-12-02 07:46:12,982 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:12,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:46:19,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:27,096 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 144 proven. 37 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:46:27,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:46:27,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484761007] [2024-12-02 07:46:27,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484761007] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:46:27,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [6978638] [2024-12-02 07:46:27,097 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:27,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:46:27,097 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:46:27,099 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:46:27,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-12-02 07:46:34,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:34,801 INFO L256 TraceCheckSpWp]: Trace formula consists of 4810 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-12-02 07:46:34,819 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:46:35,202 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 211 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-12-02 07:46:35,202 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:46:35,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [6978638] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:46:35,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:46:35,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [18] total 24 [2024-12-02 07:46:35,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87059560] [2024-12-02 07:46:35,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:46:35,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:46:35,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:46:35,204 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:46:35,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=475, Unknown=0, NotChecked=0, Total=552 [2024-12-02 07:46:35,204 INFO L87 Difference]: Start difference. First operand 5003 states and 6182 transitions. Second operand has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:46:36,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:46:36,133 INFO L93 Difference]: Finished difference Result 11593 states and 14496 transitions. [2024-12-02 07:46:36,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-12-02 07:46:36,134 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 778 [2024-12-02 07:46:36,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:46:36,139 INFO L225 Difference]: With dead ends: 11593 [2024-12-02 07:46:36,139 INFO L226 Difference]: Without dead ends: 8378 [2024-12-02 07:46:36,142 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 798 GetRequests, 773 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2024-12-02 07:46:36,142 INFO L435 NwaCegarLoop]: 903 mSDtfsCounter, 3624 mSDsluCounter, 3596 mSDsCounter, 0 mSdLazyCounter, 1378 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3630 SdHoareTripleChecker+Valid, 4499 SdHoareTripleChecker+Invalid, 1381 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-12-02 07:46:36,142 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3630 Valid, 4499 Invalid, 1381 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1378 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-12-02 07:46:36,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8378 states. [2024-12-02 07:46:36,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8378 to 6592. [2024-12-02 07:46:36,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6592 states, 6552 states have (on average 1.2113858363858363) internal successors, (7937), 6552 states have internal predecessors, (7937), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 07:46:36,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6592 states to 6592 states and 8013 transitions. [2024-12-02 07:46:36,231 INFO L78 Accepts]: Start accepts. Automaton has 6592 states and 8013 transitions. Word has length 778 [2024-12-02 07:46:36,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:46:36,232 INFO L471 AbstractCegarLoop]: Abstraction has 6592 states and 8013 transitions. [2024-12-02 07:46:36,232 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 93.875) internal successors, (751), 8 states have internal predecessors, (751), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:46:36,232 INFO L276 IsEmpty]: Start isEmpty. Operand 6592 states and 8013 transitions. [2024-12-02 07:46:36,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 07:46:36,237 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:46:36,237 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:46:36,280 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-12-02 07:46:36,437 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable138 [2024-12-02 07:46:36,438 INFO L396 AbstractCegarLoop]: === Iteration 140 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:46:36,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:46:36,438 INFO L85 PathProgramCache]: Analyzing trace with hash 1837918254, now seen corresponding path program 1 times [2024-12-02 07:46:36,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:46:36,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800929912] [2024-12-02 07:46:36,438 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:36,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:46:39,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:42,170 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 4 proven. 178 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:46:42,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:46:42,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800929912] [2024-12-02 07:46:42,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [800929912] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:46:42,170 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [524780935] [2024-12-02 07:46:42,170 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:42,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:46:42,171 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:46:42,172 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:46:42,173 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-12-02 07:46:57,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:46:57,559 INFO L256 TraceCheckSpWp]: Trace formula consists of 4813 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-12-02 07:46:57,569 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:46:57,613 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-12-02 07:46:57,613 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:46:57,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [524780935] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:46:57,613 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:46:57,613 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14 [2024-12-02 07:46:57,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393088777] [2024-12-02 07:46:57,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:46:57,614 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:46:57,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:46:57,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:46:57,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-02 07:46:57,614 INFO L87 Difference]: Start difference. First operand 6592 states and 8013 transitions. Second operand has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 07:46:57,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:46:57,765 INFO L93 Difference]: Finished difference Result 12611 states and 15238 transitions. [2024-12-02 07:46:57,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:46:57,765 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 779 [2024-12-02 07:46:57,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:46:57,770 INFO L225 Difference]: With dead ends: 12611 [2024-12-02 07:46:57,770 INFO L226 Difference]: Without dead ends: 6592 [2024-12-02 07:46:57,774 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 789 GetRequests, 777 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2024-12-02 07:46:57,774 INFO L435 NwaCegarLoop]: 1171 mSDtfsCounter, 0 mSDsluCounter, 4665 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5836 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:46:57,774 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5836 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:46:57,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6592 states. [2024-12-02 07:46:57,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6592 to 6592. [2024-12-02 07:46:57,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6592 states, 6552 states have (on average 1.210164835164835) internal successors, (7929), 6552 states have internal predecessors, (7929), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-12-02 07:46:57,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6592 states to 6592 states and 8005 transitions. [2024-12-02 07:46:57,868 INFO L78 Accepts]: Start accepts. Automaton has 6592 states and 8005 transitions. Word has length 779 [2024-12-02 07:46:57,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:46:57,868 INFO L471 AbstractCegarLoop]: Abstraction has 6592 states and 8005 transitions. [2024-12-02 07:46:57,868 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 121.0) internal successors, (605), 6 states have internal predecessors, (605), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-12-02 07:46:57,868 INFO L276 IsEmpty]: Start isEmpty. Operand 6592 states and 8005 transitions. [2024-12-02 07:46:57,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 07:46:57,875 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:46:57,875 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:46:57,923 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-12-02 07:46:58,075 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable139 [2024-12-02 07:46:58,076 INFO L396 AbstractCegarLoop]: === Iteration 141 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:46:58,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:46:58,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1253514579, now seen corresponding path program 1 times [2024-12-02 07:46:58,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:46:58,076 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454549003] [2024-12-02 07:46:58,076 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:46:58,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:47:01,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:03,732 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:47:03,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:47:03,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454549003] [2024-12-02 07:47:03,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1454549003] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:47:03,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:47:03,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-12-02 07:47:03,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047353755] [2024-12-02 07:47:03,733 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:47:03,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-12-02 07:47:03,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:47:03,734 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-12-02 07:47:03,734 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2024-12-02 07:47:03,734 INFO L87 Difference]: Start difference. First operand 6592 states and 8005 transitions. Second operand has 8 states, 8 states have (on average 94.0) internal successors, (752), 8 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:05,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:47:05,286 INFO L93 Difference]: Finished difference Result 11290 states and 13758 transitions. [2024-12-02 07:47:05,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-12-02 07:47:05,286 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 94.0) internal successors, (752), 8 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 779 [2024-12-02 07:47:05,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:47:05,292 INFO L225 Difference]: With dead ends: 11290 [2024-12-02 07:47:05,292 INFO L226 Difference]: Without dead ends: 8929 [2024-12-02 07:47:05,295 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:47:05,295 INFO L435 NwaCegarLoop]: 1563 mSDtfsCounter, 1522 mSDsluCounter, 7108 mSDsCounter, 0 mSdLazyCounter, 2882 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1525 SdHoareTripleChecker+Valid, 8671 SdHoareTripleChecker+Invalid, 2883 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2882 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:47:05,295 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1525 Valid, 8671 Invalid, 2883 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2882 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-12-02 07:47:05,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8929 states. [2024-12-02 07:47:05,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8929 to 8910. [2024-12-02 07:47:05,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8910 states, 8862 states have (on average 1.2122545700744753) internal successors, (10743), 8862 states have internal predecessors, (10743), 46 states have call successors, (46), 1 states have call predecessors, (46), 1 states have return successors, (46), 46 states have call predecessors, (46), 46 states have call successors, (46) [2024-12-02 07:47:05,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8910 states to 8910 states and 10835 transitions. [2024-12-02 07:47:05,411 INFO L78 Accepts]: Start accepts. Automaton has 8910 states and 10835 transitions. Word has length 779 [2024-12-02 07:47:05,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:47:05,411 INFO L471 AbstractCegarLoop]: Abstraction has 8910 states and 10835 transitions. [2024-12-02 07:47:05,411 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 94.0) internal successors, (752), 8 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:05,411 INFO L276 IsEmpty]: Start isEmpty. Operand 8910 states and 10835 transitions. [2024-12-02 07:47:05,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-12-02 07:47:05,418 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:47:05,419 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:47:05,419 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable140 [2024-12-02 07:47:05,419 INFO L396 AbstractCegarLoop]: === Iteration 142 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:47:05,419 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:47:05,419 INFO L85 PathProgramCache]: Analyzing trace with hash 655750382, now seen corresponding path program 1 times [2024-12-02 07:47:05,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:47:05,419 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53515883] [2024-12-02 07:47:05,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:05,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:47:09,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:11,359 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 184 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:47:11,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:47:11,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [53515883] [2024-12-02 07:47:11,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [53515883] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:47:11,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:47:11,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:47:11,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206566821] [2024-12-02 07:47:11,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:47:11,360 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:47:11,360 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:47:11,360 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:47:11,360 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:47:11,360 INFO L87 Difference]: Start difference. First operand 8910 states and 10835 transitions. Second operand has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:12,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:47:12,139 INFO L93 Difference]: Finished difference Result 12144 states and 14916 transitions. [2024-12-02 07:47:12,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:47:12,140 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 779 [2024-12-02 07:47:12,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:47:12,146 INFO L225 Difference]: With dead ends: 12144 [2024-12-02 07:47:12,146 INFO L226 Difference]: Without dead ends: 9778 [2024-12-02 07:47:12,148 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:47:12,148 INFO L435 NwaCegarLoop]: 903 mSDtfsCounter, 1490 mSDsluCounter, 2680 mSDsCounter, 0 mSdLazyCounter, 1082 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1493 SdHoareTripleChecker+Valid, 3583 SdHoareTripleChecker+Invalid, 1085 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1082 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-12-02 07:47:12,149 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1493 Valid, 3583 Invalid, 1085 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1082 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-12-02 07:47:12,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9778 states. [2024-12-02 07:47:12,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9778 to 7518. [2024-12-02 07:47:12,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7518 states, 7476 states have (on average 1.2280631353665061) internal successors, (9181), 7476 states have internal predecessors, (9181), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 07:47:12,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7518 states to 7518 states and 9261 transitions. [2024-12-02 07:47:12,255 INFO L78 Accepts]: Start accepts. Automaton has 7518 states and 9261 transitions. Word has length 779 [2024-12-02 07:47:12,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:47:12,255 INFO L471 AbstractCegarLoop]: Abstraction has 7518 states and 9261 transitions. [2024-12-02 07:47:12,256 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.33333333333333) internal successors, (752), 6 states have internal predecessors, (752), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:12,256 INFO L276 IsEmpty]: Start isEmpty. Operand 7518 states and 9261 transitions. [2024-12-02 07:47:12,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 07:47:12,262 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:47:12,262 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:47:12,262 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable141 [2024-12-02 07:47:12,262 INFO L396 AbstractCegarLoop]: === Iteration 143 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:47:12,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:47:12,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1836771703, now seen corresponding path program 1 times [2024-12-02 07:47:12,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:47:12,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805439793] [2024-12-02 07:47:12,263 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:12,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:47:12,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:13,762 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2024-12-02 07:47:13,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:47:13,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805439793] [2024-12-02 07:47:13,763 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1805439793] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:47:13,763 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:47:13,763 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:47:13,763 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157532559] [2024-12-02 07:47:13,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:47:13,763 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:47:13,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:47:13,764 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:47:13,764 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:47:13,764 INFO L87 Difference]: Start difference. First operand 7518 states and 9261 transitions. Second operand has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:14,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:47:14,431 INFO L93 Difference]: Finished difference Result 14077 states and 17217 transitions. [2024-12-02 07:47:14,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:47:14,431 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 780 [2024-12-02 07:47:14,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:47:14,438 INFO L225 Difference]: With dead ends: 14077 [2024-12-02 07:47:14,438 INFO L226 Difference]: Without dead ends: 7614 [2024-12-02 07:47:14,442 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:47:14,442 INFO L435 NwaCegarLoop]: 907 mSDtfsCounter, 1130 mSDsluCounter, 2701 mSDsCounter, 0 mSdLazyCounter, 1098 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1130 SdHoareTripleChecker+Valid, 3608 SdHoareTripleChecker+Invalid, 1099 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1098 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:47:14,443 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1130 Valid, 3608 Invalid, 1099 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1098 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:47:14,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7614 states. [2024-12-02 07:47:14,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7614 to 7566. [2024-12-02 07:47:14,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7566 states, 7524 states have (on average 1.226608187134503) internal successors, (9229), 7524 states have internal predecessors, (9229), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 07:47:14,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7566 states to 7566 states and 9309 transitions. [2024-12-02 07:47:14,552 INFO L78 Accepts]: Start accepts. Automaton has 7566 states and 9309 transitions. Word has length 780 [2024-12-02 07:47:14,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:47:14,553 INFO L471 AbstractCegarLoop]: Abstraction has 7566 states and 9309 transitions. [2024-12-02 07:47:14,553 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 102.33333333333333) internal successors, (614), 6 states have internal predecessors, (614), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:47:14,553 INFO L276 IsEmpty]: Start isEmpty. Operand 7566 states and 9309 transitions. [2024-12-02 07:47:14,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 07:47:14,559 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:47:14,559 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:47:14,559 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable142 [2024-12-02 07:47:14,559 INFO L396 AbstractCegarLoop]: === Iteration 144 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:47:14,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:47:14,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1279464039, now seen corresponding path program 1 times [2024-12-02 07:47:14,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:47:14,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1739224763] [2024-12-02 07:47:14,560 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:14,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:47:17,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:20,091 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 4 proven. 179 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:47:20,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:47:20,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1739224763] [2024-12-02 07:47:20,091 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1739224763] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:47:20,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [483183958] [2024-12-02 07:47:20,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:20,092 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:47:20,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:47:20,093 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:47:20,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-12-02 07:47:36,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:36,181 INFO L256 TraceCheckSpWp]: Trace formula consists of 4816 conjuncts, 72 conjuncts are in the unsatisfiable core [2024-12-02 07:47:36,194 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:47:38,992 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 215 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-12-02 07:47:38,992 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:47:43,205 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 179 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:47:43,205 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [483183958] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 07:47:43,205 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 07:47:43,205 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 14] total 33 [2024-12-02 07:47:43,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911637250] [2024-12-02 07:47:43,205 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 07:47:43,206 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-12-02 07:47:43,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:47:43,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-12-02 07:47:43,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=898, Unknown=0, NotChecked=0, Total=1056 [2024-12-02 07:47:43,208 INFO L87 Difference]: Start difference. First operand 7566 states and 9309 transitions. Second operand has 33 states, 33 states have (on average 62.57575757575758) internal successors, (2065), 33 states have internal predecessors, (2065), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 07:47:46,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:47:46,445 INFO L93 Difference]: Finished difference Result 14851 states and 18185 transitions. [2024-12-02 07:47:46,445 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-12-02 07:47:46,446 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 62.57575757575758) internal successors, (2065), 33 states have internal predecessors, (2065), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 780 [2024-12-02 07:47:46,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:47:46,451 INFO L225 Difference]: With dead ends: 14851 [2024-12-02 07:47:46,451 INFO L226 Difference]: Without dead ends: 7634 [2024-12-02 07:47:46,455 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1592 GetRequests, 1538 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 650 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=530, Invalid=2550, Unknown=0, NotChecked=0, Total=3080 [2024-12-02 07:47:46,456 INFO L435 NwaCegarLoop]: 1090 mSDtfsCounter, 5477 mSDsluCounter, 16441 mSDsCounter, 0 mSdLazyCounter, 5628 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5480 SdHoareTripleChecker+Valid, 17531 SdHoareTripleChecker+Invalid, 5645 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 5628 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.6s IncrementalHoareTripleChecker+Time [2024-12-02 07:47:46,456 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5480 Valid, 17531 Invalid, 5645 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 5628 Invalid, 0 Unknown, 0 Unchecked, 2.6s Time] [2024-12-02 07:47:46,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7634 states. [2024-12-02 07:47:46,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7634 to 7592. [2024-12-02 07:47:46,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7592 states, 7550 states have (on average 1.226092715231788) internal successors, (9257), 7550 states have internal predecessors, (9257), 40 states have call successors, (40), 1 states have call predecessors, (40), 1 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2024-12-02 07:47:46,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7592 states to 7592 states and 9337 transitions. [2024-12-02 07:47:46,560 INFO L78 Accepts]: Start accepts. Automaton has 7592 states and 9337 transitions. Word has length 780 [2024-12-02 07:47:46,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:47:46,560 INFO L471 AbstractCegarLoop]: Abstraction has 7592 states and 9337 transitions. [2024-12-02 07:47:46,561 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 62.57575757575758) internal successors, (2065), 33 states have internal predecessors, (2065), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-12-02 07:47:46,561 INFO L276 IsEmpty]: Start isEmpty. Operand 7592 states and 9337 transitions. [2024-12-02 07:47:46,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-12-02 07:47:46,566 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:47:46,567 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:47:46,613 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-12-02 07:47:46,767 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable143,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:47:46,767 INFO L396 AbstractCegarLoop]: === Iteration 145 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:47:46,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:47:46,767 INFO L85 PathProgramCache]: Analyzing trace with hash -1649950389, now seen corresponding path program 1 times [2024-12-02 07:47:46,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:47:46,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202047596] [2024-12-02 07:47:46,768 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:46,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:47:53,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:47:55,691 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 177 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:47:55,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:47:55,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202047596] [2024-12-02 07:47:55,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1202047596] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:47:55,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [237631413] [2024-12-02 07:47:55,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:47:55,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:47:55,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:47:55,693 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:47:55,693 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-12-02 07:48:04,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:48:04,229 INFO L256 TraceCheckSpWp]: Trace formula consists of 4814 conjuncts, 120 conjuncts are in the unsatisfiable core [2024-12-02 07:48:04,245 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:48:08,344 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 144 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:48:08,344 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:48:25,232 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 144 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:48:25,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [237631413] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 07:48:25,232 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 07:48:25,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 23, 21] total 47 [2024-12-02 07:48:25,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854626166] [2024-12-02 07:48:25,232 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 07:48:25,233 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2024-12-02 07:48:25,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:48:25,234 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2024-12-02 07:48:25,234 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=1950, Unknown=0, NotChecked=0, Total=2162 [2024-12-02 07:48:25,234 INFO L87 Difference]: Start difference. First operand 7592 states and 9337 transitions. Second operand has 47 states, 47 states have (on average 41.5531914893617) internal successors, (1953), 47 states have internal predecessors, (1953), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) [2024-12-02 07:48:48,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:48:48,647 INFO L93 Difference]: Finished difference Result 77135 states and 95679 transitions. [2024-12-02 07:48:48,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2024-12-02 07:48:48,648 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 41.5531914893617) internal successors, (1953), 47 states have internal predecessors, (1953), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) Word has length 780 [2024-12-02 07:48:48,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:48:48,695 INFO L225 Difference]: With dead ends: 77135 [2024-12-02 07:48:48,696 INFO L226 Difference]: Without dead ends: 69940 [2024-12-02 07:48:48,714 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1667 GetRequests, 1521 SyntacticMatches, 0 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6109 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=3198, Invalid=18558, Unknown=0, NotChecked=0, Total=21756 [2024-12-02 07:48:48,714 INFO L435 NwaCegarLoop]: 2505 mSDtfsCounter, 33757 mSDsluCounter, 53704 mSDsCounter, 0 mSdLazyCounter, 25969 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 14.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33763 SdHoareTripleChecker+Valid, 56209 SdHoareTripleChecker+Invalid, 26022 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 25969 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 16.6s IncrementalHoareTripleChecker+Time [2024-12-02 07:48:48,714 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [33763 Valid, 56209 Invalid, 26022 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [53 Valid, 25969 Invalid, 0 Unknown, 0 Unchecked, 16.6s Time] [2024-12-02 07:48:48,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69940 states. [2024-12-02 07:48:49,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69940 to 16206. [2024-12-02 07:48:49,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16206 states, 16084 states have (on average 1.2368191992041782) internal successors, (19893), 16084 states have internal predecessors, (19893), 120 states have call successors, (120), 1 states have call predecessors, (120), 1 states have return successors, (120), 120 states have call predecessors, (120), 120 states have call successors, (120) [2024-12-02 07:48:49,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16206 states to 16206 states and 20133 transitions. [2024-12-02 07:48:49,203 INFO L78 Accepts]: Start accepts. Automaton has 16206 states and 20133 transitions. Word has length 780 [2024-12-02 07:48:49,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:48:49,203 INFO L471 AbstractCegarLoop]: Abstraction has 16206 states and 20133 transitions. [2024-12-02 07:48:49,204 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 41.5531914893617) internal successors, (1953), 47 states have internal predecessors, (1953), 9 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 9 states have call predecessors, (18), 9 states have call successors, (18) [2024-12-02 07:48:49,204 INFO L276 IsEmpty]: Start isEmpty. Operand 16206 states and 20133 transitions. [2024-12-02 07:48:49,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 07:48:49,216 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:48:49,217 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:48:49,268 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-12-02 07:48:49,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable144 [2024-12-02 07:48:49,417 INFO L396 AbstractCegarLoop]: === Iteration 146 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:48:49,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:48:49,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1282797311, now seen corresponding path program 1 times [2024-12-02 07:48:49,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:48:49,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136548368] [2024-12-02 07:48:49,418 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:48:49,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:48:54,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:48:59,892 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:48:59,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:48:59,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136548368] [2024-12-02 07:48:59,893 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2136548368] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:48:59,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [872107509] [2024-12-02 07:48:59,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:48:59,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:48:59,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:48:59,895 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:48:59,895 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-12-02 07:49:21,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:49:21,477 INFO L256 TraceCheckSpWp]: Trace formula consists of 4820 conjuncts, 278 conjuncts are in the unsatisfiable core [2024-12-02 07:49:21,499 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:49:33,479 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 148 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:49:33,479 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:49:55,890 INFO L134 CoverageAnalysis]: Checked inductivity of 242 backedges. 140 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:49:55,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [872107509] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 07:49:55,890 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 07:49:55,890 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 43, 35] total 87 [2024-12-02 07:49:55,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864879369] [2024-12-02 07:49:55,891 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 07:49:55,891 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 87 states [2024-12-02 07:49:55,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:49:55,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2024-12-02 07:49:55,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1254, Invalid=6228, Unknown=0, NotChecked=0, Total=7482 [2024-12-02 07:49:55,894 INFO L87 Difference]: Start difference. First operand 16206 states and 20133 transitions. Second operand has 87 states, 87 states have (on average 22.528735632183906) internal successors, (1960), 87 states have internal predecessors, (1960), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-12-02 07:51:55,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:51:55,686 INFO L93 Difference]: Finished difference Result 206698 states and 257352 transitions. [2024-12-02 07:51:55,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 418 states. [2024-12-02 07:51:55,686 INFO L78 Accepts]: Start accepts. Automaton has has 87 states, 87 states have (on average 22.528735632183906) internal successors, (1960), 87 states have internal predecessors, (1960), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) Word has length 782 [2024-12-02 07:51:55,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:51:55,796 INFO L225 Difference]: With dead ends: 206698 [2024-12-02 07:51:55,796 INFO L226 Difference]: Without dead ends: 195951 [2024-12-02 07:51:55,836 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1980 GetRequests, 1491 SyntacticMatches, 0 SemanticMatches, 489 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91838 ImplicationChecksByTransitivity, 28.7s TimeCoverageRelationStatistics Valid=26381, Invalid=214209, Unknown=0, NotChecked=0, Total=240590 [2024-12-02 07:51:55,836 INFO L435 NwaCegarLoop]: 5567 mSDtfsCounter, 85234 mSDsluCounter, 204678 mSDsCounter, 0 mSdLazyCounter, 129745 mSolverCounterSat, 214 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 69.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85243 SdHoareTripleChecker+Valid, 210245 SdHoareTripleChecker+Invalid, 129959 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.7s SdHoareTripleChecker+Time, 214 IncrementalHoareTripleChecker+Valid, 129745 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 79.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:51:55,836 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [85243 Valid, 210245 Invalid, 129959 Unknown, 0 Unchecked, 0.7s Time], IncrementalHoareTripleChecker [214 Valid, 129745 Invalid, 0 Unknown, 0 Unchecked, 79.5s Time] [2024-12-02 07:51:56,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195951 states. [2024-12-02 07:51:57,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195951 to 37797. [2024-12-02 07:51:57,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37797 states, 37399 states have (on average 1.2348725901762079) internal successors, (46183), 37399 states have internal predecessors, (46183), 396 states have call successors, (396), 1 states have call predecessors, (396), 1 states have return successors, (396), 396 states have call predecessors, (396), 396 states have call successors, (396) [2024-12-02 07:51:57,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37797 states to 37797 states and 46975 transitions. [2024-12-02 07:51:57,411 INFO L78 Accepts]: Start accepts. Automaton has 37797 states and 46975 transitions. Word has length 782 [2024-12-02 07:51:57,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:51:57,412 INFO L471 AbstractCegarLoop]: Abstraction has 37797 states and 46975 transitions. [2024-12-02 07:51:57,412 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 87 states, 87 states have (on average 22.528735632183906) internal successors, (1960), 87 states have internal predecessors, (1960), 13 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 13 states have call predecessors, (18), 13 states have call successors, (18) [2024-12-02 07:51:57,412 INFO L276 IsEmpty]: Start isEmpty. Operand 37797 states and 46975 transitions. [2024-12-02 07:51:57,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 07:51:57,546 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:51:57,546 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:51:57,596 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-12-02 07:51:57,747 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable145 [2024-12-02 07:51:57,747 INFO L396 AbstractCegarLoop]: === Iteration 147 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:51:57,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:51:57,747 INFO L85 PathProgramCache]: Analyzing trace with hash -835229083, now seen corresponding path program 1 times [2024-12-02 07:51:57,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:51:57,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986833469] [2024-12-02 07:51:57,748 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:51:57,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:52:04,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:52:08,070 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:52:08,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:52:08,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986833469] [2024-12-02 07:52:08,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986833469] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:52:08,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [280428563] [2024-12-02 07:52:08,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:52:08,070 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:52:08,070 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:52:08,072 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:52:08,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-12-02 07:52:25,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:52:25,558 INFO L256 TraceCheckSpWp]: Trace formula consists of 4820 conjuncts, 104 conjuncts are in the unsatisfiable core [2024-12-02 07:52:25,569 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:52:28,822 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:52:28,822 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:52:35,207 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:52:35,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [280428563] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 07:52:35,207 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 07:52:35,207 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 22, 16] total 45 [2024-12-02 07:52:35,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041607381] [2024-12-02 07:52:35,208 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 07:52:35,208 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2024-12-02 07:52:35,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:52:35,209 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2024-12-02 07:52:35,210 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=1795, Unknown=0, NotChecked=0, Total=1980 [2024-12-02 07:52:35,210 INFO L87 Difference]: Start difference. First operand 37797 states and 46975 transitions. Second operand has 45 states, 45 states have (on average 49.08888888888889) internal successors, (2209), 45 states have internal predecessors, (2209), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 07:52:40,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:52:40,325 INFO L93 Difference]: Finished difference Result 66975 states and 83036 transitions. [2024-12-02 07:52:40,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-12-02 07:52:40,326 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 45 states have (on average 49.08888888888889) internal successors, (2209), 45 states have internal predecessors, (2209), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 782 [2024-12-02 07:52:40,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:52:40,354 INFO L225 Difference]: With dead ends: 66975 [2024-12-02 07:52:40,354 INFO L226 Difference]: Without dead ends: 38271 [2024-12-02 07:52:40,372 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1602 GetRequests, 1533 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1284 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=485, Invalid=4485, Unknown=0, NotChecked=0, Total=4970 [2024-12-02 07:52:40,372 INFO L435 NwaCegarLoop]: 1098 mSDtfsCounter, 2772 mSDsluCounter, 27680 mSDsCounter, 0 mSdLazyCounter, 9069 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2775 SdHoareTripleChecker+Valid, 28778 SdHoareTripleChecker+Invalid, 9080 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 9069 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.8s IncrementalHoareTripleChecker+Time [2024-12-02 07:52:40,372 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2775 Valid, 28778 Invalid, 9080 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [11 Valid, 9069 Invalid, 0 Unknown, 0 Unchecked, 3.8s Time] [2024-12-02 07:52:40,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38271 states. [2024-12-02 07:52:41,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38271 to 37953. [2024-12-02 07:52:41,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37953 states, 37555 states have (on average 1.2313407003062176) internal successors, (46243), 37555 states have internal predecessors, (46243), 396 states have call successors, (396), 1 states have call predecessors, (396), 1 states have return successors, (396), 396 states have call predecessors, (396), 396 states have call successors, (396) [2024-12-02 07:52:41,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37953 states to 37953 states and 47035 transitions. [2024-12-02 07:52:41,249 INFO L78 Accepts]: Start accepts. Automaton has 37953 states and 47035 transitions. Word has length 782 [2024-12-02 07:52:41,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:52:41,250 INFO L471 AbstractCegarLoop]: Abstraction has 37953 states and 47035 transitions. [2024-12-02 07:52:41,250 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 49.08888888888889) internal successors, (2209), 45 states have internal predecessors, (2209), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-12-02 07:52:41,250 INFO L276 IsEmpty]: Start isEmpty. Operand 37953 states and 47035 transitions. [2024-12-02 07:52:41,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 783 [2024-12-02 07:52:41,276 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:52:41,277 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:52:41,328 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-12-02 07:52:41,477 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable146 [2024-12-02 07:52:41,477 INFO L396 AbstractCegarLoop]: === Iteration 148 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:52:41,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:52:41,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1693405887, now seen corresponding path program 1 times [2024-12-02 07:52:41,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:52:41,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153633384] [2024-12-02 07:52:41,478 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:52:41,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:52:41,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:52:43,836 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:52:43,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:52:43,836 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153633384] [2024-12-02 07:52:43,836 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [153633384] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:52:43,836 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-12-02 07:52:43,836 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-12-02 07:52:43,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165942418] [2024-12-02 07:52:43,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:52:43,837 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-12-02 07:52:43,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:52:43,837 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-12-02 07:52:43,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-12-02 07:52:43,837 INFO L87 Difference]: Start difference. First operand 37953 states and 47035 transitions. Second operand has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:52:45,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:52:45,053 INFO L93 Difference]: Finished difference Result 69214 states and 86017 transitions. [2024-12-02 07:52:45,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-12-02 07:52:45,054 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 782 [2024-12-02 07:52:45,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:52:45,104 INFO L225 Difference]: With dead ends: 69214 [2024-12-02 07:52:45,104 INFO L226 Difference]: Without dead ends: 52048 [2024-12-02 07:52:45,122 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-12-02 07:52:45,122 INFO L435 NwaCegarLoop]: 2037 mSDtfsCounter, 855 mSDsluCounter, 7266 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 855 SdHoareTripleChecker+Valid, 9303 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-12-02 07:52:45,122 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [855 Valid, 9303 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-12-02 07:52:45,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52048 states. [2024-12-02 07:52:46,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52048 to 41421. [2024-12-02 07:52:46,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41421 states, 40841 states have (on average 1.2306995421267843) internal successors, (50263), 40841 states have internal predecessors, (50263), 578 states have call successors, (578), 1 states have call predecessors, (578), 1 states have return successors, (578), 578 states have call predecessors, (578), 578 states have call successors, (578) [2024-12-02 07:52:46,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41421 states to 41421 states and 51419 transitions. [2024-12-02 07:52:46,630 INFO L78 Accepts]: Start accepts. Automaton has 41421 states and 51419 transitions. Word has length 782 [2024-12-02 07:52:46,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:52:46,631 INFO L471 AbstractCegarLoop]: Abstraction has 41421 states and 51419 transitions. [2024-12-02 07:52:46,631 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 125.83333333333333) internal successors, (755), 6 states have internal predecessors, (755), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-12-02 07:52:46,631 INFO L276 IsEmpty]: Start isEmpty. Operand 41421 states and 51419 transitions. [2024-12-02 07:52:46,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 07:52:46,657 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:52:46,657 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:52:46,657 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable147 [2024-12-02 07:52:46,657 INFO L396 AbstractCegarLoop]: === Iteration 149 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:52:46,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:52:46,658 INFO L85 PathProgramCache]: Analyzing trace with hash -120512030, now seen corresponding path program 1 times [2024-12-02 07:52:46,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:52:46,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029789214] [2024-12-02 07:52:46,658 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:52:46,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:52:51,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:52:54,613 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:52:54,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-12-02 07:52:54,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029789214] [2024-12-02 07:52:54,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2029789214] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:52:54,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1045870458] [2024-12-02 07:52:54,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:52:54,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:52:54,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:52:54,615 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:52:54,619 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-12-02 07:53:04,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:53:04,979 INFO L256 TraceCheckSpWp]: Trace formula consists of 4821 conjuncts, 67 conjuncts are in the unsatisfiable core [2024-12-02 07:53:04,989 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:53:09,701 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 2 proven. 182 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-12-02 07:53:09,701 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:53:18,836 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 8 proven. 147 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2024-12-02 07:53:18,836 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1045870458] provided 0 perfect and 2 imperfect interpolant sequences [2024-12-02 07:53:18,836 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-12-02 07:53:18,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 16, 10] total 31 [2024-12-02 07:53:18,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605327322] [2024-12-02 07:53:18,837 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-12-02 07:53:18,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2024-12-02 07:53:18,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-12-02 07:53:18,838 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-12-02 07:53:18,838 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=809, Unknown=0, NotChecked=0, Total=930 [2024-12-02 07:53:18,839 INFO L87 Difference]: Start difference. First operand 41421 states and 51419 transitions. Second operand has 31 states, 31 states have (on average 68.16129032258064) internal successors, (2113), 31 states have internal predecessors, (2113), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 07:53:22,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:53:22,687 INFO L93 Difference]: Finished difference Result 75656 states and 93921 transitions. [2024-12-02 07:53:22,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-12-02 07:53:22,688 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 68.16129032258064) internal successors, (2113), 31 states have internal predecessors, (2113), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) Word has length 783 [2024-12-02 07:53:22,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:53:22,719 INFO L225 Difference]: With dead ends: 75656 [2024-12-02 07:53:22,719 INFO L226 Difference]: Without dead ends: 42626 [2024-12-02 07:53:22,745 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1598 GetRequests, 1547 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 638 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=367, Invalid=2389, Unknown=0, NotChecked=0, Total=2756 [2024-12-02 07:53:22,746 INFO L435 NwaCegarLoop]: 1099 mSDtfsCounter, 4017 mSDsluCounter, 16853 mSDsCounter, 0 mSdLazyCounter, 5574 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4017 SdHoareTripleChecker+Valid, 17952 SdHoareTripleChecker+Invalid, 5579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 5574 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2024-12-02 07:53:22,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4017 Valid, 17952 Invalid, 5579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 5574 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2024-12-02 07:53:22,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42626 states. [2024-12-02 07:53:23,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42626 to 39457. [2024-12-02 07:53:23,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39457 states, 38877 states have (on average 1.2312421225917638) internal successors, (47867), 38877 states have internal predecessors, (47867), 578 states have call successors, (578), 1 states have call predecessors, (578), 1 states have return successors, (578), 578 states have call predecessors, (578), 578 states have call successors, (578) [2024-12-02 07:53:23,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39457 states to 39457 states and 49023 transitions. [2024-12-02 07:53:23,937 INFO L78 Accepts]: Start accepts. Automaton has 39457 states and 49023 transitions. Word has length 783 [2024-12-02 07:53:23,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:53:23,938 INFO L471 AbstractCegarLoop]: Abstraction has 39457 states and 49023 transitions. [2024-12-02 07:53:23,938 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 68.16129032258064) internal successors, (2113), 31 states have internal predecessors, (2113), 4 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 4 states have call predecessors, (12), 4 states have call successors, (12) [2024-12-02 07:53:23,938 INFO L276 IsEmpty]: Start isEmpty. Operand 39457 states and 49023 transitions. [2024-12-02 07:53:23,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-12-02 07:53:23,962 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:53:23,962 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:53:24,013 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-12-02 07:53:24,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable148,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:53:24,163 INFO L396 AbstractCegarLoop]: === Iteration 150 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:53:24,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:53:24,163 INFO L85 PathProgramCache]: Analyzing trace with hash 1442248545, now seen corresponding path program 1 times [2024-12-02 07:53:24,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-12-02 07:53:24,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705212327] [2024-12-02 07:53:24,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:53:24,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-12-02 07:53:38,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 07:53:38,912 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-12-02 07:53:51,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-12-02 07:53:52,266 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-12-02 07:53:52,266 INFO L340 BasicCegarLoop]: Counterexample is feasible [2024-12-02 07:53:52,267 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-12-02 07:53:52,268 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable149 [2024-12-02 07:53:52,270 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:53:52,763 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-12-02 07:53:52,765 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.12 07:53:52 BoogieIcfgContainer [2024-12-02 07:53:52,765 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-12-02 07:53:52,766 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-12-02 07:53:52,766 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-12-02 07:53:52,766 INFO L274 PluginConnector]: Witness Printer initialized [2024-12-02 07:53:52,766 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:41:42" (3/4) ... [2024-12-02 07:53:52,768 INFO L149 WitnessPrinter]: No result that supports witness generation found [2024-12-02 07:53:52,769 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-12-02 07:53:52,769 INFO L158 Benchmark]: Toolchain (without parser) took 734593.86ms. Allocated memory was 142.6MB in the beginning and 3.4GB in the end (delta: 3.3GB). Free memory was 115.3MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.9GB. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 142.6MB. Free memory was 82.6MB in the beginning and 82.6MB in the end (delta: 31.5kB). There was no memory consumed. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: CACSL2BoogieTranslator took 540.89ms. Allocated memory is still 142.6MB. Free memory was 115.1MB in the beginning and 62.4MB in the end (delta: 52.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: Boogie Procedure Inliner took 258.22ms. Allocated memory is still 142.6MB. Free memory was 62.4MB in the beginning and 55.7MB in the end (delta: 6.7MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: Boogie Preprocessor took 300.27ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 55.7MB in the beginning and 65.3MB in the end (delta: -9.6MB). Peak memory consumption was 33.0MB. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: RCFGBuilder took 3323.07ms. Allocated memory was 151.0MB in the beginning and 369.1MB in the end (delta: 218.1MB). Free memory was 65.3MB in the beginning and 186.0MB in the end (delta: -120.7MB). Peak memory consumption was 202.7MB. Max. memory is 16.1GB. [2024-12-02 07:53:52,769 INFO L158 Benchmark]: TraceAbstraction took 730162.87ms. Allocated memory was 369.1MB in the beginning and 3.4GB in the end (delta: 3.1GB). Free memory was 186.0MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. [2024-12-02 07:53:52,770 INFO L158 Benchmark]: Witness Printer took 3.00ms. Allocated memory is still 3.4GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 3.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-12-02 07:53:52,770 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 142.6MB. Free memory was 82.6MB in the beginning and 82.6MB in the end (delta: 31.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 540.89ms. Allocated memory is still 142.6MB. Free memory was 115.1MB in the beginning and 62.4MB in the end (delta: 52.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 258.22ms. Allocated memory is still 142.6MB. Free memory was 62.4MB in the beginning and 55.7MB in the end (delta: 6.7MB). Peak memory consumption was 30.5MB. Max. memory is 16.1GB. * Boogie Preprocessor took 300.27ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 55.7MB in the beginning and 65.3MB in the end (delta: -9.6MB). Peak memory consumption was 33.0MB. Max. memory is 16.1GB. * RCFGBuilder took 3323.07ms. Allocated memory was 151.0MB in the beginning and 369.1MB in the end (delta: 218.1MB). Free memory was 65.3MB in the beginning and 186.0MB in the end (delta: -120.7MB). Peak memory consumption was 202.7MB. Max. memory is 16.1GB. * TraceAbstraction took 730162.87ms. Allocated memory was 369.1MB in the beginning and 3.4GB in the end (delta: 3.1GB). Free memory was 186.0MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. * Witness Printer took 3.00ms. Allocated memory is still 3.4GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 3.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 199, overapproximation of bitwiseOr at line 180, overapproximation of bitwiseOr at line 584, overapproximation of bitwiseAnd at line 256, overapproximation of bitwiseAnd at line 982, overapproximation of bitwiseAnd at line 348, overapproximation of bitwiseAnd at line 312, overapproximation of bitwiseAnd at line 735, overapproximation of bitwiseAnd at line 164, overapproximation of bitwiseAnd at line 324, overapproximation of bitwiseAnd at line 330, overapproximation of bitwiseAnd at line 420, overapproximation of bitwiseAnd at line 300, overapproximation of bitwiseAnd at line 1077, overapproximation of bitwiseAnd at line 396, overapproximation of bitwiseAnd at line 318, overapproximation of bitwiseAnd at line 432, overapproximation of bitwiseAnd at line 678, overapproximation of bitwiseAnd at line 963, overapproximation of bitwiseAnd at line 697, overapproximation of bitwiseAnd at line 414, overapproximation of bitwiseAnd at line 906, overapproximation of bitwiseAnd at line 360, overapproximation of bitwiseAnd at line 282, overapproximation of bitwiseAnd at line 426, overapproximation of bitwiseAnd at line 1115, overapproximation of bitwiseAnd at line 754, overapproximation of bitwiseAnd at line 593, overapproximation of bitwiseAnd at line 1134, overapproximation of bitwiseAnd at line 849, overapproximation of bitwiseAnd at line 773, overapproximation of bitwiseAnd at line 925, overapproximation of bitwiseAnd at line 306, overapproximation of bitwiseAnd at line 264, overapproximation of bitwiseAnd at line 408, overapproximation of bitwiseAnd at line 366, overapproximation of bitwiseAnd at line 1020, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 378, overapproximation of bitwiseAnd at line 1265, overapproximation of bitwiseAnd at line 1058, overapproximation of bitwiseAnd at line 1191, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 1039, overapproximation of bitwiseAnd at line 830, overapproximation of bitwiseAnd at line 792, overapproximation of bitwiseAnd at line 811, overapproximation of bitwiseAnd at line 336, overapproximation of bitwiseAnd at line 716, overapproximation of bitwiseAnd at line 160, overapproximation of bitwiseAnd at line 1001, overapproximation of bitwiseAnd at line 354, overapproximation of bitwiseAnd at line 372, overapproximation of bitwiseAnd at line 887, overapproximation of bitwiseAnd at line 1153, overapproximation of bitwiseAnd at line 390, overapproximation of bitwiseAnd at line 402, overapproximation of bitwiseAnd at line 288, overapproximation of bitwiseAnd at line 659, overapproximation of bitwiseAnd at line 276, overapproximation of bitwiseAnd at line 868. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 7); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (7 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 6); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (6 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 5); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (5 - 1); [L41] const SORT_100 mask_SORT_100 = (SORT_100)-1 >> (sizeof(SORT_100) * 8 - 4); [L42] const SORT_100 msb_SORT_100 = (SORT_100)1 << (4 - 1); [L44] const SORT_141 mask_SORT_141 = (SORT_141)-1 >> (sizeof(SORT_141) * 8 - 3); [L45] const SORT_141 msb_SORT_141 = (SORT_141)1 << (3 - 1); [L47] const SORT_162 mask_SORT_162 = (SORT_162)-1 >> (sizeof(SORT_162) * 8 - 2); [L48] const SORT_162 msb_SORT_162 = (SORT_162)1 << (2 - 1); [L50] const SORT_13 var_15 = 32; [L51] const SORT_19 var_20 = 31; [L52] const SORT_19 var_25 = 30; [L53] const SORT_19 var_30 = 29; [L54] const SORT_19 var_35 = 28; [L55] const SORT_19 var_40 = 27; [L56] const SORT_19 var_45 = 26; [L57] const SORT_19 var_50 = 25; [L58] const SORT_19 var_55 = 24; [L59] const SORT_19 var_60 = 23; [L60] const SORT_19 var_65 = 22; [L61] const SORT_19 var_70 = 21; [L62] const SORT_19 var_75 = 20; [L63] const SORT_19 var_80 = 19; [L64] const SORT_19 var_85 = 18; [L65] const SORT_19 var_90 = 17; [L66] const SORT_19 var_95 = 16; [L67] const SORT_100 var_101 = 15; [L68] const SORT_100 var_106 = 14; [L69] const SORT_100 var_111 = 13; [L70] const SORT_100 var_116 = 12; [L71] const SORT_100 var_121 = 11; [L72] const SORT_100 var_126 = 10; [L73] const SORT_100 var_131 = 9; [L74] const SORT_100 var_136 = 8; [L75] const SORT_141 var_142 = 7; [L76] const SORT_141 var_147 = 6; [L77] const SORT_141 var_152 = 5; [L78] const SORT_141 var_157 = 4; [L79] const SORT_162 var_163 = 3; [L80] const SORT_162 var_168 = 2; [L81] const SORT_1 var_173 = 1; [L82] const SORT_13 var_186 = 33; [L83] const SORT_11 var_203 = 0; [L84] const SORT_1 var_233 = 0; [L85] const SORT_3 var_582 = 0; [L87] SORT_1 input_2; [L88] SORT_3 input_4; [L89] SORT_1 input_5; [L90] SORT_1 input_6; [L91] SORT_1 input_7; [L92] SORT_1 input_8; [L93] SORT_3 input_9; [L94] SORT_1 input_231; [L96] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L96] SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L97] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L98] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L98] SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L99] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L99] SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L100] SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L101] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L101] SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L102] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L102] SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L103] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L103] SORT_3 state_44 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L104] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L104] SORT_3 state_49 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L105] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L105] SORT_3 state_54 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L106] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L106] SORT_3 state_59 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L107] SORT_3 state_64 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L108] SORT_3 state_69 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L109] SORT_3 state_74 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L110] SORT_3 state_79 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L111] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L111] SORT_3 state_84 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L112] SORT_3 state_89 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L113] SORT_3 state_94 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L114] SORT_3 state_99 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L115] SORT_3 state_105 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L116] SORT_3 state_110 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L117] SORT_3 state_115 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L118] SORT_3 state_120 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L119] SORT_3 state_125 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L120] SORT_3 state_130 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L121] SORT_3 state_135 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L122] SORT_3 state_140 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L123] SORT_3 state_146 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L124] SORT_3 state_151 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L125] SORT_3 state_156 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L126] SORT_3 state_161 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L127] SORT_3 state_167 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L128] SORT_3 state_172 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L129] SORT_3 state_177 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L130] SORT_11 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L131] SORT_1 state_190 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L132] SORT_1 state_191 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L133] SORT_11 state_194 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L134] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L134] SORT_3 state_209 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L135] SORT_1 state_213 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L136] SORT_11 state_282 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L138] SORT_1 init_214_arg_1 = var_173; [L139] state_213 = init_214_arg_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_ulong() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_ulong() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=255, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=256, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=0] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=0] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=0, var_95=16, var_97=0] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_26_arg_0=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=0, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=0, var_173=1, var_175=0, var_179=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_27=0, var_30=29, var_32=0, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=0, var_50=25, var_52=0, var_55=24, var_57=0, var_582=0, var_60=23, var_62=0, var_65=22, var_67=0, var_70=21, var_72=0, var_75=20, var_77=0, var_80=19, var_82=0, var_85=18, var_87=0, var_90=17, var_92=0, var_95=16, var_97=0] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=18446744073709551615U, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=0, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=1, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=0, var_236_arg_1=-256, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND FALSE !(!(cond)) [L596] RET __VERIFIER_assert(!(bad_237_arg_0)) [L598] SORT_11 var_283_arg_0 = state_282; [L599] SORT_13 var_283 = var_283_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] EXPR var_283 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L600] var_283 = var_283 & mask_SORT_13 [L601] SORT_13 var_459_arg_0 = var_283; [L602] SORT_13 var_459_arg_1 = var_15; [L603] SORT_1 var_459 = var_459_arg_0 == var_459_arg_1; [L604] SORT_1 var_460_arg_0 = input_6; [L605] SORT_1 var_460_arg_1 = var_459; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_460_arg_0=0, var_460_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] EXPR var_460_arg_0 & var_460_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L606] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L607] EXPR var_460 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L607] var_460 = var_460 & mask_SORT_1 [L608] SORT_1 var_581_arg_0 = var_460; [L609] SORT_3 var_581_arg_1 = input_4; [L610] SORT_3 var_581_arg_2 = state_10; [L611] SORT_3 var_581 = var_581_arg_0 ? var_581_arg_1 : var_581_arg_2; [L612] SORT_1 var_583_arg_0 = input_7; [L613] SORT_3 var_583_arg_1 = var_582; [L614] SORT_3 var_583_arg_2 = var_581; [L615] SORT_3 var_583 = var_583_arg_0 ? var_583_arg_1 : var_583_arg_2; [L616] SORT_3 next_584_arg_1 = var_583; [L617] SORT_1 var_241_arg_0 = input_6; [L618] SORT_1 var_241_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_241_arg_0=0, var_241_arg_1=256, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] EXPR var_241_arg_0 | var_241_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L619] SORT_1 var_241 = var_241_arg_0 | var_241_arg_1; [L620] SORT_1 var_242_arg_0 = var_241; [L621] SORT_1 var_242_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242_arg_0=0, var_242_arg_1=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] EXPR var_242_arg_0 | var_242_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L622] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L623] EXPR var_242 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L623] var_242 = var_242 & mask_SORT_1 [L624] SORT_1 var_512_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_512_arg_0=256, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] EXPR var_512_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L625] var_512_arg_0 = var_512_arg_0 & mask_SORT_1 [L626] SORT_11 var_512 = var_512_arg_0; [L627] SORT_11 var_513_arg_0 = state_12; [L628] SORT_11 var_513_arg_1 = var_512; [L629] SORT_11 var_513 = var_513_arg_0 + var_513_arg_1; [L630] SORT_1 var_585_arg_0 = var_242; [L631] SORT_11 var_585_arg_1 = var_513; [L632] SORT_11 var_585_arg_2 = state_12; [L633] SORT_11 var_585 = var_585_arg_0 ? var_585_arg_1 : var_585_arg_2; [L634] SORT_1 var_586_arg_0 = input_7; [L635] SORT_11 var_586_arg_1 = var_203; [L636] SORT_11 var_586_arg_2 = var_585; [L637] SORT_11 var_586 = var_586_arg_0 ? var_586_arg_1 : var_586_arg_2; [L638] SORT_11 next_587_arg_1 = var_586; [L639] SORT_19 var_452_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_452_arg_0=31, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] EXPR var_452_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L640] var_452_arg_0 = var_452_arg_0 & mask_SORT_19 [L641] SORT_13 var_452 = var_452_arg_0; [L642] SORT_13 var_453_arg_0 = var_283; [L643] SORT_13 var_453_arg_1 = var_452; [L644] SORT_1 var_453 = var_453_arg_0 == var_453_arg_1; [L645] SORT_1 var_454_arg_0 = input_6; [L646] SORT_1 var_454_arg_1 = var_453; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_454_arg_0=0, var_454_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] EXPR var_454_arg_0 & var_454_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L647] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L648] EXPR var_454 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L648] var_454 = var_454 & mask_SORT_1 [L649] SORT_1 var_588_arg_0 = var_454; [L650] SORT_3 var_588_arg_1 = input_4; [L651] SORT_3 var_588_arg_2 = state_18; [L652] SORT_3 var_588 = var_588_arg_0 ? var_588_arg_1 : var_588_arg_2; [L653] SORT_1 var_589_arg_0 = input_7; [L654] SORT_3 var_589_arg_1 = var_582; [L655] SORT_3 var_589_arg_2 = var_588; [L656] SORT_3 var_589 = var_589_arg_0 ? var_589_arg_1 : var_589_arg_2; [L657] SORT_3 next_590_arg_1 = var_589; [L658] SORT_19 var_445_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_445_arg_0=30, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] EXPR var_445_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L659] var_445_arg_0 = var_445_arg_0 & mask_SORT_19 [L660] SORT_13 var_445 = var_445_arg_0; [L661] SORT_13 var_446_arg_0 = var_283; [L662] SORT_13 var_446_arg_1 = var_445; [L663] SORT_1 var_446 = var_446_arg_0 == var_446_arg_1; [L664] SORT_1 var_447_arg_0 = input_6; [L665] SORT_1 var_447_arg_1 = var_446; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_447_arg_0=0, var_447_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] EXPR var_447_arg_0 & var_447_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L666] SORT_1 var_447 = var_447_arg_0 & var_447_arg_1; [L667] EXPR var_447 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L667] var_447 = var_447 & mask_SORT_1 [L668] SORT_1 var_591_arg_0 = var_447; [L669] SORT_3 var_591_arg_1 = input_4; [L670] SORT_3 var_591_arg_2 = state_24; [L671] SORT_3 var_591 = var_591_arg_0 ? var_591_arg_1 : var_591_arg_2; [L672] SORT_1 var_592_arg_0 = input_7; [L673] SORT_3 var_592_arg_1 = var_582; [L674] SORT_3 var_592_arg_2 = var_591; [L675] SORT_3 var_592 = var_592_arg_0 ? var_592_arg_1 : var_592_arg_2; [L676] SORT_3 next_593_arg_1 = var_592; [L677] SORT_19 var_431_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_431_arg_0=29, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] EXPR var_431_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L678] var_431_arg_0 = var_431_arg_0 & mask_SORT_19 [L679] SORT_13 var_431 = var_431_arg_0; [L680] SORT_13 var_432_arg_0 = var_283; [L681] SORT_13 var_432_arg_1 = var_431; [L682] SORT_1 var_432 = var_432_arg_0 == var_432_arg_1; [L683] SORT_1 var_433_arg_0 = input_6; [L684] SORT_1 var_433_arg_1 = var_432; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_433_arg_0=0, var_433_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] EXPR var_433_arg_0 & var_433_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L685] SORT_1 var_433 = var_433_arg_0 & var_433_arg_1; [L686] EXPR var_433 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L686] var_433 = var_433 & mask_SORT_1 [L687] SORT_1 var_594_arg_0 = var_433; [L688] SORT_3 var_594_arg_1 = input_4; [L689] SORT_3 var_594_arg_2 = state_29; [L690] SORT_3 var_594 = var_594_arg_0 ? var_594_arg_1 : var_594_arg_2; [L691] SORT_1 var_595_arg_0 = input_7; [L692] SORT_3 var_595_arg_1 = var_582; [L693] SORT_3 var_595_arg_2 = var_594; [L694] SORT_3 var_595 = var_595_arg_0 ? var_595_arg_1 : var_595_arg_2; [L695] SORT_3 next_596_arg_1 = var_595; [L696] SORT_19 var_424_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_424_arg_0=28, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] EXPR var_424_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L697] var_424_arg_0 = var_424_arg_0 & mask_SORT_19 [L698] SORT_13 var_424 = var_424_arg_0; [L699] SORT_13 var_425_arg_0 = var_283; [L700] SORT_13 var_425_arg_1 = var_424; [L701] SORT_1 var_425 = var_425_arg_0 == var_425_arg_1; [L702] SORT_1 var_426_arg_0 = input_6; [L703] SORT_1 var_426_arg_1 = var_425; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_426_arg_0=0, var_426_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] EXPR var_426_arg_0 & var_426_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L704] SORT_1 var_426 = var_426_arg_0 & var_426_arg_1; [L705] EXPR var_426 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L705] var_426 = var_426 & mask_SORT_1 [L706] SORT_1 var_597_arg_0 = var_426; [L707] SORT_3 var_597_arg_1 = input_4; [L708] SORT_3 var_597_arg_2 = state_34; [L709] SORT_3 var_597 = var_597_arg_0 ? var_597_arg_1 : var_597_arg_2; [L710] SORT_1 var_598_arg_0 = input_7; [L711] SORT_3 var_598_arg_1 = var_582; [L712] SORT_3 var_598_arg_2 = var_597; [L713] SORT_3 var_598 = var_598_arg_0 ? var_598_arg_1 : var_598_arg_2; [L714] SORT_3 next_599_arg_1 = var_598; [L715] SORT_19 var_417_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_417_arg_0=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] EXPR var_417_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L716] var_417_arg_0 = var_417_arg_0 & mask_SORT_19 [L717] SORT_13 var_417 = var_417_arg_0; [L718] SORT_13 var_418_arg_0 = var_283; [L719] SORT_13 var_418_arg_1 = var_417; [L720] SORT_1 var_418 = var_418_arg_0 == var_418_arg_1; [L721] SORT_1 var_419_arg_0 = input_6; [L722] SORT_1 var_419_arg_1 = var_418; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_419_arg_0=0, var_419_arg_1=1, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] EXPR var_419_arg_0 & var_419_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L723] SORT_1 var_419 = var_419_arg_0 & var_419_arg_1; [L724] EXPR var_419 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L724] var_419 = var_419 & mask_SORT_1 [L725] SORT_1 var_600_arg_0 = var_419; [L726] SORT_3 var_600_arg_1 = input_4; [L727] SORT_3 var_600_arg_2 = state_39; [L728] SORT_3 var_600 = var_600_arg_0 ? var_600_arg_1 : var_600_arg_2; [L729] SORT_1 var_601_arg_0 = input_7; [L730] SORT_3 var_601_arg_1 = var_582; [L731] SORT_3 var_601_arg_2 = var_600; [L732] SORT_3 var_601 = var_601_arg_0 ? var_601_arg_1 : var_601_arg_2; [L733] SORT_3 next_602_arg_1 = var_601; [L734] SORT_19 var_410_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_410_arg_0=26, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] EXPR var_410_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L735] var_410_arg_0 = var_410_arg_0 & mask_SORT_19 [L736] SORT_13 var_410 = var_410_arg_0; [L737] SORT_13 var_411_arg_0 = var_283; [L738] SORT_13 var_411_arg_1 = var_410; [L739] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L740] SORT_1 var_412_arg_0 = input_6; [L741] SORT_1 var_412_arg_1 = var_411; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_412_arg_0=0, var_412_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] EXPR var_412_arg_0 & var_412_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L742] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L743] EXPR var_412 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L743] var_412 = var_412 & mask_SORT_1 [L744] SORT_1 var_603_arg_0 = var_412; [L745] SORT_3 var_603_arg_1 = input_4; [L746] SORT_3 var_603_arg_2 = state_44; [L747] SORT_3 var_603 = var_603_arg_0 ? var_603_arg_1 : var_603_arg_2; [L748] SORT_1 var_604_arg_0 = input_7; [L749] SORT_3 var_604_arg_1 = var_582; [L750] SORT_3 var_604_arg_2 = var_603; [L751] SORT_3 var_604 = var_604_arg_0 ? var_604_arg_1 : var_604_arg_2; [L752] SORT_3 next_605_arg_1 = var_604; [L753] SORT_19 var_403_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_403_arg_0=25, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] EXPR var_403_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L754] var_403_arg_0 = var_403_arg_0 & mask_SORT_19 [L755] SORT_13 var_403 = var_403_arg_0; [L756] SORT_13 var_404_arg_0 = var_283; [L757] SORT_13 var_404_arg_1 = var_403; [L758] SORT_1 var_404 = var_404_arg_0 == var_404_arg_1; [L759] SORT_1 var_405_arg_0 = input_6; [L760] SORT_1 var_405_arg_1 = var_404; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_405_arg_0=0, var_405_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] EXPR var_405_arg_0 & var_405_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L761] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L762] EXPR var_405 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L762] var_405 = var_405 & mask_SORT_1 [L763] SORT_1 var_606_arg_0 = var_405; [L764] SORT_3 var_606_arg_1 = input_4; [L765] SORT_3 var_606_arg_2 = state_49; [L766] SORT_3 var_606 = var_606_arg_0 ? var_606_arg_1 : var_606_arg_2; [L767] SORT_1 var_607_arg_0 = input_7; [L768] SORT_3 var_607_arg_1 = var_582; [L769] SORT_3 var_607_arg_2 = var_606; [L770] SORT_3 var_607 = var_607_arg_0 ? var_607_arg_1 : var_607_arg_2; [L771] SORT_3 next_608_arg_1 = var_607; [L772] SORT_19 var_396_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_396_arg_0=24, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] EXPR var_396_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L773] var_396_arg_0 = var_396_arg_0 & mask_SORT_19 [L774] SORT_13 var_396 = var_396_arg_0; [L775] SORT_13 var_397_arg_0 = var_283; [L776] SORT_13 var_397_arg_1 = var_396; [L777] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L778] SORT_1 var_398_arg_0 = input_6; [L779] SORT_1 var_398_arg_1 = var_397; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_398_arg_0=0, var_398_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] EXPR var_398_arg_0 & var_398_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L780] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L781] EXPR var_398 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L781] var_398 = var_398 & mask_SORT_1 [L782] SORT_1 var_609_arg_0 = var_398; [L783] SORT_3 var_609_arg_1 = input_4; [L784] SORT_3 var_609_arg_2 = state_54; [L785] SORT_3 var_609 = var_609_arg_0 ? var_609_arg_1 : var_609_arg_2; [L786] SORT_1 var_610_arg_0 = input_7; [L787] SORT_3 var_610_arg_1 = var_582; [L788] SORT_3 var_610_arg_2 = var_609; [L789] SORT_3 var_610 = var_610_arg_0 ? var_610_arg_1 : var_610_arg_2; [L790] SORT_3 next_611_arg_1 = var_610; [L791] SORT_19 var_389_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_389_arg_0=23, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] EXPR var_389_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L792] var_389_arg_0 = var_389_arg_0 & mask_SORT_19 [L793] SORT_13 var_389 = var_389_arg_0; [L794] SORT_13 var_390_arg_0 = var_283; [L795] SORT_13 var_390_arg_1 = var_389; [L796] SORT_1 var_390 = var_390_arg_0 == var_390_arg_1; [L797] SORT_1 var_391_arg_0 = input_6; [L798] SORT_1 var_391_arg_1 = var_390; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_391_arg_0=0, var_391_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] EXPR var_391_arg_0 & var_391_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L799] SORT_1 var_391 = var_391_arg_0 & var_391_arg_1; [L800] EXPR var_391 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L800] var_391 = var_391 & mask_SORT_1 [L801] SORT_1 var_612_arg_0 = var_391; [L802] SORT_3 var_612_arg_1 = input_4; [L803] SORT_3 var_612_arg_2 = state_59; [L804] SORT_3 var_612 = var_612_arg_0 ? var_612_arg_1 : var_612_arg_2; [L805] SORT_1 var_613_arg_0 = input_7; [L806] SORT_3 var_613_arg_1 = var_582; [L807] SORT_3 var_613_arg_2 = var_612; [L808] SORT_3 var_613 = var_613_arg_0 ? var_613_arg_1 : var_613_arg_2; [L809] SORT_3 next_614_arg_1 = var_613; [L810] SORT_19 var_382_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_382_arg_0=22, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] EXPR var_382_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L811] var_382_arg_0 = var_382_arg_0 & mask_SORT_19 [L812] SORT_13 var_382 = var_382_arg_0; [L813] SORT_13 var_383_arg_0 = var_283; [L814] SORT_13 var_383_arg_1 = var_382; [L815] SORT_1 var_383 = var_383_arg_0 == var_383_arg_1; [L816] SORT_1 var_384_arg_0 = input_6; [L817] SORT_1 var_384_arg_1 = var_383; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_384_arg_0=0, var_384_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] EXPR var_384_arg_0 & var_384_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L818] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L819] EXPR var_384 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L819] var_384 = var_384 & mask_SORT_1 [L820] SORT_1 var_615_arg_0 = var_384; [L821] SORT_3 var_615_arg_1 = input_4; [L822] SORT_3 var_615_arg_2 = state_64; [L823] SORT_3 var_615 = var_615_arg_0 ? var_615_arg_1 : var_615_arg_2; [L824] SORT_1 var_616_arg_0 = input_7; [L825] SORT_3 var_616_arg_1 = var_582; [L826] SORT_3 var_616_arg_2 = var_615; [L827] SORT_3 var_616 = var_616_arg_0 ? var_616_arg_1 : var_616_arg_2; [L828] SORT_3 next_617_arg_1 = var_616; [L829] SORT_19 var_375_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_375_arg_0=21, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] EXPR var_375_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L830] var_375_arg_0 = var_375_arg_0 & mask_SORT_19 [L831] SORT_13 var_375 = var_375_arg_0; [L832] SORT_13 var_376_arg_0 = var_283; [L833] SORT_13 var_376_arg_1 = var_375; [L834] SORT_1 var_376 = var_376_arg_0 == var_376_arg_1; [L835] SORT_1 var_377_arg_0 = input_6; [L836] SORT_1 var_377_arg_1 = var_376; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_377_arg_0=0, var_377_arg_1=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] EXPR var_377_arg_0 & var_377_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L837] SORT_1 var_377 = var_377_arg_0 & var_377_arg_1; [L838] EXPR var_377 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L838] var_377 = var_377 & mask_SORT_1 [L839] SORT_1 var_618_arg_0 = var_377; [L840] SORT_3 var_618_arg_1 = input_4; [L841] SORT_3 var_618_arg_2 = state_69; [L842] SORT_3 var_618 = var_618_arg_0 ? var_618_arg_1 : var_618_arg_2; [L843] SORT_1 var_619_arg_0 = input_7; [L844] SORT_3 var_619_arg_1 = var_582; [L845] SORT_3 var_619_arg_2 = var_618; [L846] SORT_3 var_619 = var_619_arg_0 ? var_619_arg_1 : var_619_arg_2; [L847] SORT_3 next_620_arg_1 = var_619; [L848] SORT_19 var_368_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_368_arg_0=20, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] EXPR var_368_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L849] var_368_arg_0 = var_368_arg_0 & mask_SORT_19 [L850] SORT_13 var_368 = var_368_arg_0; [L851] SORT_13 var_369_arg_0 = var_283; [L852] SORT_13 var_369_arg_1 = var_368; [L853] SORT_1 var_369 = var_369_arg_0 == var_369_arg_1; [L854] SORT_1 var_370_arg_0 = input_6; [L855] SORT_1 var_370_arg_1 = var_369; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_370_arg_0=0, var_370_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] EXPR var_370_arg_0 & var_370_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L856] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L857] EXPR var_370 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L857] var_370 = var_370 & mask_SORT_1 [L858] SORT_1 var_621_arg_0 = var_370; [L859] SORT_3 var_621_arg_1 = input_4; [L860] SORT_3 var_621_arg_2 = state_74; [L861] SORT_3 var_621 = var_621_arg_0 ? var_621_arg_1 : var_621_arg_2; [L862] SORT_1 var_622_arg_0 = input_7; [L863] SORT_3 var_622_arg_1 = var_582; [L864] SORT_3 var_622_arg_2 = var_621; [L865] SORT_3 var_622 = var_622_arg_0 ? var_622_arg_1 : var_622_arg_2; [L866] SORT_3 next_623_arg_1 = var_622; [L867] SORT_19 var_354_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_354_arg_0=19, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] EXPR var_354_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L868] var_354_arg_0 = var_354_arg_0 & mask_SORT_19 [L869] SORT_13 var_354 = var_354_arg_0; [L870] SORT_13 var_355_arg_0 = var_283; [L871] SORT_13 var_355_arg_1 = var_354; [L872] SORT_1 var_355 = var_355_arg_0 == var_355_arg_1; [L873] SORT_1 var_356_arg_0 = input_6; [L874] SORT_1 var_356_arg_1 = var_355; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_356_arg_0=0, var_356_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] EXPR var_356_arg_0 & var_356_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L875] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L876] EXPR var_356 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L876] var_356 = var_356 & mask_SORT_1 [L877] SORT_1 var_624_arg_0 = var_356; [L878] SORT_3 var_624_arg_1 = input_4; [L879] SORT_3 var_624_arg_2 = state_79; [L880] SORT_3 var_624 = var_624_arg_0 ? var_624_arg_1 : var_624_arg_2; [L881] SORT_1 var_625_arg_0 = input_7; [L882] SORT_3 var_625_arg_1 = var_582; [L883] SORT_3 var_625_arg_2 = var_624; [L884] SORT_3 var_625 = var_625_arg_0 ? var_625_arg_1 : var_625_arg_2; [L885] SORT_3 next_626_arg_1 = var_625; [L886] SORT_19 var_347_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_347_arg_0=18, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] EXPR var_347_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L887] var_347_arg_0 = var_347_arg_0 & mask_SORT_19 [L888] SORT_13 var_347 = var_347_arg_0; [L889] SORT_13 var_348_arg_0 = var_283; [L890] SORT_13 var_348_arg_1 = var_347; [L891] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L892] SORT_1 var_349_arg_0 = input_6; [L893] SORT_1 var_349_arg_1 = var_348; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_349_arg_0=0, var_349_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] EXPR var_349_arg_0 & var_349_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L894] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L895] EXPR var_349 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L895] var_349 = var_349 & mask_SORT_1 [L896] SORT_1 var_627_arg_0 = var_349; [L897] SORT_3 var_627_arg_1 = input_4; [L898] SORT_3 var_627_arg_2 = state_84; [L899] SORT_3 var_627 = var_627_arg_0 ? var_627_arg_1 : var_627_arg_2; [L900] SORT_1 var_628_arg_0 = input_7; [L901] SORT_3 var_628_arg_1 = var_582; [L902] SORT_3 var_628_arg_2 = var_627; [L903] SORT_3 var_628 = var_628_arg_0 ? var_628_arg_1 : var_628_arg_2; [L904] SORT_3 next_629_arg_1 = var_628; [L905] SORT_19 var_340_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_340_arg_0=17, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] EXPR var_340_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L906] var_340_arg_0 = var_340_arg_0 & mask_SORT_19 [L907] SORT_13 var_340 = var_340_arg_0; [L908] SORT_13 var_341_arg_0 = var_283; [L909] SORT_13 var_341_arg_1 = var_340; [L910] SORT_1 var_341 = var_341_arg_0 == var_341_arg_1; [L911] SORT_1 var_342_arg_0 = input_6; [L912] SORT_1 var_342_arg_1 = var_341; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_342_arg_0=0, var_342_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] EXPR var_342_arg_0 & var_342_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L913] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L914] EXPR var_342 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L914] var_342 = var_342 & mask_SORT_1 [L915] SORT_1 var_630_arg_0 = var_342; [L916] SORT_3 var_630_arg_1 = input_4; [L917] SORT_3 var_630_arg_2 = state_89; [L918] SORT_3 var_630 = var_630_arg_0 ? var_630_arg_1 : var_630_arg_2; [L919] SORT_1 var_631_arg_0 = input_7; [L920] SORT_3 var_631_arg_1 = var_582; [L921] SORT_3 var_631_arg_2 = var_630; [L922] SORT_3 var_631 = var_631_arg_0 ? var_631_arg_1 : var_631_arg_2; [L923] SORT_3 next_632_arg_1 = var_631; [L924] SORT_19 var_333_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_333_arg_0=16, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] EXPR var_333_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L925] var_333_arg_0 = var_333_arg_0 & mask_SORT_19 [L926] SORT_13 var_333 = var_333_arg_0; [L927] SORT_13 var_334_arg_0 = var_283; [L928] SORT_13 var_334_arg_1 = var_333; [L929] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L930] SORT_1 var_335_arg_0 = input_6; [L931] SORT_1 var_335_arg_1 = var_334; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_335_arg_0=0, var_335_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] EXPR var_335_arg_0 & var_335_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L932] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L933] EXPR var_335 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L933] var_335 = var_335 & mask_SORT_1 [L934] SORT_1 var_633_arg_0 = var_335; [L935] SORT_3 var_633_arg_1 = input_4; [L936] SORT_3 var_633_arg_2 = state_94; [L937] SORT_3 var_633 = var_633_arg_0 ? var_633_arg_1 : var_633_arg_2; [L938] SORT_1 var_634_arg_0 = input_7; [L939] SORT_3 var_634_arg_1 = var_582; [L940] SORT_3 var_634_arg_2 = var_633; [L941] SORT_3 var_634 = var_634_arg_0 ? var_634_arg_1 : var_634_arg_2; [L942] SORT_3 next_635_arg_1 = var_634; [L943] SORT_100 var_326_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_326_arg_0=15, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] EXPR var_326_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L944] var_326_arg_0 = var_326_arg_0 & mask_SORT_100 [L945] SORT_13 var_326 = var_326_arg_0; [L946] SORT_13 var_327_arg_0 = var_283; [L947] SORT_13 var_327_arg_1 = var_326; [L948] SORT_1 var_327 = var_327_arg_0 == var_327_arg_1; [L949] SORT_1 var_328_arg_0 = input_6; [L950] SORT_1 var_328_arg_1 = var_327; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_328_arg_0=0, var_328_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] EXPR var_328_arg_0 & var_328_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L951] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L952] EXPR var_328 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L952] var_328 = var_328 & mask_SORT_1 [L953] SORT_1 var_636_arg_0 = var_328; [L954] SORT_3 var_636_arg_1 = input_4; [L955] SORT_3 var_636_arg_2 = state_99; [L956] SORT_3 var_636 = var_636_arg_0 ? var_636_arg_1 : var_636_arg_2; [L957] SORT_1 var_637_arg_0 = input_7; [L958] SORT_3 var_637_arg_1 = var_582; [L959] SORT_3 var_637_arg_2 = var_636; [L960] SORT_3 var_637 = var_637_arg_0 ? var_637_arg_1 : var_637_arg_2; [L961] SORT_3 next_638_arg_1 = var_637; [L962] SORT_100 var_319_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_319_arg_0=14, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] EXPR var_319_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L963] var_319_arg_0 = var_319_arg_0 & mask_SORT_100 [L964] SORT_13 var_319 = var_319_arg_0; [L965] SORT_13 var_320_arg_0 = var_283; [L966] SORT_13 var_320_arg_1 = var_319; [L967] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L968] SORT_1 var_321_arg_0 = input_6; [L969] SORT_1 var_321_arg_1 = var_320; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_321_arg_0=0, var_321_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] EXPR var_321_arg_0 & var_321_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L970] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L971] EXPR var_321 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, state_105=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L971] var_321 = var_321 & mask_SORT_1 [L972] SORT_1 var_639_arg_0 = var_321; [L973] SORT_3 var_639_arg_1 = input_4; [L974] SORT_3 var_639_arg_2 = state_105; [L975] SORT_3 var_639 = var_639_arg_0 ? var_639_arg_1 : var_639_arg_2; [L976] SORT_1 var_640_arg_0 = input_7; [L977] SORT_3 var_640_arg_1 = var_582; [L978] SORT_3 var_640_arg_2 = var_639; [L979] SORT_3 var_640 = var_640_arg_0 ? var_640_arg_1 : var_640_arg_2; [L980] SORT_3 next_641_arg_1 = var_640; [L981] SORT_100 var_312_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_312_arg_0=13, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] EXPR var_312_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L982] var_312_arg_0 = var_312_arg_0 & mask_SORT_100 [L983] SORT_13 var_312 = var_312_arg_0; [L984] SORT_13 var_313_arg_0 = var_283; [L985] SORT_13 var_313_arg_1 = var_312; [L986] SORT_1 var_313 = var_313_arg_0 == var_313_arg_1; [L987] SORT_1 var_314_arg_0 = input_6; [L988] SORT_1 var_314_arg_1 = var_313; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_314_arg_0=0, var_314_arg_1=0, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] EXPR var_314_arg_0 & var_314_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L989] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L990] EXPR var_314 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, state_110=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L990] var_314 = var_314 & mask_SORT_1 [L991] SORT_1 var_642_arg_0 = var_314; [L992] SORT_3 var_642_arg_1 = input_4; [L993] SORT_3 var_642_arg_2 = state_110; [L994] SORT_3 var_642 = var_642_arg_0 ? var_642_arg_1 : var_642_arg_2; [L995] SORT_1 var_643_arg_0 = input_7; [L996] SORT_3 var_643_arg_1 = var_582; [L997] SORT_3 var_643_arg_2 = var_642; [L998] SORT_3 var_643 = var_643_arg_0 ? var_643_arg_1 : var_643_arg_2; [L999] SORT_3 next_644_arg_1 = var_643; [L1000] SORT_100 var_305_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_305_arg_0=12, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] EXPR var_305_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1001] var_305_arg_0 = var_305_arg_0 & mask_SORT_100 [L1002] SORT_13 var_305 = var_305_arg_0; [L1003] SORT_13 var_306_arg_0 = var_283; [L1004] SORT_13 var_306_arg_1 = var_305; [L1005] SORT_1 var_306 = var_306_arg_0 == var_306_arg_1; [L1006] SORT_1 var_307_arg_0 = input_6; [L1007] SORT_1 var_307_arg_1 = var_306; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_307_arg_0=0, var_307_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] EXPR var_307_arg_0 & var_307_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1008] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L1009] EXPR var_307 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, state_115=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1009] var_307 = var_307 & mask_SORT_1 [L1010] SORT_1 var_645_arg_0 = var_307; [L1011] SORT_3 var_645_arg_1 = input_4; [L1012] SORT_3 var_645_arg_2 = state_115; [L1013] SORT_3 var_645 = var_645_arg_0 ? var_645_arg_1 : var_645_arg_2; [L1014] SORT_1 var_646_arg_0 = input_7; [L1015] SORT_3 var_646_arg_1 = var_582; [L1016] SORT_3 var_646_arg_2 = var_645; [L1017] SORT_3 var_646 = var_646_arg_0 ? var_646_arg_1 : var_646_arg_2; [L1018] SORT_3 next_647_arg_1 = var_646; [L1019] SORT_100 var_298_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_298_arg_0=11, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] EXPR var_298_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1020] var_298_arg_0 = var_298_arg_0 & mask_SORT_100 [L1021] SORT_13 var_298 = var_298_arg_0; [L1022] SORT_13 var_299_arg_0 = var_283; [L1023] SORT_13 var_299_arg_1 = var_298; [L1024] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L1025] SORT_1 var_300_arg_0 = input_6; [L1026] SORT_1 var_300_arg_1 = var_299; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_300_arg_0=0, var_300_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1027] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L1028] EXPR var_300 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, state_120=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1028] var_300 = var_300 & mask_SORT_1 [L1029] SORT_1 var_648_arg_0 = var_300; [L1030] SORT_3 var_648_arg_1 = input_4; [L1031] SORT_3 var_648_arg_2 = state_120; [L1032] SORT_3 var_648 = var_648_arg_0 ? var_648_arg_1 : var_648_arg_2; [L1033] SORT_1 var_649_arg_0 = input_7; [L1034] SORT_3 var_649_arg_1 = var_582; [L1035] SORT_3 var_649_arg_2 = var_648; [L1036] SORT_3 var_649 = var_649_arg_0 ? var_649_arg_1 : var_649_arg_2; [L1037] SORT_3 next_650_arg_1 = var_649; [L1038] SORT_100 var_291_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_291_arg_0=10, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] EXPR var_291_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1039] var_291_arg_0 = var_291_arg_0 & mask_SORT_100 [L1040] SORT_13 var_291 = var_291_arg_0; [L1041] SORT_13 var_292_arg_0 = var_283; [L1042] SORT_13 var_292_arg_1 = var_291; [L1043] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L1044] SORT_1 var_293_arg_0 = input_6; [L1045] SORT_1 var_293_arg_1 = var_292; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_293_arg_0=0, var_293_arg_1=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1046] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L1047] EXPR var_293 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, state_125=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1047] var_293 = var_293 & mask_SORT_1 [L1048] SORT_1 var_651_arg_0 = var_293; [L1049] SORT_3 var_651_arg_1 = input_4; [L1050] SORT_3 var_651_arg_2 = state_125; [L1051] SORT_3 var_651 = var_651_arg_0 ? var_651_arg_1 : var_651_arg_2; [L1052] SORT_1 var_652_arg_0 = input_7; [L1053] SORT_3 var_652_arg_1 = var_582; [L1054] SORT_3 var_652_arg_2 = var_651; [L1055] SORT_3 var_652 = var_652_arg_0 ? var_652_arg_1 : var_652_arg_2; [L1056] SORT_3 next_653_arg_1 = var_652; [L1057] SORT_100 var_507_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_507_arg_0=9, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] EXPR var_507_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1058] var_507_arg_0 = var_507_arg_0 & mask_SORT_100 [L1059] SORT_13 var_507 = var_507_arg_0; [L1060] SORT_13 var_508_arg_0 = var_283; [L1061] SORT_13 var_508_arg_1 = var_507; [L1062] SORT_1 var_508 = var_508_arg_0 == var_508_arg_1; [L1063] SORT_1 var_509_arg_0 = input_6; [L1064] SORT_1 var_509_arg_1 = var_508; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_509_arg_0=0, var_509_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] EXPR var_509_arg_0 & var_509_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1065] SORT_1 var_509 = var_509_arg_0 & var_509_arg_1; [L1066] EXPR var_509 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1066] var_509 = var_509 & mask_SORT_1 [L1067] SORT_1 var_654_arg_0 = var_509; [L1068] SORT_3 var_654_arg_1 = input_4; [L1069] SORT_3 var_654_arg_2 = state_130; [L1070] SORT_3 var_654 = var_654_arg_0 ? var_654_arg_1 : var_654_arg_2; [L1071] SORT_1 var_655_arg_0 = input_7; [L1072] SORT_3 var_655_arg_1 = var_582; [L1073] SORT_3 var_655_arg_2 = var_654; [L1074] SORT_3 var_655 = var_655_arg_0 ? var_655_arg_1 : var_655_arg_2; [L1075] SORT_3 next_656_arg_1 = var_655; [L1076] SORT_100 var_500_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_500_arg_0=8, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] EXPR var_500_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1077] var_500_arg_0 = var_500_arg_0 & mask_SORT_100 [L1078] SORT_13 var_500 = var_500_arg_0; [L1079] SORT_13 var_501_arg_0 = var_283; [L1080] SORT_13 var_501_arg_1 = var_500; [L1081] SORT_1 var_501 = var_501_arg_0 == var_501_arg_1; [L1082] SORT_1 var_502_arg_0 = input_6; [L1083] SORT_1 var_502_arg_1 = var_501; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_502_arg_0=0, var_502_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] EXPR var_502_arg_0 & var_502_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1084] SORT_1 var_502 = var_502_arg_0 & var_502_arg_1; [L1085] EXPR var_502 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1085] var_502 = var_502 & mask_SORT_1 [L1086] SORT_1 var_657_arg_0 = var_502; [L1087] SORT_3 var_657_arg_1 = input_4; [L1088] SORT_3 var_657_arg_2 = state_135; [L1089] SORT_3 var_657 = var_657_arg_0 ? var_657_arg_1 : var_657_arg_2; [L1090] SORT_1 var_658_arg_0 = input_7; [L1091] SORT_3 var_658_arg_1 = var_582; [L1092] SORT_3 var_658_arg_2 = var_657; [L1093] SORT_3 var_658 = var_658_arg_0 ? var_658_arg_1 : var_658_arg_2; [L1094] SORT_3 next_659_arg_1 = var_658; [L1095] SORT_141 var_493_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_493_arg_0=7, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] EXPR var_493_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1096] var_493_arg_0 = var_493_arg_0 & mask_SORT_141 [L1097] SORT_13 var_493 = var_493_arg_0; [L1098] SORT_13 var_494_arg_0 = var_283; [L1099] SORT_13 var_494_arg_1 = var_493; [L1100] SORT_1 var_494 = var_494_arg_0 == var_494_arg_1; [L1101] SORT_1 var_495_arg_0 = input_6; [L1102] SORT_1 var_495_arg_1 = var_494; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_495_arg_0=0, var_495_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] EXPR var_495_arg_0 & var_495_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1103] SORT_1 var_495 = var_495_arg_0 & var_495_arg_1; [L1104] EXPR var_495 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1104] var_495 = var_495 & mask_SORT_1 [L1105] SORT_1 var_660_arg_0 = var_495; [L1106] SORT_3 var_660_arg_1 = input_4; [L1107] SORT_3 var_660_arg_2 = state_140; [L1108] SORT_3 var_660 = var_660_arg_0 ? var_660_arg_1 : var_660_arg_2; [L1109] SORT_1 var_661_arg_0 = input_7; [L1110] SORT_3 var_661_arg_1 = var_582; [L1111] SORT_3 var_661_arg_2 = var_660; [L1112] SORT_3 var_661 = var_661_arg_0 ? var_661_arg_1 : var_661_arg_2; [L1113] SORT_3 next_662_arg_1 = var_661; [L1114] SORT_141 var_486_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_486_arg_0=6, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] EXPR var_486_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1115] var_486_arg_0 = var_486_arg_0 & mask_SORT_141 [L1116] SORT_13 var_486 = var_486_arg_0; [L1117] SORT_13 var_487_arg_0 = var_283; [L1118] SORT_13 var_487_arg_1 = var_486; [L1119] SORT_1 var_487 = var_487_arg_0 == var_487_arg_1; [L1120] SORT_1 var_488_arg_0 = input_6; [L1121] SORT_1 var_488_arg_1 = var_487; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_488_arg_0=0, var_488_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] EXPR var_488_arg_0 & var_488_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1122] SORT_1 var_488 = var_488_arg_0 & var_488_arg_1; [L1123] EXPR var_488 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1123] var_488 = var_488 & mask_SORT_1 [L1124] SORT_1 var_663_arg_0 = var_488; [L1125] SORT_3 var_663_arg_1 = input_4; [L1126] SORT_3 var_663_arg_2 = state_146; [L1127] SORT_3 var_663 = var_663_arg_0 ? var_663_arg_1 : var_663_arg_2; [L1128] SORT_1 var_664_arg_0 = input_7; [L1129] SORT_3 var_664_arg_1 = var_582; [L1130] SORT_3 var_664_arg_2 = var_663; [L1131] SORT_3 var_664 = var_664_arg_0 ? var_664_arg_1 : var_664_arg_2; [L1132] SORT_3 next_665_arg_1 = var_664; [L1133] SORT_141 var_479_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_479_arg_0=5, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] EXPR var_479_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1134] var_479_arg_0 = var_479_arg_0 & mask_SORT_141 [L1135] SORT_13 var_479 = var_479_arg_0; [L1136] SORT_13 var_480_arg_0 = var_283; [L1137] SORT_13 var_480_arg_1 = var_479; [L1138] SORT_1 var_480 = var_480_arg_0 == var_480_arg_1; [L1139] SORT_1 var_481_arg_0 = input_6; [L1140] SORT_1 var_481_arg_1 = var_480; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_481_arg_0=0, var_481_arg_1=1, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] EXPR var_481_arg_0 & var_481_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1141] SORT_1 var_481 = var_481_arg_0 & var_481_arg_1; [L1142] EXPR var_481 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1142] var_481 = var_481 & mask_SORT_1 [L1143] SORT_1 var_666_arg_0 = var_481; [L1144] SORT_3 var_666_arg_1 = input_4; [L1145] SORT_3 var_666_arg_2 = state_151; [L1146] SORT_3 var_666 = var_666_arg_0 ? var_666_arg_1 : var_666_arg_2; [L1147] SORT_1 var_667_arg_0 = input_7; [L1148] SORT_3 var_667_arg_1 = var_582; [L1149] SORT_3 var_667_arg_2 = var_666; [L1150] SORT_3 var_667 = var_667_arg_0 ? var_667_arg_1 : var_667_arg_2; [L1151] SORT_3 next_668_arg_1 = var_667; [L1152] SORT_141 var_472_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_472_arg_0=4, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] EXPR var_472_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1153] var_472_arg_0 = var_472_arg_0 & mask_SORT_141 [L1154] SORT_13 var_472 = var_472_arg_0; [L1155] SORT_13 var_473_arg_0 = var_283; [L1156] SORT_13 var_473_arg_1 = var_472; [L1157] SORT_1 var_473 = var_473_arg_0 == var_473_arg_1; [L1158] SORT_1 var_474_arg_0 = input_6; [L1159] SORT_1 var_474_arg_1 = var_473; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_474_arg_0=0, var_474_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] EXPR var_474_arg_0 & var_474_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1160] SORT_1 var_474 = var_474_arg_0 & var_474_arg_1; [L1161] EXPR var_474 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1161] var_474 = var_474 & mask_SORT_1 [L1162] SORT_1 var_669_arg_0 = var_474; [L1163] SORT_3 var_669_arg_1 = input_4; [L1164] SORT_3 var_669_arg_2 = state_156; [L1165] SORT_3 var_669 = var_669_arg_0 ? var_669_arg_1 : var_669_arg_2; [L1166] SORT_1 var_670_arg_0 = input_7; [L1167] SORT_3 var_670_arg_1 = var_582; [L1168] SORT_3 var_670_arg_2 = var_669; [L1169] SORT_3 var_670 = var_670_arg_0 ? var_670_arg_1 : var_670_arg_2; [L1170] SORT_3 next_671_arg_1 = var_670; [L1171] SORT_162 var_465_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_465_arg_0=3, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] EXPR var_465_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1172] var_465_arg_0 = var_465_arg_0 & mask_SORT_162 [L1173] SORT_13 var_465 = var_465_arg_0; [L1174] SORT_13 var_466_arg_0 = var_283; [L1175] SORT_13 var_466_arg_1 = var_465; [L1176] SORT_1 var_466 = var_466_arg_0 == var_466_arg_1; [L1177] SORT_1 var_467_arg_0 = input_6; [L1178] SORT_1 var_467_arg_1 = var_466; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_467_arg_0=0, var_467_arg_1=0, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] EXPR var_467_arg_0 & var_467_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1179] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1180] EXPR var_467 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1180] var_467 = var_467 & mask_SORT_1 [L1181] SORT_1 var_672_arg_0 = var_467; [L1182] SORT_3 var_672_arg_1 = input_4; [L1183] SORT_3 var_672_arg_2 = state_161; [L1184] SORT_3 var_672 = var_672_arg_0 ? var_672_arg_1 : var_672_arg_2; [L1185] SORT_1 var_673_arg_0 = input_7; [L1186] SORT_3 var_673_arg_1 = var_582; [L1187] SORT_3 var_673_arg_2 = var_672; [L1188] SORT_3 var_673 = var_673_arg_0 ? var_673_arg_1 : var_673_arg_2; [L1189] SORT_3 next_674_arg_1 = var_673; [L1190] SORT_162 var_438_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_438_arg_0=2, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] EXPR var_438_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1191] var_438_arg_0 = var_438_arg_0 & mask_SORT_162 [L1192] SORT_13 var_438 = var_438_arg_0; [L1193] SORT_13 var_439_arg_0 = var_283; [L1194] SORT_13 var_439_arg_1 = var_438; [L1195] SORT_1 var_439 = var_439_arg_0 == var_439_arg_1; [L1196] SORT_1 var_440_arg_0 = input_6; [L1197] SORT_1 var_440_arg_1 = var_439; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_440_arg_0=0, var_440_arg_1=0, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] EXPR var_440_arg_0 & var_440_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1198] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1199] EXPR var_440 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, state_167=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1199] var_440 = var_440 & mask_SORT_1 [L1200] SORT_1 var_675_arg_0 = var_440; [L1201] SORT_3 var_675_arg_1 = input_4; [L1202] SORT_3 var_675_arg_2 = state_167; [L1203] SORT_3 var_675 = var_675_arg_0 ? var_675_arg_1 : var_675_arg_2; [L1204] SORT_1 var_676_arg_0 = input_7; [L1205] SORT_3 var_676_arg_1 = var_582; [L1206] SORT_3 var_676_arg_2 = var_675; [L1207] SORT_3 var_676 = var_676_arg_0 ? var_676_arg_1 : var_676_arg_2; [L1208] SORT_3 next_677_arg_1 = var_676; [L1209] SORT_1 var_361_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_361_arg_0=1, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] EXPR var_361_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1210] var_361_arg_0 = var_361_arg_0 & mask_SORT_1 [L1211] SORT_13 var_361 = var_361_arg_0; [L1212] SORT_13 var_362_arg_0 = var_283; [L1213] SORT_13 var_362_arg_1 = var_361; [L1214] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1215] SORT_1 var_363_arg_0 = input_6; [L1216] SORT_1 var_363_arg_1 = var_362; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_363_arg_0=0, var_363_arg_1=0, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] EXPR var_363_arg_0 & var_363_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1217] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1218] EXPR var_363 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, state_172=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_283=0, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1218] var_363 = var_363 & mask_SORT_1 [L1219] SORT_1 var_678_arg_0 = var_363; [L1220] SORT_3 var_678_arg_1 = input_4; [L1221] SORT_3 var_678_arg_2 = state_172; [L1222] SORT_3 var_678 = var_678_arg_0 ? var_678_arg_1 : var_678_arg_2; [L1223] SORT_1 var_679_arg_0 = input_7; [L1224] SORT_3 var_679_arg_1 = var_582; [L1225] SORT_3 var_679_arg_2 = var_678; [L1226] SORT_3 var_679 = var_679_arg_0 ? var_679_arg_1 : var_679_arg_2; [L1227] SORT_3 next_680_arg_1 = var_679; [L1228] SORT_13 var_284_arg_0 = var_283; [L1229] SORT_1 var_284 = var_284_arg_0 != 0; [L1230] SORT_1 var_285_arg_0 = var_284; [L1231] SORT_1 var_285 = ~var_285_arg_0; [L1232] SORT_1 var_286_arg_0 = input_6; [L1233] SORT_1 var_286_arg_1 = var_285; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_286_arg_0=0, var_286_arg_1=-1, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1234] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L1235] EXPR var_286 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, state_177=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1235] var_286 = var_286 & mask_SORT_1 [L1236] SORT_1 var_681_arg_0 = var_286; [L1237] SORT_3 var_681_arg_1 = input_4; [L1238] SORT_3 var_681_arg_2 = state_177; [L1239] SORT_3 var_681 = var_681_arg_0 ? var_681_arg_1 : var_681_arg_2; [L1240] SORT_1 var_682_arg_0 = input_7; [L1241] SORT_3 var_682_arg_1 = var_582; [L1242] SORT_3 var_682_arg_2 = var_681; [L1243] SORT_3 var_682 = var_682_arg_0 ? var_682_arg_1 : var_682_arg_2; [L1244] SORT_3 next_683_arg_1 = var_682; [L1245] SORT_1 var_684_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_684_arg_0=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] EXPR var_684_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_182=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1246] var_684_arg_0 = var_684_arg_0 & mask_SORT_1 [L1247] SORT_11 var_684 = var_684_arg_0; [L1248] SORT_11 var_685_arg_0 = state_182; [L1249] SORT_11 var_685_arg_1 = var_684; [L1250] SORT_11 var_685 = var_685_arg_0 + var_685_arg_1; [L1251] SORT_1 var_686_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_686_arg_0=256, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] EXPR var_686_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_685=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1252] var_686_arg_0 = var_686_arg_0 & mask_SORT_1 [L1253] SORT_11 var_686 = var_686_arg_0; [L1254] SORT_11 var_687_arg_0 = var_685; [L1255] SORT_11 var_687_arg_1 = var_686; [L1256] SORT_11 var_687 = var_687_arg_0 - var_687_arg_1; [L1257] SORT_1 var_688_arg_0 = input_7; [L1258] SORT_11 var_688_arg_1 = var_203; [L1259] SORT_11 var_688_arg_2 = var_687; [L1260] SORT_11 var_688 = var_688_arg_0 ? var_688_arg_1 : var_688_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_688=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] EXPR var_688 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1261] var_688 = var_688 & mask_SORT_11 [L1262] SORT_11 next_689_arg_1 = var_688; [L1263] SORT_1 var_542_arg_0 = state_190; [L1264] SORT_1 var_542 = ~var_542_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=-1, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] EXPR var_542 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1265] var_542 = var_542 & mask_SORT_1 [L1266] SORT_1 var_538_arg_0 = input_8; [L1267] SORT_1 var_538_arg_1 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538_arg_0=0, var_538_arg_1=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] EXPR var_538_arg_0 & var_538_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1268] SORT_1 var_538 = var_538_arg_0 & var_538_arg_1; [L1269] SORT_1 var_539_arg_0 = state_190; [L1270] SORT_1 var_539_arg_1 = var_538; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_539_arg_0=0, var_539_arg_1=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] EXPR var_539_arg_0 | var_539_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1271] SORT_1 var_539 = var_539_arg_0 | var_539_arg_1; [L1272] SORT_1 var_690_arg_0 = var_542; [L1273] SORT_1 var_690_arg_1 = var_539; [L1274] SORT_1 var_690_arg_2 = state_190; [L1275] SORT_1 var_690 = var_690_arg_0 ? var_690_arg_1 : var_690_arg_2; [L1276] SORT_1 var_691_arg_0 = input_7; [L1277] SORT_1 var_691_arg_1 = var_233; [L1278] SORT_1 var_691_arg_2 = var_690; [L1279] SORT_1 var_691 = var_691_arg_0 ? var_691_arg_1 : var_691_arg_2; [L1280] SORT_1 next_692_arg_1 = var_691; [L1281] SORT_1 var_550_arg_0 = var_207; [L1282] SORT_1 var_550_arg_1 = state_191; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_550_arg_0=0, var_550_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] EXPR var_550_arg_0 | var_550_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_5=256, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, state_190=0, state_191=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1283] SORT_1 var_550 = var_550_arg_0 | var_550_arg_1; [L1284] SORT_1 var_693_arg_0 = var_173; [L1285] SORT_1 var_693_arg_1 = var_550; [L1286] SORT_1 var_693_arg_2 = state_191; [L1287] SORT_1 var_693 = var_693_arg_0 ? var_693_arg_1 : var_693_arg_2; [L1288] SORT_1 var_694_arg_0 = input_7; [L1289] SORT_1 var_694_arg_1 = var_233; [L1290] SORT_1 var_694_arg_2 = var_693; [L1291] SORT_1 var_694 = var_694_arg_0 ? var_694_arg_1 : var_694_arg_2; [L1292] SORT_1 next_695_arg_1 = var_694; [L1293] SORT_1 var_562_arg_0 = input_6; [L1294] SORT_1 var_562_arg_1 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_562_arg_0=0, var_562_arg_1=256, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] EXPR var_562_arg_0 | var_562_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1295] SORT_1 var_562 = var_562_arg_0 | var_562_arg_1; [L1296] SORT_1 var_563_arg_0 = var_562; [L1297] SORT_1 var_563_arg_1 = input_7; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_563_arg_0=0, var_563_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] EXPR var_563_arg_0 | var_563_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_190=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1298] SORT_1 var_563 = var_563_arg_0 | var_563_arg_1; [L1299] SORT_1 var_564_arg_0 = var_563; [L1300] SORT_1 var_564_arg_1 = state_190; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_564_arg_0=0, var_564_arg_1=0, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] EXPR var_564_arg_0 | var_564_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1301] SORT_1 var_564 = var_564_arg_0 | var_564_arg_1; [L1302] EXPR var_564 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_194=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1302] var_564 = var_564 & mask_SORT_1 [L1303] SORT_1 var_696_arg_0 = var_564; [L1304] SORT_11 var_696_arg_1 = var_204; [L1305] SORT_11 var_696_arg_2 = state_194; [L1306] SORT_11 var_696 = var_696_arg_0 ? var_696_arg_1 : var_696_arg_2; [L1307] SORT_1 var_697_arg_0 = input_7; [L1308] SORT_11 var_697_arg_1 = var_203; [L1309] SORT_11 var_697_arg_2 = var_696; [L1310] SORT_11 var_697 = var_697_arg_0 ? var_697_arg_1 : var_697_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_697=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] EXPR var_697 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_538=0, var_542=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1311] var_697 = var_697 & mask_SORT_11 [L1312] SORT_11 next_698_arg_1 = var_697; [L1313] SORT_1 var_547_arg_0 = var_538; [L1314] SORT_1 var_547_arg_1 = var_542; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_547_arg_0=0, var_547_arg_1=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] EXPR var_547_arg_0 & var_547_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1315] SORT_1 var_547 = var_547_arg_0 & var_547_arg_1; [L1316] EXPR var_547 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_209=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1316] var_547 = var_547 & mask_SORT_1 [L1317] SORT_1 var_699_arg_0 = var_547; [L1318] SORT_3 var_699_arg_1 = input_4; [L1319] SORT_3 var_699_arg_2 = state_209; [L1320] SORT_3 var_699 = var_699_arg_0 ? var_699_arg_1 : var_699_arg_2; [L1321] SORT_1 var_700_arg_0 = input_7; [L1322] SORT_3 var_700_arg_1 = var_582; [L1323] SORT_3 var_700_arg_2 = var_699; [L1324] SORT_3 var_700 = var_700_arg_0 ? var_700_arg_1 : var_700_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_700=0, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] EXPR var_700 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_6=0, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1325] var_700 = var_700 & mask_SORT_3 [L1326] SORT_3 next_701_arg_1 = var_700; [L1327] SORT_1 next_702_arg_1 = var_233; [L1328] SORT_1 var_518_arg_0 = input_6; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_518_arg_0=0, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] EXPR var_518_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_7=0, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, next_584_arg_1=0, next_587_arg_1=0, next_590_arg_1=0, next_593_arg_1=0, next_596_arg_1=0, next_599_arg_1=0, next_602_arg_1=0, next_605_arg_1=0, next_608_arg_1=0, next_611_arg_1=0, next_614_arg_1=0, next_617_arg_1=0, next_620_arg_1=0, next_623_arg_1=0, next_626_arg_1=0, next_629_arg_1=0, next_632_arg_1=0, next_635_arg_1=0, next_638_arg_1=0, next_641_arg_1=0, next_644_arg_1=0, next_647_arg_1=0, next_650_arg_1=0, next_653_arg_1=0, next_656_arg_1=0, next_659_arg_1=0, next_662_arg_1=0, next_665_arg_1=0, next_668_arg_1=0, next_671_arg_1=0, next_674_arg_1=0, next_677_arg_1=0, next_680_arg_1=0, next_683_arg_1=0, next_689_arg_1=0, next_692_arg_1=0, next_695_arg_1=0, next_698_arg_1=0, next_701_arg_1=0, next_702_arg_1=0, state_282=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_242=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L1329] var_518_arg_0 = var_518_arg_0 & mask_SORT_1 [L1330] SORT_11 var_518 = var_518_arg_0; [L1331] SORT_11 var_519_arg_0 = state_282; [L1332] SORT_11 var_519_arg_1 = var_518; [L1333] SORT_11 var_519 = var_519_arg_0 + var_519_arg_1; [L1334] SORT_1 var_703_arg_0 = var_242; [L1335] SORT_11 var_703_arg_1 = var_519; [L1336] SORT_11 var_703_arg_2 = state_282; [L1337] SORT_11 var_703 = var_703_arg_0 ? var_703_arg_1 : var_703_arg_2; [L1338] SORT_1 var_704_arg_0 = input_7; [L1339] SORT_11 var_704_arg_1 = var_203; [L1340] SORT_11 var_704_arg_2 = var_703; [L1341] SORT_11 var_704 = var_704_arg_0 ? var_704_arg_1 : var_704_arg_2; [L1342] SORT_11 next_705_arg_1 = var_704; [L1344] state_10 = next_584_arg_1 [L1345] state_12 = next_587_arg_1 [L1346] state_18 = next_590_arg_1 [L1347] state_24 = next_593_arg_1 [L1348] state_29 = next_596_arg_1 [L1349] state_34 = next_599_arg_1 [L1350] state_39 = next_602_arg_1 [L1351] state_44 = next_605_arg_1 [L1352] state_49 = next_608_arg_1 [L1353] state_54 = next_611_arg_1 [L1354] state_59 = next_614_arg_1 [L1355] state_64 = next_617_arg_1 [L1356] state_69 = next_620_arg_1 [L1357] state_74 = next_623_arg_1 [L1358] state_79 = next_626_arg_1 [L1359] state_84 = next_629_arg_1 [L1360] state_89 = next_632_arg_1 [L1361] state_94 = next_635_arg_1 [L1362] state_99 = next_638_arg_1 [L1363] state_105 = next_641_arg_1 [L1364] state_110 = next_644_arg_1 [L1365] state_115 = next_647_arg_1 [L1366] state_120 = next_650_arg_1 [L1367] state_125 = next_653_arg_1 [L1368] state_130 = next_656_arg_1 [L1369] state_135 = next_659_arg_1 [L1370] state_140 = next_662_arg_1 [L1371] state_146 = next_665_arg_1 [L1372] state_151 = next_668_arg_1 [L1373] state_156 = next_671_arg_1 [L1374] state_161 = next_674_arg_1 [L1375] state_167 = next_677_arg_1 [L1376] state_172 = next_680_arg_1 [L1377] state_177 = next_683_arg_1 [L1378] state_182 = next_689_arg_1 [L1379] state_190 = next_692_arg_1 [L1380] state_191 = next_695_arg_1 [L1381] state_194 = next_698_arg_1 [L1382] state_209 = next_701_arg_1 [L1383] state_213 = next_702_arg_1 [L1384] state_282 = next_705_arg_1 [L142] input_2 = __VERIFIER_nondet_uchar() [L143] input_4 = __VERIFIER_nondet_ulong() [L144] input_5 = __VERIFIER_nondet_uchar() [L145] input_6 = __VERIFIER_nondet_uchar() [L146] input_7 = __VERIFIER_nondet_uchar() [L147] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L147] input_7 = input_7 & mask_SORT_1 [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_ulong() [L150] input_231 = __VERIFIER_nondet_uchar() [L152] SORT_1 var_215_arg_0 = input_7; [L153] SORT_1 var_215_arg_1 = state_213; [L154] SORT_1 var_215 = var_215_arg_0 == var_215_arg_1; [L155] SORT_1 var_216_arg_0 = var_173; [L156] SORT_1 var_216 = ~var_216_arg_0; [L157] SORT_1 var_217_arg_0 = var_215; [L158] SORT_1 var_217_arg_1 = var_216; VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_217_arg_0=0, var_217_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] EXPR var_217_arg_0 | var_217_arg_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L159] SORT_1 var_217 = var_217_arg_0 | var_217_arg_1; [L160] EXPR var_217 & mask_SORT_1 VAL [input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L160] var_217 = var_217 & mask_SORT_1 [L161] SORT_1 constr_218_arg_0 = var_217; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L162] CALL assume_abort_if_not(constr_218_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L162] RET assume_abort_if_not(constr_218_arg_0) VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L163] SORT_13 var_187_arg_0 = var_186; VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_187_arg_0=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] EXPR var_187_arg_0 & mask_SORT_13 VAL [constr_218_arg_0=1, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L164] var_187_arg_0 = var_187_arg_0 & mask_SORT_13 [L165] SORT_11 var_187 = var_187_arg_0; [L166] SORT_11 var_188_arg_0 = state_182; [L167] SORT_11 var_188_arg_1 = var_187; [L168] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L169] SORT_1 var_219_arg_0 = var_188; [L170] SORT_1 var_219 = ~var_219_arg_0; [L171] SORT_1 var_220_arg_0 = input_6; [L172] SORT_1 var_220 = ~var_220_arg_0; [L173] SORT_1 var_221_arg_0 = var_219; [L174] SORT_1 var_221_arg_1 = var_220; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_221_arg_0=-1, var_221_arg_1=-1, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] EXPR var_221_arg_0 | var_221_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L175] SORT_1 var_221 = var_221_arg_0 | var_221_arg_1; [L176] SORT_1 var_222_arg_0 = var_173; [L177] SORT_1 var_222 = ~var_222_arg_0; [L178] SORT_1 var_223_arg_0 = var_221; [L179] SORT_1 var_223_arg_1 = var_222; VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_223_arg_0=255, var_223_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] EXPR var_223_arg_0 | var_223_arg_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L180] SORT_1 var_223 = var_223_arg_0 | var_223_arg_1; [L181] EXPR var_223 & mask_SORT_1 VAL [constr_218_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L181] var_223 = var_223 & mask_SORT_1 [L182] SORT_1 constr_224_arg_0 = var_223; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L183] CALL assume_abort_if_not(constr_224_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L183] RET assume_abort_if_not(constr_224_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L184] SORT_11 var_183_arg_0 = state_182; [L185] SORT_1 var_183 = var_183_arg_0 != 0; [L186] SORT_1 var_184_arg_0 = var_183; [L187] SORT_1 var_184 = ~var_184_arg_0; [L188] SORT_1 var_225_arg_0 = var_184; [L189] SORT_1 var_225 = ~var_225_arg_0; [L190] SORT_1 var_226_arg_0 = input_5; [L191] SORT_1 var_226 = ~var_226_arg_0; [L192] SORT_1 var_227_arg_0 = var_225; [L193] SORT_1 var_227_arg_1 = var_226; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_227_arg_0=-256, var_227_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] EXPR var_227_arg_0 | var_227_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L194] SORT_1 var_227 = var_227_arg_0 | var_227_arg_1; [L195] SORT_1 var_228_arg_0 = var_173; [L196] SORT_1 var_228 = ~var_228_arg_0; [L197] SORT_1 var_229_arg_0 = var_227; [L198] SORT_1 var_229_arg_1 = var_228; VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_229_arg_0=254, var_229_arg_1=-2, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] EXPR var_229_arg_0 | var_229_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L199] SORT_1 var_229 = var_229_arg_0 | var_229_arg_1; [L200] EXPR var_229 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L200] var_229 = var_229 & mask_SORT_1 [L201] SORT_1 constr_230_arg_0 = var_229; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L202] CALL assume_abort_if_not(constr_230_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L202] RET assume_abort_if_not(constr_230_arg_0) VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L204] SORT_1 var_234_arg_0 = state_213; [L205] SORT_1 var_234_arg_1 = var_233; [L206] SORT_1 var_234_arg_2 = var_173; [L207] SORT_1 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L208] SORT_1 var_192_arg_0 = state_191; [L209] SORT_1 var_192 = ~var_192_arg_0; [L210] SORT_1 var_193_arg_0 = state_190; [L211] SORT_1 var_193_arg_1 = var_192; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_193_arg_0=0, var_193_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] EXPR var_193_arg_0 & var_193_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L212] SORT_1 var_193 = var_193_arg_0 & var_193_arg_1; [L213] SORT_11 var_195_arg_0 = state_194; [L214] SORT_1 var_195 = var_195_arg_0 != 0; [L215] SORT_1 var_196_arg_0 = var_193; [L216] SORT_1 var_196_arg_1 = var_195; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196_arg_0=0, var_196_arg_1=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L217] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L218] SORT_1 var_197_arg_0 = state_190; [L219] SORT_1 var_197 = ~var_197_arg_0; [L220] SORT_1 var_198_arg_0 = input_6; [L221] SORT_1 var_198_arg_1 = var_197; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_198_arg_0=0, var_198_arg_1=-1, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] EXPR var_198_arg_0 & var_198_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L222] SORT_1 var_198 = var_198_arg_0 & var_198_arg_1; [L223] SORT_1 var_199_arg_0 = var_198; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_199_arg_0=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] EXPR var_199_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L224] var_199_arg_0 = var_199_arg_0 & mask_SORT_1 [L225] SORT_11 var_199 = var_199_arg_0; [L226] SORT_11 var_200_arg_0 = state_194; [L227] SORT_11 var_200_arg_1 = var_199; [L228] SORT_11 var_200 = var_200_arg_0 + var_200_arg_1; [L229] SORT_1 var_201_arg_0 = input_5; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_201_arg_0=257, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] EXPR var_201_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_200=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L230] var_201_arg_0 = var_201_arg_0 & mask_SORT_1 [L231] SORT_11 var_201 = var_201_arg_0; [L232] SORT_11 var_202_arg_0 = var_200; [L233] SORT_11 var_202_arg_1 = var_201; [L234] SORT_11 var_202 = var_202_arg_0 - var_202_arg_1; [L235] SORT_1 var_204_arg_0 = input_7; [L236] SORT_11 var_204_arg_1 = var_203; [L237] SORT_11 var_204_arg_2 = var_202; [L238] SORT_11 var_204 = var_204_arg_0 ? var_204_arg_1 : var_204_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] EXPR var_204 & mask_SORT_11 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_196=0, var_203=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L239] var_204 = var_204 & mask_SORT_11 [L240] SORT_11 var_205_arg_0 = var_204; [L241] SORT_1 var_205 = var_205_arg_0 != 0; [L242] SORT_1 var_206_arg_0 = var_205; [L243] SORT_1 var_206 = ~var_206_arg_0; [L244] SORT_1 var_207_arg_0 = var_196; [L245] SORT_1 var_207_arg_1 = var_206; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207_arg_0=0, var_207_arg_1=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] EXPR var_207_arg_0 & var_207_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L246] SORT_1 var_207 = var_207_arg_0 & var_207_arg_1; [L247] SORT_1 var_208_arg_0 = var_207; [L248] SORT_1 var_208 = ~var_208_arg_0; [L249] SORT_11 var_14_arg_0 = state_12; [L250] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] EXPR var_14 & mask_SORT_13 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L251] var_14 = var_14 & mask_SORT_13 [L252] SORT_13 var_178_arg_0 = var_14; [L253] SORT_1 var_178 = var_178_arg_0 != 0; [L254] SORT_1 var_179_arg_0 = var_178; [L255] SORT_1 var_179 = ~var_179_arg_0; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=-1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] EXPR var_179 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L256] var_179 = var_179 & mask_SORT_1 [L257] SORT_1 var_174_arg_0 = var_173; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_174_arg_0=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] EXPR var_174_arg_0 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L258] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L259] SORT_13 var_174 = var_174_arg_0; [L260] SORT_13 var_175_arg_0 = var_14; [L261] SORT_13 var_175_arg_1 = var_174; [L262] SORT_1 var_175 = var_175_arg_0 == var_175_arg_1; [L263] SORT_162 var_169_arg_0 = var_168; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_169_arg_0=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] EXPR var_169_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L264] var_169_arg_0 = var_169_arg_0 & mask_SORT_162 [L265] SORT_13 var_169 = var_169_arg_0; [L266] SORT_13 var_170_arg_0 = var_14; [L267] SORT_13 var_170_arg_1 = var_169; [L268] SORT_1 var_170 = var_170_arg_0 == var_170_arg_1; [L269] SORT_162 var_164_arg_0 = var_163; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_164_arg_0=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] EXPR var_164_arg_0 & mask_SORT_162 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L270] var_164_arg_0 = var_164_arg_0 & mask_SORT_162 [L271] SORT_13 var_164 = var_164_arg_0; [L272] SORT_13 var_165_arg_0 = var_14; [L273] SORT_13 var_165_arg_1 = var_164; [L274] SORT_1 var_165 = var_165_arg_0 == var_165_arg_1; [L275] SORT_141 var_158_arg_0 = var_157; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_158_arg_0=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] EXPR var_158_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L276] var_158_arg_0 = var_158_arg_0 & mask_SORT_141 [L277] SORT_13 var_158 = var_158_arg_0; [L278] SORT_13 var_159_arg_0 = var_14; [L279] SORT_13 var_159_arg_1 = var_158; [L280] SORT_1 var_159 = var_159_arg_0 == var_159_arg_1; [L281] SORT_141 var_153_arg_0 = var_152; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_153_arg_0=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] EXPR var_153_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L282] var_153_arg_0 = var_153_arg_0 & mask_SORT_141 [L283] SORT_13 var_153 = var_153_arg_0; [L284] SORT_13 var_154_arg_0 = var_14; [L285] SORT_13 var_154_arg_1 = var_153; [L286] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L287] SORT_141 var_148_arg_0 = var_147; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_148_arg_0=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] EXPR var_148_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L288] var_148_arg_0 = var_148_arg_0 & mask_SORT_141 [L289] SORT_13 var_148 = var_148_arg_0; [L290] SORT_13 var_149_arg_0 = var_14; [L291] SORT_13 var_149_arg_1 = var_148; [L292] SORT_1 var_149 = var_149_arg_0 == var_149_arg_1; [L293] SORT_141 var_143_arg_0 = var_142; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_143_arg_0=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] EXPR var_143_arg_0 & mask_SORT_141 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L294] var_143_arg_0 = var_143_arg_0 & mask_SORT_141 [L295] SORT_13 var_143 = var_143_arg_0; [L296] SORT_13 var_144_arg_0 = var_14; [L297] SORT_13 var_144_arg_1 = var_143; [L298] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L299] SORT_100 var_137_arg_0 = var_136; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_137_arg_0=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] EXPR var_137_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L300] var_137_arg_0 = var_137_arg_0 & mask_SORT_100 [L301] SORT_13 var_137 = var_137_arg_0; [L302] SORT_13 var_138_arg_0 = var_14; [L303] SORT_13 var_138_arg_1 = var_137; [L304] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L305] SORT_100 var_132_arg_0 = var_131; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_132_arg_0=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] EXPR var_132_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L306] var_132_arg_0 = var_132_arg_0 & mask_SORT_100 [L307] SORT_13 var_132 = var_132_arg_0; [L308] SORT_13 var_133_arg_0 = var_14; [L309] SORT_13 var_133_arg_1 = var_132; [L310] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L311] SORT_100 var_127_arg_0 = var_126; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_127_arg_0=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] EXPR var_127_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L312] var_127_arg_0 = var_127_arg_0 & mask_SORT_100 [L313] SORT_13 var_127 = var_127_arg_0; [L314] SORT_13 var_128_arg_0 = var_14; [L315] SORT_13 var_128_arg_1 = var_127; [L316] SORT_1 var_128 = var_128_arg_0 == var_128_arg_1; [L317] SORT_100 var_122_arg_0 = var_121; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_122_arg_0=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] EXPR var_122_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L318] var_122_arg_0 = var_122_arg_0 & mask_SORT_100 [L319] SORT_13 var_122 = var_122_arg_0; [L320] SORT_13 var_123_arg_0 = var_14; [L321] SORT_13 var_123_arg_1 = var_122; [L322] SORT_1 var_123 = var_123_arg_0 == var_123_arg_1; [L323] SORT_100 var_117_arg_0 = var_116; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_117_arg_0=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] EXPR var_117_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L324] var_117_arg_0 = var_117_arg_0 & mask_SORT_100 [L325] SORT_13 var_117 = var_117_arg_0; [L326] SORT_13 var_118_arg_0 = var_14; [L327] SORT_13 var_118_arg_1 = var_117; [L328] SORT_1 var_118 = var_118_arg_0 == var_118_arg_1; [L329] SORT_100 var_112_arg_0 = var_111; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_112_arg_0=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] EXPR var_112_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L330] var_112_arg_0 = var_112_arg_0 & mask_SORT_100 [L331] SORT_13 var_112 = var_112_arg_0; [L332] SORT_13 var_113_arg_0 = var_14; [L333] SORT_13 var_113_arg_1 = var_112; [L334] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L335] SORT_100 var_107_arg_0 = var_106; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_107_arg_0=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] EXPR var_107_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L336] var_107_arg_0 = var_107_arg_0 & mask_SORT_100 [L337] SORT_13 var_107 = var_107_arg_0; [L338] SORT_13 var_108_arg_0 = var_14; [L339] SORT_13 var_108_arg_1 = var_107; [L340] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L341] SORT_100 var_102_arg_0 = var_101; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_102_arg_0=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] EXPR var_102_arg_0 & mask_SORT_100 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L342] var_102_arg_0 = var_102_arg_0 & mask_SORT_100 [L343] SORT_13 var_102 = var_102_arg_0; [L344] SORT_13 var_103_arg_0 = var_14; [L345] SORT_13 var_103_arg_1 = var_102; [L346] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L347] SORT_19 var_96_arg_0 = var_95; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_96_arg_0=16] [L348] EXPR var_96_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L348] var_96_arg_0 = var_96_arg_0 & mask_SORT_19 [L349] SORT_13 var_96 = var_96_arg_0; [L350] SORT_13 var_97_arg_0 = var_14; [L351] SORT_13 var_97_arg_1 = var_96; [L352] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L353] SORT_19 var_91_arg_0 = var_90; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_91_arg_0=17, var_95=16, var_97=1] [L354] EXPR var_91_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16, var_97=1] [L354] var_91_arg_0 = var_91_arg_0 & mask_SORT_19 [L355] SORT_13 var_91 = var_91_arg_0; [L356] SORT_13 var_92_arg_0 = var_14; [L357] SORT_13 var_92_arg_1 = var_91; [L358] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L359] SORT_19 var_86_arg_0 = var_85; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_86_arg_0=18, var_90=17, var_92=1, var_95=16, var_97=1] [L360] EXPR var_86_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_92=1, var_95=16, var_97=1] [L360] var_86_arg_0 = var_86_arg_0 & mask_SORT_19 [L361] SORT_13 var_86 = var_86_arg_0; [L362] SORT_13 var_87_arg_0 = var_14; [L363] SORT_13 var_87_arg_1 = var_86; [L364] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L365] SORT_19 var_81_arg_0 = var_80; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_81_arg_0=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L366] EXPR var_81_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L366] var_81_arg_0 = var_81_arg_0 & mask_SORT_19 [L367] SORT_13 var_81 = var_81_arg_0; [L368] SORT_13 var_82_arg_0 = var_14; [L369] SORT_13 var_82_arg_1 = var_81; [L370] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L371] SORT_19 var_76_arg_0 = var_75; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_76_arg_0=20, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L372] EXPR var_76_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L372] var_76_arg_0 = var_76_arg_0 & mask_SORT_19 [L373] SORT_13 var_76 = var_76_arg_0; [L374] SORT_13 var_77_arg_0 = var_14; [L375] SORT_13 var_77_arg_1 = var_76; [L376] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L377] SORT_19 var_71_arg_0 = var_70; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_71_arg_0=21, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L378] EXPR var_71_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L378] var_71_arg_0 = var_71_arg_0 & mask_SORT_19 [L379] SORT_13 var_71 = var_71_arg_0; [L380] SORT_13 var_72_arg_0 = var_14; [L381] SORT_13 var_72_arg_1 = var_71; [L382] SORT_1 var_72 = var_72_arg_0 == var_72_arg_1; [L383] SORT_19 var_66_arg_0 = var_65; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_66_arg_0=22, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L384] EXPR var_66_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L384] var_66_arg_0 = var_66_arg_0 & mask_SORT_19 [L385] SORT_13 var_66 = var_66_arg_0; [L386] SORT_13 var_67_arg_0 = var_14; [L387] SORT_13 var_67_arg_1 = var_66; [L388] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L389] SORT_19 var_61_arg_0 = var_60; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_61_arg_0=23, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L390] EXPR var_61_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L390] var_61_arg_0 = var_61_arg_0 & mask_SORT_19 [L391] SORT_13 var_61 = var_61_arg_0; [L392] SORT_13 var_62_arg_0 = var_14; [L393] SORT_13 var_62_arg_1 = var_61; [L394] SORT_1 var_62 = var_62_arg_0 == var_62_arg_1; [L395] SORT_19 var_56_arg_0 = var_55; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_56_arg_0=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L396] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L396] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L397] SORT_13 var_56 = var_56_arg_0; [L398] SORT_13 var_57_arg_0 = var_14; [L399] SORT_13 var_57_arg_1 = var_56; [L400] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L401] SORT_19 var_51_arg_0 = var_50; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_51_arg_0=25, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L402] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L402] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L403] SORT_13 var_51 = var_51_arg_0; [L404] SORT_13 var_52_arg_0 = var_14; [L405] SORT_13 var_52_arg_1 = var_51; [L406] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L407] SORT_19 var_46_arg_0 = var_45; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_46_arg_0=26, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L408] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L408] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L409] SORT_13 var_46 = var_46_arg_0; [L410] SORT_13 var_47_arg_0 = var_14; [L411] SORT_13 var_47_arg_1 = var_46; [L412] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L413] SORT_19 var_41_arg_0 = var_40; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_41_arg_0=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L414] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L414] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L415] SORT_13 var_41 = var_41_arg_0; [L416] SORT_13 var_42_arg_0 = var_14; [L417] SORT_13 var_42_arg_1 = var_41; [L418] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L419] SORT_19 var_36_arg_0 = var_35; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_36_arg_0=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L420] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L420] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L421] SORT_13 var_36 = var_36_arg_0; [L422] SORT_13 var_37_arg_0 = var_14; [L423] SORT_13 var_37_arg_1 = var_36; [L424] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L425] SORT_19 var_31_arg_0 = var_30; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_31_arg_0=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L426] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L426] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L427] SORT_13 var_31 = var_31_arg_0; [L428] SORT_13 var_32_arg_0 = var_14; [L429] SORT_13 var_32_arg_1 = var_31; [L430] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L431] SORT_19 var_26_arg_0 = var_25; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_26_arg_0=30, var_30=29, var_32=1, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L432] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_32=1, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L432] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L433] SORT_13 var_26 = var_26_arg_0; [L434] SORT_13 var_27_arg_0 = var_14; [L435] SORT_13 var_27_arg_1 = var_26; [L436] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L437] SORT_19 var_21_arg_0 = var_20; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_21_arg_0=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=1, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L438] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_103=0, var_106=14, var_108=1, var_111=13, var_113=0, var_116=12, var_118=0, var_121=11, var_123=0, var_126=10, var_128=0, var_131=9, var_133=0, var_136=8, var_138=0, var_142=7, var_144=0, var_147=6, var_149=0, var_14=0, var_152=5, var_154=0, var_157=4, var_159=0, var_15=32, var_163=3, var_165=0, var_168=2, var_170=1, var_173=1, var_175=0, var_179=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_27=1, var_30=29, var_32=1, var_35=28, var_37=0, var_40=27, var_42=0, var_45=26, var_47=1, var_50=25, var_52=0, var_55=24, var_57=1, var_582=0, var_60=23, var_62=1, var_65=22, var_67=0, var_70=21, var_72=1, var_75=20, var_77=1, var_80=19, var_82=1, var_85=18, var_87=1, var_90=17, var_92=1, var_95=16, var_97=1] [L438] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L439] SORT_13 var_21 = var_21_arg_0; [L440] SORT_13 var_22_arg_0 = var_14; [L441] SORT_13 var_22_arg_1 = var_21; [L442] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L443] SORT_13 var_16_arg_0 = var_14; [L444] SORT_13 var_16_arg_1 = var_15; [L445] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L446] SORT_1 var_17_arg_0 = var_16; [L447] SORT_3 var_17_arg_1 = state_10; [L448] SORT_3 var_17_arg_2 = input_9; [L449] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L450] SORT_1 var_23_arg_0 = var_22; [L451] SORT_3 var_23_arg_1 = state_18; [L452] SORT_3 var_23_arg_2 = var_17; [L453] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L454] SORT_1 var_28_arg_0 = var_27; [L455] SORT_3 var_28_arg_1 = state_24; [L456] SORT_3 var_28_arg_2 = var_23; [L457] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L458] SORT_1 var_33_arg_0 = var_32; [L459] SORT_3 var_33_arg_1 = state_29; [L460] SORT_3 var_33_arg_2 = var_28; [L461] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L462] SORT_1 var_38_arg_0 = var_37; [L463] SORT_3 var_38_arg_1 = state_34; [L464] SORT_3 var_38_arg_2 = var_33; [L465] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L466] SORT_1 var_43_arg_0 = var_42; [L467] SORT_3 var_43_arg_1 = state_39; [L468] SORT_3 var_43_arg_2 = var_38; [L469] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L470] SORT_1 var_48_arg_0 = var_47; [L471] SORT_3 var_48_arg_1 = state_44; [L472] SORT_3 var_48_arg_2 = var_43; [L473] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L474] SORT_1 var_53_arg_0 = var_52; [L475] SORT_3 var_53_arg_1 = state_49; [L476] SORT_3 var_53_arg_2 = var_48; [L477] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L478] SORT_1 var_58_arg_0 = var_57; [L479] SORT_3 var_58_arg_1 = state_54; [L480] SORT_3 var_58_arg_2 = var_53; [L481] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L482] SORT_1 var_63_arg_0 = var_62; [L483] SORT_3 var_63_arg_1 = state_59; [L484] SORT_3 var_63_arg_2 = var_58; [L485] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L486] SORT_1 var_68_arg_0 = var_67; [L487] SORT_3 var_68_arg_1 = state_64; [L488] SORT_3 var_68_arg_2 = var_63; [L489] SORT_3 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L490] SORT_1 var_73_arg_0 = var_72; [L491] SORT_3 var_73_arg_1 = state_69; [L492] SORT_3 var_73_arg_2 = var_68; [L493] SORT_3 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L494] SORT_1 var_78_arg_0 = var_77; [L495] SORT_3 var_78_arg_1 = state_74; [L496] SORT_3 var_78_arg_2 = var_73; [L497] SORT_3 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L498] SORT_1 var_83_arg_0 = var_82; [L499] SORT_3 var_83_arg_1 = state_79; [L500] SORT_3 var_83_arg_2 = var_78; [L501] SORT_3 var_83 = var_83_arg_0 ? var_83_arg_1 : var_83_arg_2; [L502] SORT_1 var_88_arg_0 = var_87; [L503] SORT_3 var_88_arg_1 = state_84; [L504] SORT_3 var_88_arg_2 = var_83; [L505] SORT_3 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L506] SORT_1 var_93_arg_0 = var_92; [L507] SORT_3 var_93_arg_1 = state_89; [L508] SORT_3 var_93_arg_2 = var_88; [L509] SORT_3 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L510] SORT_1 var_98_arg_0 = var_97; [L511] SORT_3 var_98_arg_1 = state_94; [L512] SORT_3 var_98_arg_2 = var_93; [L513] SORT_3 var_98 = var_98_arg_0 ? var_98_arg_1 : var_98_arg_2; [L514] SORT_1 var_104_arg_0 = var_103; [L515] SORT_3 var_104_arg_1 = state_99; [L516] SORT_3 var_104_arg_2 = var_98; [L517] SORT_3 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L518] SORT_1 var_109_arg_0 = var_108; [L519] SORT_3 var_109_arg_1 = state_105; [L520] SORT_3 var_109_arg_2 = var_104; [L521] SORT_3 var_109 = var_109_arg_0 ? var_109_arg_1 : var_109_arg_2; [L522] SORT_1 var_114_arg_0 = var_113; [L523] SORT_3 var_114_arg_1 = state_110; [L524] SORT_3 var_114_arg_2 = var_109; [L525] SORT_3 var_114 = var_114_arg_0 ? var_114_arg_1 : var_114_arg_2; [L526] SORT_1 var_119_arg_0 = var_118; [L527] SORT_3 var_119_arg_1 = state_115; [L528] SORT_3 var_119_arg_2 = var_114; [L529] SORT_3 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L530] SORT_1 var_124_arg_0 = var_123; [L531] SORT_3 var_124_arg_1 = state_120; [L532] SORT_3 var_124_arg_2 = var_119; [L533] SORT_3 var_124 = var_124_arg_0 ? var_124_arg_1 : var_124_arg_2; [L534] SORT_1 var_129_arg_0 = var_128; [L535] SORT_3 var_129_arg_1 = state_125; [L536] SORT_3 var_129_arg_2 = var_124; [L537] SORT_3 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L538] SORT_1 var_134_arg_0 = var_133; [L539] SORT_3 var_134_arg_1 = state_130; [L540] SORT_3 var_134_arg_2 = var_129; [L541] SORT_3 var_134 = var_134_arg_0 ? var_134_arg_1 : var_134_arg_2; [L542] SORT_1 var_139_arg_0 = var_138; [L543] SORT_3 var_139_arg_1 = state_135; [L544] SORT_3 var_139_arg_2 = var_134; [L545] SORT_3 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L546] SORT_1 var_145_arg_0 = var_144; [L547] SORT_3 var_145_arg_1 = state_140; [L548] SORT_3 var_145_arg_2 = var_139; [L549] SORT_3 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L550] SORT_1 var_150_arg_0 = var_149; [L551] SORT_3 var_150_arg_1 = state_146; [L552] SORT_3 var_150_arg_2 = var_145; [L553] SORT_3 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L554] SORT_1 var_155_arg_0 = var_154; [L555] SORT_3 var_155_arg_1 = state_151; [L556] SORT_3 var_155_arg_2 = var_150; [L557] SORT_3 var_155 = var_155_arg_0 ? var_155_arg_1 : var_155_arg_2; [L558] SORT_1 var_160_arg_0 = var_159; [L559] SORT_3 var_160_arg_1 = state_156; [L560] SORT_3 var_160_arg_2 = var_155; [L561] SORT_3 var_160 = var_160_arg_0 ? var_160_arg_1 : var_160_arg_2; [L562] SORT_1 var_166_arg_0 = var_165; [L563] SORT_3 var_166_arg_1 = state_161; [L564] SORT_3 var_166_arg_2 = var_160; [L565] SORT_3 var_166 = var_166_arg_0 ? var_166_arg_1 : var_166_arg_2; [L566] SORT_1 var_171_arg_0 = var_170; [L567] SORT_3 var_171_arg_1 = state_167; [L568] SORT_3 var_171_arg_2 = var_166; [L569] SORT_3 var_171 = var_171_arg_0 ? var_171_arg_1 : var_171_arg_2; [L570] SORT_1 var_176_arg_0 = var_175; [L571] SORT_3 var_176_arg_1 = state_172; [L572] SORT_3 var_176_arg_2 = var_171; [L573] SORT_3 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L574] SORT_1 var_180_arg_0 = var_179; [L575] SORT_3 var_180_arg_1 = state_177; [L576] SORT_3 var_180_arg_2 = var_176; [L577] SORT_3 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_180=0, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] EXPR var_180 & mask_SORT_3 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_208=-1, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L578] var_180 = var_180 & mask_SORT_3 [L579] SORT_3 var_210_arg_0 = state_209; [L580] SORT_3 var_210_arg_1 = var_180; [L581] SORT_1 var_210 = var_210_arg_0 == var_210_arg_1; [L582] SORT_1 var_211_arg_0 = var_208; [L583] SORT_1 var_211_arg_1 = var_210; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_211_arg_0=-1, var_211_arg_1=1, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] EXPR var_211_arg_0 | var_211_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_213=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_234=1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L584] SORT_1 var_211 = var_211_arg_0 | var_211_arg_1; [L585] SORT_1 var_232_arg_0 = state_213; [L586] SORT_1 var_232_arg_1 = input_231; [L587] SORT_1 var_232_arg_2 = var_211; [L588] SORT_1 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L589] SORT_1 var_235_arg_0 = var_232; [L590] SORT_1 var_235 = ~var_235_arg_0; [L591] SORT_1 var_236_arg_0 = var_234; [L592] SORT_1 var_236_arg_1 = var_235; VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_236_arg_0=1, var_236_arg_1=-1, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] EXPR var_236_arg_0 & var_236_arg_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L593] SORT_1 var_236 = var_236_arg_0 & var_236_arg_1; [L594] EXPR var_236 & mask_SORT_1 VAL [constr_218_arg_0=1, constr_224_arg_0=1, constr_230_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_100=15, mask_SORT_11=127, mask_SORT_13=63, mask_SORT_141=7, mask_SORT_162=3, mask_SORT_19=31, mask_SORT_1=1, mask_SORT_3=-1, state_105=0, state_10=0, state_110=0, state_115=0, state_120=0, state_125=0, state_12=0, state_130=0, state_135=0, state_140=0, state_146=0, state_151=0, state_156=0, state_161=0, state_167=0, state_172=0, state_177=0, state_182=0, state_18=0, state_190=0, state_191=0, state_194=0, state_209=0, state_24=0, state_282=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_64=0, state_69=0, state_74=0, state_79=0, state_84=0, state_89=0, state_94=0, state_99=0, var_101=15, var_106=14, var_111=13, var_116=12, var_121=11, var_126=10, var_131=9, var_136=8, var_142=7, var_147=6, var_152=5, var_157=4, var_15=32, var_163=3, var_168=2, var_173=1, var_186=33, var_203=0, var_204=0, var_207=0, var_20=31, var_233=0, var_25=30, var_30=29, var_35=28, var_40=27, var_45=26, var_50=25, var_55=24, var_582=0, var_60=23, var_65=22, var_70=21, var_75=20, var_80=19, var_85=18, var_90=17, var_95=16] [L594] var_236 = var_236 & mask_SORT_1 [L595] SORT_1 bad_237_arg_0 = var_236; [L596] CALL __VERIFIER_assert(!(bad_237_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 872 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 729.6s, OverallIterations: 150, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.6s, AutomataDifference: 192.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 349746 SdHoareTripleChecker+Valid, 133.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 349514 mSDsluCounter, 763259 SdHoareTripleChecker+Invalid, 115.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 583661 mSDsCounter, 457 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 221100 IncrementalHoareTripleChecker+Invalid, 221557 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 457 mSolverCounterUnsat, 179598 mSDtfsCounter, 221100 mSolverCounterSat, 1.8s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 15882 GetRequests, 14388 SyntacticMatches, 1 SemanticMatches, 1493 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101136 ImplicationChecksByTransitivity, 42.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=41421occurred in iteration=148, InterpolantAutomatonStates: 1254, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.8s AutomataMinimizationTime, 149 MinimizatonAttempts, 235433 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 5.8s SsaConstructionTime, 209.3s SatisfiabilityAnalysisTime, 223.5s InterpolantComputationTime, 89232 NumberOfCodeBlocks, 89232 NumberOfCodeBlocksAsserted, 163 NumberOfCheckSat, 92965 ConstructedInterpolants, 0 QuantifiedInterpolants, 638578 SizeOfPredicates, 82 NumberOfNonLiveVariables, 59140 ConjunctsInSsa, 765 ConjunctsInUnsatCore, 168 InterpolantComputations, 144 PerfectInterpolantSequences, 23358/25414 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-12-02 07:53:52,852 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1 --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 096bd3f2a021fa47b1c02d78a0aae6264c2c575942ed4c9ecbbbcad808039ae8 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-d790fec [2024-12-02 07:53:55,046 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-12-02 07:53:55,131 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-12-02 07:53:55,138 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-12-02 07:53:55,138 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-12-02 07:53:55,161 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-12-02 07:53:55,162 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-12-02 07:53:55,162 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-12-02 07:53:55,163 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-12-02 07:53:55,163 INFO L153 SettingsManager]: * Use memory slicer=true [2024-12-02 07:53:55,163 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-12-02 07:53:55,163 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-12-02 07:53:55,163 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-12-02 07:53:55,163 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Use SBE=true [2024-12-02 07:53:55,164 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-12-02 07:53:55,164 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Use constant arrays=true [2024-12-02 07:53:55,165 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:53:55,165 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:53:55,165 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-12-02 07:53:55,166 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-12-02 07:53:55,166 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-12-02 07:53:55,166 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-12-02 07:53:55,166 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:53:55,166 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Compute procedure contracts=false [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-12-02 07:53:55,167 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 096bd3f2a021fa47b1c02d78a0aae6264c2c575942ed4c9ecbbbcad808039ae8 [2024-12-02 07:53:55,415 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-12-02 07:53:55,423 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-12-02 07:53:55,425 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-12-02 07:53:55,426 INFO L270 PluginConnector]: Initializing CDTParser... [2024-12-02 07:53:55,427 INFO L274 PluginConnector]: CDTParser initialized [2024-12-02 07:53:55,428 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:53:58,182 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/964e3c548/2e5d541568ac4549a69b9a564ae754d7/FLAGde9ee1530 [2024-12-02 07:53:58,437 INFO L384 CDTParser]: Found 1 translation units. [2024-12-02 07:53:58,438 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:53:58,451 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/964e3c548/2e5d541568ac4549a69b9a564ae754d7/FLAGde9ee1530 [2024-12-02 07:53:58,466 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/data/964e3c548/2e5d541568ac4549a69b9a564ae754d7 [2024-12-02 07:53:58,468 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-12-02 07:53:58,469 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-12-02 07:53:58,470 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-12-02 07:53:58,471 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-12-02 07:53:58,475 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-12-02 07:53:58,475 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:53:58" (1/1) ... [2024-12-02 07:53:58,476 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5171c1ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:58, skipping insertion in model container [2024-12-02 07:53:58,476 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.12 07:53:58" (1/1) ... [2024-12-02 07:53:58,512 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-12-02 07:53:58,680 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c[1280,1293] [2024-12-02 07:53:58,898 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:53:58,910 INFO L200 MainTranslator]: Completed pre-run [2024-12-02 07:53:58,921 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c[1280,1293] [2024-12-02 07:53:59,020 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-12-02 07:53:59,034 INFO L204 MainTranslator]: Completed translation [2024-12-02 07:53:59,035 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59 WrapperNode [2024-12-02 07:53:59,035 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-12-02 07:53:59,036 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-12-02 07:53:59,036 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-12-02 07:53:59,036 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-12-02 07:53:59,042 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,061 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,121 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1458 [2024-12-02 07:53:59,121 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-12-02 07:53:59,122 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-12-02 07:53:59,122 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-12-02 07:53:59,122 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-12-02 07:53:59,131 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,131 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,141 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,167 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-12-02 07:53:59,167 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,168 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,206 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,209 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,214 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,219 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,224 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,235 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-12-02 07:53:59,236 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-12-02 07:53:59,236 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-12-02 07:53:59,236 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-12-02 07:53:59,237 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (1/1) ... [2024-12-02 07:53:59,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-12-02 07:53:59,256 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:53:59,269 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-12-02 07:53:59,273 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-12-02 07:53:59,299 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-12-02 07:53:59,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-12-02 07:53:59,299 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-12-02 07:53:59,299 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-12-02 07:53:59,300 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-12-02 07:53:59,300 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-12-02 07:53:59,600 INFO L234 CfgBuilder]: Building ICFG [2024-12-02 07:53:59,601 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-12-02 07:54:00,601 INFO L? ?]: Removed 416 outVars from TransFormulas that were not future-live. [2024-12-02 07:54:00,601 INFO L283 CfgBuilder]: Performing block encoding [2024-12-02 07:54:00,610 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-12-02 07:54:00,610 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2024-12-02 07:54:00,610 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:54:00 BoogieIcfgContainer [2024-12-02 07:54:00,610 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-12-02 07:54:00,613 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-12-02 07:54:00,613 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-12-02 07:54:00,618 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-12-02 07:54:00,618 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.12 07:53:58" (1/3) ... [2024-12-02 07:54:00,619 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d495b46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:54:00, skipping insertion in model container [2024-12-02 07:54:00,619 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.12 07:53:59" (2/3) ... [2024-12-02 07:54:00,619 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d495b46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.12 07:54:00, skipping insertion in model container [2024-12-02 07:54:00,619 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.12 07:54:00" (3/3) ... [2024-12-02 07:54:00,621 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c [2024-12-02 07:54:00,636 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-12-02 07:54:00,637 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d32_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-12-02 07:54:00,682 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-12-02 07:54:00,691 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@4369ae28, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-12-02 07:54:00,691 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-12-02 07:54:00,695 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-12-02 07:54:00,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-12-02 07:54:00,699 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:54:00,700 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-12-02 07:54:00,700 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:54:00,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:54:00,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-12-02 07:54:00,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 07:54:00,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2076364599] [2024-12-02 07:54:00,712 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:54:00,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:54:00,713 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:54:00,715 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:54:00,716 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-12-02 07:54:01,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:54:01,264 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-12-02 07:54:01,275 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:54:01,555 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-12-02 07:54:01,555 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:54:01,716 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 07:54:01,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2076364599] [2024-12-02 07:54:01,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2076364599] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:54:01,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1245446988] [2024-12-02 07:54:01,717 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:54:01,717 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 07:54:01,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 07:54:01,719 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 07:54:01,721 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-12-02 07:54:02,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:54:02,687 INFO L256 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-12-02 07:54:02,696 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:54:02,832 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-12-02 07:54:02,833 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-12-02 07:54:02,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1245446988] provided 1 perfect and 0 imperfect interpolant sequences [2024-12-02 07:54:02,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-12-02 07:54:02,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-12-02 07:54:02,838 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340858430] [2024-12-02 07:54:02,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-12-02 07:54:02,843 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-12-02 07:54:02,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 07:54:02,865 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-12-02 07:54:02,866 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:54:02,869 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:54:03,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:54:03,230 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-12-02 07:54:03,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-12-02 07:54:03,233 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-12-02 07:54:03,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:54:03,239 INFO L225 Difference]: With dead ends: 43 [2024-12-02 07:54:03,239 INFO L226 Difference]: Without dead ends: 25 [2024-12-02 07:54:03,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-12-02 07:54:03,245 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-12-02 07:54:03,246 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-12-02 07:54:03,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-12-02 07:54:03,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-12-02 07:54:03,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-12-02 07:54:03,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-12-02 07:54:03,283 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-12-02 07:54:03,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:54:03,285 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-12-02 07:54:03,285 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-12-02 07:54:03,285 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-12-02 07:54:03,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-12-02 07:54:03,287 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:54:03,287 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-12-02 07:54:03,300 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-12-02 07:54:03,496 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-12-02 07:54:03,687 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt [2024-12-02 07:54:03,688 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:54:03,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:54:03,688 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-12-02 07:54:03,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 07:54:03,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1265412192] [2024-12-02 07:54:03,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:54:03,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:54:03,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:54:03,693 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:54:03,694 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-12-02 07:54:04,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:54:04,433 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-12-02 07:54:04,445 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:54:04,936 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 07:54:04,937 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:54:05,091 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 07:54:05,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265412192] [2024-12-02 07:54:05,091 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265412192] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:54:05,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [348267605] [2024-12-02 07:54:05,091 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-12-02 07:54:05,091 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 07:54:05,091 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 07:54:05,093 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 07:54:05,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-12-02 07:54:06,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-12-02 07:54:06,616 INFO L256 TraceCheckSpWp]: Trace formula consists of 994 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-12-02 07:54:06,627 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:54:06,977 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-12-02 07:54:06,977 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:54:07,116 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [348267605] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:54:07,116 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-12-02 07:54:07,116 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-12-02 07:54:07,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700405043] [2024-12-02 07:54:07,117 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-12-02 07:54:07,117 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-12-02 07:54:07,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-12-02 07:54:07,118 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-12-02 07:54:07,118 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-12-02 07:54:07,118 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:54:07,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-12-02 07:54:07,695 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-12-02 07:54:07,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-12-02 07:54:07,695 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-12-02 07:54:07,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-12-02 07:54:07,696 INFO L225 Difference]: With dead ends: 36 [2024-12-02 07:54:07,696 INFO L226 Difference]: Without dead ends: 34 [2024-12-02 07:54:07,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-12-02 07:54:07,697 INFO L435 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-12-02 07:54:07,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-12-02 07:54:07,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-12-02 07:54:07,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-12-02 07:54:07,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-12-02 07:54:07,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-12-02 07:54:07,705 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-12-02 07:54:07,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-12-02 07:54:07,706 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-12-02 07:54:07,706 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-12-02 07:54:07,706 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-12-02 07:54:07,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-12-02 07:54:07,707 INFO L210 NwaCegarLoop]: Found error trace [2024-12-02 07:54:07,707 INFO L218 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-12-02 07:54:07,718 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2024-12-02 07:54:07,917 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-12-02 07:54:08,108 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:54:08,108 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-12-02 07:54:08,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-12-02 07:54:08,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-12-02 07:54:08,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-12-02 07:54:08,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [246324512] [2024-12-02 07:54:08,112 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 07:54:08,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-12-02 07:54:08,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 [2024-12-02 07:54:08,113 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-12-02 07:54:08,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-12-02 07:54:09,046 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 07:54:09,046 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 07:54:09,062 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-12-02 07:54:09,076 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-12-02 07:54:12,964 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-12-02 07:54:12,964 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-12-02 07:54:17,436 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse15 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_213~0#1|))) (let ((.cse5 (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_177~0#1|) |c_ULTIMATE.start_main_~state_209~0#1|)) (.cse13 (not .cse15)) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_190~0#1|)) (.cse14 (or (forall ((|v_ULTIMATE.start_main_~var_232_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_232_arg_1~0#1_17|))))))))))))) .cse15))) (let ((.cse9 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse7 (and (or .cse13 (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse12))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|))))))))) .cse14)) (.cse6 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 64))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|) |c_ULTIMATE.start_main_~state_209~0#1|))) (.cse0 (and (or (forall ((|v_ULTIMATE.start_main_~var_236_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_193_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_196_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_207_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_236_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_193_arg_1~0#1_17|) .cse12))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_196_arg_1~0#1_17|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_207_arg_1~0#1_17|)))))))))))))))))))))) .cse13) .cse14)) (.cse4 (not .cse5)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_180_arg_2~0#1_15| (_ BitVec 64))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_180_arg_2~0#1_15|) |c_ULTIMATE.start_main_~state_209~0#1|))))) (and (or (let ((.cse3 (= ((_ extract 7 0) (bvand .cse8 (_ bv254 32))) (_ bv0 8)))) (let ((.cse1 (not .cse3))) (and (or .cse0 (and (or .cse1 .cse2) (or .cse3 .cse4))) (or (and (or .cse3 .cse5) (or .cse1 .cse6)) .cse7)))) .cse9) (or (not .cse9) (let ((.cse11 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 (_ bv255 32)))))) (let ((.cse10 (not .cse11))) (and (or .cse7 (and (or .cse6 .cse10) (or .cse11 .cse5))) (or .cse0 (and (or .cse11 .cse4) (or .cse2 .cse10))))))))))) is different from false [2024-12-02 07:54:17,618 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-12-02 07:54:17,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [246324512] [2024-12-02 07:54:17,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [246324512] provided 0 perfect and 1 imperfect interpolant sequences [2024-12-02 07:54:17,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1203159707] [2024-12-02 07:54:17,618 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-12-02 07:54:17,618 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-12-02 07:54:17,618 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 [2024-12-02 07:54:17,620 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-12-02 07:54:17,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2e353f84-db47-4a20-9c85-8994006ad754/bin/uautomizer-verify-84ZbGMXZE1/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-12-02 07:54:19,955 INFO L229 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-12-02 07:54:19,956 INFO L230 tOrderPrioritization]: Conjunction of SSA is unsat [2024-12-02 07:54:20,035 INFO L256 TraceCheckSpWp]: Trace formula consists of 1458 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-12-02 07:54:20,051 INFO L279 TraceCheckSpWp]: Computing forward predicates...